2. SMALL SIGNAL PART WITH STV2248.................................................................................... 3
• 2.1 Vision IF amplifier...................................................................................................................................................................3
• 2.3 AM demodulator ...................................................................................................................................................................3
• 2.4 FM demodulator ....................................................................................................................................................................3
• 2.5 Video switch............................................................................................................................................................................4
6. VERTICAL OUTPUT STAGE WITH TDA8174A....................................................................................................................7
7. VIDEO OUTPUT AMPLIFIER STV5114...................................................................................................................................7
8. POWER SUPPLY (SMPS) ............................................................................................................................................................7
10. SERIAL ACCESS CMOS 8K EEPROM 24C08.....................................................................................................................7
GENERAL BLOCK DIAGRAM of 11AK46.................................................................................................................................17
Service menu ....................................................................................................................................................................................18
DO NOT CHANGE ANY MODULE UNLESS THE SET IS SWITCHED OFF
The mains supply part of the switch mode power supply’s transformer is live.
Use an isolating transformer.
The receiver complies with the safety requirements.
SAFETY PRECAUTIONS:
The service of this TV set must be carried out by qualified persons only. Components marked
with the warning symbol on the circuit diagram are critical for safety and must only be replaced with an
identical component.
- Power resistor and fused resistors must be mounted in an identical manner to the original component.
- When servicing this TV, check that the EHT does not exceed 26kV.
TV set switched off:
Make short-circuit between HV-CRT clip and CRT ground layer.
Short C809 before changing IC800 or other components in primary side of the SMPS part.
Measurements:
Voltage readings and oscilloscope traces are measured under the following conditions:
Antenna signal’s level is 60dB at the color bar pattern from the TV pattern generator. (100% white, 75%
color saturation)
Brightness, contrast, and color are adjusted for normal picture performance.
Mains supply, 220VAC, 50Hz.
PERI-TV SOCKET
- The figure of PERI-TV socket-
SCART 1 PINING
1 Audio right output0.5Vrms / 1K
2 Audio right input0.5Vrms / 10K
3 Audio left output0.5Vrms / 1K
4 Ground AF
5 Ground Blue
6 Audio left input0.5Vrms / 10K
7 Blue input0.7Vpp / 75ohm
8 AV switching input0-12VDC /10K
9 Ground Green
10 11 Green input0.7Vpp / 75ohm
12 13 Ground Red
14 Ground Blanking
15 Red input0.7Vpp / 75ohm
16 Blanking input0-0.4VDC, 1-3VDC / 75 Ohm
17 Ground CVBS output
18 Ground CVBS input
11AK46 is a 90° chassis capable of driving 14” tubes at the appropriate currents. The chassis is capable
of operating in PAL, SECAM and NTSC standards. The sound system is capable of giving 3,5 watt
RMS output into a load of 8 ohms. One page, 7 page SIMPLETEXT, TOPTEXT, FASTTEXT and US
Closed Caption is also provided. The chassis is equipped with a 42 pin Scart connector.
2. SMALL SIGNAL PART WITH STV2248:
STV2248 video processor is essential for realizing all small signal functions for a color TV receiver.
2.1 Vision IF amplifier3
The vision IF amplifier can demodulate signals with positive and negative modulation. The PLL
demodulator is completely alignment-free. Although the VCO (Toko-coil) of the PLL circuit is external,
yet the frequency is fixed to the required value by the original manufacturer thus the Toko-coil does not
need to be adjusted manually. The setting of the various frequencies (38.9 or 45.75 MHz) can be made
via changing the coil itself.
2.2 QSS Sound circuit (QSS versions)
The sound IF amplifier is similar to the vision IF amplifier and has an external AGC de-coupling capacitor.
The single reference QSS mixer is realised by a multiplier. In this multiplier the SIF signal is converted to
the inter-carrier frequency by mixing it with the regenerated picture carrier from the VCO. The mixer
output signal is supplied to the output via a high-pass filter for attenuation of the residual video signals.
With this system a high performance hi-fi stereo sound processing can be achieved. The AM sound
demodulator is realised by a multiplier. The modulated sound IF signal is multiplied in phase with the
limited SIF signal. The demodulator output signal is supplied to the output via a low-pass filter for
attenuation of the carrier harmonics. The AM signal is supplied to the output via the volume control.
2.3 AM DEMODULATOR
The AM demodulated signal results from multiplying the input signal by itself, it is available on
AM/FM output.
2.4 FM demodulator and audio amplifier :
The FM demodulator is realized as narrow-band PLL with external loop filter, which provides the
necessary selectivity without using an external band-pass filter. To obtain a good selectivity a linear phase
detector and constant input signal amplitude are required. For this reason the inter-carrier signal is
internally supplied to the demodulator via a gain controlled amplifier and AGC circuit. The nominal
frequency of the demodulator is tuned to the required frequency (4.5/5.5/6.0/6.5 MHz) by means of a
calibration circuit that uses the clock frequency of the µ-controller/Teletext decoder as a reference. The
setting to the wanted frequency is realized by means of the software. It can be read whether the PLL
frequency is inside or outside the window and whether the PLL is in lock or not. With this information it is
possible to make an automatic search system for the incoming sound frequency. This is realized by means
“13
of a software loop that alternate the demodulator to various frequencies, then select the frequency on
which a lock condition has been found. De-emphasis output signal amplitude is independent of the TV
standard and has the same value for a frequency deviation of ±25 kHz at the 4.5 MHz standard and for a
deviation of ±50 kHz for the other standards. When the IF circuit is switched to positive modulation the
internal signal on de-emphasis pin is automatically muted. The audio control circuit contains an audio
switch and volume control. In the mono inter-carrier sound versions the Automatic Volume Leveling
(AVL) function can be activated. The pin to which the external capacitor has to be connected depends on
the IC version. For the 90° types the capacitor is connected to the EW output pin (pin 20). When the
AVL is active it automatically stabilizes the audio output signal to a certain level.
2.5 Video switching
The video processor (STV2248C) has three CVBS inputs and two RGB inputs. The first CVBS input is
used for external CVBS from SCART 1, the second is used for either CVBS or Y/C from BAV/FAV,
and the third one is used for internal video. The selection between both external video inputs signals is
realized by means of software and hardware switches.
2.6 Synchronization circuit
The video processor (STV224X) performs the horizontal and vertical processing. The external horizontal
deflection circuit is controlled via the Horizontal output pulse (HOUT). The vertical scanning is performed
through an external ramp generator and a vertical power amplifier IC controlled by the Vertical output
pulse (VOUT).
The main components of the deflection circuit are:
• PLL1: the first phase locked loop that locks the internal line frequency reference on the
CVBS input signal. It is composed of an integrated VCO (12 MHz) that requires the chroma
Reference frequency (4.43MHz or 3.58MHz crystal oscillator reference signal), a divider by
768, a line decoder, and a phase comparator.
• PLL2: The second phase locked loop that controls the phase of the horizontal output
(Compensation of horizontal deflection transistor storage time variation). Also the horizontal position
adjustment is also performed in PLL2.
• A vertical pulse extractor.
• A vertical countdown system to generate all vertical windows (vertical synchronization window, frame
blanking pulses, 50/60Hz identification window...).
• Automatic identification of 50/60Hz scanning.
• PLL1 time constant control.
• Noise detector, video identification circuits, and horizontal coincidence detector.
• Vertical output stage including de-interlace function, vertical position control.
• Vertical amplitude control voltage output (combined with chroma reference output and
Xtal 1 indication).
2.7 Chroma and luminance processing:
The chroma decoder is able to demodulate PAL, NTSC and SECAM signals.
The decoder dedicated to PAL and NTSC sub-carrier is based on a synchronous demodulator, and an
Xtal PLL locked on the phase reference signal (burst).
The SECAM demodulation is based on a PLL with automatic calibration loop.
The color standard identification is based on the burst recognition.
Automatic and forced modes can be selected through the I2C bus.
“14
NTSC tint, and auto flesh are controlled through I2C bus.
Xtal PLL can handle up to 3 crystals to work in PAL M, PAL N and NTSC M for South America.
ACC an ACC overload control the chroma sub-carrier amplitude within 26dB range. Both
ACC s are based on digital systems and do not need external capacitor.
All chroma filters are fully integrated and tuned via a PLL locked on Xtal VCO signal.
A second PLL is used for accurate fine-tuning of the SECAM bell filter. This tuning is achieved during the
frame blanking. An external capacitor memorizes the bell filter tuning voltage.
A base-band chroma delay-line rebuilds the missing color line in SECAM and removes transmission
phase errors in PAL.
The base-band chroma delay line is clocked with 6MHz signal provided by the horizontal scanning VCO.
The luminance processor is composed of a chroma trap filter, a luminance delay line, a peaking function
with noise coring feature, a black stretch circuit.
Trap filter and luminance delay lines are achieved with the use of bi-quad integrated filters, auto-aligned
via a master filter phase locked loop.
2.8 RGB output circuit:
The video processor performs the R, G, B processing.
There are three sources:
1. Y,U,V inputs (coming from luma part (Y output), and chroma decoder outputs (R-Y, B-Y outputs).
2. External R,G,B inputs from SCART (converted internally in Y,U,V), with also the possibility to input
YUV signals from a DVD player, (YUV specification is Y=0.7 V PP , U= 0.7 V PP , V = 0.7V PP for
100% color bar).
3. Internal R,G,B inputs (for OSD and Teletext display)
The main functions of the video part are:
- Y,U,V inputs with integrated clamp loop, allowing a DC link with YUV outputs,
- External RGB inputs (RGB to YUV conversion), or direct YUV inputs,
- Y,U,V switches,
- Contrast, saturation, brightness controls,
- YUV to RGB matrix,
- OSD RGB input stages (with contrast control),
- RGB switches,
- APR function,
- DC adjustment of red and green channels,
- Drive adjustments (R, G, B gain),
- Digital automatic cut-off loop control,
- Manual cut-off capability with I2C adjustments,
- Half tone, oversize blanking, external insertion detection, blue screen,
- Blanking control and RGB output stages.
“15
2.9 µ-Controller
The ST92195 is the micro-controller, which is required for a color TV receiver. ST92195D1 is the
version with one page Teletext and ST92195D7 is the one with 7 page Teletext. The IC has the supply
voltages of 5 V and they are mounted in PSDIP package with 56 pins.
µ-Controller has the following features
• Display of the program number, channel number, TV Standard, analogue values, sleep timer, parental
control and mute is done by OSD
• Single LED for standby and on mode indication
• System configuration with service mode
• 3 level logic output for SECAM and Tuner band switching
3. TUNER
PLL tuner is used as a tuner.
Channel coverage of UV1316:
BAND
OFF-AIR CHANNELS
CHANNELS FREQUENCY
RANGE (MHz)
CABLE CHANNELS
CHANNELS FREQUENCY
RANGE (MHz)
Low Band E2 to C48.25 to 82.25 (1)S01 to S0869.25 to 154.25
Mid Band E5 to E12175.25 to 224.25S09 to S38161.25 to 439.25
High Band E21 to E69471.25 to 855.25 (2)S39 to S41447.25 to 463.25
(1). Enough margin is available to tune down to 45.25 MHz.
(2). Enough margin is available to tune up to 863.25 MHz.
Noise Typical Max. Gain Min. Typical Max.
Low band : 5dB 9dB All channels : 38dB 44dB 52dB
Mid band : 5dB 9dB Gain Taper (of-air channels): 8dB
High band : 6dB 9dB
“16
Channel Coverage UV1336:
BANDCHANNELS FREQUENCY
RANGE (MHz)
Low Band 2 to D55.25 to 139.25
Mid Band E to PP145.25 to 391.25
High Band QQ to 69397.25 to 801.25
Noise is typically 6dB for all channels. Gain is minimum 38dB and maximum 50dB for all channels.
5. SOUND OUTPUT STAGE TDA7496
TDA7496 is used as the AF output stereo amplifier . It is supplied by +20 VDC coming from a separate
winding in the SMPS transformer. An output power of 3.5W (THD=0.5%) can be delivered into an
8ohm load.
6. VERTICAL OUTPUT STAGE WITH TDA8174A
The TDA8174A is a power amplifier circuit for use in 90° and 110° colour deflection systems for 25 to
200 Hz field frequencies, and for 4: 3 and 16: 9 picture tubes.
7. VIDEO OUTPUT DISCRETE AMPLIFIERS
There are three monolithic video output amplifiers. Each amplifier consist of two transistors which are
TR_2SC2482 and BF421.
8. POWER SUPPLY (SMPS)
The DC voltages required at various parts of the chassis are provided by an SMPS transformer
controlled by the IC MC44608 which is designed for driving, controlling and protecting switching
transistor of SMPS. The transformer produces 115V for FBT input, ±14V for audio output IC, S+3.3,
S+5V and 8V for ST92195.
10. SERIAL ACCESS CMOS 8K EEPROM 24C08
The 24C08 is a 8Kbit electrically erasable programmable memory (EEPROM), organized as 4 blocks of
256*08 bits. The memory is compatible with the I²C standard, two wire serial interface which uses a bidirectional data bus and serial clock.
The ST92195 is a member of the ST9+ family of micro-controllers, completely developed and produced
by SGS-THOMSON Microelectronics using a proprietary n-well HCMOS process. The nucleus of the
ST92195 is the advanced Core, which includes the Central Processing Unit (CPU), the ALU, the
Register File and the interrupt controller. The Core has independent memory and register buses to add to
the efficiency of the code. A set of on-chip peripherals form a complete sys-tem for TV set and VCR
applications:
– Voltage Synthesis
– VPS/WSS Slicer
– Teletext Slicer
– Teletext Display RAM
– OSD
Additional peripherals include a watchdog timer , a serial peripheral interface (SPI), a 16-bit timer and
an A/D converter.
“18
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