Intel® Atom™ E38xx-based
Embedded Processing Unit with
SATA, Dual Ethernet, USB,
Digital I/O, Serial, Video, Mini
PCIe Sockets, SPX, Trusted
Platform Module, and microSD.
Although every effort has been made to ensure this document is error-free, VersaLogic makes no
representations or warranties with respect to this product and specifically disclaims any implied warranties
of merchantability or fitness for any particular purpose.
VersaLogic reserves the right to revise this product and associated documentation at any time without
obligation to notify anyone of such changes.
* Other names and brands may be claimed as the property of others.
VL-EPU-3312 Reference Manual ii
Product Revision Notes
Revision 1.2
Updated Integrator’s note on page 32
Revision 1.1
Updated board images
Revised audio content
Updated Mini DisplayPort cable information
Revision 1.00
First release
Support Page
The Raven Support Page contains additional information and resources for this product
including:
Operating system information and software drivers
Data sheets and manufacturers links for chips used in this product
BIOS information and upgrades
VersaTech KnowledgeBase
The VersaTech KnowledgeBase contains useful technical information about VersaLogic
products, along with product advisories.
Customer Support
If you are unable to solve a problem after reading this manual, visiting the product support page,
or searching the KnowledgeBase, contact VersaLogic Technical Support at (503) 747-2261.
VersaLogic support engineers are also available via e-mail at Support@VersaLogic.com.
Repair Service
If your product requires service, you must obtain a Returned Material Authorization (RMA)
number by calling 503-747-2261. Be ready to provide the following information:
Your name, the name of your company, your phone number, and e-mail address
The name of a technician or engineer that can be contacted if any questions arise
The quantity of items being returned
The model and serial number (barcode) of each item
A detailed description of the problem
Steps you have taken to resolve or recreate the problem
The return shipping address
Warranty Repair All parts and labor charges are covered, including return shipping
Non-warranty Repair All approved non-warranty repairs are subject to diagnosis and labor
charges for UPS Ground delivery to United States addresses.
charges, parts charges and return shipping fees. Specify the shipping
method you prefer and provide a purchase order number for invoicing
the repair.
VL-EPU-3312 Reference Manual iii
Note:
Mark the RMA number clearly on the outside of the box before returning.
CAUTION:
Electrostatic discharge (ESD) can damage circuit boards, disk drives, and other
components.The circuit board must only be handled at an ESD workstation. If an
approved station is not available, some measure of protection can be provided by
wearing a grounded antistatic wrist strap. Keep all plastic away from the board, and do
not slide the board over any surface.
After removing the board from its protective wrapper, place the board on a grounded,
static-free surface, component side up. Use an antistatic foam pad if available.
The board should also be protected inside a closed metallic antistatic envelope during
shipment or storage.
Note:
The exterior coating on some metallic antistatic bags is sufficiently conductive to cause
excessive battery drain if the bag comes in contact with the bottom side of the Raven.
CAUTION:
Avoid touching the exposed circuitry with your fingers when handling the board. Though
it will not damage the circuitry, it is possible that small amounts of oil or perspiration on
the skin could have enough conductivity to cause the contents of CMOS RAM to
become corrupted through careless handling, resulting in CMOS resetting to factory
defaults.
CAUTION:
All mounting standoffs should be connected to earth ground (chassis ground). This
provides proper grounding for EMI purposes.
Cautions
Electrostatic Discharge
Handling Care
Earth Ground Requirement
VL-EPU-3312 Reference Manual iv
Contents
Cautions ............................................................................................................................. iv
Electrostatic Discharge ......................................................................................... iv
Handling Care ....................................................................................................... iv
Earth Ground Requirement ................................................................................... iv
Core), E3827 (1.75 GHz, Dual
Core), or E3815 (1.46 GHz, Single
Core) processor
4 GB or 2GB soldered-on
DDR3L-1333 RAM
Two auto-detect 10BaseT/
100BaseTX/1000BaseT Ethernet
ports with network boot support
(Port 1 only)
Integrated Intel Gen 7 graphics core
Four USB 2.0 host ports, one
USB 3.0/2.0 port, one port available
through Mini PCIe Socket #1
Four RS-232/422/485 COM ports
One Mini DisplayPort++ interface
One LVDS interface
Wide input voltage range (8 – 30V)
Input under-voltage and over-voltage
protection
Eight multi-range analog inputs
I2C support
Two Mini PCIe sockets
Full ACPI support
One SATA port, 3.0 Gbits/s
One microSD socket
Watchdog Timer, prescaler of
approximately 1 μs to 10 minutes.
Standard heat plate with optional
thermal solutions
Optional mounting plate
Field upgradeable AMI UEFI BIOS
with enhancements
RoHS compliant
Extended temperature operation
Customization available
Trusted Platform Module
The Raven (VL-EPU-3312) is a feature-packed Embedded Processing Unit (EPU) engineered
and tested to meet the embedded industry’s evolving requirements to develop smaller, lighter,
and lower power embedded systems while adhering to stringent regulatory standards.
This embedded computer, equipped with an Intel* Atom* 38xx processor, is designed to withstand
extreme temperature, impact, and vibration. Its features include:
Introduction
Technical Specifications
VL-EPU-3312 Reference Manual 10
The Raven is compatible with popular operating systems including Microsoft*
Windows* 7/WES7, and Linux (see the VersaLogic OS Compatibility Chart).
Raven EPUs receive 100% functional testing and are backed by a limited five-year warranty.
Careful parts sourcing and US-based technical support ensure the highest possible quality,
reliability, service, and product longevity for this exceptional EPU.
Refer to the Raven Data Sheet for complete specifications. Specifications are subject to change
without notification.
Block Diagram
Introduction
Figure 2. Raven (VL-EPU-3312) Block Diagram
VL-EPU-3312 Reference Manual 11
Dimensions and Mounting
Raven Dimensions
Figure 3 provides the board’s dimensions.
Introduction
Figure 3. Raven Dimensions and Mounting Holes
(Not to scale. All dimensions in millimeters.)
VL-EPU-3312 Reference Manual 12
Mounting Plate Dimensions
Introduction
Figure 4. Mounting Plate Dimensions
(Not to scale. All dimensions in millimeters.)
VL-EPU-3312 Reference Manual 13
2
Initial Configuration
The following components are recommended for a typical development system with the Raven
EPU:
ATX power supply
VL-CBR-4005B paddleboard and VL-CBR-4005A cable. Refer to the chapter titled “VL-
CBR-4005B Paddleboard”, beginning on page 55 for details on the VL-CBR-4005B
paddleboard.
USB keyboard and mouse
SATA hard drive
USB CD-ROM drive
Configuration and Setup
Configuration and Setup
VGA monitor and a VL-CBR-2032 Mini DisplayPort-to-VGA adapter
A thermal solution (using either VersaLogic accessories or a customer-designed solution)
You will also need an operating system (OS) installation CD-ROM.
Basic Setup
The following steps outline the procedure for setting up a typical development system. The
Raven should be handled at an ESD workstation or while wearing a grounded antistatic wrist
strap.
Before you begin, unpack the Raven and accessories. Verify that you received all the items you
ordered. Inspect the system visually for any damage that may have occurred in shipping. Contact
Support@VersaLogic.com immediately if any items are damaged or missing.
Gather all the peripheral devices you plan to attach to the Raven as well as their interface and
power cables. Attach standoffs to the board to stabilize it and make it easier to work with.
Figure 5 shows a typical setup for the Raven in the development environment.
VL-EPU-3312 Reference Manual 14
Configuration and Setup
igure 5. Typical Development Configuration
1. Attach Cables and Peripherals
Attach a VGA monitor to the baseboard’s Mini DisplayPort++ connector using a VL-CBR-
2032.
Attach a SATA hard disk to the baseboard’s SATA connector using a VL-CBR-0701 or VL-
CBR-0702 cable.
Attach a VL-CBR-4005B paddleboard to the baseboard’s User I/O connector.
Connect a USB keyboard and USB mouse to the USB Type-A connectors on the VL-CBR-
4005B paddleboard.
Attach a USB CD-ROM drive to one of the USB Type-A connectors on the VL-CBR-4005B
paddleboard.
2. Connect Power Source
Plug the power adapter cable VL-CBR-0809 into the main power connector on the
baseboard. Attach the motherboard connector of the ATX power supply to the adapter.
Attach an ATX power cable to any 3.5-inch drive that is not already attached to the power
supply (hard drive or CD-ROM drive).
VL-EPU-3312 Reference Manual 15
3. Review Configuration
CAUTION: If BIOS default settings make the system unbootable and prevent the user
from entering the BIOS Setup utility, the Raven must be serviced by the factory.
Before you power up the system, double-check all the connections. Make sure all cables are
oriented correctly, that adequate power is supplied to the Raven and all attached peripheral
devices.
4. Power On
Turn on the ATX power supply and the video monitor. If the system is correctly configured,
a video signal should be present.
5. Install Operating System
Install the operating system according to the instructions provided by the operating system
manufacturer.
BIOS Setup Utility
Refer to the VersaLogic System Utility Reference Manual for information on how to configure
the Raven BIOS.
Configuration and Setup
The Raven permits you to store user-defined BIOS settings. This enables you to retrieve those
settings from cleared or corrupted CMOS RAM, or battery failure. All BIOS defaults can be
changed, except the time and date. BIOS defaults can be updated with the BIOS Update Utility.
Default BIOS Setup Values
After CMOS RAM clears, the system loads default BIOS parameters the next time the board
powers on. The default CMOS RAM setup values are used in order to boot the system whenever
the main CMOS RAM values are blank, or when the system battery is dead or has been removed
from the board.
Operating System Installation
The standard PC architecture used on the Raven makes the installation and use of most of the
standard x86-based operating systems very simple. The operating systems listed on the
VersaLogic Software Support page use the standard installation procedures provided by the
maker of the operating system. Special optimized hardware drivers for a particular operating
system, or a link to the drivers, are available on the Raven Support Page.
VL-EPU-3312 Reference Manual 16
Jumper Blocks
Jumper
Block
Pins
Function
Description
V1
1-2
COM2 Endpoint
Termination
Jumper In: Endpoint termination (for RS-485 or RS-422)
Jumper Out: Not terminated (RS-232) (default)
3-4
COM1 Endpoint
termination
Jumper In: Endpoint termination (for RS-485 or RS-422)
Jumper Out: Not terminated (RS-232) (default)
V2
1-2
COM3 Endpoint
Termination
Jumper In: Endpoint termination (for RS-485 or RS-422)
Jumper Out: Not terminated (RS-232) (default)
3-4
COM4 Endpoint
termination
Jumper In: Endpoint termination (for RS-485 or RS-422)
Jumper Out: Not terminated (RS-232) (default)
V3
1-2
Primary/Backup
BIOS Select
Jumper In: Use Backup BIOS
Jumper Out: Use Primary BIOS (default)
V4
1-2
Backup BIOS
Write Protect
Jumper In: Backup BIOS is write-protected
Jumper Out: Backup BIOS is not write-protected (default)
Jumper As-Shipped Configuration
Configuration and Setup
Figure 6. Jumpers As-Shipped Configuration
Jumper Configuration Summary
Table 1: Jumper Block Configurations
VL-EPU-3312 Reference Manual 17
CPU
Board Model
Memory Type
Capacity
Data Rate
VL-EPU-3312-EAP
DDR3L
2 GB
1066 MT/s – Single Channel
VL-EPU-3312-EBP
DDR3L
2 GB
1333 MT/s – Dual Channel
VL-EPU-3312-EDP
DDR3L
4 GB
1333 MT/s – Dual Channel
3
Board Features
Board Features
The Intel Atom E38xx SoC features integrated 3D graphics, video encode and decode, and
memory and display controllers in one package. The following CPU configurations are available:
VL-EPU-3312-EAP: Intel Atom 3815 – 1.46 GHz, Single Core
VL-EPU-3312-EBP: Intel Atom 3827 – 1.75 GHz, Dual Core
VL-EPU-3312-EDP: Intel Atom 3845 – 1.91 GHz, Quad Core
CPU Die Temperature
The CPU die temperature is affected by numerous conditions, such as CPU utilization, CPU
speed, ambient air temperature, airflow, thermal effects of adjacent circuit boards, external heat
sources, and many others.
The thermal management for the Intel Atom E38xx series of processors consists of a sensor
located in the core processor area. The processor contains multiple techniques to help better
manage thermal attributes of the processor. It implements thermal-based clock throttling and
thermal-based speed step transitions. There is one thermal sensor on the processor that triggers
Intel's thermal monitor (the temperature at which the thermal sensor triggers the thermal monitor
is set during the fabrication of the processor). Triggering of this sensor is visible to software by
means of the thermal interrupt LVT entry in the local APIC. (See the Intel Atom Processor
E3800 Series Datasheet for complete information.)
System RAM
The Raven has soldered-on SDRAM with the following characteristics:
Flash Storage
The Raven provides on-board eMMC* Flash storage on certain models of the product:
Later chapters describe the Raven’s I/O interfaces and their associated connectors as follows:
Mass Storage Interfaces (SATA, microSD, and eMMC Flash), beginning on page 29
Multi-purpose I/O (USB, Mini PCIe / mSATA, User I/O), beginning on page 31
Serial I/O, beginning on page 43
Video Interfaces (Mini DisplayPort++ and LVDS), beginning on page 46
Network Interfaces, beginning on page 52
Real-Time Clock (RTC)
The Raven features a real-time clock/calendar (RTC) circuit. The Raven supplies RTC voltage in
S5, S3, and S0 states, but requires an external +2.75 V to +3.3 V battery connection. Refer to the
section titled Battery Power Options on page 24 for more information. The BIOS Setup utility
sets the RTC.
Board Features
Watchdog Timer
The Raven has a watchdog timer that contains a selectable pre-scaler approximately 1 as to
10 minutes. The BIOS Setup utility configures the watchdog timer.
VL-EPU-3312 Reference Manual 19
External Connectors
Analog input – page 39
Main Power – page 21
Battery – page 24
microSD – page 30
COM1/COM2 – page 43
Mini DisplayPort++ – page 46
COM3/COM4 – page 43
Mini PCIe Sockets 1 and 2 – page
32
CPU Fan – page 26
SATA – page 29
Ethernet – page 52
SPX – page 41
LVDS Backlight – page 51
USB 3.0 – page 31
LVDS Display – page 49
User I/O – page 56
Baseboard Connector Locations
Board Features
VL-EPU-3312 Reference Manual 20
Figure 7. Baseboard Connector Locations
Table 3: Links to Sections Describing Connectors
Power Delivery
Main Power Connector
An 8-pin power connector applies the Main input power to the Raven. Figure 8 shows the
location and the pin orientation of the main power connector. Table 4 lists the pinout of the main
power connector.
Board Features
Figure 8. Main Power Connector Pin Orientation
VL-EPU-3312 Reference Manual 21
Pin
Signal
Description
Pin
Signal
Description
1
V_MAIN
Main input voltage
(+8V to +30V)
2
V_MAIN
Main input voltage
(+8V to +30V)
3
EARTH_GND
Earth ground
4
V_MAIN
Main input voltage
(+8V to +30V)
5
POWER_FAULT
An open-drain signal
Low if power is OK
Open if there is a
power fault (Note)
6
GND
Signal ground
7
GND
Signal ground
8
GND
Signal ground
Note: A power fault can be due any of the following conditions:
The input power is off.
The main input regulator has failed.
The power input is under- or over-voltage (not in the 8 - 30V range) .
Cabling
VL-EPU-3312 Board Connector
Mating Connector
Molex 055959-0830
Molex 051353-0800
Board Features
Table 4: Main Power Connector Pinout
An adapter cable, part number VL-CBR-0809, is available for connecting the Raven to an ATX
power supply.
If your application requires a custom cable, the following information will be useful:
Power Requirements
The Raven requires a single +8 to +30 VDC supply capable of providing at least 35 W average
power that can also provide a peak power of 50 W. The input DC supply creates both the standby
and payload voltages provided to the CPU module.
The exact power requirements for the Raven depend on several factors, including CPU
configuration (the number of cores, CPU clock rate), memory configuration, peripheral
connections, and attached devices, and others. For example, driving long RS-232 lines at high
speed can increase power demand.
The VersaLogic VL-PS-ATX12-300A is a 1U size ATX power supply suitable for use with the
Raven. Use the VL-CBR-0809 adapter cable to attach the power supply to the main power
connector.
Power Delivery Considerations
Using the VersaLogic approved power supply (VL-PS-ATX12-300A) and power cable
(VL-CBR-0809) will ensure high quality power delivery to the board. Customers who design
their own power delivery methods should take into consideration the guidelines below to ensure
good power connections.
The specifications for typical operating current do not include any off-board power usage that
fed through the Raven power connector. Expansion boards and USB devices plugged into the
board will source additional power through the Raven power connector.
VL-EPU-3312 Reference Manual 22
Board Features
Power state
Description
S0 (G0)
Working
S1 (G1-S1)
All processor caches are flushed and the CPUs stop executing instructions. Power to
the CPUs and RAM is maintained. Devices that do not indicate they must remain on
may be powered down.
S3 (G1-S3)
Commonly referred to as Standby, Sleep, or Suspend-to-RAM. RAM remains powered.
S4 (G1-S4)
Hibernation or Suspend-to-Disk. All content of main memory is saved to non-volatile
memory, such as a hard drive, and is powered down.
S5 (G2)
Soft Off. Almost the same as G3 Mechanical Off, except that the power supply still
provides power, at a minimum, to the power button to allow return to S0. A full reboot is
required. No previous content is retained. Other components may remain powered so
the computer can "wake" on input from the keyboard, clock, modem, LAN, or USB
device.
G3
Mechanical off (ATX supply switch turned off).
Do not use wire smaller than 22 AWG. Use high quality UL 1007 compliant stranded wire.
The length of the wire should not exceed 18 inches.
Avoid using any additional connectors in the power delivery system.
The power and ground leads should be twisted together, or as close together as possible to
reduce lead inductance.
A separate conductor must be used for each of the power pins.
All power input pins and all ground pins must be independently connected between the
power source and the power connector.
Use a high quality power supply that can supply a stable voltage while reacting to widely
varying current draws.
Power Button
The User I/O connector (shown in Figure 20 on page 37) includes an input for a power button. A
momentary short to ground or assertion of pin 17 will cause a power button ACPI event. The
button event can be configured in Windows to enter an S3 power state (Sleep, Standby, or
Suspend-to-RAM), an S4 power state (Hibernate or Suspend-to-Disk), or an S5 power state
(Shutdown or Soft-Off). This connector uses IEC 61000-4-2-rated TVS components to help
protect against ESD damage.
A power button is provided on the VL-CBR-4005B paddleboard. Refer to the chapter titled VLCBR-4005B Paddleboard, beginning on page 55 for more information.
Supported Power States
Table 5 lists the Raven’s supported power states.
Table 5: Supported Power States
VL-EPU-3312 Reference Manual 23
Board Features
VL-EPU-3312 Board Connector
Mating Connector
Molex 501331-0207
Molex 501330-0200
Battery Power Options
The battery circuit on the Raven provides power for the Real-Time Clock (RTC) and power to
store BIOS Setup utility settings in non-volatile RAM.
The Raven has multiple options for providing battery power:
Use an external battery (the VL-CBR-0203, for example) connected to the board through the
battery connector.
Use the battery supplied with the CBR-4005B paddleboard
Figure 9 shows the location and pin orientation of the battery connector.
Cabling
If your application requires a custom cable, the following information will be useful:
VL-CBR-0203 External Battery Module
The VL-CBR-0203 external battery module is compatible with the Raven. For more information,
contact Sales@VersaLogic.com.
VL-EPU-3312 Reference Manual 24
Figure 9. Location and Pin Orientation of the Battery Connector
External Speaker
The User I/O connector (shown in Figure 20 on page 37) includes a speaker output signal at pin
15. The VL-CBR-4005B paddleboard provides a piezoelectric speaker. Figure 29 on page 55
shows the location of the piezoelectric speaker on the VL-CBR-4005B paddleboard.
Board Features
Figure 10. VL-CBR-0203 Latching Battery Module
Push-button Reset
The User I/O connector (shown in Figure 20 on page 37) includes an input for a push-button
reset switch. Shorting pin 18 to ground causes the Raven to reboot. This must be a mechanical
switch or an open-collector or open-drain active switch with less than a 0.5V low-level input
when the current is 1 mA. There must be no pull-up resistor on this signal. This connector uses
IEC 61000-4-2-rated TVS components to help protect against ESD damage.
A reset button on the VL-CBR-4005B paddleboard is provided. Refer to the chapter titled VLCBR-4005B Paddleboard, beginning on page 55 for more information.
VL-EPU-3312 Reference Manual 25
CPU Fan Connector
Pin
Signal
1
Ground
2
+12 VDC (Note)
3
FAN_TACH
4
FAN_CONTROL
Note: The maximum current is 0.175 A
EPU-3312 Board Connector
Mating Connector
Molex 502386-0470
Molex 502380-0400
The Raven provides a four-pin CPU fan connector. Figure 11 shows the location and pin
orientation of the CPU fan connector.
Board Features
Table 6 provides the pinout of the CPU fan connector.
Cabling
If your application requires a custom cable, the following information will be useful:
VL-EPU-3312 Reference Manual 26
Figure 11. Location and Pin Orientation of the CPU Fan Connector
Table 6: CPU Fan Connector Pinout
LEDs
LED
Status Indication
Reference
D8
SATA/mSATA (blue) activity
Figure 19, page 36
D9
Power good (green) and fault indicator (yellow) dual-LED
Figure 13, page 28
D10
Link activity (green) for Ethernet port 0
Figure 28, page 54
D11
Link activity (green) for Ethernet port 1
Figure 28, page 54
D12
Wireless WAN/LAN activity for module installed in Mini PCIe Socket #1
(Dual-LED)
Table 8, page 35
D13
Status of power and wireless PAN activity for module installed in Mini
PCIe Socket #1 (Dual-LED)
Table 8, page 35
D14
Wireless WAN/LAN activity for module installed in Mini PCIe Socket #2
(Dual-LED)
Table 8, page 35
D15
Status of power and wireless PAN activity for module installed in Mini
PCIe Socket #2 (Dual-LED)
Table 8, page 35
Figure 12 shows the locations of the status indicator LEDs
Board Features
Figure 12. Location of Status Indicator LEDs
VL-EPU-3312 Reference Manual 27
Board Features
Power-Good/Fault Indicator LEDs
A dual-color (green/yellow) LED provides the following status:
Green – indicates power good when the Raven in an S0 state. When in sleep modes, the LED
pulses every 2 seconds.
Yellow – indicates a fault. If this LED remains lit after power-cycling the Raven, contact
VersaLogic Customer Support.
Figure 13. Location of the Power-good/Fault Indicator LED
VL-EPU-3312 Reference Manual 28
SATA Interface
4
The Raven provides one serial ATA (SATA) port that communicates at a rate of up to 3.0 Gbits/s
(SATA II). The SATA connector is a SATA II-compatible right-angle connector with latching
capability. The ATX power supplies Power to the SATA drive. Note that the standard SATA
drive power connector is different from the common 4-pin Molex connector used on IDE drives.
Most current ATX power supplies provide SATA connectors, and many SATA drives provide
both types of power connectors. If the power supply you are using does not provide SATA
connectors, adapters are available.
Mass Storage Interfaces
Mass Storage Interfaces
Figure 14. Location of the SATA Connector
VL-EPU-3312 Reference Manual 29
microSD Socket
The Raven provides a microSD socket on the top side of the baseboard. The VL-F41 series of
microSD cards provide solid-state storage of 2 GB, 4 GB, or 8 GB. The microSD socket
accommodates cards with up to 32 GB of storage capacity.
Mass Storage Interfaces
Figure 15. Location of the microSD Socket
eMMC Flash
The Raven provides on-board eMMC Flash storage on certain models of the product.
Specifically:
As shown in Figure 16, the Raven provides access to six USB ports.
Multi-purpose I/O
Multi-purpose I/O
Figure 16. Location of the USB Ports
Warning!The micro USB 3.0 connector can be damaged (that is, detached from the board) if
an inserted USB cable is removed by pulling up and away from the board. To
reduce the risk of damaging the connector (and the board), pull the cable straight
out of the connector; also, do not rock or wiggle the cable back and forth to loosen
it from the connector.
VL-EPU-3312 Reference Manual 31
Mini PCIe Sockets
Integrator’s Note:
Mini PCIe Socket #1 supports the use of an mSATA card; Socket #2 does not.
.
Figure 17 shows the location of the two Mini PCIe sockets. Mini PCIe Socket #1 supports the
use of an mSATA card.
Each Mini PCIe interface includes one PCIe x1 lane, one USB 2.0 channel, and the SMBus
interface. The sockets are compatible with plug-in Wi-Fi modems, GPS receivers, MIL-STD1553, flash data storage, and other cards for added flexibility. For information on Mini PCIe
modules available from VersaLogic, contact Sales@VersaLogic.com.
The VL-MPEs-F1E series of mSATA modules provide flash storage of 4 GB, 16 GB, or 32 GB.
To secure a Mini PCIe card or mSATA module to the on-board standoffs, use two M2.5 x 6 mm
pan head Philips nylon screws. These screws are available in quantities of 10 in the VL-HDW108 hardware kit from VersaLogic.
Multi-purpose I/O
Figure 17. Location of Mini PCIe Sockets
VL-EPU-3312 Reference Manual 32
Multi-purpose I/O
Pin
Mini PCIe
Signal Name
Mini PCIe Function
mSATA
Signal Name
mSATA Function
1 WAKE#
Wake
Reserved
Not connected
2 3.3VAUX
3.3 V auxiliary source
+3.3V
3.3 V source
3 NC
Not connected
Reserved
Not connected
4 GND
Ground
GND
Ground
5 NC
Not connected
Reserved
Not connected
6 1.5V
1.5 V power
+1.5V
1.5 V power
7 CLKREQ#
Reference clock request
Reserved
Not connected
8 NC
Not connected
Reserved
Not connected
9 GND
Ground
GND
Ground
10 NC
Not connected
Reserved
Not connected
11 REFCLK-
Reference clock input –
Reserved
Not connected
12 NC
Not connected
Reserved
Not connected
13 REFCLK+
Reference clock input +
Reserved
Not connected
14 NC
Not connected
Reserved
Not connected
15 GND
Ground
GND
Ground
16 NC
Not connected
Reserved
Not connected
17 NC
Not connected
Reserved
Not connected
18 GND
Ground
GND
Ground
19 NC
Not connected
Reserved
Not connected
20 W_DISABLE#
Wireless disable
Reserved
Not connected
21 GND
Ground
GND
Ground
22 PERST#
Card reset
Reserved
Not connected
23 PERn0
PCIe receive –
+B
Host receiver diff. pair +
24 3.3VAUX
3.3 V auxiliary source
+3.3V
3.3 V source
25 PERp0
PCIe receive +
-B
Host receiver diff. pair –
26 GND
Ground
GND
Ground
27 GND
Ground
GND
Ground
28 1.5V
1.5 V power
+1.5V
1.5 V power
29 GND
Ground
GND
Ground
30 SMB_CLK
SMBus clock
Two Wire I/F
Two wire I/F clock
31 PETn0
PCIe transmit –
-A
Host transmitter diff. pair
–
32 SMB_DATA
SMBus data
Two Wire I/F
Two wire I/F data
33 PETp0
PCIe transmit +
+A
Host transmitter diff. pair
+
34 GND
Ground
GND
Ground
35 GND
Ground
GND
Ground
36 USB_D-
USB data –
Reserved
Not connected
Table 7: Mini PCIe / mSATA Socket Pinout
VL-EPU-3312 Reference Manual 33
Multi-purpose I/O
Pin
Mini PCIe
Signal Name
Mini PCIe Function
mSATA
Signal Name
mSATA Function
37 GND
Ground
GND
Ground
38 USB_D+
USB data +
Reserved
Not connected
39 3.3VAUX
3.3V auxiliary source
+3.3V
3.3 V source
40 GND
Ground
GND
Ground
41 3.3VAUX
3.3 V auxiliary source
+3.3V
3.3 V source
42
LED_WWAN
#
Wireless WAN LED
Reserved
Not connected
43 GND
mSATA Detect (Note 1)
GND/NC
Ground/Not connected
(Note 2)
44 LED_WLAN#
Wireless LAN LED
Reserved
Not connected
45 NC
Not connected
Vendor
Not connected
46 LED_WPAN#
Wireless PAN LED
Reserved
Not connected
47 NC
Not connected
Vendor
Not connected
48 1.5V
1.5 V power
+1.5V
1.5 V power
49 Reserved
Reserved
DA/DSS
Device activity (Note 3)
50 GND
Ground
GND
Ground
51 Reserved
Reserved
GND
Ground (Note 4)
52 3.3VAUX
3.3 V auxiliary source
+3.3V
3.3 V source
Notes:
1. This pin is not grounded on the Raven since it can be used to detect the presence of an mSATA
module versus a Mini PCIe card.
2. This pin is not grounded on the Raven to make it available for mSATA module detection.
3. This signal drives the blue LED activity indicator shown in Figure 19. This LED lights with mSATA
disk activity (if supported by the mSATA module).
4. Some Mini PCIe cards use this signal as a second Mini PCIe card wireless disable input. On the
Raven, this signal is available for use for mSATA versus Mini PCIe card detection. There is an
option on the VersaLogic Features BIOS Setup utility screen for setting the mSATA detection
method.
W_DISABLE# Signal
The W_DISABLE# signal is for use with optional wireless Ethernet Mini PCIe cards. The signal
enables you to disable a wireless card’s radio operation in order to meet public safety regulations
or when otherwise desired. W_DISABLE# is an active low signal that when driven low (shorted
to ground) disables radio operation on the Mini PCIe card wireless device. When W_DISABLE#
is not asserted, or in a high impedance state, the radio may transmit if not disabled by other
means such as software. The W_DISABLE# signals for each of the two Minicards are controlled
by registers in the FPGA.
VL-EPU-3312 Reference Manual 34
Multi-purpose I/O
LED
Color
State
Description
D12 and D14
Green
On
Wireless WAN active
Off
Wireless WAN inactive
Yellow
On
Wireless LAN active
Off
Wireless LAN inactive
D13 and D15
Green
On
Wireless PAN active
Off
Wireless PAN inactive
Yellow
On
Minicard power is ON
Off
Minicard power is OFF
Mini PCIe Card Wireless Status LEDs
Dual-colored (green and yellow) LEDs provide status for modules installed in the Mini PCIe
sockets. These LEDs light when the associated device is installed and capable of transmitting.
Table 8 lists the states of the LEDs. Figure 18 shows their location on the Raven.
Table 8: Mini PCIe Card Wireless Status LEDs
VL-EPU-3312 Reference Manual 35
Figure 18. Mini PCIe Wireless Status LEDs
Multi-purpose I/O
mSATA Activity LED
Figure 19 shows the location of the SATA/mSATA activity blue LED. This LED indicates
activity on either the SATA or the mSATA interface. Not all mSATA drives provide this disk
activity signal.
Figure 19. Location of the SATA/mSATA Activity LED
VL-EPU-3312 Reference Manual 36
User I/O Connector
The 40-pin user I/O connector incorporates the signals for the following:
Four USB ports
Eight GPIO lines (these are functionally muxed with six timer I/O signals per FPGA
registers). There are eight timer signals and they share digital I/Os 16-9. The eight GPIO
lines on the paddleboard each have an alternate mode, accessible using the FPGA’s
AUXMOD1 register. Refer to the EPU-3312 Programmer’s Reference Manual for more
information on FPGA registers.
Three LEDs (two Ethernet link status LEDs and a programmable LED)
Two I2C signals (clock and data)
Push-button power switch
Push-button reset switch
Speaker output
Multi-purpose I/O
This connector uses IEC 61000-4-2-rated TVS components to help protect against ESD damage.
Figure 20 shows the location and pin orientation of the user I/O connector.
Figure 20. Location and Pin Orientation of the User I/O Connector
VL-EPU-3312 Reference Manual 37
Table 9 provides the pinout of the user I/O connector.
Pin
Signal
Pin
Signal
1
+5 V (Note 1)
2
GND
3
USB1_P
4
USB2_P
5
USB1_N
6
USB2_N
7
+5V (Note 2)
8
GND
9
USB3_P
10
USB4_P
11
USB3_N
12
USB4_N
13
+3.3 V (Note 3)
14
GND
15
SPKR#
16
PLED#
17
PWR_BTN#
18
RST_BTN#
19
GND
20
GND
21
I2C Clock
22
V_BATT
23
I2C Data
24
V_BATT Return
25
GND
26
GND
27
GPIO1
28
GPIO2
29
GPIO3
30
GPIO4
31
GND
32
GND
33
GPIO5
34
GPIO6
35
GPIO7
36
GPIO8
37
+3.3 V (Note 4)
38
GND
39
ETH0 LED
40
ETH1 LED
Notes:
1. This is the +5V VBUS power for USB Port 1 and 2.
2. This is the +5V VBUS power for USB Port 3 and 4.
3. This 3.3 V power goes off in sleep modes. The SPKR# uses this power as
should the PLED# (there is no requirement for PLED# to use this power, but the
VL-CBR-4005B paddleboard does).
4. This 3.3 V power can be turned on or off similar to the 3.3V power to the Mini
Card via the FPGA (can go off in sleep modes or always stay on; by default it
goes off in sleep modes). It is used for the 10 kΩ pullup resistor power on the 8x
GPIOs and usually for the 2x Ethernet LEDs, however, the Ethernet LEDs can
be powered by a 3.3 V power source.
EPU-3312 Board Connector
Mating Connector
Molex 501571-4007
Molex 501189-4010
Table 9: User I/O Connector Pinout and Pin Orientation
Multi-purpose I/O
Cabling
An adapter cable, part number VL-CBR-4005A, is available for connecting the CBR-4005B
paddleboard to the VL-EPU-3312. This is a 12-inch, Pico-Clasp 40-pin to 40-pin cable.
If your application requires a custom cable, the following information will be useful:
VL-EPU-3312 Reference Manual 38
Analog-to-Digital Converter Interface
The Analog-to-Digital converter interface provides eight single-ended analog input channels.
Figure 21 shows the location and pin orientation of the Analog-to-Digital input connector.
Multi-purpose I/O
Figure 21. Location and Pin Orientation of the Analog-to-Digital Input Connector
VL-EPU-3312 Reference Manual 39
Multi-purpose I/O
±0.64 V
0 to 1.28 V
±1.28 V
0 to 2.56 V
±2.56 V
0 to 5.12 V
±5.12 V
0 to 10.24 V
±10.24 V
Pin
Signal
Pin
Signal
1
Analog Input 1
2 Analog Input 2
3
Analog Ground
4 Analog Ground
5
Analog Input 3
6 Analog Input 4
7
Analog Ground
8 Analog Ground
9
Analog Input 5
10
Analog Input 6
11
Analog Ground
12
Analog Ground
13
Analog Input 7
14
Analog Input 8
15
Analog Ground
16
Analog Ground
17
Digital Ground
18
Digital Ground
19
Reserved
20
Reserved
EPU-3312 Board Connector
Mating Connector
Molex 501571-2007
Molex 501189-2010
The EPU-3312 uses a Texas Instruments ADS8668 eight-channel 12-bit A/D converter. The
converter has a 500 kilo-samples-per-second (ksps) aggregate sampling rate, with a 1.115 μs
acquisition time, high-impedance The converter is per-channel programmable for the following
input ranges:
Communications with the A/D converter are handled by the FPGA, which uses the SPX slave
selection signal for SPI device 5 to enable the A/D read strobe for the SPI interface. Refer to the
VL-EPU-3312 Programmer’s Reference Manual (available on the EPU-3312 Product Support
Web Page) for information on configuring the SPX registers for A/D access.
Refer to the Texas Instruments ADS8668 A/D Converter Datasheet for programming
information.
Table 10 provides the pinout of the Analog-to-Digital Input connector.
The VL-CBR-2004 paddleboard is bundled with an adapter cable for connecting the Raven to the
VL-CBR-2004 paddleboard. This is a 12-inch, Pico-Clasp 20-pin to 20-pin cable.
If your application requires a custom cable, the following information will be useful:
VL-EPU-3312 Reference Manual 40
SPX* Expansion Bus
Up to two serial peripheral expansion (SPX) devices can be attached to the Raven at connector
using a CBR-0901 cable. The SPX interface provides the standard serial peripheral interface
(SPI) signals: CLK, MISO, and MOSI, as well as two chip selects, SS0# and SS1#. The +5 V
power provided to pin 1 of the SPX connector is protected by a 1 A resettable fuse.
Figure 22 shows the location and pin orientation of the SPX connector.
Multi-purpose I/O
Figure 22. SPX Connector Location and Pin Configuration
VL-EPU-3312 Reference Manual 41
Multi-purpose I/O
Pin
Signal
Function
1
V5_SPX
+5.0 V
2
CLK
SPX Clock
3
GND
Ground
4
MISO
Master input, Slave output
5
GND
Ground
6
MOSI
Master output, Slave input
7
GND
Ground
8
SS0#
Chip Select 0
9
SS1#
Chip Select 1
EPM-31 Board Connector
Mating Connector
Molex 501568-0907
Molex 501330-0900
Table 11 lists the pinout of the SPX connector.
Table 11: SPX Connector Pinout
SPI is, in its simplest form, a three wire serial bus. One signal is a clock, driven only by the
permanent master device on-board. The others are Data In and Data Out with respect to the
master. The SPX implementation on the Raven supports chip selects. The master device initiates
all SPI transactions. A slave device responds when its chip select is asserted and it receives clock
pulses from the master. All four common SPI modes are supported through the use of clock
polarity and clock idle state controls.
The SPI clock is derived from a 33 MHz PCI clock and can be software-configured to operate at
the following frequencies:
An adapter cable, part number CBR-0901, is available. This is a 9-inch, 9-pin Pico-Clasp to Dual
SPX cable.
If your application requires a custom cable, the following information will be useful:
VL-EPU-3312 Reference Manual 42
Serial Ports
6
The Raven provides four serial ports. All ports can be operated in RS-232, RS-422, or RS-485
mode. IRQ lines are chosen in the BIOS Setup utility. The UARTs are 16550-based serial ports
and are implemented in the FPGA.
Figure 23 shows the location and pin orientation of the two serial I/O connectors.
Serial I/O
Serial I/O
Figure 23. Location and Pin Orientation of the Serial I/O Connectors
VL-EPU-3312 Reference Manual 43
Serial Port Connector Pinout
Pin
RS-232 Signal
RS-422/RS-485
Signal
Port
1
RTS1
TXD1_P
COM1
2
TXD1#
TXD1_N
3
CTS1
RXD1_P
4
RXD1#
RXD1_N
5
GND
GND
—
6
RTS2
TXD2_P
COM2
7
TXD2#
TXD2_N
8
CTS2
RXD2_P
9
RXD2#
RXD2_N
10
GND
GND
—
Pin
RS-232 Signal
RS-422/RS-485
Signal
Port
1
RTS3
TXD3_P
COM3
2
TXD3#
TXD3_N
3
CTS3
RXD3_P
4
RXD3#
RXD3_N
5
GND
GND
—
6
RTS4
TXD4_P
COM4
7
TXD4
TXD4_N
8
CTS4
RXD4_P
9
RXD4#
RXD4_N
10
GND
GND
—
Table 12: COM1/COM2 Connector Pinout
Serial I/O
Table 13: COM3/COM4 Connector Pinout
Cabling
An adapter cable, part number CBR-1014, is available for routing the serial I/O signals to 9-pin
D-sub connectors. This is a 12-inch, Pico-Clasp 10-pin to two 9-pin D-sub connector cable.
VL-EPU-3312 Reference Manual 44
If your application requires a custom cable, the following information will be useful:
EPU-3312 Board Connector
Mating Connector
Molex 501331-1007
Molex 501330-1000
COM Port Configuration
Jumper blocks V1 and V2 configure the serial ports for RS-232 or RS-485/RS-422 operation. See
the section titled “Jumper Blocks” on page 17 for details. The termination resistor should only be
enabled for RS-485 or RS-422 endpoint stations and not for intermediate stations. Termination
must not be used for RS-232.
Console Redirection
The Raven can be configured for remote access by redirecting the console to a serial
communications port. The BIOS Setup utility and some operating systems (such as MS-DOS)
can use this console for user interaction. The default settings for the redirected console are as
follows:
115,200 baud rate
Serial I/O
8 data bits, No parity, 1 stop bit (that is, 8-None-1)
No flow control
VL-EPU-3312 Reference Manual 45
The Intel Atom E38xx processor series contains an integrated graphics engine with advanced
7
2D/3D graphics, video decode and encode capabilities, and a display controller. The Raven
provides the following video interfaces:
One Mini DisplayPort++ connector
One LVDS display connector; a 4-pin LVDS backlight connector is also provided
Mini DisplayPort++ Connector
DisplayPort consists of three interfaces:
Main Link – transfers high-speed isochronous video and audio data
Auxiliary channel – used for link management and device control; the EDID is read over this
interface
Video Interfaces
Video Interfaces
Hot Plug Detect – indicates that a cable is plugged in
The DisplayPort interface supports:
Audio signaling
DP++ mode allowing connection to an HDMI device through a passive adapter. “Passive”
means that the adapter does not require external power (because it uses the DP port’s 3.3 V
power) and it does not require software drivers.
Figure 24 shows the location of the 20-pin Mini DisplayPort++connector. Table 14 lists the
pinout of the Mini DisplayPort++ connector.
VL-EPU-3312 Reference Manual 46
Video Interfaces
Pin
Signal
Pin
Signal
1
GND 2
HOT PLUG DETECT
3
ML_LANE0_P
4 CONFIG 1
5
ML_LANE0_N
6 CONFIG 2
7
GND 8
GND
9
ML_LANE1_P
10
ML_LANE3_P
11
ML_LANE1_N
12
ML_LANE3_N
13
GND 14
GND
15
ML_LANE2_P
16
AUX_CH_P
17
ML_LANE2_N
18
AUX_CH_N
19
GND 20
DP_POWER (3.3V)
VL-EPU-3312 Reference Manual 47
Figure 24. Location of the Mini DisplayPort++ Connector
Table 14: Mini DisplayPort++ Connector Pinout
Video Interfaces
VGA Output
A VGA monitor can be attached to the Mini DisplayPort++ connector using the VL-CBR-2032
Mini DisplayPort-to-VGA adapter, similar to the one shown in Figure 25.
Figure 25. VL-CBR-2032 Mini DisplayPort to VGA Adapter
Mini DisplayPort Cable Options
There is a 36 inch Mini DisplayPort to Mini DisplayPort cabling option available. (VL-CBR-
2031) There is also a Mini DisplayPort to HDMI 6 inch cable available (VL-CBR-2033). There
is a Mini DisplayPort to VGA cable kit as well. (VL-CBR-2032)
VL-EPU-3312 Reference Manual 48
LVDS Interface
LVDS Flat Panel Display Connector
The integrated LVDS flat panel display in the Raven is an ANSI/TIA/EIA-644-1995
specification-compliant interface. It can support 18 or 24 bits of RGB pixel data plus 3 bits of
timing control (HSYNC/VSYNC/DE) on the 4 differential data output pairs. The LVDS interface
supports a maximum resolution of 1280 x 768 (60 Hz). Figure 26 shows the location of the
LVDS display connector as well as the location and pin orientation of the LVDS back light
connector.
The BIOS Setup utility provides several options for standard LVDS flat panel types. If these
options do not match the requirements of the panel you are using, contact
The +3.3V power provided to pins 19 and 20 is protected by a software-controllable power
switch (1 Amp max.). The LVDD_EN signal controls this switch from the LVDS interface
controller in the CPU.
Cabling
The following LVDS cables are available for use with the Raven board:
VL-CBR-2015 – a 20-inch 24-bit LVDS 1mm Hirose* cable
VL-CBR-2016 – a 20-inch 18-bit LVDS flat-panel display cable with a JAE connector
VL-CBR-2017 – a 20-inch 24-bit 1.25 mm Hirose cable
If your application requires a custom cable, the following information will be useful:
VL-EPU-3312 Reference Manual 50
Video Interfaces
Pin
Signal Name
Function
1
LVDS_BKLT_EN
LVDS backlight enable. (5V TTL-level signal by default but
will operate at higher voltages if the LVDS_BKLT_PWR is
provided).
High = enabled, Low = disabled.
2
Signal Ground
Ground
3
LVDS_BKLT_CTRL
LVDS backlight control. (5V TTL-level signal by default but
will operate at higher voltages if the LVDS_BKLT_PWR is
provided). This is a PWM signal and the duty cycle can be
set in the BIOS Setup utility.
4
LVDS_BKLT_LOGIC_PWR
Optional backlight logic power. (Can range from +5V to +14V
and sets the high-value on the LVDS_BKLT_EN and
LVDS_BKLT_CTRL signals.)
On-board +5V power is used when this is not connected.
EPU-3312 Board Connector
Mating Connector
Molex 501568-0407
Molex 501330-0400
LVDS Backlight Connector
Figure 236 on page 49 shows the location and pin orientation of the LVDS back light connector.
Table 16 lists the pinout of the LVDS backlight connector.
Table 16: LVDS Backlight Connector Pinout
Cabling
An adapter cable, part number CBR-0404, is available for powering the LVDS backlight from
the Raven board.
If your application requires a custom cable, the following information will be useful:
VL-EPU-3312 Reference Manual 51
Network Interfaces
Integrator’s Note:Ethernet Port 1 supports network boot; Port 0 does not.
8
Network Interfaces
The Raven provides two Intel I210-IT Gigabit Ethernet controllers. The controller provides a
standard IEEE 802.3 Ethernet interface for 1000Base-T, 100Base-TX, and 10Base-T
applications. The I210-IT Ethernet controller auto-negotiates connection speed. Drivers are
readily available to support a variety of operating systems. For more information on this device,
refer to the Intel I210 Ethernet Controller datasheet.
Ethernet Connector
The Ethernet connector provides access to the Ethernet ports 0 and 1. The connector uses IEC
61000-4-2-rated TVS components to help protect against ESD damage. Figure 27 shows the
location and pin orientation of the Ethernet connector.
Figure 27. Location and Pin Orientation of the Ethernet Connector
VL-EPU-3312 Reference Manual 52
Network Interfaces
Pin
10/100 Signals
10/100/1000
Signals
Pin
10/100 Signals
10/100/1000
Signals
Port 0
1
- Auto Switch (Tx or Rx)
BI_DD-
2 + Auto Switch (Tx or Rx)
BI_DD+
Port 0
3
- Auto Switch (Tx or Rx)
BI_DB-
4 + Auto Switch (Tx or Rx)
BI_DB+
5
- Auto Switch (Tx or Rx)
BI_DC-
6 + Auto Switch (Tx or Rx)
BI_DC+
7
- Auto Switch (Tx or Rx)
BI_DA-
8 + Auto Switch (Tx or Rx)
BI_DA+
Port 1
9
- Auto Switch (Tx or Rx)
BI_DD-
10
+ Auto Switch (Tx or Rx)
BI_DD+
Port 1
11
- Auto Switch (Tx or Rx)
BI_DB-
12
+ Auto Switch (Tx or Rx)
BI_DB+
13
- Auto Switch (Tx or Rx)
BI_DC-
14
+ Auto Switch (Tx or Rx)
BI_DC+
15
- Auto Switch (Tx or Rx)
BI_DA-
16
+ Auto Switch (Tx or Rx)
BI_DA+
EPU-3312 Board Connector
Mating Connector
Molex 503148-1690
Molex 503149-1600
Table 17 lists the pinout of the Ethernet connector.
Table 17: Ethernet Connector Pinout
Cabling
An adapter cable, part number CBR-1604, is available. This is a 12-inch, 16-pin Click-Mate to
two RJ-45 connector cables.
If your application requires a custom cable, the following information will be useful:
VL-EPU-3312 Reference Manual 53
Ethernet Status LEDs
Figure 28 shows the location of the Ethernet status LEDs.
LED D10 – indicates link activity on Ethernet port 0
LED D11 – indicates link activity on Ethernet port 1
Network Interfaces
Figure 28. Onboard Ethernet Status LEDs
VL-EPU-3312 Reference Manual 54
VL-CBR-4005B Paddleboard
9
VL-CBR-4005B Paddleboard
VL-CBR-4005B Connectors and Indicators
Figure 29 shows the locations of the connectors, switches, and LEDs on the VL-CBR-4005B
paddleboard.
VL-EPU-3312 Reference Manual 55
Figure 29. VL-CBR-4005B Connectors, Switches, and LEDs
VL-CBR-4005B Paddleboard
Pin
Signal
Pin
Signal
1
+5 V
2
GND
3
USB1_P
4
USB2_P
5
USB1_N
6
USB2_N
7
+5V
8
GND
9
USB3_P
10
USB4_P
11
USB3_N
12
USB4_N
13
+3.3 V (Note 1)
14
GND
15
SPKR#
16
PLED#
17
PWR_BTN#
18
RST_BTN#
19
GND
20
GND
21
I2C Clock
22
V_BATT
23
I2C Data
24
V_BATT RETURN
25
GND
26
GND
27
GPIO1
28
GPIO2
29
GPIO3
30
GPIO4
31
GND
32
GND
33
GPIO5
34
GPIO6
35
GPIO7
36
GPIO8
37
+3.3 V (Note 2)
38
GND
39
ETH0 LED
40
ETH1 LED
User I/O Connector
Figure 30 shows the location and pin orientation of the user I/O connector.
Figure 30. Location and Pin Orientation of the User I/O Connector
Table 18: User I/O Connector Pinout
VL-EPU-3312 Reference Manual 56
VL-CBR-4005B Paddleboard
CBR-4005B Board Connector
Mating Connector
Molex 501571-4007
Molex 501189-4010
CAUTION:
To prevent shorting, premature failure or damage to the Lithium battery, do not
place the board on a conductive surface such as metal, black conductive foam
or the outside surface of a metalized ESD protective pouch. The Lithium battery
may explode if mistreated. Do not recharge, disassemble, or dispose of the
battery in fire. Dispose of used batteries promptly.
Notes for Table 18:
1. This 3.3 V power goes off in sleep modes. The SPKR# uses this power as should the
PLED# (there is no requirement for PLED# to use this power, but the VL-CBR-4005B
paddleboard does).
2. This 3.3 V power can be turned on or off similar to the 3.3V power to the Mini Card via
the FPGA (can go off in sleep modes or always stay on; by default it goes off in sleep
modes). It is used for the 10 kΩ pullup resistor power on the 8x GPIOs and usually for
the 2x Ethernet LEDs, however, the Ethernet LEDs can be powered by a 3.3 V power
source.
Cabling
An adapter cable, part number CBR-4005A, is available for connecting the VL-CBR-4005B
paddleboard to the EPU-3312. This is a 12-inch, Pico-Clasp 40-pin to 40-pin cable
If your application requires a custom cable, the following information will be useful:
On-board Battery
Nominal battery voltage is 3.0 V. If the voltage drops below 2.7 V, contact the factory for a
replacement. The life expectancy under normal use is approximately five years.
VL-EPU-3312 Reference Manual 57
VL-CBR-4005B Paddleboard
Pin
Signal
Pin
Signal
1
I2C Clock
2
V_BATT
3
I2C Data
4 V_BATT_RETURN
5
GND
6
GND
7
GPIO1
8
GPIO2
9
GPIO3
10
GPIO4
11
GND
12
GND
13
GPIO5
14
GPIO6
15
GPIO7
16
GPIO8
17
+3.3 V
18
GND
19
Ethernet Port 0 LED
20
Ethernet Port 1 LED
Auxiliary I/O Connector
Figure 31 shows the location and pin orientation of the auxiliary I/O connector.
Figure 31. Location and Pin Orientation of Auxiliary I/O Connector
Table 19: Auxiliary I/O Connector Pinout
VL-EPU-3312 Reference Manual 58
Dimensions and Mounting Holes
VL-CBR-4005B Paddleboard
Figure 32. VL-CBR-4005B Dimensions and Mounting Holes
VL-EPU-3312 Reference Manual 59
VL-CBR-2004B Paddleboard
J5 – Main I/O connector (mates with the Raven’s
analog-to-digital input connector)
J4 – Reserved
J3 – Analog inputs 6-8
J2 – Analog inputs 4-5
J1 – Analog inputs 1-3
10
VL-CBR-2004B Paddleboard
To access the eight analog-to-digital inputs on the Raven, a paddleboard and 12-inch cable are
available from VersaLogic, part number VL-CBR-2005. Figure 33 shows the locations and pin
orientations of the connectors on the CBR-2004B paddleboard.
Figure 33. CBR-2004B Connectors
Analog Input Connections
Figure 34 shows the specific analog input and ground connections when using the VL-CBR-2004
paddleboard with the Raven.
Figure 34. Analog Input and Ground Terminal Block Pinouts
VL-EPU-3312 Reference Manual 60
Main I/O Connector
Pin
Signal
Pin
Signal
1
Analog Input 1
2 Analog Input 2
3
Analog Ground
4 Analog Ground
5
Analog Input 3
6 Analog Input 4
7
Analog Ground
8 Analog Ground
9
Analog Input 5
10
Analog Input 6
11
Analog Ground
12
Analog Ground
13
Analog Input 7
14
Analog Input 8
15
Analog Ground
16
Analog Ground
17
Digital Ground
18
Digital Ground
19
Reserved
20
Reserved
CBR-4005B Board Connector
Mating Connector
Molex 501571-2007
Molex 501189-2010
The main I/O connector mates with the Raven’s analog-to-digital input connector. Figure 35
shows the location and pin orientation of the main I/O connector.
Figure 35. Location and Pin Orientation of the Main I/O Connector
VL-CBR-2004B Paddleboard
Table 20: Main I/O Connector Pinout
Cabling
An adapter cable is bundled with the VL-CBR-2004B paddleboard. This is a 12-inch, Pico-Clasp
20-pin to 20-pin cable
If your application requires a custom cable, the following information will be useful:
VL-EPU-3312 Reference Manual 61
Dimensions and Mounting Holes
Figure 36. CBR-2004B Dimensions and Mounting Holes
VL-CBR-2004B Paddleboard
VL-EPU-3312 Reference Manual 62
Thermal Considerations
CAUTION:
By itself, the heat plate is not a complete thermal solution. Integrators should either implement a
thermal solution using the accessories available from VersaLogic or develop their own thermal
solution that attaches to the heat plate, suitable for environments in which the EPU-3312 will be
used. As stated above, the thermal solution must be capable of keeping the top surface of the
heat place at or below 90 ºC and the air surrounding the components in the assembly at or below
85 ºC.
The heat plate is permanently affixed to the Raven and must not be removed. Removal of the
heat plate voids the product warranty. Attempting to operate the Raven without the heat plate
voids the product warranty and can damage the CPU.
11
Thermal Considerations
This chapter discusses the following topics related to thermal issues:
Selecting the correct thermal solution for your application
EPU-3312 thermal characterization
Installing the passive (HDW-406 heat sink), the active (HDW-415 fan), and the heat pipe
block (HDW-408) thermal solutions available from VersaLogic
Selecting the Correct Thermal Solution for Your Application
This section provides guidelines for the overall system thermal engineering effort.
Heat Plate
The heat plate supplied with the Raven is the basis of the thermal solution. The heat plate draws
heat away from the CPU chip as well as other critical components. Some components rely on the
ambient air temperature at or below the maximum specified 85 ºC temperature.
The design of the heat plate assumes that the user’s thermal solution will maintain the top surface
of the heat plate at 90 ºC or less. If that temperature threshold is maintained, the CPU will remain
safely within its operating temperature limits.
System-level Considerations
The Raven is often mounted directly to another thermally controlled surface via its heat plate
(that is, the inside surface of an enclosure). In this case, the user needs to maintain the heat plate
at or below 90 ºC by controlling the mounting surface temperature. The EPU-3312 thermal
solutions available from VersaLogic – the HDW-406 heat sink with or without the HDW-415
fan, or the HDW-408 heat pipe block – can be used in the user’s final system or only used during
product development as a temporary bench-top solution.
The ambient air surrounding the EPU-3312 needs to be maintained at 85 ºC or below. This may
prove to be challenging depending on how and where the EPU-3312 is mounted in the end user
system.
VL-EPU-3312 Reference Manual 63
Thermal Considerations
Trip Point
Description
Passive (Note 1)
At this temperature, the CPU cores throttle back to a lower speed. This
reduces the power draw and heat dissipation, but lowers the processing
speed.
Critical (Note 2)
At this temperature, the operating system typically puts the board into a
sleep or other low-power state.
Maximum core temperature
The CPU turns itself off when this temperature is reached. This is a fixed
trip point and cannot be adjusted.
Notes:
1. The default value in the BIOS Setup utility for this trip point is 90 ºC.
2. The default value in the BIOS Setup utility for this trip point is 100 ºC.
The decision which thermal solution to use relies on several factors including:
Number of CPU cores in the SoC (single, dual, or quad)
CPU and video processing utilization by the user application
Temperature range within which the EPU-3312 will be operated
Air movement (or lack of air movement)
Most of these factors involve the demands of the user application on the EPU-3312 and cannot
be isolated from the overall thermal performance. Due to the interaction of the user application,
the Raven thermal solution, and the overall environment of the end system, thermal performance
cannot be rigidly defined.
The ambient air surrounding the EPU-3312 needs to be maintained at 85 ºC or below. This would
include the space between the two main boards as well as the space beneath an installed Mini
PCIe expansion board. Standard methods for addressing this requirement include the following:
Provide a typical airflow of 100 linear feet per minute (LFM) / 0.5 linear meters per second
(as described in the section titled EPU-3312 Thermal Characterization, beginning on page
67) within the enclosure
Position the EPU-3312 board to allow for convective airflow
Lower the system level temperature requirement as needed
CPU Thermal Trip Points
The CPU cores in the Raven have their own thermal sensors. Coupled with these sensors are
specific reactions to three thermal trip points. Table 21 describes the three thermal trip points.
Note that these are internal temperatures that are about 10 ºC above the heat plate temperature.
Table 21: CPU Thermal Trip Points
These trip points allow maximum CPU operational performance while maintaining the lowest
CPU temperature possible. The long-term reliability of any electronic component degrades when
it is continually run near its maximum thermal limit. Ideally, the CPU core temperatures will be
kept well below 100 ºC with only brief excursions above.
CPU temperature monitoring programs are available to run under both Windows and Linux.
Table 22 lists some of these hardware monitoring programs.
VL-EPU-3312 Reference Manual 64
Thermal Considerations
Operating System
Program Type
Description
Windows
Core Temperature
http://www.alcpu.com/CoreTemp/
Hardware Monitor
http://www.cpuid.com/softwares/hwmonitor.html
Open Hardware Monitor
http://openhardwaremonitor.org/
Linux
lm-sensors
http://en.wikipedia.org/wiki/Lm_sensors
Table 22: Temperature Monitoring Programs
VL-EPU-3312 Reference Manual 65
Thermal Considerations
Board
With Heat Plate
With Heat Sink
(HDW-406)
With Heat Sink + Fan
(HDW-406 + HDW-415)
VL-EPU-3312-EAP
-40 ° to +85 °C
-40 ° to +85 °C
-40 ° to +85 °C
VL-EPU-3312-EBP
-40 ° to +85 °C
-40 ° to +85 °C
-40 ° to +85 °C
VL-EPU-3312-EDP
-40 ° to +85 °C
-40 ° to +85 °C
-40 ° to +85 °C
Integrator’s Note: The ambient air surrounding the EPU-3312 needs to be maintained
at 85 °C or below.
Thermal Specifications, Restrictions, and Conditions
Graphical test data is in the section titled EPU-3312 Thermal Characterization, beginning on
page 67. Refer to that section for the details behind these specifications. These specifications are
the thermal limits for using the EPU-3312 with one of the defined thermal solutions.
Due to the unknown nature of the entire thermal system, or the performance requirement of the
application, VersaLogic cannot recommend a particular thermal solution. This information is
intended to provide guidance in the design of an overall thermal system solution.
Table 23: Absolute Minimum and Maximum Air Temperatures
Overall Restrictions and Conditions:
Ranges shown assume less than 90% CPU utilization.
Keep the maximum CPU core temperature below 100ºC.
The ambient air surrounding the EPU-3312 needs to be maintained at 85 ºC or below. This
includes the space between the two main boards as well as the space beneath an installed
Mini PCIe expansion board. A recommended overall airflow of 100 linear feet per minute
(LFM) / 0.5 linear meters per second (LMS) addresses this requirement. If this air flow is not
provided, other means must be implemented to keep the adjacent air at 85 ºC or below.
Heat Plate Only Restrictions and Conditions:
The heat plate must be kept below 90 °C. This applies to a heat plate mounted directly to
another surface as well as when the HDW-408 heat pipe block is used.
Heat Sink Only Considerations:
At 85°C air temperature and 90% CPU utilization, there will be little if any thermal margin
to a CPU core temperature of 100 °C or the passive trip point (see test data). If this is the use
case, consider adding a fan or other additional airflow.
Heat Sink with Fan Considerations:
The heat sink and fan combination cools the CPU when it is running in high temperature
environments, or when the application software is heavily utilizing the CPU or video
circuitry. The fan assists in cooling the heat sink and provides additional air movement
within the system.
VL-EPU-3312 Reference Manual 66
EPU-3312 Thermal Characterization
Hardware
configuration
EPU-3312 (Raven) single/dual/quad core CPU with:
4 GB of DDR3L DRAM (2 GB for the single- and dual-core board models)
HDW-416 (passive heat sink)
HDW-408 (heat pipe block)
HDW-415 (heat sink fan)
One VGA display device (connected through the LVDS interface), one
display for monitor
One SATA hard disk drive
Two RS-232 ports in loopback configuration
One VersaLogic VL-MPEe-E3 Mini PCIe Gigabit Ethernet module
Two active Ethernet ports in loopback configuration
Two USB 2.0 ports in loopback configuration (Note)
USB keyboard and mouse (Note)
BIOS
ID string: Raven_3.1.0.334.r1.101
Passive thermal trip point setting: 105 ºC
Critical thermal trip point setting: 110 ºC
Operating system
Microsoft Windows* 8.1
Test software
Passmark* BurnIn Test v8.1 b1016
- CPU utilization ~90%
Intel Thermal Analysis Tool* (TAT) v5.0.1014
- Primarily used to read the CPU core temperature
Test environment
Thermal chamber
Note: This device connects through a VersaLogic VL-CBR-4005B paddleboard.
The EPU-3312 board underwent the following thermal characterization tests:
Test Scenario 1: Single core EPU-3312-EAP + HDW-416 heat sink
Test Scenario 2: Dual core EPU-3312-EBP + HDW-416 heat sink, with/without HDW-415
Table 24 describes the thermal testing setup for the board.
Table 24: EPU-3312 Thermal Testing Setup
Thermal Considerations
The test results reflect the test environment within the temperature chamber used. The airflow of
this particular chamber is about 0.5 linear meters per second (~100 linear feet per minute).
Thermal performance improves by increasing the airflow beyond 0.5 linear meters per second.
The system power dissipation is primarily dependent on the application program; that is, its use
of computing or I/O resources. The stress levels used in this testing are at the top of the range of
a typical user’s needs.
VL-EPU-3312 Reference Manual 67
Thermal Considerations
Test Results
Test Scenario 1: Single Core EPU-3312-EAP + HDW-416 Heat Sink
At 90% CPU utilization this single core unit operates within the CPU’s core temperature safe
operating range all the way up to +85 ºC using only a heat sink.
Figure 37. EPU-3312-EAP Single Core Temperature Relative to Ambient Temperature
VL-EPU-3312 Reference Manual 68
Thermal Considerations
Test Scenario 2: Dual Core EPU-3312-EBP + HDW-416 Heat Sink, with/without HDW-415 fan
As shown in Figure 38, running the test scenario with just the heat sink, the core temperature is
slightly above 100 ºC at maximum ambient temperature. This will be less in most applications
that require less than 90% CPU utilization. Adding the fan provides an additional 5-6 ºC of
margin. For long-term reliability, ensure the CPU cores are predominately running with their
temperatures below 100 ºC.
Figure 38. EPU-3312-EBP Dual Core Temperature Relative to Ambient Temperature
VL-EPU-3312 Reference Manual 69
Thermal Considerations
Test Scenario 3: Quad Core EPU-3312-EDP + HDW-416 Heat Sink, with/without HDW-415
Fan
As shown below, the quad core version of the Raven will typically require a heat sink + fan for
operation above 80 ºC, at >90% CPU utilization.
Figure 39. EPU-3312-EDP Quad Core Temperature Relative to Ambient Temperature
Figure 40. EPU-3312-EDP Quad Core with Heat Pipe - Temperature Relative to Ambient
VL-EPU-3312 Reference Manual 71
Installing VersaLogic Thermal Solutions
The following thermal solution accessories are available from VersaLogic:
VL-HDW-401 Thermal Compound Paste – used to mount the heat sink to the heat plate
VL-HDW-416 Passive Heat Sink – mounts to standard product.
VL-HDW-415 Fan Assembly – Cooling fan for the HDW-416 passive heatsink. Operates at
+12 V and includes an EPU-3312 compatible connector
VL-HDW-408 Heat Pipe Block – mounts to heat plate
Hardware Assembly
There are two basic assembly methods:
Heat plate down (in relation to the enclosure)
Heat plate up
These assembly methods are shown in Figure 41 and Figure 42, respectively.
Thermal Considerations
Heat Plate Down
Figure 41 (a representative image of a similar VersaLogic product) shows the assembly. Use this
assembly method if you are attaching the Raven to a larger thermal solution such as a metal
chassis/enclosure.
Figure 41. Hardware Assembly with Heat Plate Down
A thermal interface compound must be applied to the heat plate to thermally bond it to the
mounting plate or other surface to which the Raven is mounted. Spread the compound thinly and
evenly across the entire heat plate surface before mounting. The compound is supplied in the VLCKR-RAVEN cable kit or sold separately as part number VL-HDW-401.
VL-EPU-3312 Reference Manual 72
Thermal Considerations
Heat Plate Up
Use this assembly method if you are adding a heatsink to the standard Raven heat plate. Figure
42 (a representative image of a similar VersaLogic product) shows the EPU-3310 assembly
including the optional HDW-406 heatsink.
Figure 42. Hardware Assembly with Heat Plate Up
The recommended assembly method for this configuration is as follows:
1. Attach the heatsink to the Raven heat plate.
2. Attach the baseboard to the enclosure with standoffs.
Installing the VL-HDW-406 Passive Heat Sink
1. Apply the Arctic Silver* Thermal Compound (VL-HDW-416)
Apply the thermal compound to the heat plate using the method described on the Arctic
Silver website - http://www.arcticsilver.com/
2. Position the passive heat sink
Using Figure 43 as a guide, align the five mounting holes of the heat sink with the heat
plate.
Orient the heat sink fins in the direction of the system airflow to maximize CPU cooling.
3. Secure the passive heat sink to the heat plate
Affix the passive heat sink to the heat plate using five M2.5 pan head screws.
Using a torque screwdriver, tighten the screws to 4.0 inch-pounds.
VL-EPU-3312 Reference Manual 73
Thermal Considerations
Figure 43. Installing the Passive Heat Sink
VL-EPU-3312 Reference Manual 74
Thermal Considerations
Installing the VL-HDW-415 Heat Sink Fan
1. Position the fan assembly
Using Figure 44 as a guide, align the mounting holes of the heat sink fan with the four
holes in the passive heat sink. Position the fan so that its power cable can easily reach its
mate.
2. Secure the fan to the heat sink
Affix the heat sink fan using four M3 pan head screws.
Using a torque screwdriver, tighten the screws to 4.0 inch-pounds.
3. Connect power to the fan
Connect the fan’s power cable to J18 on the EPU-3312.
Figure 44. Installing the Heat Sink Fan
VL-EPU-3312 Reference Manual 75
Thermal Considerations
Installing the VL-HDW-408 Heat Pipe Block
1. Apply the Arctic Silver Thermal Compound (VL-HDW-401)
Apply the thermal compound to the heat plate using the method described on the Arctic
Silver website - http://www.arcticsilver.com/. The 4 mm heat pipes will also typically
have the thermal compound applied to where the pipes contact both the heat plate and the
block.
2. Position the heat pipe block
Using Figure 45 as a guide, align the six mounting holes of the heat pipe block with the
heat plate. (Figure 45 shows the heat pipe block installed.)
3. Secure the heat pipe block to the heat plate
Affix the heat pipe block to the heat plate using six M2.5-0.45 x 10mm, Phillips, pan
head screws.
Using a torque screwdriver, tighten the screws to 4.0 inch-pounds.
Figure 45. Installing the Heat Pipe Block
VL-EPU-3312 Reference Manual 76
12
KNOWN ISSUES
Hardware
A microSD card cannot be removed or inserted if certain cables are attached to the micro
USB 3.0 connector. Many USB 3.0 cables have a housing that is thick enough to obstruct
access to the microSD socket. Some cables will not produce this limitation.
Operating Systems
In Linux, a dual-display configuration (using both the LVDS and the Mini DisplayPort++
connectors) will fail to show output on the LVDS port unless the operating system is
configured to boot in UEFI mode. Single display configurations do not have an issue.
In Ubuntu 14.04, if an LVDS monitor goes into power saving mode or the operating system
goes into suspend or hibernate mode, the LVDS monitor will fail to come back on.
BIOS
An installed microSD card disappears from Windows Device Manager after the board enters
an S3 state. Extracting/re-inserting the microSD card does not bring it back; the board must
be rebooted for Windows to recognize the microSD card again.
In the USB Configuration menu, disabling the xHCI controller without enabling the EHCI
controller prevents the use of all USB devices, including the keyboard. Without a keyboard
to navigate BIOS Setup utility, the board may need to be returned to VersaLogic for repair.
*** End of document ***
VL-EPU-3312 Reference Manual 77
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.