VersaLogic VL-586-1 Reference Manual

Reference
Reference
ReferenceReference Manual
Manual
ManualManual
VL-586-1
5x86 Industrial CPU Card for the STD 32 Bus
TM
VL-586-1
5x86 Industrial CPU Card for the STD 32 Bus
TM
M586-1
VL-586-1
5x86 Industrial Computer
for the STD 32 Bus
REFERENCE MANUAL
Doc. Rev. 10/01/2003
(for VL-586-1 Rev. 3)
V
ERSALOGIC CORPORATION
WWW.VERSALOGIC.COM
Notice:
Although every effort has been made to ensure this document is error-free, VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose.
VersaLogic reserves the right to revise this product and associated documentation at any time without obligation to notify anyone of such changes.
3888 Stewart Road Eugene, OR 97402
(541) 485-8575
Fax (541) 485-5712
Contents Copyright ©2000
All Rights Reserved
Table of Contents
Other References ...............................................................................................................vi
1. Overview ....................................................................................................................1
Using This Manual ............................................................................................................. 1
Introduction ........................................................................................................................ 1
PC/AT Compatibility............................................................................................. 1
STD/STD32 Bus Compatibility............................................................................. 2
PC/104-Plus Compatibility ................................................................................... 2
On-Board Memory ................................................................................................ 2
Hard Disk and Floppy Disk Interface.................................................................... 2
Serial Ports............................................................................................................. 2
Parallel Port ...........................................................................................................3
Counter/Timers...................................................................................................... 3
Real Time Clock with CMOS RAM ..................................................................... 3
Interrupt Controllers .............................................................................................. 3
DMA Controllers................................................................................................... 3
Watchdog Timer .................................................................................................... 3
Technical Specifications..................................................................................................... 4
Technical Support...............................................................................................................5
Repair Service........................................................................................................ 5
2. DOS Based Quick Start.............................................................................................7
Introduction ........................................................................................................................ 7
Installation .......................................................................................................................... 8
Jumper Locations................................................................................................................9
Card Installation ...............................................................................................................10
Monitor Installation .......................................................................................................... 11
Cable Installation..............................................................................................................12
CMOS RAM Setup........................................................................................................... 12
CMOS Setup Options ....................................................................................................... 13
Main CMOS Setup Menu .................................................................................... 13
Basic CMOS Configuration................................................................................. 13
Advanced Configuration...................................................................................... 13
Shadow Configuration......................................................................................... 13
Reset CMOS to Last Known Values ................................................................... 13
Reset CMOS to Factory Defaults ........................................................................ 14
Write to CMOS and Exit ..................................................................................... 14
Exit Without Changing CMOS............................................................................ 14
Clearing the CMOS RAM ................................................................................................ 15
3. Configuration...........................................................................................................17
Hardware Jumper Summary ............................................................................................. 17
Jumper Block Locations ...................................................................................... 18
iii
Table of Contents
Memory Configuration ..................................................................................................... 22
ROM Configuration............................................................................................. 22
DRAM Configuration.......................................................................................... 22
CMOS RAM Configuration ................................................................................ 23
Battery Backed SRAM Configuration................................................................. 23
Memory Map ....................................................................................................... 24
I/O Configuration ............................................................................................................. 25
Using 8-Bit STD Bus I/O Cards .......................................................................... 25
Using 10-Bit STD Bus I/O Cards ........................................................................ 25
Using 16-Bit STD Bus I/O Cards ........................................................................ 26
Using PC/104 Modules........................................................................................ 26
I/O Map................................................................................................................ 27
COM2 Configuration........................................................................................................ 28
RS-232 Operation ................................................................................................ 28
RS-422 Operation ................................................................................................ 28
RS-485 Operation ................................................................................................ 28
Multiprocessor Configuration .......................................................................................... 30
Multiprocessor Jumper Configuration................................................................. 30
Resistor Pack Configuration................................................................................ 31
Multiprocessor CPU Reset ..................................................................................31
Interrupt Configuration..................................................................................................... 32
Interrupt Configuration Jumpers .........................................................................33
STD Bus Interrupt Signals................................................................................... 34
CPU Interrupt Request Inputs.............................................................................. 35
Interprocessor Communications Interrupt Configuration ................................... 37
Non-maskable Interrupt Configuration ...............................................................37
4. Installation ...............................................................................................................39
Introduction ...................................................................................................................... 39
Card Insertion and Extraction........................................................................................... 40
Card Installation .................................................................................................. 40
Card Placement.................................................................................................... 40
STD 80 Bus Installation Guidelines .................................................................... 40
STD 32 Bus Installation Guidelines .................................................................... 40
External Connections........................................................................................................ 41
Connector Functions............................................................................................ 41
Connector Locations............................................................................................ 41
High Density 100-Pin Connector ........................................................................ 42
JA, JE – Serial Port Connectors........................................................................... 43
JB – LPT1 Parallel Port Connector .....................................................................44
JC – Counter/Timer ............................................................................................. 45
JD – Keyboard Connector ................................................................................... 46
JF – Hard Disk Drive Connector ......................................................................... 47
J2 – Interrupt Connector...................................................................................... 48
J3 – Floppy Disk Drive Connector ...................................................................... 49
L1 – Speaker Connector ...................................................................................... 50
iv
Table of Contents
5. Register Descriptions .............................................................................................51
Introduction ...................................................................................................................... 51
Register Summary ............................................................................................................ 51
Direct Memory Access — Channel 1.................................................................. 52
Direct Memory Access — Channel 2.................................................................. 53
Direct Memory Access — Page Registers .......................................................... 53
COM1 Serial Port ................................................................................................ 54
COM2 Serial Port ................................................................................................ 54
LPT1 Parallel Port ............................................................................................... 55
Floppy Disk Drive Controller.............................................................................. 56
IDE Hard Disk Drive Controller ......................................................................... 56
Interrupt Controller — Master............................................................................. 57
Interrupt Controller — Slave............................................................................... 57
Counter/Timers.................................................................................................... 58
Miscellaneous ...................................................................................................... 58
Special Control Register...................................................................................... 59
Watchdog Timer Hold-Off Register.................................................................... 60
I/O and Memory Map Control Register .............................................................. 61
Map and Paging Control Register ....................................................................... 62
Appendix A — Schematic ...........................................................................................63
Index.............................................................................................................................72
v
Other References
Acer Laboratories Inc., (408) 764-0644, http://www.ali.com.tw
M1489 / M1487 486 PCI Chipset Data Book
Chips and Technologies, Inc., (408) 434-0600, http://www.chips.com
82C735 Super I/O Chip Data Book
STD 32 Manufacturers Group, (800) 733-2111, http://www.std32.com
STD 32 Bus Specification and Designer’s Guide
Advanced Micro Devices (800) 222-9323, http://www.amd.com
AM486DX5-133V17BHC Data Book
Additional Resources,
http://www.annatechnology.com
http://www.annatech/bookBrowseBySubjectF.asp
Other References
vi
Using This Manual
Each chapter in this manual corresponds to a step in the installation process:
Chapter 1 – Overview
Lists basic information about the CPU card, specifications, and system requirements. Use this chapter to familiarize yourself with the card and it’s capabilities.
Chapter 2 – DOS Based Quick Start
Describes how to quickly get your DOS based system set up and running using a VL-586-1 CPU card.
Chapter 3 – Configuration
Describes how to jumper the CPU card.
Chapter 4 – Installation
Describes how to install the VL-586-1. It also provides details on the external connections.
Chapter 5 – Register Descriptions
Overview
1
Provides details about the user-programmable registers on the CPU card.
Appendix A – Schematics
Circuit diagrams.
Introduction
The VL-586-1 CPU card is fully PC hardware compatible, and features a 32-bit, 133 MHz, Am5x86 microprocessor, up to 32MB RAM, 512K or 2.5MB Flash, two COM ports, one LPT port, six counter/timers, and real time clock. The card supports all operating systems designed to execute on PC hardware (DOS, Windows 95, QNX, etc.) and can be expanded using STD/STD 32 Bus I/O cards or by plugging PC/104 or PC/104-Plus expansion modules directly onto the VL-586-1 circuit card.
PC/AT C
Standard I/O and peripheral interfaces, including BIOS, Embedded DOS, and a bootable Flash Disk System bring a diskless embedded PC to the STD Bus form factor.
OMPATIBILITY
VL-586-1 Reference Manual Overview – 1
Introduction
STD/STD32 B
US COMPATIBILITY
The VL-586-1 CPU card complies with certain subsets of the STD 32 Bus specification that allow it to communicate with STD 80 compatible 8-bit and STD 32 compatible 16-bit I/O and memory cards. In addition, the card fully complies with the STD 80 Bus specification using a bus speed of 8.33 MHz. The CPU card is compatible with all I/O and memory cards that adhere to STD 80 specifications.
PC/104-P
LUS COMPATIBILITY
The VL-586-1’s PC/104-Plus expansion site allows PC/104 and PC/104-Plus modules to be stacked directly on the board. This permits the use of high speed video modules and "local" I/O expansion in systems using multiple processor cards. Use of on-board modules requires an empty card slot space next to the VL-586-1 board. Both standard PC/104 and PC/104-Plus (PCI 32-bit, 33 MHz) based modules are supported.
N-BOARD MEMORY
O
DRAM
The on-board DRAM socket (U11) accepts one standard 72-pin SO DIMM module. A
variety of sizes may be used (16M, 32M or 64M.) Fast Page Mode and EDO type modules are supported, provided they are 70ns or faster. Both 5V or 3.3V modules can be used (jumper selectable.)
BBSRAM
The (-p) version of the VL-586-1 includes 512K of on-board Battery-Backed Static RAM for non-volatile storage of information. This RAM is accessible through a 64K page frame at E0000h in the main memory map.
CMOS RAM
FLASH
or 32 pin J-lead ceramic part(s). A Flash Disk System and Embedded DOS are included
PLCC
Standard setup values are stored in a small battery-backed CMOS RAM chip.
The VL-586-1 on-board ROM socket (U3) accepts 128Kx8 or 512Kx8, 32 pin plastic
which allow the card to boot to the A: prompt without user configuration.
ARD DISK AND FLOPPY DISK INTERFACE
H
A 40-pin IDE hard disk drive interface supports modes 1 through 4 via a PCI based controller. A 34-pin floppy disk drive interface is also included on the VL-586-1 card for connection to industry standard 3½" floppy drives. Each interface supports two drives, and will work with externally mounted or in-rack devices.
ERIAL PORTS
S
The two on-board serial ports are hardware and software compatible with 16550 type UARTs with 16 byte FIFOs. Baud rates are programmable from 50 baud to 115K baud. COM1 is a standard RS-232 interface, COM2 can be jumpered for RS-232, RS-422, or RS-485 operation.
2 – Overview VL-586-1 Reference Manual
Introduction
ARALLEL PORT
P
The parallel port can be used as a standard bi-directional/ECP/EPP compatible LPT port or as 17 general purpose TTL I/O signals. When operating in standard bi-directional mode, each output line has a 24 ma current sink rating. Eight of the signals are programmable as a group for input or output, three are dedicated output, and five are dedicated inputs. A strobe signal, which produces a 50 µs pulse under program control, is also available as an output.
OUNTER/TIMERS
C
The VL-586-1 card includes six 8254 type 16-bit counter/timers. Three channels are used by the operating system; one channel is reserved for dynamic
refresh, one channel generates an
RAM
18.2 ms DOS interrupt, and another channel is used to drive the speaker. The remaining three channels are unallocated, and can be clocked with on-board crystal oscillators or from external inputs.
EAL TIME CLOCK WITH
R
CMOS RAM
A battery-backed 146818 compatible real time clock (RTC) provides accurate date and time functions. This PC/AT compatible RTC also contains 128 bytes of battery-backed CMOS RAM with 114 bytes available as a system resource to store standard setup parameters. Normally the BIOS requires 94 bytes, leaving 20 bytes for general purpose use.
NTERRUPT CONTROLLERS
I
Two PC AT compatible 8259 type programmable interrupt controllers (PICs) are provided for full DOS functionality. Interrupt sources and destinations can be configured with jumper blocks. Interrupt lines connect to on-card sources, STD/STD 32, PC/104, and PCI Bus sources, and to a user connector.
DMA C
ONTROLLERS
The VL-586-1 has two DMA controllers which provide a total of eight DMA channels (four 8-bit channels and four 16-bit channels.) DMA control signals for seven channels are available on the PC/104 Bus. The remaining 16-bit channel is accessible only by software. DMA control signals are not available on the STD Bus, PCI Bus, or via front plane connector.
ATCHDOG TIMER
W
A Dallas 1232 watchdog timer circuit provides a degree of protection against hardware and software failures. When the watchdog timer is enabled, it must be periodically updated by software at least every 250 ms minimum. A system failure which prevents updating will reset the CPU. This same circuit monitors the +5V power, and handles a variety of CPU reset functions.
VL-586-1 Reference Manual Overview – 3
Technical Specifications
Technical Specifications
Specifications are typical at 25°C with 5.0V supply unless otherwise noted.
Size:
Meets all STD 80 and STD 32 Bus mechanical specifications
Storage Temperature:
-40 °C to 85 °C
Free Air Operating Temperature:
0 °C to 65 °C
Power Requirements:
5V ±5% @ 1570 ma (±12V may be required by add-on PC/104 I/O modules)
System Reset:
Vcc sensing, resets below 4.7V
Watchdog reset (jumper option)
LPT1/Parallel Interface:
Data Lines:
Output low voltage: 0.5V @ 24 ma Output high voltage: 2.4V @ -12 ma
Control Lines:
Output low voltage: 0.5V @ 24 ma Output high voltage: 2.4V @ -150 µA
COM1 & COM2 Serial Interfaces:
COM2 configurable as RS-232/422/485
Floppy Disk Drive Interface:
Supports two drives.
Hard Disk Drive Interface:
Supports two EIDE drives.
Memory Sockets:
DRAM:
16, 32 or 64 MB system dynamic RAM in one 72-pin SO DIMM gold plated socket
SRAM: (battery backed on board)
128K / 512K byte battery backed static RAM in a JEDEC compatible 32-pin SOP site
Flash:
128K to 2.5 MB (64K paged) One 32-pin PLCC socket and one 48-pin TSOP site
Memory Speed: (on-board):
RAM: 70 ns Flash: 200 ns or faster
Bus Compatibility:
STD 80: Full compliance, 8.33 MHz bus speed STD 32: Permanent Master, SA16, SA8 I, MB, MX STD 32: Temporary Master, SA16, SA8 I, MB, {MX} PC/104: Full compliance PC/104-Plus: Full compliance
(with 8 MB DRAM, 512 K Flash, 512 K SRAM, Keyboard)
Specifications are subject to change without notice.
4 – Overview VL-586-1 Reference Manual
Technical Support
If you have problems that this manual can’t help you solve, contact VersaLogic for technical support at (800) 824-3163 or (541) 485-8575. You can also reach VersaLogic by e-mail at info@versalogic.com.
EPAIR SERVICE
R
If your product requires service, you must obtain a Returned Material Authorization (RMA) number by calling (800) 824-3163.
Please provide the following information:
Your name, the name of your company, and your phone number
The name of a technician or engineer who we can contact if we have questions
Quantity of items being returned
The model and serial number of each item (the serial number is a 5 digit bar code)
Technical Support
A description of the problem
Steps you have taken to resolve or repeat the problem
The return shipping address
Warranty Repair All charges are covered, including UPS 3rd Day Select shipping
charges for return back to your facility.
Non-warranty Repair All non-warranty repairs are subject to diagnosis and labor charges,
parts charges, and return shipping fees. We will need to know what shipping method you prefer for return back to your facility, and we will need to secure a purchase order number for invoicing the repair.
Note! Please mark the RMA number clearly on the outside of the box before
returning.
Send To VersaLogic Corporation
3888 Stewart Rd Eugene, OR 97402
VL-586-1 Reference Manual Overview – 5
This chapter describes how to quickly get your DOS-based system set up and running using the VL-586-1 CPU card
Introduction
A minimum DOS based run time system requires the CPU card, a BIOS, and a boot device containing an operating system and an application program. In many cases a video card, keyboard, and monitor are added to this list, however, the VL-586-1 does not demand their presence in order to boot.
The VL-586-1 includes a Flash Disk System and an installed bootable copy of Embedded DOS. If you require a DR-DOS disk call 1-541-485-8575 and we will send one free of charge. The CMOS RAM information is shipped in its factory default condition, which allows immediate booting to the command prompt. If the CMOS Setup parameters need to be changed, the most convenient method of setting up this information is by using a keyboard and monitor. This requires the addition of a video card.
Typical components of a VL-586-1 DOS based system include:
VL-586-1 CPU Card
DOS Based Quick Start
2
STD or STD 32 Card Cage
Standard PC/AT keyboard
PC/104 Video Module
Video Monitor
Keyboard
Power Supply
VL-586-1 Reference Manual DOS Based Quick Start – 7
Installation
Installation
Caution Electrostatic discharge (ESD) can damage cards, disk drives, and other
components. Do the installation procedures described in this chapter only at an ESD workstation. If such a station is not available, you can provide some ESD protection by wearing an antistatic wrist strap and attaching it to a metal part on the card cage.
Cards can be extremely sensitive to ESD and always require careful handling. After removing the card from its protective wrapper or from the card cage, place the card on a grounded, static-free surface, component side up. Use an anti-static foam pad if available, but not the card wrapper. Do not slide the card over any surface.
The card should also protected during shipment or storage with anti-static foam or bubble wrap. To prevent damage to the lithium battery, do not use black conductive foam or metal foil.
Warning! The lithium battery may explode if mistreated. Do not recharge, disassemble, or
dispose of in fire. Dispose of used batteries promptly.
8 – DOS Based Quick Start VL-586-1 Reference Manual
Jumper Locations
Note Jumpers and resistor packs shown in as-shipped configuration.
Jumper Locations
VL-586-1 Reference Manual DOS Based Quick Start – 9
Figure 1. VL-586-1 CPU Card Layout
Card Installation
Card Installation
A typical development system consists of a six-slot V32-06T Card Cage, populated with:
VL-586-1 CPU Card (with attached EPM-SVGA PC/104-Plus Video Module)
IDE Hard Disk Drive
Floppy Disk Drive
A VGA compatible monitor and a PC/AT compatible keyboard are also required to complete the set of hardware necessary for development purposes.
Warning! To prevent damage, cards should be inserted in and removed from the card cage
only when the system power is off.
Caution To avoid damaging cards, they must be oriented correctly (usually with the card
ejector toward the top of the card cage.) Refer to the card cage documentation for the correct way to insert STD/STD 32 Bus cards.
10 – DOS Based Quick Start VL-586-1 Reference Manual
Monitor Installation
A VGA monitor should be connected to the EPM-SVGA module as shown .
Monitor Installation
Figure 2. Jumpers/Connections for an EPM-SVGA Using a VGA Monitor
VL-586-1 Reference Manual DOS Based Quick Start – 11
Cable Installation
Cable Installation
To bring the header connectors on the VL-586-1 CPU card out to industry standard PC pinouts, the VersaLogic cable VL-CBL-100A is used.
CMOS RAM Setup
The VL-586-1 CPU card uses battery-backed, non-volatile CMOS RAM provided by the real time clock chip to store system configuration settings. You can change these system settings with the Setup program (accessed manually during system boot.) The configuration information is read by the CPU upon system reset.
The Setup program is permanently stored in ROM, and can be run with or without an operating system present. To run Setup, reset the CPU card and press the DEL key when prompted.
Select “BASIC CMOS CONFIGURATION” to display a summary of the information stored in the CMOS RAM. To change the values shown, use the cursor arrows to move the highlight bar to the desired entry field and press the – or + keys to change the values.
When you are finished, exit to the main Setup menu and select “WRITE TO CMOS AND EXIT” to save the changes and exit the Setup program. The CPU will then boot from the on­board Flash Disk System (drive A:).
12 – DOS Based Quick Start VL-586-1 Reference Manual
CMOS Setup Options
CMOS Setup Options
M
ASIC
B
AIN
CMOS S
CMOS C
ETUP MENU
SYSTEM BIOS SETUP - UTILITY VERSION 2.001.xxx
(C) 1994-1996 VERSALOGIC, CORP. ALL RIGHTS RESERVED
Basic CMOS Configuration
Advanced Configuration
Shadow Configuration
Format Integrated Flash Disk
Reset CMOS to last known values
Reset CMOS to factory defaults
Write to CMOS and Exit
Exit without changing CMOS
<ESC> TO CONTINUE (NO SAVE)
ONFIGURATION
This option goes to another menu which allows you to change the following:
Date, Time
Drive assignments and types
Boot sequence
Keyboard Parameters
Memory Tests
A
DVANCED CONFIGURATION
This option goes to another menu which allows you to change the following:
Bus Timing
Memory and I/O Mapping
Cache Control
S
HADOW CONFIGURATION
This option allows you to change ROM shadowing parameters.
ESET
R
CMOS
TO LAST KNOWN VALUES
This option acts like an undo function. It reverts all changes made in the CMOS Setup Screens to the values they had when Setup was first entered.
VL-586-1 Reference Manual DOS Based Quick Start – 13
CMOS Setup Options
ESET
R
CMOS
TO FACTORY DEFAULTS
This option overwrites all information contained in the CMOS RAM with predefined parameters stored in the BIOS ROM, and reboots the CPU card.
The following parameters are loaded into CMOS RAM when this option is selected:
Basic CMOS Configuration
+---------------------------------------+--------------------------------------+ | Base Memory : 640 | Date (month day year) : Jan 01, 1997 | | Extended Memory : 15360 | Time (hours:min:sec) : 00 : 00 : 00 | | Drive A: type : Flash Disk +--------------------------------------+ | Drive B: type : Not installed Cyln Heads WPcom LZone Sect Size | | Hard disk C: type : Not installed | | Hard disk D: type : Not installed | | --------------------------------------+--------------------------------------+ | 1st Boot Device : Mfg Mode | Seek Floppy at Boot : Enabled | | 2nd Boot Device : Drive A: | Seek Hard Drive At Boot : Enabled | | QNX FFS Extension : Disabled | | | | Display "Hit <Del>..." : Enabled | | | System Configuration Box : Enabled | | Typematic Keys : Enabled | Wait for F1 on Error : Enabled | | Typematic Delay : 250 ms | NumLock State at Boot : Disabled | | Typematic Rate : 30 cps | | | Memory Test Tick : Enabled | On-board IDE controllers : Enabled | | Test Above 1MB : Enabled | PC/104 Video Shadowing : Enabled | +---------------------------------------+--------------------------------------+
Advanced Configuration
+----------------------------------------+---------------------------------------+ | AT Bus Clock : CPUCLK/4 | Fast PC/104 Cycle : Enabled | | DMA Clock : AT Clk/2 | Fast PCI Memory Cycle : Enabled | | 16 bit PC/104 Wait States : None | CPU->PCI Write Buffer : Enabled | | PC/104 I/O Recovery : Enabled | CPU->PCI Write Buff. Merge : Enabled | | PC/104 I/O Recovery Time : 24*ATClk | CPU->PCI Write Buff. Burst : Enabled | | DRAM Read Timing : Normal | CPU->PCI Fast Back-to-Back : Enabled | | DRAM Write Timing : Normal | PCI->CPU Read Buffer : Enabled | | 32-Bit PCI BIOS Extension : Enabled | PCI->CPU Write Buffer : Enabled | | Reserved : Not Used | PCI->CPU Write Buff. Burst : Enabled | | Reserved : Not Used | Internal Cache : Enabled | | Slot 1 Using INT# : INT A | PCI INT A -> IRQ# : IRQ 15 | | Slot 2 Using INT# : INT B | PCI INT B -> IRQ# : IRQ 12 | | Slot 3 Using INT# : INT C | PCI INT C -> IRQ# : IRQ 11 | | Slot 4 Using INT# : INT D | PCI INT D -> IRQ# : IRQ 10 | | Route COM3:3E8h COM4:2E8h : PC/104 | Route I/O 0100h-027Fh : PC/104 | | Route Memory D0000-D7FFFh : PC/104 | Route Memory C8000-CFFFFh : PC/104 | | | | +----------------------------------------+---------------------------------------+
RITE TO
W
CMOS
AND EXIT
This option updates the CMOS RAM with the information in the CMOS Setup Screens. After writing, the CMOS checksum is updated and the CPU card is rebooted.
XIT WITHOUT CHANGING
E
CMOS
This option acts like a cancel function. Use it to exit Setup without changing CMOS RAM.
14 – DOS Based Quick Start VL-586-1 Reference Manual
Clearing the CMOS RAM
Jumper V6[1-2] allows you clear the CMOS RAM contents if you remove the battery, install incorrect setup information, or otherwise corrupt CMOS RAM. To ensure integrity of the CMOS RAM, the Setup program calculates and stores an internal checksum of the setup data. Upon reset, the CPU detects if the CMOS RAM is corrupted by analyzing the checksum. If you wish to completely clear the contents of the CMOS RAM, briefly move jumper V6 to position [1-2] (top position) then back to the position [2-3] (lower position) and reboot the system. This process will load the factory default setup parameters into the CMOS RAM.
Warning! Do not apply power to the CPU card with jumper V6[1-2] installed, doing so may
damage the chipset and void the warranty. Jumper V6[1-2] is only briefly used to clear the CMOS RAM.
Clearing the CMOS RAM
Figure 3. CMOS RAM Jumper
VL-586-1 Reference Manual DOS Based Quick Start – 15
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