Although every effort has been made to ensure this document is error-free, VersaLogic makes no
representations or warranties with respect to this product and specifically disclaims any implied warranties of
merchantability or fitness for any particular purpose.
VersaLogic reserves the right to revise this product and associated documentation at any time without
obligation to notify anyone of such changes.
PC/104 and the PC/104 logo are trademarks of the PC/104 Consortium.
EPM-14 Reference Manual ii
Page 3
Product Release Notes
Rev 3 Release
Charlie release.
Implemented several manufacturability improvements.
See the EPM-14 support page for a list of BIOS and PLD changes.
Rev 2 Release
Beta release.
Rev 1 Release
Pre-production only. No customer shipments.
Support Page
The EPM-14 support page, at http://www.versalogic.com/private/cougarsupport.asp, contains additional
information and resources for this product including:
Reference Manual (PDF format)
Operating system information and software drivers
Data sheets and manufacturers’ links for chips used in this product
BIOS information and upgrades
Utility routines and benchmark software
This is a private page for EPM-14 users that can be accessed only be entering this address directly. It
cannot be reached from the VersaLogic homepage.
Special Registers ..........................................................................................................39
Special Control Register ................................................................................................... 39
PLD Revision and Type Register ..................................................................................... 39
Jumper and Status Register............................................................................................... 40
Appendix A – References.............................................................................................41
EPM-14 Reference Manual v
Page 6
Description
The EPM-14 is a feature-packed single board computer designed for OEM control projects
requiring fast processing and designed-in reliability and longevity (product lifespan). Its features
include:
AMD LX 800 microcontroller
with CS5536 companion chip
256 MB system RAM, soldered
on
CompactFlash site
10/100 Ethernet interface (dual)
Flat Panel Display support
MMX™ + 3DNow!™ graphics
PC/104-Plus expansion site
IDE controller, one channel,
PC/104-Plus compliant footprint
Field upgradeable BIOS with OEM
enhancements
Friction latch I/O connectors
1
Four USB 2.0/1.1 ports
The EPM-14 is compatible with popular operating systems such as Windows and Linux.
Most I/O ports are included on-board. Additional I/O expansion is available through the high-
speed PCI-based PC/104-Plus expansion site (which supports both PC/104 and PC/104-Plus
expansion modules).
The EPM-14 features high reliability design and construction, including friction latch I/O
connectors. It also features a watchdog timer, voltage sensing reset circuits and self-resetting
fuses on the 5V supply to user I/O, speaker, programmable LED, LVDS, and all USB ports.
All EPM-14 boards are subjected to functional testing and are backed by a limited two-year
warranty. Careful parts sourcing and US-based technical support ensure the highest possible
quality, reliability, service and product longevity for this exceptional SBC.
Customizing available
EPM-14 Reference Manual
1
Page 7
Technical Specifications
Specifications are typical at 25°C with 5.0V supply unless otherwise noted.
Board Size:
4.250" x 3.775" (PC/104 compliant)
Storage Temperature: -40° C to 85° C
Free Air Operating Temperature:
-40° C to +85° C EPM-14h
Power Requirements:(with 256 MB RAM,
keyboard and mouse, running Windows XP)
EPM-14h – AMD CPU +5.0V ± 5% @ 0.90A
(4.5W) typ.
+3.3V or ±12V may be required by some
expansion modules
System Reset:
Vcc sensing, resets when the 3.3V power rail
varies by more than +/- 10% of it’s optimal
value.
Watchdog timeout
DRAM Interface:
256 MB soldered on PC2700 compatible,
DDR 333 MHz RAM
Video Interface:
Up to 1600 x 1200 (32 bits)
Standard analog output
MMX™ + 3DNow!™ graphics
LVDS output for TFT FPDs
IDE Interface:
One channel, 44-pin keyed 2mm header.
Supports up to and including UDMA33.
Supports up to two IDE devices (hard drives,
CD-ROM, CompactFlash, etc.).
Specifications are subject to change without notice.
EPM-14 Reference Manual 2
Page 8
EPM-14 Block Diagram
Introduction
DDRAM
J8
44-pin IDE
J5
CompactFlash
AMD
LX 800
CPU
PCI, 3.3V
System Control
AMD
CS5536
I/O Companion
Video
TTL to LVDS
Ethernet
10/100
Ethernet
10/100
Speaker,
LED, Reset
USB 2.0
(4 Ports)
J4
Analog CRT
CBR-1201
J12
LVDS
CBR-2010 or
CBR-2011
J2
RJ45
J3
RJ45
J1
PC/104+ (PCI)
BIOS
LPC Bus
SMSC
LPC47N217
Super I/O
(2)
ISA Bridge
1 RS-422/485
Figure 1. EPM-14 Block Diagram
CPLD
2 RS-232,
J9
PC/104 (ISA)
J7
2mm 50-pin
to CBR-5011
Board
EPM-14 Reference Manual 3
Page 9
RoHS-Compliance
The EPM-14 is RoHS-compliant.
A
BOUT ROHS
In 2003, the European Union issued Directive 2002/95/EC regarding the Restriction of the use of
certain Hazardous Substances (RoHS) in electrical and electronic equipment.
The RoHS directive requires producers of electrical and electronic equipment to reduce to
acceptable levels the presence of six environmentally sensitive substances: lead, mercury,
cadmium, hexavalent chromium, and the presence of polybrominated biphenyls (PBB) and
polybrominated diphenyl ethers (PBDE) flame retardants, in certain electrical and electronic
products sold in the European Union (EU) beginning July 1, 2006.
VersaLogic Corporation is committed to supporting customers with high-quality products and
services meeting the European Union’s RoHS directive.
Warnings
Introduction
ELECTROSTATIC DISCHARGE
Electrostatic discharge (ESD) can damage boards, disk drives and other components. The circuit
board must only be handled at an ESD workstation. If an approved station is not available, some
measure of protection can be provided by wearing a grounded antistatic wrist strap. Keep all
plastic away from the board, and do not slide the board over any surface.
After removing the board from its protective wrapper, place the board on a grounded, static-free
surface, component side up. Use an antistatic foam pad if available.
The board should also be protected inside a closed metallic anti-static envelope during shipment
or storage.
Note The exterior coating on some metallic antistatic bags is sufficiently conductive to
cause excessive battery drain if the bag comes in contact with the bottom-side of
the EPM-14.
ITHIUM BATTERY
L
To prevent shorting, premature failure or damage to the lithium battery, do not place the board on
a conductive surface such as metal, black conductive foam or the outside surface of a metalized
ESD protective pouch. The lithium battery may explode if mistreated. Do not recharge,
disassemble or dispose of in fire. Dispose of depleted batteries promptly.
EPM-14 Reference Manual 4
Page 10
Introduction
TRANSIENT VOLTAGE SUPPRESSION (TVS)DEVICES
The EPM-14 circuitry is protected from spike and surge damage by on-board transient voltage
suppression (TVS) devices on the user I/O signals. Figure 2 shows a typical example of TVS
circuitry.
In order for the TVS devices to function properly, they must be connected to earth
ground. This connection is made at the board’s upper right mounting hole, as shown in Figure 3.
All other m
ounting holes are floating. Use m
etal standoffs or a grounding strap to connect the
lower right mounting hole to the enclosure chassis, which should be connected to earth ground.
User I/O Signal
User I/O Signal
User I/O Signal
User I/O Signal
TVS Devices
Earth Ground
Figure 2. Schematic Showing Typical TVS Circuitry
Only the upper right mounting hole
connects to the TVS devices. This hole
must be connected to earth for TVS
EPM-14
Cougar
EPM-14 Reference Manual 5
Figure 3. Attaching the EPM-14 to Earth Ground
Page 11
Technical Support
If you are unable to solve a problem with this manual please visit the EPM-14 Product Support
web page listed below. If you have further questions, contact VersaLogic technical support at
(503) 747-2261
Support@VersaLogic.com
EPAIR SERVICE
R
If your product requires service, you must obtain a Returned Material Authorization (RMA)
number by calling (503) 747-2261. VersaLogic’s standard turn-around tim
working days
. VersaLogic technical support engineers are also available via e-mail at
Your name, the name of your company and your phone number
The name of a technician or engineer that can be contact if any questions arise.
Quantity of items being returned
The model and serial number (barcode) of each item
A detailed description of the problem
Steps you have taken to resolve or recreate the problem
The return shipping address
Warranty Repair All parts and labor charges are covered, including return shipping
charges for UPS Ground delivery to United States addresses.
Non-warranty Repair All non-warranty repairs are subject to diagnosis and labor charges,
parts charges and return shipping fees. Please specify the shipping
method you prefer and provide a purchase order number for invoicing
the repair.
Note Please mark the RMA number clearly on the outside of the box before
returning. Failure to do so can delay the processing of your return.
EPM-14 Reference Manual 6
Page 12
Initial Configuration
The following components are recommended for a typical development system.
EPM-14 single board computer
ATX power supply with motherboard and drive connectors
SVGA video monitor
Keyboard with USB connector
Mouse with USB connector
IDE hard drive
IDE CD-ROM drive
The following VersaLogic cables are recommended.
Video adapter cable (CBR-1201)
Utility I/O cable and board assembly (CBR-5011)
IDE data cable (CBR-4406); may also require 2mm to 0.1” adapter (CBR-4405)
Power adapter cable (CBR-1008)
You will also need a Windows (or other OS) installation CD.
Basic Setup
Configuration and Setup
2
The following steps outline the procedure for setting up a typical development system. The
EPM-14 should be handled at an ESD workstation or while wearing a grounded antistatic wrist
strap.
Before you begin, unpack the EPM-14 and accessories. Verify that you received all the items you
ordered. Inspect the system visually for any damage that may have occurred in shipping. Contact
Support@VersaLogic.com immediately if any items are damaged or missing.
Gather all the peripheral devices you plan to attach to the EPM-14 and their interface and power
cables.
It is recommended that you attach standoffs to the board (see Hardware Assembly) to stabilize the
a
board and m
Figure 4 shows a typical start-up configuration.
ke it easier to work with.
EPM-14 Reference Manual
7
Page 13
J10
CBR–1201
Configuration and Setup
EPM-14
“Cougar”
CBR–1008
ATX
Power Supply
Analog SVGA
CBR-5011
J4
J7
J8
CBR–4406
Figure 4. Typical Start-up Configuration
J2
J1
CD-ROM
Drive
Hard
Drive
USB Keyboard
USB Mouse
OS Installation
CD-ROM
1. Attach Cables and Peripherals
Plug the video adapter cable CBR-1201 into socket J4. Attach the video monitor interface
cable to the video adapter.
Plug the breakout board/cable CBR-5011 into socket J7. Plug the keyboard and mouse
into any USB ports at J2 on the breakout board.
Plug the hard drive data cable CBR-4406 into socket J8. Attach a hard drive and CD-
ROM drive to the connectors on the cable. If the hard drive is 3.5”, use the 2mm to 0.1”
adapter CBR-4405 to attach the IDE cable.
Attach an ATX power cable to any 3.5” drive (hard drive or CD-ROM drive).
Set the hard drive jumper for master device operation and the CD-ROM drive jumper for
slave device operation.
EPM-14 Reference Manual 8
Page 14
Configuration and Setup
2. Attach Power
Plug the power adapter cable CBR-1008 into connector J10. Attach the motherboard
connector of the ATX power supply to the adapter.
3. Review Configuration
Before you power up the system, double check all the connections. Make sure all cables
are oriented correctly and that adequate power will be supplied to the EPM-14 and
peripheral devices.
4. Power On
Turn on the ATX power supply and the video monitor. If the system is correctly
configured, a video signal should be present.
5. Change CMOS Setup Settings
Enter CMOS Setup by pressing Delete during the early boot cycle.
Select Basic Configuration and set or verify the following settings (see CMOS Setup for
p
a com
lete list of default settings):
DRIVE ASSIGNMENT ORDER | Drive C: Ide 0/Pri Master
ATA DRV ASSIGNMENT | Ide 0: 3 = AUTOCONFIG, LBA
ATA DRV ASSIGNMENT | Ide 1: 5 = IDE CDROM
BOOT ORDER | Boot 1st: CDROM
BOOT ORDER | Boot 2nd: Drive C:
Before saving the CMOS Setup settings, insert the Windows (or other OS) installation
disk in the CD-ROM drive so it will be accessed when the system reboots.
Press ESC and write the new parameters to CMOS RAM. The system will reboot.
6. Install Operating System
Install the operating system according to the instructions provided by the OS
manufacturer. (See Operating System Installation.)
Note If y
ou intend to operate the EPM-14 under Windows XP or Windows XP
bedded, be sure to use Service Pack 2 (SP2) for full support of the latest
Em
CS5536 I/O hub and its USB 2.0 features.
EPM-14 Reference Manual 9
Page 15
CMOS Setup
The default CMOS Setup parameters for the EPM-14 are shown below.
+------------------------------------------------------------------------------+
| System BIOS Setup - Advanced Configuration |
| (C) 2005 General Software, Inc. All rights reserved |
+---------------------------------------+--------------------------------------+
| System Management Mode : Enabled | POST Memory Manager : Disabled |
| Splash Screen : Disabled | System Management BIOS : Enabled |
| Primary IDE UDMA : Enabled | Console Redirection : Auto |
| Firmbase Debug Console : None | UsbMassStorage : Enabled |
| Usb20 : Enabled | |
+---------------------------------------+--------------------------------------+
+------------------------------------------------------------------------------+
| System BIOS Setup - Custom Configuration |
| (C) 2005 General Software, Inc. All rights reserved |
+---------------------------------------+--------------------------------------+
| PCI INT A Assignment : IRQ 11 | ISA IRQ 3 : Disabled |
| PCI INT B Assignment : IRQ 11 | ISA IRQ 4 : Disabled |
| PCI INT C Assignment : IRQ 11 | ISA IRQ 5 : Disabled |
| PCI INT D Assignment : IRQ 9 | ISA IRQ 6 : Disabled |
| Write protect BIOS : Enabled | ISA IRQ 7 : Disabled |
| Video buffer size : 32 MB | ISA IRQ 9 : Disabled |
| Flat panel display : Disabled | ISA IRQ 10 : Disabled |
| Video refresh rate : 60 Hz | COM 1 enable/IRQ : IRQ4 |
| Video data width : 1 pix/clk | COM 2 enable/IRQ : IRQ3 |
| Primary video device : Auto | COM 3 enable/IRQ : Disabled |
| Memory Timings : Optimal | COM 3 mode : RS422 |
| CPU Temp threshold : 80*C | BIOS extension : Disabled |
| CPU overtemp IRQ : Disabled | Legacy USB support : Enabled |
| CPU/Memory speeds : 500/333 MHz | IDE cable type : 40-Wire |
+---------------------------------------+--------------------------------------+
Configuration and Setup
Basic CMOS Configuration
Features Configuration
Custom Configuration
EPM-14 Reference Manual 10
Page 16
Shadow Configuration
+------------------------------------------------------------------------------+
| System BIOS Setup - Shadow/Cache Configuration |
| (C) 2005 General Software, Inc. All rights reserved |
+---------------------------------------+--------------------------------------+
| Shadowing : Chipset | Shadow 16KB ROM at C000 : Enabled |
| Shadow 16KB ROM at C400 : Enabled | Shadow 16KB ROM at C800 : Disabled |
| Shadow 16KB ROM at CC00 : Disabled | Shadow 16KB ROM at D000 : Disabled |
| Shadow 16KB ROM at D400 : Disabled | Shadow 16KB ROM at D800 : Disabled |
| Shadow 16KB ROM at DC00 : Enabled | Shadow 16KB ROM at E000 : Enabled |
| Shadow 16KB ROM at E400 : Enabled | Shadow 16KB ROM at E800 : Enabled |
| Shadow 16KB ROM at EC00 : Enabled | Shadow 64KB ROM at F000 : Enabled |
+---------------------------------------+--------------------------------------+
Note Due to changes and improvements in the system BIOS, the information on your
monitor may differ from that shown above. The factory default date will
correspond to the BIOS build date.
Operating System Installation
The standard PC architecture used on the EPM-14 makes the installation and use of most of the
standard x86 processor-based operating systems very simple. The operating systems listed on the
VersaLogic OS Compatibility Chart
maker of the OS. Special optimized hardware drivers for a particular operating system, or a link
to the drivers, are available at the EPM-14 Product Support web page at
use the standard installation procedures provided by the
Configuration and Setup
.
Note An operating system installed on a different type of computer is not guaranteed to
work on the EPM-14. This is referred to as a “foreign” installation. A hard disk that
was used to boot a different computer cannot necessarily be moved to the EPM-14
and expected to boot. Even when porting an OS image from one revision of the
EPM-14 to another, performance might fail or be impaired. For the best results,
perform a fresh installation of the OS on each system. This restriction does not
apply if you are producing multiple identical systems.
EPM-14 Reference Manual 11
Page 17
Dimensions and Mounting
The EPM-14 complies with all EBX standards which provide for specific mounting hole and
PC/104-Plus stack locations as shown in the diagram below.
0.150
3.575
3.375
3.275
+
0.125 DIA x4
Use 3mm or #4
standoffs
Physical Details
3.050
+
3
3.175
0.100
0.000
-0.200
-0.550 –0.200
CautionThe single board computer must be supported at all four mounting points to
prevent excessive flexing when expansion modules are mated and detached. Flex
damage caused by excessive force on an improperly mounted circuit board is not
covered under the product warranty.
EPM-14 Reference Manual
+
0.000
Figure 5. EPM-14 Dimensions and Mounting Holes
(Not to scale. All dimensions in inches.)
+
3.150
3.350 3.700
0.200
12
Page 18
Physical Details
0
5
1
0.50
1.87
0.44
.06
Figure 6. EPM-14 Height Dimensions
(Not to scale. All dimensions in inches.)
.50
5.10
.57
1.17
1.9
EPM-14 Reference Manual 13
1.38
0.06
Figure 7. CBR-5011 Dimensions and Mounting Holes
Page 19
Physical Details
HARDWARE ASSEMBLY
The EPM-14 uses PC/104 and PC/104-Plus connectors so that expansion modules can be added
to the top of the stack. PC/104 (ISA) modules must not be positioned between the EPM-14 and
any PC/104-Plus (PCI) modules on the stack.
The entire assembly can sit on a table top or be secured to a base plate. When bolting the unit
down, make sure to secure all four standoffs to the mounting surface to prevent circuit board
flexing. Standoffs are secured to the top circuit board using four pan head screws. Standoffs and
screws are available as part number VL-HDW-101.
An extractor tool is available (part number VL-HDW-201) to separate the PC/104 modules from
the stack. Use caution when using the extractor tool not to damage any board components.
TACK ARRANGEMENT EXAMPLE
S
EPM-14 Reference Manual 14
Figure 8. Stack Arrangement Example
Page 20
External Connectors
r
EPM-14CONNECTORS
J2
Ethernet 1
J1
PC/104-Plus
Battery
Earth Ground
Reference Point
J4
SVGA
Physical Details
J3
Ethernet 0
J5
CompactFlash
2
1
J10
10
Powe
9
= Pin 1
Figure 9. EPM-14 Connectors – Top Side
CPU
J9
PC/104
J8
IDE
J7
COM 1-3, USB 1-4,
PLED, IDE LED,
Reset Button,
Speaker
EPM-14 Reference Manual 15
Page 21
Physical Details
J12
LVDS
= Pin 1
Figure 10. EPM-14 Connectors – Bottom Side
EPM-14 Reference Manual 16
Page 22
Physical Details
EPM-14CONNECTOR FUNCTIONS AND INTERFACE CABLES
The following table notes the function of each connector, as well as mating connectors and
cables, and the page where a detailed pinout or further information is available.
1. The PCB origin is the mounting hole to the lower left, as oriented in Figure 9.
2. CBR-4405 44-pin to 40-pin adapter required to connect to 3.5-inch IDE drives with 40-pin connectors.
3. Connectors J6 and J11 are for factory use only.
Page
EPM-14 Reference Manual 17
Page 23
CBR-5011CONNECTORS
Physical Details
SP1
Speaker
49
50
J1
Breakout Board
Adapter
1 5
J4
COM3
J3
COM1 (Top)
COM2 (Bottom)
1
2
J2
USB1
USB2
USB3
USB4
J5
USB4
D1
IDE (Top)
PLED (Bottom)
S1
Reset
= Pin 1
Figure 11. CBR-5011 Connectors
CBR-5011CONNECTOR FUNCTIONS
Connector /
Component
D1 IDE and Programmable LEDs Dialight 552-0211 LEDx2 T1 3/4 PC Mount Red/Green
J1 High Density Connector FCI 98414-F06-50ULF 2mm, 50 pins, keyed, friction latch
J2 USB 1-4 USB Type A USB Type A
J3 COM1-2 Kycon K42X-E9P/P-A4N Dual stacked DB-9 male
J4 COM3 Conta-Clip 10250.4 5 pin screw terminal
J5 USB 4 Molex 87758-1016 2mm, 10 pin header
S1 Reset Button E-Switch 800SP9B7M6RE Right angle momentary switch
Figure 12. Jumper Block Locations – As Shipped Configuration
V1
V2
V2
V3
2
V3
1
EPM-14 Reference Manual 19
Page 25
JUMPER SUMMARY
Physical Details
Table 2: Jumper Summary
Jumper
Block
V1
V2[1-2]
V2[3-4]
V2[5-6]
V3
Description
CMOS RAM and Real Time Clock Erase
[1-2] – Normal
[2-3] – Erase CMOS RAM and Real-Time Clock
CompactFlash Master Selector
In – CompactFlash Module is IDE Master
Out – CompactFlash Module is IDE Slave
General Purpose Input
In – CPU reads bit as 1
Out – CPU reads bit as 0
Video BIOS Selector
In – Primary Video BIOS selected
Out – Secondary Video BIOS selected
The secondary video BIOS is field-upgradeable using the BIOS upgrade
utility. See www.versalogic.com/private/cougarsupport.asp
information.
COM3 RS-422/485 Termination
In – 100 Ohm Termination Active
Out – COM3 Unterminated
for more
As
Shipped Page
[1-2] 23
In 30
In 40
In 32
In 27
EPM-14 Reference Manual 20
Page 26
Power Supply
POWER CONNECTORS
Main power is applied to the EPM-14 through a 10-pin polarized connector, with mating
connector Berg 69176-010 (Housing) + Berg 47715-000 (Pins). See the table below for the
connector pinout.
Warning!To prevent severe and possibly irreparable damage to the system, it is critical that
the power connectors are wired correctly. Make sure to use both +5VDC pins and
all ground pins to prevent excess voltage drop. Some manufacturers include a pin-1
indicator on the crimp housing that corresponds to pin-10 of the pinout shown in
Figure 13.
System Features
e
Table 3: Main Pow
J10
Signal
Pin
Name
1 GND Ground
2 +5VDC Power Input
3 GND Ground
4 +12VDC Power Input
5 GND Ground
6 -12VDC Power Input
7 +3.3VDC Power Input
8 +5VDC Power Input
9 GND Ground
10 +5VDC Power Input
r Connector Pinout
Description
4
Figure 13 shows the VersaLogic standard pin numbering for this type of 10-pin power connector
and the corresponding mating connector.
J10
EPM-14 Reference Manual
Some manufacturers include
a pin-1 indicator that
corresponds to pin-10 of the
power connector pinout
10
8
6
4
2
9
7
5
3
1
Figure 13. J10 and CBR-1008 Pin Numbering
10
8
6
4
2
9
7
5
3
1
CBR-1008
21
Page 27
System Features
Note:The +3.3VDC, +12VDC and -12VDC inputs are required only for expansion
modules that require these voltages.
OWER REQUIREMENTS
P
The EPM-14 requires only +5 volts (±5%) for proper operation. The voltage required for the
RS-232 ports are generated with a DC/DC converter. Low-voltage supply circuits provide power
to the CPU and other on-board devices.
The exact power requirement of the EPM-14 depends on several factors, including peripheral
connections, type and number of expansion modules, and attached devices. For example, driving
long RS-232 lines at high speed can increase power demand.
ITHIUM BATTERY
L
Warning!To prevent shorting, premature failure or damage to the lithium battery, do not
place the board on a conductive surface such as metal, black conductive foam or
the outside surface of a metalized ESD protective pouch. The lithium battery may
explode if mistreated. Do not recharge, disassemble or dispose of in fire. Dispose
of used batteries promptly.
Normal battery voltage should be at least 3.0V. If the voltage drops below 3.0V, contact the
factory for a replacement (part number HB3/0-1). The life expectancy under normal use is
approximately 10 years.
CPU
The Geode LX 800 microcontroller has a 32-bit, low-voltage AMD x86 microprocessor at its
core. The maximum clock rate is 500 MHz actual, with 800 MHz (Celeron equivalent)
performance. The LX 800 features 64 kb of L1 cache, 128 kb of L2 cache, DDR SDRAM
support, and an integrated display controller. The CPU has a typical power consumption of 1.6W.
System RAM
The EPM-14 has one soldered-on DDR memory module with the following characteristics:
Size 256 MB
Voltage 2.6V
Type PC2700 compatible (DDR 333 MHz)
NoteCMOS settings default to DDR 333 MHz. Settings to DDR 400 MHz are available,
but VersaLogic only guarantees operation at the default settings.
EPM-14 Reference Manual 22
Page 28
CMOS RAM
CLEARING CMOSRAM
A jumper may be installed into V1[2-3] to erase the contents of the CMOS RAM and the realtime clock. When clearing CMOS RAM: 1) Power off the EPM-14. 2) Remove the jumper from
V1[1-2], install it on V1[2-3] and leave it for four seconds. 3) Move the jumper to back to
V1[1-2]. 4) Power on the EPM-14.
CMOS Setup Defaults
The EPM-14 permits users to save custom CMOS defaults, which override factory defaults. This
allows the system to boot with user-defined settings if CMOS RAM is cleared or corrupted. The
factory defaults remain available for restoration in the main BIOS Setup screen. All CMOS Setup
defaults can be customized, except the time and date. The CMOS Setup defaults can be updated
with the Flash BIOS Update (FBU) Utility, available from the General BIOS Information
Warning! If the CMOS Setup default settings make the system unbootable and prevent the user
from entering CMOS Setup, the EPM-14 needs to be serviced by the factory.
System Features
page.
EFAULT CMOSRAMSETUP VALUES
D
After the CMOS RAM is cleared, the system will load default CMOS RAM parameters the next
time the board is powered on. The default CMOS RAM setup values will be used in order to boot
the system whenever the main CMOS RAM values are blank, or when the system battery is dead
or has been removed from the board.
AVING CMOSSETUP PARAMETERS AS CUSTOM DEFAULTS
S
To save CMOS Setup parameters to custom defaults, you will need a DOS bootable floppy with
the FBU utility on it.
1. Boot the EPM-14 and enter CMOS Setup by pressing Delete during the early boot cycle.
2. Change the CMOS parameters as desired and configure the floppy drive as the first boot
5. Run FBU and select Save CMOS contents. A file named CMOS.BIN is created and
saved to the floppy.
6. Select the FBU option Load Custom CMOS defaults. A directory of the floppy is
displayed.
7. Select the CMOS.BIN file and press the P key to program the new CMOS defaults.
8. Reboot the system from the hard disk. The custom CMOS parameters are now saved as
defaults.
EPM-14 Reference Manual 23
Page 29
Real Time Clock
The EPM-14 features a battery-backed 146818-compatible real-time clock/calendar chip. Under
normal battery conditions, the clock maintains accurate timekeeping functions when the board is
powered off.
ETTING THE CLOCK
S
The CMOS Setup utility (accessed by pressing the Delete key during a system boot) can be used
to set the time/date of the real-time clock.
System Features
EPM-14 Reference Manual 24
Page 30
Utility I/O Connector J7
A number of interfaces on the EPM-14 are grouped together and made accessible through utility
I/O connector J7. A breakout cables and board combination, CBR-5011, is available from
VersaLogic that provides discrete connectors for each of the interfaces; however, you may wish
to create a custom cable that surfaces only the interfaces required by your application.
The 50-pin I/O connector incorporates the COM ports, and the reset button and speaker
interfaces. Table 4 illustrates the function of each pin.
J7
CBR-5011
Pin
Connector Pin
1
2
3 Top DB9 2 Receive Data
4 7 Request to Send
5 3 Transmit Data 31
6 8 Clear to Send
7 4 Data Terminal Ready
8 9 Ring Indicator 34 B2 Data -
9 5 Ground
10
11
12 Bottom DB9 2 Receive Data
13 7 Request to Send
14 3 Transmit Data 39
15 8 Clear to Send
16 4 Data Terminal Ready
17 9 Ring Indicator 42 3
18 5 Ground
19
20
21 Top T3 Data + 46
22
23
24
25 Top-Middle TM3 Data + 50
26 TM2 Data -
COM1
J3
COM2
J3
USB1
J2
USB2
J2
1 Data Carrier Detect
6 Data Set Ready
1 Data Carrier Detect
6 Data Set Ready
T4 Ground 44
T1 +5V Protected 45
T2 Data - 47
TM4 Ground 48
TM1 +5V Protected 49
Interfaces and Connectors
Table 4: J7 I/O Connector Pinout
Signal
J7
CBR-5011
Pin
Connector Pin
27
28
29 Bottom-Middle BM3 Data +
30
32
33 Bottom B3 Data +
35
36
37
38
40
41 1
43 2
USB3
J2
USB4
J2
(Reserved)
PBRESET
S1
COM3
J4
PLED
D1
IDE LED
D1
Speaker
SP1
(Reserved)
BM4 Ground
BM1 +5V Protected
BM2 Data -
B4 Ground
B1 +5V Protected
– Ground
– Not connected
1 Pushbutton Reset
2 Ground
RS-422
TxD+
5
TxD-
4
Ground
RxD+
RxD-
3 Programmable LED
1 +5V Protected
4 IDE LED
2 +5V Protected
– Speaker Drive
– Ground
– Ground
5
Signal
RS-485
No connect
No connect
No connect
TRx3+
TRx3-
EPM-14 Reference Manual
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IDE
Interfaces and Connectors
One IDE interface is available to connect up to two IDE devices, such as hard disks and CDROM drives. If the on-board CompactFlash is configured for use, only one other IDE device can
be attached to the IDE controller. Connector J8 provides the interface to the IDE controller.
Jumper V2[1-2] determines if the CompactFlash plugged into J5 is the master device or slave.
Use CMOS Setup to specify the drive parameters of the attached drives.
Warning! Cable length must be 18" or less to maintain proper signal integrity.
Table 5: IDE Hard Drive Connector Pinout
Pin Signal Name Function Pin Signal Name Function
1 Reset- Reset signal from CPU 23 DIOW I/O write
2 Ground Ground 24 Ground Ground
3 DD7 Data bus bit 7 25 DIOR I/O read
4 DD8 Data bus bit 8 26 Ground Ground
5 DD6 Data bus bit 6 27 IORDY I/O ready
6 DD9 Data bus bit 9 28 Ground Ground
7 DD5 Data bus bit 5 29 DMACK- DMA acknowledge
8 DD10 Data bus bit 10 30 Ground Ground
9 DD4 Data bus bit 4 31 INTRQ Interrupt request
10 DD11 Data bus bit 11 32 NC No connection
11 DD3 Data bus bit 3 33 DA1 Device address bit 1
12 DD12 Data bus bit 12 34 CBLID- Cable type identifier
13 DD2 Data bus bit 2 35 DA0 Device address bit 0
14 DD13 Data bus bit 13 36 DA2 Device address bit 2
15 DD1 Data bus bit 1 37 CS0 Chip select 0
16 DD14 Data bus bit 14 38 CS1 Chip select 1
17 DD0 Data bus bit 0 39 PDLED IDE LED
18 DD15 Data bus bit 15 40 Ground Ground
19 Ground Ground 41 Power +5.0 V
20 NC Key 42 Power +5.0 V
21 DREQ DMA request 43 Ground Ground
22 Ground Ground 44 NC No connection
EPM-14 Reference Manual 26
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Serial Ports
The EPM-14 features three on-board 16550-based serial channels located at standard PC I/O
addresses. COM1 and COM2 are RS-232 (115.2K baud) serial ports. IRQ lines are chosen in
CMOS Setup. COM3 operates in RS-422 or RS-485 mode. IRQ lines are chosen in the CMOS
Setup. Each COM port can be independently enabled or disabled in CMOS Setup.
For information on setting the COM ports to high-speed baud rates, see the AMD LX 800 Data
Book (COM1 and COM2) or the AMD CS5536 Companion Device Data Book (COM3).
COM
PORT CONFIGURATION
There are no configuration jumpers for COM1 and COM2 since they only operate in RS-232
mode. Jumper V3 is used to enable the RS-422/485 termination resistor for COM3. The
termination resistor should be enabled for RS-422/485 endpoint station. It should be disabled for
the RS-485 intermediate station.
ERIAL PORT CONNECTORS
S
See the Connector Location Diagrams on pages 15 for connector and cable information. The
pinouts of the DB9M connectors apply
CBR-5011.
Interfaces and Connectors
to the serial connectors on the VersaLogic breakout board
1 Ground No connect
2 RxD- TRxD3 RxD+ TRxD+
4 TxD- No connect
5 TxD+ No connect
ponents to help protect against ESD damage.
RS-232
EPM-14 Reference Manual 27
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Interfaces and Connectors
COM3RS-422/485LINE DRIVER CONTROL
The COM3 line driver is controlled by manipulating the RS422/485 Transmit/Receive Control
Register (1D3h). RS-485 support is provided but limited to manual flow control. COM3 is set to
RS-485 receive mode when COM 3 Mode is set to RS485 ManuFC in CMOS. To enable RS-485
transmit mode, set bit D2. Clearing bit D2 will enable receive mode.
The USB interface on the EPM-14 is OHCI (Open Host Controller Interface) and EHCI (Enhance
Host Controller Interface) compatible, which provides a common industry software/hardware
interface. The EHCI controller is still available for use by the operating system when the “Usb20”
feature is disabled, but booting from USB 2.0 devices or using them in a DOS environment may
be slower.
The USB controllers use PCI interrupt INTD#. CMOS Setup is used to select the IRQ line routed
to each PCI interrupt line.
There are four USB ports, all connected through the utility I/O connector at J7. The CBR-5011
breakout board provides four USB type-A connectors at location J2, and an alternate 4-pin
connection for USB4 at location J5.
Table 9: USB Pinout – CBR-5011 Connector J2
Pin Signal Name Function
1 USBPxPWR +5V (Protected)
2 USBPx– Data –
3 USBPx+ Data +
4 GND Ground
Table 10: USB Pinout – CBR-5011 Connector J5
CBR-5011
J5 Pin
1 USBP4PWR +5V (Protected)
2 – No connect
3 USBP4– Channel 4 Data –
4 – No connect
5 USBP4+ Channel 4 Data +
6 – No connect
7 GND Cable Shield
8 – No connect
9 – No connect
10 IDE_LED IDE LED
Signal
Name
Function
These connectors use IEC 61000-4-2-rated TVS components to help protect against ESD damage.
EPM-14 Reference Manual 29
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CompactFlash
Connector J5 provides a socket for a Type I or Type II CompactFlash (CF) module. This IDE
based interface operates on the same channel as the IDE interface. The CF interface supports
operation in DMA mode.
The following CF modules have been tested and qualified as bootable devices by VersaLogic.
Part numbers with a suffix of -3500 are RoHS-compliant.
Interfaces and Connectors
Table 11. Qualified Bootable CF Modules
Manufacturer Density Mfg Part Number
Hagiwara 1 GB CF1-1GMDG(H00AA)
Hagiwara 512 MB CF1-512MDG(H00AA)
Silicon Systems 128 MB SSD-C12M-3012
Silicon Systems 128 MB SSD-C12M-3500
Silicon Systems 256 MB SSD-C25M-3012
Silicon Systems 256 MB SSD-C25MI-3012
Silicon Systems 256 MB SSD-C25M-3500
Silicon Systems 256 MB SSD-C25MI-3500
Silicon Systems 512 MB SSD-C51M-3012
Silicon Systems 512 MB SSD-C51MI-3012
Silicon Systems 512 MB SSD-C51M-3500
Silicon Systems 512 MB SSD-C51MI-3500
Silicon Systems 1 GB SSD-C01G-3012
Silicon Systems 1 GB SSD-C01G-3500
Silicon Systems 2 GB SSD-C02G-3012
Silicon Systems 2 GB SSD-C02GI-3012
Silicon Systems 2 GB SSD-C02G-3500
Silicon Systems 4 GB SSD-C04GI-3012
EPM-14 Reference Manual 30
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Programmable LED
Connector J7 includes an output signal for attaching a software controlled LED. Connect the
cathode of the LED to J7, pin 44; connect the anode to +5V. An on-board resistor limits the
current to 15 mA when the circuit is turned on. A programmable LED is provided on the
CBR-5011 breakout board.
To turn the LED on and off, set or clear bit D7 in I/O port 1D0h. When changing the register,
make sure not to alter the value of the other bits.
The following code examples show how to turn the LED on and off. Refer to page 36 for further
ation.
inform
LED On LED Off
MOV DX,1D0H MOV DX,1D0H
IN AL,DX IN AL,DX
OR AL,80H AND AL,7FH
OUT DX,AL OUT DX,AL
External Speaker
Connector J7 includes a speaker output signal at pin 48. The CBR-5011 breakout board provides
a Piezo electric speaker.
Interfaces and Connectors
Push-Button Reset
Connector J7 includes an input for a push-button reset switch. Shorting J7 pin 37 to ground
causes the EPM-14 to reboot.
This connector uses IEC 61000-4-2-rated TVS components to help protect against ESD damage.
A reset button is provided on the CBR-5011 breakout board.
EPM-14 Reference Manual 31
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Video Interface
An on-board video controller integrated into the chipset provides high performance video output
for the EPM-14.
ONFIGURATION
C
The video interface uses PCI interrupt INTA*. CMOS Setup is used to select the IRQ line routed
to INTA*.
The EPM-14 uses shared memory architecture. This allows the video controller to use variable
amounts of system DRAM for video RAM. The amount of RAM used for video is set with a
CMOS Setup option.
The EPM-14 supports two types of video output, SVGA and LVDS Flat Panel Display. A CMOS
Setup option is used to select which output is enabled after POST.
IDEO BIOSSELECTION
V
Jumper V2[5-6] can be removed to allow the system to boot from the secondary video BIOS.
Unlike the primary video BIOS, the secondary video BIOS can be reprogrammed in the field.
Interfaces and Connectors
SVGA
OUTPUT CONNECTOR
See the diagram on page 15 for the location of connector J4. An adapter cable, part number CBR-
1201, is available to translate J4 into a standard 15-pin D-Sub SVGA connector.
ge.
This connector uses IEC 61000-4-2-rated TVS components to help protect against ESD dam
Table 12: Video Output Pinout
J4
Signal
Pin
Name
1 GND Ground 6
2 RED Red video 1
3 GND Ground 7
4 GREEN Green video 2
5 GND Ground 8
6 BLUE Blue video 3
7 GND Ground 5
8 HSYNC Horizontal sync 13
9 GND Ground 10
10 VSYNC Vertical sync 14
11 CRT_SCL DDC data clock line 15
12 CRT_SDA DDC serial data line 12
Function
Mini DB15
Pin
a
EPM-14 Reference Manual 32
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Interfaces and Connectors
LVDSFLAT PANEL DISPLAY CONNECTOR
The integrated LVDS flat panel display in the EPM-14 is an ANSI/TIA/EIA-644-1995
specification-compliant interface. It can support up to 24 bits of RGB pixel data plus three bits of
timing control (HSYNC/VSYNC/DE) on the four differential data output pairs. The LVDS clock
frequency ranges from 25 MHz to 112 MHz.
CMOS Setup provides several options for standard LVDS flat panel types. If these options do not
match the requirements of the panel you are attempting to use, contact Support@VersaLogic.com
for a custom video BIOS.
The 3.3V power provided to pins 19 and 20 of J9 is protected by a 1 amp fuse.
See the connector location diagram on page 15 for pin and connector location information.
9 LVDSA2 Diff. Data 2 (+)
10 LVDSA2# Diff. Data 2 (-)
11 GND Ground
12 LVDSA1 Diff. Data 1 (+)
13 LVDSA1# Diff. Data 1 (-)
14 GND Ground
15 LVDSA0 Diff. Data 0 (+)
16 LVDSA0# Diff. Data 0 (-)
17 GND Ground
18 GND Ground
19 +3.3V Protected Power Supply
20 +3.3V Protected Power Supply
Function
EPM-14 Reference Manual 33
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Interfaces and Connectors
COMPATIBLE LVDSPANEL DISPLAYS
The following flat panel displays are reported to work properly with the integrated graphics video
controller chip used on the EPM-14.
Table 14: Compatible Flat Panel Displays
Manufacturer
eVision Displays xxx084S01 series 8.4” 800 x 600 18-bit LVDS TFT
au Optronix B084SN01 8.4” 800 x 600 18-bit LVDS TFT
eVision Displays xxx104S01 series 10.4” 800 x 600 18-bit LVDS TFT
au Optronix B104SN01 10.4” 800 x 600 18-bit LVDS TFT
eVision Displays xxx141X01 series 14.1” 1024 x 768 18-bit LVDS TFT
Sharp LQ121S1LG411 12.1” 800 x 600 18-bit LVDS TFT
Model Number
Panel
Size
Resolution
Interface
Panel
Technology
CONSOLE REDIRECTION
The EPM-14 can be operated without using the on-board video output by redirecting the console
to COM1. CMOS Setup and some operating systems such as DOS can use this console for user
interaction.
In the Features Configuration screen, there is an option to control console redirection. This option
can be set to Auto or Redirect. When set to Auto, the console will not be redirected to COM1
unless a signal is detected from the terminal by pressing CRTL-C or ENTER.. When set to
Redirect, the console will be directed to COM1.
Notes on console redirection:
When console redirection is enabled, you can access CMOS Setup by typing Ctrl-C.
The decision to redirect the console is made early in BIOS execution and cannot be
changed later.
The redirected console uses 115200 baud, 8 data bits, 1 stop bit, no parity, and no flow
control.
The default console redirection setting is Auto. The default can be reloaded without
entering BIOS setup by discharging CMOS contents.
Null Modem:
The following diagram illustrates a typical DB9 to DB9 RS-232 null modem adapter. Pins 7 and
8 are shorted together on each connector. Unlisted pins have no connection.
The EPM-14 features two Intel 82551ER Fast Ethernet controllers on-board. While these
controllers are not NE2000-compatible, they are widely supported. Drivers are readily available
to support a variety of operating systems. See VersaLogic website for latest OS support.
CONFIGURATION
BIOS
Ethernet interface 0 (J3) uses PCI interrupt INTA# and Ethernet interface 1 (J2) uses PCI
interrupt INTB#. CMOS Setup is used to select the IRQ line routed to each PCI interrupt line.
TATUS LED
S
Each Ethernet controller has a two-colored LED located next to its RJ-45 connector to provide an
indication of the Ethernet status as follows:
Green LED (Link):
ON Active Ethernet cable plugged in
OFF Active cable not plugged in
or cable not plugged into active hub
Interfaces and Connectors
Yellow LED (Activity):
ON Activity detected on cable
OFF No Activity detected on cable
THERNET CONNECTOR
E
Board-mounted RJ-45 connectors are provided to make connections with Category 5 Ethernet
cables. The 82551ER Ethernet controller auto-detects 10BaseT/100Base-TX connectors.
These connectors use IEC 61000-4-2-rated TVS components to help protect against ESD damage.
Table 15: RJ45 Ethernet Connector
J2/J3
Signal
Pin
Name Function
1 T+ Transmit Data +
2 T- Transmit Data 3 R+ Receive Data +
4 IGND Isolated Ground
5 IGND Isolated Ground
6 R- Receive Data 7 IGND Isolated Ground
8 IGND Isolated Ground
EPM-14 Reference Manual 35
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CPU Temperature Monitor
A thermometer circuit constantly monitors the die temperature of the CPU. This circuit can be
used to detect over-temperature conditions which can result from fan or heat sink failure or
excessive ambient temperatures.
The system can be configured to generate an interrupt when the temperature exceeds the BIOS
programmed threshold. Contact the factory for information on reading and writing to the
thermometer circuits.
PC/104 Expansion Bus
EPM-14 has limited support of the PC/104 bus. Most PC/104 cards will work, but be sure to
check the requirements of your PC/104 card against the list below.
Interfaces and Connectors
PC/104
I/OSUPPORT
The ISA I/O ranges listed below are supported. The I/O ranges allocated to COM ports 1-3 are
available to ISA when the on-board COM port function is disabled in CMOS Setup.
Each of the seven IRQs must be enabled in CMOS Setup before they can be used on the ISA bus.
Because ISA IRQ sharing is not supported, make sure that any IRQ channel used for an ISA
device is not used elsewhere. For example, if ISA IRQ 4 is enabled, you must use a different IRQ
for COM1. There are three mutually exclusive IRQ domains: PCI, ISA, and on-board COM ports.
SUPPORT
DMA
The current revision of the board does not support PC/104 DMA.
EPM-14 Reference Manual 36
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Memory Map
The lower 1 MB memory map of the EPM-14 is arranged as shown in the following table.
Various blocks of memory space between C0000h and FFFFFh can be shadowed. CMOS Setup is
used to enable or disable this feature.
I/O Map
The following table lists the common I/O devices in the EPM-14 I/O map. User I/O devices
should be added using care to avoid the devices already in the map as shown in the following
table.
System Resources and Maps
Table 16: Memory Map
Start Address End Address Comment
E0000h FFFFFh System BIOS
DC000h DFFFFh Reserved
C8000h DBFFFh PC/104
C0000h C7FFFh Video BIOS
A0000h BFFFFh Video RAM
00000h 9FFFFh System RAM
6
Table 17: I/O Map
I/O Device Standard I/O Addresses
Special Control Register 1D0h
PLD Revision and Type Register 1D1h
Jumper and Status Register 1D2h
Reserved 1D4h – IDCh
COM/ISA IRQ Routing 1DDh – 1DEh
Primary Hard Drive Controller 1F0h – 1F7h
COM3 Serial Port 3E8h – 3EFh
COM2 Serial Port 2F8h – 2FFh
COM1 Serial Port 3F8h – 3FFh
NoteThe I/O ports occupied by on-board devices are freed up when the device is
disabled in the CMOS setup. This does not apply to SPI and Reserved registers.
EPM-14 Reference Manual
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Interrupt Configuration
The EPM-14 has the standard complement of PC type interrupts. Four non-shared interrupts are
routed to the PC/104 bus, and up to four IRQ lines can be allocated as needed to PCI devices. The
following tables show the default and allowed interrupt settings. There are no interrupt
configuration jumpers. All configuration is handled through CMOS Setup. If your design needs
to use interrupt lines on the PC/104 bus, IRQ5 and IRQ10 are recommended. (IRQ3 and IRQ4 are
normally used by COM ports on the main board.)
z = default setting | = allowed setting
Source
Timer 0
Keyboard
Slave PIC
COM1
COM2
COM3
RTC
Mouse
Math Chip
IDE PATA
IDE SATA
ISA IRQ10
ISA IRQ3
ISA IRQ4
ISA IRQ5
ISA IRQ6
ISA IRQ7
ISA IRQ9
PCI INTA#
PCI INTB#
PCI INTC#
PCI INTD#