VECTRON VS-500 Technical data

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 1 of 8 Rev: 14Nov03

VS-500

Voltage Controlled SAW Oscillator

Features

• Improved High Performance ASIC

• Industry Standard Package, 9 x 14 x 4.5 mm

• Output Frequencies from 155 MHz to 850 MHz

• 3.3 V or 5.0 V Operation

• At 155.52 MHz, Jitter < 0.50 ps-rms (12 kHz to 20 MHz)

• At 622.08 MHz, Jitter < 0.30 ps-rms (50 kHz to 80 MHz)

• LV-PECL, PECL, or ECL Configurations

• Complementary Outputs

• Output Disable Feature

Applications

PLL circuits for Clock Smoothing and Frequency Translation

Description Standard

• 10G Fibre Channel INCITS/T11 Project 1413-D

• 10GbE LAN / WAN IEEE 802.3ae

• OC-192 ITU-T G.709

• SONET / SDH GR-253-CORE Issue3

Description

The VS-500 is a SAW based voltage controlled oscillator that
operates at the fundamental frequency of the internal SAW filter.
This resonator is a high Q quartz device that enables the circuit
to achieve low phase jitter performance over a wide operating
temperature range. The oscillator is housed in a hermetically
sealed J-lead surface mount package offered on tape and reel.
It has an output disable to facilitate on-board testing.

Vcc COutput Output

GndODVc

SAW

查询VS-500-KEF-GNN669.6429供应商

VS-500 Voltage Controlled SAW Oscillator

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 2 of 8 Rev: 14Nov03

Electrical Performance

Parameter Symbol Minimum Typical Maximum Units Notes

Frequency

Nominal Frequency
Absolute Pull Range
Linearity
Gain Transfer @ 155.52 MHz (See Pg 5/6)
Gain Transfer @ 622.08 MHz (See Pg 5/6)
Temperature Stability @ 155.52 MHz
Temperature Stability @ 622.08 MHz

f

N

APR

Lin

K

V

K

V

f

STAB

f

STAB

±50

150 - 850

±5
+691/+435
+434/+281

±100
±150

MHz
ppm

%
ppm/V
ppm/V

ppm
ppm

1,2,3

1,2,3,9/10

2,4,9/10

2,9/10
2,9/10

1,6
1,6

Supply

Voltage
Current (No Load)

V

CC

ICC

2.97/4.5

3.3/5.0
55

3.63/5.5
80

V

mA

2,3

3

Outputs

Mid Level
Swing
Current
Rise & Fall Time
Symmetry
Spurious Suppression
Jitter @ 155.52 MHz (See Pg 5/6)
Jitter @ 622.08 MHz (See Pg 5/6)

I

OUT

tR, tF

SYM

φJ
φJ

VCC-1.5

45
50

VCC-1.3

850

250

50
60

0.440

0.230

VCC-1.1

20

400

55

V

mV-pp

mA

ps
%

dBc
ps-rms
ps-rms

2,3
2,3

6
5,6
2,3

6
6,7
6,8

Control Voltage

Input Impedance (LV-PECL or PECL)
Input Impedance (ECL)
Modulation Bandwidth

Z

c

Z

c

BW

100

10

500

kΩ
kΩ

kHz

6

6

6

Operating Temperature TOP -40 85 °C 1,3
Package Size 9.0 x 14.0 x 4.5 mm

1. See Standard Frequencies and Ordering Information (Pg 8).

2. Parameters are tested with production test circuit below (Fig 2).

3. Parameters are tested at ambient temperature with test limits guardbanded for specified operating temperature.

4. Measured as the maximum deviation from the best straight-line fit, per MIL-0-55310.

5. Measured from 20% to 80% of a full output swing (Fig 1).

6. Not tested in production, guaranteed by design, verified at qualification.

7. Integrated across 12 kHz to 20 MHz, per GR-253-CORE Issue3.

8. Integrated across 50 kHz to 80 MHz, per GR-253-CORE Issue3.

9. Tested with Vc = 0.3V to 3.0V.

10. Tested with Vc = 0.5V to 4.5V.

Figure 1. 10K LV-PECL Waveform Figure 2. 3.3V Test Circuit

Vcc - 1.6V

Vcc - 1.3V

Vcc - 1.0V

80%

20%

t t t t SYM = 100 x t

/ t

2 5

50Ω50Ω

Test Circuit Notes:

1) To Permit 50Ω Measurement of Outputs, all DC Inputs are Biased Down 1.3V.

2) All Voltage Sources Contain Bypass Capacitors to Minimize Supply Noise.

3) 50Ω Terminations are Within Test Equipment.

(-1.3V to +2V)

(-1.3V, Open)

(-1.3V)

(+2V)

COutput

Output

Disable, Enable

1 6

3 4

VS-500 Voltage Controlled SAW Oscillator

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916 Tel: 1-88-VECTRON-1 Website: www.vectron.com

Page 3 of 8 Rev: 14Nov03

8.89±0.15

[0.350±0.006]

13.97±0.20

[0.550±0.008]

0.46±0.05

[0.018±0.002]

2.54±0.13

[0.100±0.005] 5.08±0.13

[0.200±0.005]

4.49

+0.20

-0.30

[0.177

+0.008

-0.012 ]

mm

[inch]

7.63

[0.300]

VS-500-LFF-GNN

XXX.XXX

VI YWW

1

43625

Outline Diagram Pad Layout

Pin Out

Pin

Symbol

Function

1 VC VCSO Control Voltage
2

OD Output Disable*

Disabled = LV-CMOS Logic 0 (or GND)

Enabled = LV-CMOS Logic 1 (or Open)
3 GND Case and Electrical Ground
4 Output VCSO Output
5 COutput VCSO Complementary Output
6 VCC Power Supply Voltage (3.3V / 5.0V ±10%)

*For 5.0V Operation, CMOS Levels Should Be Applied.

Tape and Reel (EIA-481-2-A)

Tape Dimensions (mm) Reel Dimensions (mm)

Dimension W F Do Po P1 A B C D N W1 W2 # Per

Tolerance Typ Typ Typ Typ Typ Typ Min Typ Min Min Typ Max

Reel

VS-500 24 11.5 1.5 4 12 330 1.5 13 20.2 100 24.4 30.4 200

Po

W

AN

F

P1

W1

W2

C

B

D

ØDo

mm

[inch]

8.80

[0.346]

1.27

[0.050]

2.54

[0.100]

5.08

[0.200]

3.00

[0.118]