Vaishali Semiconductor VT73LVP10S1X, VT73LVP10S1, VT73LVP10MX, VT73LVP10-DW, VT73LVP10M Datasheet

Preliminary

VT73LVP10

TTL to Differential LVPECL Translator

with Enable

Applications

•= PECL clock source

General Description

The Vaishali VT73LVP10 is a general purpose TTL (CMOS) to differential LVPECL translator, with active-LOW
enable. The device operates from a single 3.3V supply. When /EN is LOW or open circuit, the device accepts
an LVTTL or LVCMOS input and provides differential LVPECL outputs referenced to the positive supply rail.
When /EN is HIGH, the Q output is set to the LOW state and QN output is set to the HIGH state.

Features

•= 700ps typical propagation delay

•= Differential LVPECL outputs

•= Flow-through pinout

•= -40

o

C to +85o C operating temperature range

•= 5V - tolerant inputs

•= ESD rating >2000V (Human Body

Model) or >200V (Machine Model)

•= Available as die, 8-pin SOIC or 8 pin

MSOP package

Figure 1. Functional Block Diagram & Pin Assignment

NC

Q

QN

/EN

8 pin SOIC/ MSOP

1

2

LVPECL

3

4



100kΩ



TTL/

CMOS

8

VDD

7

D

6

NC

5 GND

2002-01-15 Page 1 MDST-0014-07

Vaishali Semiconductor  747 Camden Avenue, Suite C  Campbell  CA 95008  Ph. 408.377.6060  Fax [phone]

www.vaishali.com

VT73LVP10 Preliminary

Table 1. Pin Description

Name Description Type Pin #

/EN CMOS/TTL Active LOW enable input, with pull-down resistor I 4*

Q PECL data output O 2

QN PECL complementary data output O 3

VDD Connect to 3.3V P 8

D CMOS/TTL data input I 7

GND Connect to ground P 5

Legend: I = Input
O = Output

P = Power supply connection

* = Internal 100kΩ pull-down resistor

Table 2. Absolute Maximum Ratings

Symbol Parameter Conditions Min Typ Max Units

VDD Supply voltage Referenced to GND 6 V

VIN Input voltage Referenced to GND -0.5 6 V

I

Output current in LOW state 50 mA

OUT

T

Storage temperature -65 150 oC

STG

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only and correct functional operation of the device at these or any other conditions above those listed in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product
reliability.

Table 3. Operating Conditions

Symbol Parameter Conditions Min Typ Max Units

VDD Power Supply Voltage 3.0 3.6 V

TA Ambient Temperature -40 85 oC

VIH Input HIGH Voltage D, /EN inputs 2.0 V

VIL Input LOW Voltage D, /EN inputs 0.8 V

t

Input slew rate

Rin

t

Input slew rate

Fin

10% to 90% (L → H)
90% to 10% (H → L)

1 V/ns

1 V/ns

2002-01-15 Page 2 MDST-0014-06

www.vaishali.com

Vaishali Semiconductor  747 Camden Avenue, Suite C  Campbell  CA 95008  Ph. 408.377.6060  Fax [phone]