Industrial : -40℃~85℃
All inputs and outputs TTL compatible
Fully static operation
Three state outputs
Data retention voltage: 1.5V (min)
Data byte control :
Package : 44-pin 400mil TSOPⅡ
48-pin 6mm × 8mm TFBGA
LB
UB
(I/O1~I/O8)
(I/O9~I/O16)
FUNCTIONAL BLOCK DIAGRAM
.
MEMORY ARRAY
2048 Rows x 128 Columns x 16 bits
.
. .
COLUMN I/O
COLUMN DECODER
13
14
15
16
17
I/O1
.
.
I/O16
CE
WE
OE
DECODER
. . .
CONTROL
CONTROL
ROW
I/O
LOGIC
.
.
.
.
.
VCC
VSS
UT62L25616(I)
256K X 16 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The UT62L25616(I) is a 4,194,304-bit low power
CMOS static random access memory organized as
262,144 words by 16 bits.
The UT62L25616(I) operates from a single 2.7V ~
3.6V power supply and all inputs and outputs are fully
TTL compatible.
The UT62L25616(I) is designed for low power system
applications. It is particularly suited for use in
high-density high-speed system applications.
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A17 Address Inputs
I/O1 - I/O16 Data Inputs/Outputs
CE
WE
OE
LB
UB
VCC Power Supply
VSS Ground
NC No Connection
Chip Enable Input
Write Enable Input
Output Enable Input
Lower-Byte Control
High-Byte Control
LB
UB
A9
10 A11
12
5
A7
6
UTRON TECHNOLOGY INC. P80054
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
UTRON
Rev. 1.1
PIN CONFIGURATION
A4
A3
A2
A1
A0
CE
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
2223
UT62L25616(I)
TSOP II
TRUTH TABLE
MODE
Output
Disable
Read L
Write L
Note: H = VIH, L=VIL, X = Don't care.
CE
OE
H X X X X High – Z High – Z ISB, I
X X X H H High – Z High – Z I
L
L
H
X
L
L
L
L
L
X
L
L
X
X
256K X 16 BIT LOW POWER CMOS SRAM
A5
44
A6
43
42
A7
41
OE
40
UB
39
LB
I/O16
38
I/O15
37
I/O14
36
35
I/O13
Vss
34
Vcc
33
I/O12
32
I/O11
31
30
I/O10
29
I/O9
28
NC
A8
27
A9
26
A10
25
A11
24
A12
WE
LB
UB
H
X
H
H
H
L
L
L
X
H
L
H
L
L
H
L
X
H
H
L
L
H
L
L
A
B
C
D
E
F
G
H
LB
I/O9
Vss
Vcc
I/O15 I/O14
I/O16
NC
123456
I/O OPERATION
I/O1-I/O8 I/O9-I/O16
High – Z
High – Z
D
OUT
High – Z
High – Z
High – Z
High – Z
D
OUT
DIN
High – Z
High – Z
D
IN
UT62L25616(I)
OE
UB
I/O11I/O10
I/O12
I/O13
NC
A8
D
D
D
DIN
OUT
OUT
IN
A1
A0
A3
A4
A5
A6
A7
NC
A16 I/O5
A14
A15 I/O6
A12
A13
A9
A10
TFBGA
SUPPLY CURRENT
NC
A2
I/O1
CE
I/O3I/O2
Vcc
I/O4A17
Vss
I/O7
I/O8
WE
NC
A11
Standby
SB1
, I
SB
SB1
ICC,I
CC1,ICC2
I
CC,ICC1,ICC2
I
CC,ICC1,ICC2
UTRON TECHNOLOGY INC. P80054
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
Rev. 1.1
UTRON
ABSOLUTE MAXIMUM RATINGS
256K X 16 BIT LOW POWER CMOS SRAM
*
UT62L25616(I)
PARAMETER SYMBOL RATING UNIT
Terminal Voltage with Respect to VSS V
Operating Temperature Industrial T
Storage Temperature T
-0.5 to 4.6 V
TERM
A
-65 to +150
STG
-40 to 85
℃
℃
Power Dissipation PD 1 W
DC Output Current I
Soldering Temperature (under 10 secs) Tsolder 260
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
50 mA
OUT
℃
DC ELECTRICAL CHARACTERISTICS
(V
= 2.7V~3.6V, TA = -40℃ to 85℃(I))
CC
PARAMETER
SYMBOL
Power Voltage VCC 2.7 3.0 3.6 V
Input High Voltage VIH 2.0 - VCC+0.3 V
Input Low Voltage VIL -0.2 - 0.6 V
Input Leakage Current ILI
Output Leakage Current ILO
Output High Voltage VOH IOH= -1mA 2.2 - - V
Output Low Voltage VOL IOL= 2.1mA - - 0.4 V
Operating Power
ICC Cycle time=min, 100%duty,
Supply Current
Average Operation
Icc1
Current
Icc2 Cycle time=500ns,100%duty,I/O=0mA,
Standby Current (TTL) ISB
Standby Current (CMOS) -L - 20 80
I
SB1
TEST CONDITION MIN. TYP. MAX. UNIT
V
≦VIN ≦VCC
SS
V
≦V
SS
I/O
≦V
Output Disabled
CC;
- 1 - 1
- 1 - 1
55 - 30 45 mA
I/O=0mA,
CE
=V
;
IL
70 - 25 35 mA
100 - 20 25 mA
Cycle time=1µs,100%duty,I/O=0mA,
≦
0.2V,other pins at 0.2V or Vcc-0.2V,
CE
- 4 5 mA
- 8 10 mA
≦
0.2V,other pins at 0.2V or Vcc-0.2V,
CE
=V
CE
CE
other pins =VIL or VIH,
IH,
=V
-0.2V,
CC
other pins at 0.2V or Vcc-0.2V,
- 0.3 0.5 mA
-LL - 3 25
A
µ
A
µ
A
µ
A
µ
UTRON TECHNOLOGY INC. P80054
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
UTRON
Rev. 1.1
CAPACITANCE
(TA=25
256K X 16 BIT LOW POWER CMOS SRAM
℃
, f=1.0MHz)
UT62L25616(I)
PARAMETER SYMBOL MIN. MAX UNIT
Input Capacitance C
Input/Output Capacitance C
Note : These parameters are guaranteed by device characterization, but not production tested.
IN
I/O
-
-
6 pF
8 pF
AC TEST CONDITIONS
Input Pulse Levels 0V to 3.0V
Input Rise and Fall Times 5ns
Input and Output Timing Reference Levels 1.5V
Output Load CL = 30pF, IOH/IOL = -1mA / 2.1mA
AC ELECTRICAL CHARACTERISTICS
(VCC =2.7V~3.6V, TA = -40℃ to 85℃(I))
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
,UB
LB
LB
LB
Access Time
,UB
to High-Z Output
,UB
to Low-Z Output
SYMBOL UT62L25616(I)-55 UT62L25616(I)-70 UT62L25616(I)-100 UNIT
MIN. MAX. MIN. MAX. MIN. MAX.
tRC 55 - 70 - 100 - ns
tAA - 55 - 70 - 100 ns
t
- 55 - 70 - 100 ns
ACE
tOE - 30 - 35 - 50 ns
t
10 - 10 - 10 - ns
CLZ*
t
5 - 5 - 5 - ns
OLZ*
t
- 20 - 25 - 30 ns
CHZ*
t
- 20 - 25 - 30 ns
OHZ*
tOH 5 - 5 - 5 - ns
tBA - 55 - 70 - 100 ns
t
- 25 - 30 - 40 ns
HZB
t
0 - 0 - 0 - ns
LZB
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High Z
,UB
LB
*These parameters are guaranteed by device characterization, but not production tested.
Valid to End of Write
SYMBOL UT62L25616(I)-55 UT62L25616(I)-70 UT62L25616(I)-100 UNIT