8
7
6
5
4
3
2
1
F F
E E
D D
C C
B B
G43 Schematics
CONTENTS
Page Description
1 Title
2 System Block
3, 4, 5
6, 7, 8, 9
10,11,12
13
14
15
16, 17, 18, 19
20
21
22
23
24
25
26
27
28
29
30
31
32
33,34,35,36,37,38 POWER
CPU Socke LGA775
Intel EagleLake GMCH
DDR2 & MEM DECOUPLE
DVI PORT
HDMI PORT
VGA PORT
ICH10
CK505
SIO
IDE
COM, LPT, PS/2, FP HEADER
SATA, FRONT USB
BACK USB
FAN
AUDIO
AUDIO JACK
LAN
PCIEX16 & X1 SLOT
PCI SLOT
1394
Bypass Capacitor
Reference Description
CB 0.1UF_0402
CP 0.01UF_0402
CM
1UF_0603
PCI Resource
Device
IDSEL
INT1#
INT2#
INT3#
INT4#
REQ#
GNT#
PCI Slot 1 PCI Slot 2
AD16 AD18
PCI_INTEPCI_INTFPCI_INTGPCI_INTH-
P_REQ0-
PCI_INTFPCI_INTGPCI_INTHPCI_INTEP_REQ1-
P_GNT0- P_GNT1-
PCI SLOT 3
AD20
PCI_INTGPCI_INTHPCI_INTEPCI_INTF-
P_REQ2P_GNT2-
1394
AD22
PCI_INTH-
P_REQ3P_GNT3-
39 RESET MAP
40
41
42
43
A A
44
45
46
8
CLOCK MAP
ICH GPIO MAP
SIO GPIO MAP
POWER DELIVERY
POWER SEQUENCE
HISTORY1
HISTORY2
7
TITLE:
TITLE:
TITLE:
G43NB
G43NB
G43NB
TITLE
TITLE
TITLE
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
6
5
4
3
A3
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
Wednesday, April 02, 2008
Wednesday, April 02, 2008
Wednesday, April 02, 2008
2
REV:
REV:
REV:
14 6
14 6
14 6
1
0.2
0.2
0.2
of
of
of
8
7
6
5
4
3
2
1
Block Diagram - G43
F F
Power
Circuit
Page 32,33,34,35,36,37,38
E E
PCIE X16
Page 29
DVI-D PORT
Page 13
D D
SMBus
Switch
Page 13
VGA PORT
Page 14
PCIE X16
LGA775
Processor
Page 3,4,5
1333/1066/800
FSB
G43
Page 6,7,8,9
DDR2
667/800
MHz
DDR2
667/800
Clock Gen.
SLG505YC264B
64PIN
Page 19
DDR2 CHA
Page 10
DDR2 CHB
Page 11
SMBus
MHz
SPI
Page 18
SATA Ports
Page 23
C C
SPI
SATA
QST
Page 15,16,17,18
FAN
Page 25
USB 2.0
DMI
ICH10
SMBus
PCIE X1
PCI
PCIE X1
Page 29
PCI Slot
Page 30
1394
HECETA
Page 25
INTEL
B B
USB 2.0
Page 23,24
Line Out
HD
Mic In
Line In
A A
8
Audio
CODE
ALC888
Page 26,27
7
HD Audio
SPDIF
Page 26
HD HEADER
Page 27
6
5
GLCI
SMBus
LPC
82567
Page 28
SIO
W83627DHG
Page 20
4
Page 31
RJ45
Serial
PS2 K/M
LPT
3
TITLE:
TITLE:
TITLE:
G43NT
G43NT
G43NT
SYSTEM BLOCK
SYSTEM BLOCK
SYSTEM BLOCK
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
2
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
Wednesday, April 02, 2008
Wednesday, April 02, 2008
Wednesday, April 02, 2008
1
REV:
REV:
REV:
0.2
0.2
0.2
24 6
24 6
24 6
of
of
of
1
H_A-[3..35] 6
A A
H_REQ-[0..4] 6
H_ADSTB0- 6
H_PECI 15,20
B B
H_VCCPLL 7
C C
D D
E E
F F
H_ADSTB1- 6
H_STPCLK- 15
CPUVID[0..7] 36
CLK_HOST_CPU 19
CLK_HOST_CPU- 19
VCC_SENSE 36
VSS_SENSE 36
H_FERR- 15
H_IGNNE- 15
SKTOCC- 15,20
H_SMI- 15
H_A20M- 15
H_INTR 15
H_NMI 15
1
H_REQ-0
H_REQ-1
H_REQ-2
H_REQ-3
H_REQ-4
0805
0805
C1
C1
10UF
10UF
CPU_THERMDA
CPU_THERMDC
CP1CP1
CPUVID0
CPUVID1
CPUVID2
CPUVID3
CPUVID4
CPUVID5
CPUVID6
CPUVID7
H_VID_SEL
T24T24
T25T25
T29T29
H_A-3
H_A-4
H_A-5
H_A-6
H_A-7
H_A-8
H_A-9
H_A-10
H_A-11
H_A-12
H_A-13
H_A-14
H_A-16
T1T1
T5T5
H_A-17
H_A-18
H_A-19
H_A-20
H_A-21
H_A-22
H_A-23
H_A-24
H_A-25
H_A-26
H_A-27
H_A-28
H_A-29
H_A-30
H_A-31
H_A-32
H_A-33
H_A-34
H_A-35
T13T13
T14T14
T15T15
T16T16
T18T18
C15
C15
X_100PF
X_100PF
AB6
AA4
AD6
AA5
AB5
AC5
AB4
AF5
AF4
AG6
AG4
AG5
AH4
AH5
AC4
AE4
AD5
A23
B23
D23
C23
AM2
AL5
AM3
AL6
AK4
AL4
AM5
AM7
AN7
G28
AE8
AL1
AK1
AN3
AN4
AN5
AN6
2
J1A
J1A
L5
A3-
P6
A4-
M5
A5-
L4
A6-
M4
A7-
R4
A8-
T5
A9-
U6
A10-
T4
A11-
U5
A12-
U4
A13-
V5
A14-
V4
A15-
W5
A16-
N4
RESERVED10
P5
RESERVED11
K4
REQ0-
J5
REQ1-
M6
REQ2-
K6
REQ3-
J6
REQ4-
R6
ADSTB0-
G5
PECI
A17-
W6
A18-
Y6
A19-
Y4
A20A21A22A23A24A25A26A27A28A29A30A31A32A33-
AJ5
A34-
AJ6
A35RESERVED12
RESERVED13
ADSTB1-
P2
SMI-
K3
A20M-
R3
FERR_PBE-
K1
LINT0
L1
LINT1
N2
IGNNE-
M3
STPCLKVCCA
VSSA
VCCPLL
VCCIOPLL
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
VID_SELECT
F28
BCLK0
BCLK1
SKTOCCFC25
FC24
VCC_SENSE
VSS_SENSE
VCC_MB_REGULATION
VSS_MB_REGULATION
F29
RESERVED14
LGA775_72MMX72MM_INTEL
LGA775_72MMX72MM_INTEL
CPU_THERMDC 20
CPU_THERMDA 20
2
1 of 4
1 of 4
FC0_BOOTSELECT
ADSBNR-
HIT-
FC35
BPRIDBSYDRDY-
HITM-
IERR-
INITLOCKTRDY-
FC36
DEFER-
GTLREF2
FC37
FC29
FC30
BR0BPMB3BPMB2-
TESTHI10
FC31
FC32
FC33
FC34
GTLREF0
FC15
RESET-
RS0-
RS1-
RS2-
TESTHI0
TESTHI1
DPSLP-
TDI_M
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
FC8
RESERVED15
SLP-
RESERVED16
PWRGOOD
PROCHOT-
THERMTRIP-
COMP0
COMP1
COMP2
COMP3
RESERVED17
RESERVED18
BPMB1RESERVED20
RESERVED21
GTLREF3
BPMB0-
TDO_M
RESERVED22
FC10
RESERVED23
GTLREF1
FC3
FC22
RESERVED19
FC39
D2
C2
D4
H4
G8
B2
C1
E4
AB2
P3
C3
E3
AD3
G7
F2
AB3
U2
U3
F3
G3
G4
H5
J16
H15
H16
J17
H1
H29
G23
B3
F5
A3
F26
W3
P1
W2
F25
G25
G27
G26
G24
F24
AK6
G6
L2
AH2
N1
AL2
M2
A13
T1
G2
R1
N5
AE6
C9
D16
A20
G10
G1
U1
E23
E24
F23
H2
J2
J3
Y1
V2
AA2
3
T2T2
H_IERR-
T4T4
T3T3
T6T6
T7T7
TESTHI_8
TESTHI_9
TESTHI_10
T8T8
T9T9
T10T10
T11T11
CPU_GTLREF0
T12T12
C2 X C2 X
CLOSE TO CPU
TESTHI_0
TESTHI_1
DPSLPTESTHI_12
TESTHI_2-7
T17T17
T19T19
H_COMP0
H_COMP1
H_COMP2
H_COMP3
T20T20
T21T21
R34 51R
R34 51R
T22T22
T23T23
H_BPM0_2
TESTHI_12
T26T26
T27T27
T28T28
CPU_GTLREF1
H_COMP4
T30T30
BOOTSELECT
T31T31
T32T32
CLOSE TO CPU
SST: 100PF
SCH5127: 2200PF
3
C3 X C3 X
H_FORCEPH_IO-
PM_SLP_N
H_IGNNE- 15
H_STPCLK- 15
THERMTRIP_ICH- 15
H_ADS- 6
H_BNR- 6
H_HIT- 6
H_BPRI- 6
H_DBSY- 6
H_DRDY- 6
H_HITM- 6
H_INIT- 15
H_LOCK- 6
H_TRDY- 6
H_DEFER- 6
CPU_GTLREF2 4
H_BR0- 6
H_CPURST- 5,6,36
H_RS0- 6
H_RS1- 6
H_RS2- 6
DPSLP- 15
H_PWRGD- 15
H_PROCHOT- 15
THERMTRIP_ICH- 15
H_PECI 15,20
H_SMI- 15
H_INTR 15
H_NMI 15
H_INIT- 15
VTT_OUT_R 4,5,36
0402
0402
CPU_GTLREF3 4
H_A20M- 15
H_FERR- 15
C5 X C5 X
VTT_OUT_R 4,5,36
CPU_GTL0_DIVIDER 4
C6 X C6 X
4
Place resistors outside socket cavity
R1 49R9_1%
R1 49R9_1%
0402
0402
R2 49R9_1%
R2 49R9_1%
0402
0402
FSB_VTT
R3 51R
R3 51R
0402
0402
R6 51R
R6 51R
0402
0402
R7 470R
R7 470R
0402
0402
R8 470R
R8 470R
0402
0402
R9 470R
R9 470R
0402
0402
R4 62R
R4 62R
0402
0402
CLOSE TO ICH
R5 49R9_1%
R5 49R9_1%
0402
0402
R10 49R9_1%
R10 49R9_1%
0402
0402
R11 51R
R11 51R
0402
0402
VTT_OUT_L
R12 62R
R12 62R
0402
0402
X_51R
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
R25 62R
R25 62R
R26 X
R26 X
R27 X
R27 X
R28 X
R28 X
R29 X
R29 X
R30 680R
R30 680R
R32
R32
57.6R_1%
57.6R_1%
R36
R36
100R_1%
100R_1%
C12 X C12 X
C10 X C10 X
C11 X C11 X
4
C7 X C7 X
VTT_OUT_R 4,5,36
C8 X C8 X
R13 X
R13 X
R14 51R
R14 51R
R15 51R
R15 51R
R16 51R
R16 51R
R17 51R
R17 51R
R18 X
R18 X
R19 51R
R19 51R
R20 62R
R20 62R
R21 X
R21 X
R22 X
R22 X
R23 51R
R23 51R
R24 X
R24 X
C9 X C9 X
PM_SLP_N
TESTHI_1
TESTHI_8
TESTHI_9
TESTHI_10
DPSLPTESTHI_12
X_49.9R_1%
X_100R
H_BPM0_2
H_COMP4
X_49.9R_1%
0402
0402
X_130R_1%
0402
0402
0402
0402
X_49.9R_1%
0402
0402
X_49.9R_1%
0402
0402
0402
0402
C13 X C13 X
C14 X C14 X
5
H_COMP0
H_COMP1
TESTHI_0
TESTHI_2-7
H_COMP2
H_COMP3
BOOTSELECT
H_CPURST- 5,6,36
PM_SLP_N 6
H_BR0- 6
PM_DPRSTP- 4,6,15
H_PWRGD- 15
H_IERRH_FORCEPH_IO-
H_PROCHOT- 15
PSI- 4,36
H_VID_SEL
CM1CM1
H_COMP7 4
R35 10R_1% R35 10R_1%
CLOSE TO CPU_GTLREF PIN
CPU_GTL1_DIVIDER 4
5
FSB_SEL0 6,19
FSB_SEL1 6,19
FSB_SEL2 6,19
H_FERR- 15
C4 X C4 X
X_220PF
VTT_OUT_R 4,5,36
ITP_CLKOUT- 5
R37 57.6R_1% R37 57.6R_1%
R39 100R_1% R39 100R_1%
H_D-[0..63] 6
H_DBI0- 6
H_DSTBN0- 6
H_DSTBP0- 6
H_DBI1- 6
H_DSTBN1- 6
H_DSTBP1- 6
H_TRST- 5
H_BPM-[0..5] 5
DBRESET- 5,15,22
ITP_CLKOUT 5
FSB_SEL0 6,19
FSB_SEL1 6,19
FSB_SEL2 6,19
6
H_TCK 5
H_TDI 5
H_TDO 5
H_TMS 5
CPU_GTLREF0 4
R38 10R_1% R38 10R_1%
CM2CM2
6
H_D-0
H_D-1
H_D-2
H_D-3
H_D-4
H_D-5 H_A-15
H_D-6
H_D-7
H_D-8
H_D-9
H_D-10
H_D-11
H_D-12
H_D-13
H_D-14
H_D-15
H_D-16
H_D-17
H_D-18
H_D-19
H_D-20
H_D-21
H_D-22
H_D-23
H_D-24
H_D-25
H_D-26
H_D-27
H_D-28
H_D-29
H_D-30
H_D-31
H_BPM-0
H_BPM-1
H_BPM-2
H_BPM-3
H_BPM-4
H_BPM-5
C16 X C16 X
X_220PF
J1B
J1B
A10
A11
B10
C11
B12
C12
D11
E10
D10
F11
F12
D13
E13
G13
F14
G14
F15
G15
G11
G12
E12
AE1
AD1
AF1
AC1
AG1
AJ2
AJ1
AD2
AG2
AF2
AG3
AC2
AK3
AJ3
G29
H30
G30
B4
C5
A4
C6
A5
B6
B7
A7
D8
A8
C8
B9
G9
F8
F9
E9
D7
2 of 4
2 of 4
D0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15DBI0DSTBN0DSTBP0-
D16D17D18D19D20D21D22D23D24D25D26D27D28D29D30D31DBI1DSTBN1DSTBP1-
TCK
TDI
TDO
TMS
TRST-
BPM0BPM1BPM2BPM3BPM4BPM5-
DBRITP_CLK0
ITP_CLK1
BSEL0
BSEL1
BSEL2
LGA775_72MMX72MM_INTEL
LGA775_72MMX72MM_INTEL
CPU_GTLREF1 4
TITLE:
TITLE:
TITLE:
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
7
H_D-32
G16
D32-
H_D-33
E15
D33-
H_D-34
E16
D34-
H_D-35
G18
D35-
H_D-36
G17
D36-
H_D-37
F17
D37-
H_D-38
F18
D38-
H_D-39
E18
D39-
H_D-40
E19
D40-
H_D-41
F20
D41-
H_D-42
E21
D42-
H_D-43
F21
D43-
H_D-44
G21
D44-
H_D-45
E22
D45-
H_D-46
D22
D46-
H_D-47
G22
D47-
D19
DBI2-
G20
DSTBN2-
G19
DSTBP2-
DBI3DSTBN3DSTBP3-
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
FC40
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
G43NT
G43NT
G43NT
LGA775 1/3
LGA775 1/3
LGA775 1/3
Date: PAGE:
Date: PAGE:
Date: PAGE:
A3
A3
A3
7
D20
D48-
D17
D49-
A14
D50-
C15
D51-
C14
D52-
B15
D53-
C18
D54-
B16
D55-
A17
D56-
B18
D57-
C21
D58-
B21
D59-
B19
D60-
A19
D61-
A22
D62-
B22
D63-
C20
A16
C17
A29
B25
B29
B30
C29
A26
B27
C28
A25
A28
A27
C30
A30
C25
C26
C27
B26
D27
D28
D25
D26
B28
D29
D30
AM6
AA1
J1
F27
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Sunday, April 06, 2008
Sunday, April 06, 2008
Sunday, April 06, 2008
H_D-48
H_D-49
H_D-50
H_D-51
H_D-52
H_D-53
H_D-54
H_D-55
H_D-56
H_D-57
H_D-58
H_D-59
H_D-60
H_D-61
H_D-62
H_D-63
R31 0R
R31 0R
R33 X
R33 X
CB1CB1
FSB_VTT
X_0R
CB2CB2
CB3CB3
H_DBI2- 6
H_DSTBN2- 6
H_DSTBP2- 6
H_DBI3- 6
H_DSTBN3- 6
H_DSTBP3- 6
0402
0402
0402
0402
VTT_OUT_L
VTT_SEL 33
8
VTT_PWRGD 33,36
VR_READY 15,36
VTT_OUT_R 4,5,36
REV:
REV:
REV:
0.2
0.2
0.2
34 6
34 6
34 6
of
of
of
8
1
A A
H_COMP7 3
PM_DPRSTP- 3,6,15
B B
C C
D D
E E
H_COMP8
MS_ID0
PSI- 3,36
IMPSEL
MS_ID1
J1C
J1C
AG22
VCCP1
K29
VCCP2
AM26
T116 T116
AL8
AE12
AE11
W23
W24
W25
T25
Y28
AL18
AC25
W30
Y30
AN14
AD28
Y26
AC29
M29
U24
AC27
AM18
AM19
AB8
AC26
T30
AM9
AF15
AC8
AE14
N23
W29
U29
AC24
AC23
Y23
AN26
AN25
AN11
AN18
Y27
Y25
AD24
AE23
AE22
AN19
AE21
AM30
AE19
AC30
AE15
M30
K27
M24
AN21
VCCP3
VCC
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
J23
VCCP22
VCCP23
VCCP24
VCCP25
VCCP26
VCCP27
J8
VCCP28
J28
VCCP29
VCCP30
VCCP31
VCCP32
VCCP33
VCCP34
VCCP35
VCCP36
VCCP37
VCCP38
VCCP39
VCCP40
VCCP41
VCCP42
VCCP43
VCCP44
VCCP45
VCCP46
VCCP47
VCCP48
VCCP49
VCCP50
V8
VCCP51
K8
VCCP52
VCCP53
VCCP54
VCCP55
VCCP56
VCCP57
VCCP58
VCCP59
VCCP60
VCCP61
2
X
CPU_GTL0_DIVIDER 3
CPU_GTL1_DIVIDER 3
CPU_GTLREF0 3
CPU_GTLREF1 3
T34T34
T33T33
B13
T2
F6
AE3
E7
V1
FC21
MSID1
VCCP62T8VCCP63
N25
AC28
D14
W1
FC17Y3FC18
MSID0
COMP8
DPRSTP-
RESERVED5
RESERVED6
RESERVED7E6RESERVED8
VCCP64
VCCP65
VCCP66
VCCP67
VCCP68M8VCCP69
VCCP70
VCCP71
N30
W26
AE18
AJ26
AD25
AD26
X
0402
0402
0R
0R
stuff 0R
0402
0402
X
X
0402
0402
X
X
0402
0402
T37T37
T36T36
T35T35
E5
D1
FC20
VCCP72
VCCP73
VCCP74
VCCP75L8VCCP76
VCCP77Y8VCCP78
VCCP79
U25
M25
M26
AM29
U23
AJ12
AD27
CPU_GTLREF_OUT
R40
R40
CPU_GTLREF_OUT
R41
R41
R43
R43
R46
R46
VCORE
AK9
M28
AF12
VCCP226
VCCP225
VCCP224
VCCP223N8VCCP222
LGA775_72MMX72MM_INTEL
LGA775_72MMX72MM_INTEL
VCCP80
VCCP81
VCCP82
VCCP83
VCCP84
VCCP85
N27
U28
M23
AG29
AM22
3
CPU_GTLREF3 3
CPU_GTLREF2 3
AF19
K26
J14
AN22
N24
VCCP221
VCCP220
VCCP219
VCCP218
3 of 4
3 of 4
VCCP86
VCCP87U8VCCP88
VCCP89
VCCP90
K28
K24
AD8
AK18
4
VCC3
1UF
1UF
CM3
CM3
1K
1K
0402
0402
CPU_GTL_CTRL1 15
AH8
AD29
AL29
AG8
AA8
AG18
J30
AF14
M27
AK14
Y24
AF21
AD30
AL9
AG19
J27
J12
W28
T28
VCCP217
VCCP216W8VCCP215
VCCP214
VCCP213
VCCP212
VCCP211
VCCP210
VCCP209
VCCP208
VCCP207J9VCCP206
VCCP205
VCCP204
VCCP203
VCCP202
VCCP201
VCCP200
VCCP199
VCCP198
VCCP91
VCCP92
VCCP93
VCCP94
VCCP95
VCCP96
VCCP97
VCCP98
VCCP99
VCCP100
VCCP101
VCCP102
VCCP103
VCCP104
VCCP105
VCCP106
VCCP107
VCCP108
VCCP109
VCCP110
J22
T29
Y29
AE9
AK12
AH28
AH21
AH22
AK25
AK19
AM14
AM25
J25
T24
U30
AJ18
AG15
AL21
AG21
AG25
AM21
U1
1
VDD
2
VSS
AL26
AG12
3
VCCP193
VCCP115
GTL3004U1GTL3004
AG28
AH27
VCCP192
VCCP116
J20
AJ22
GTL_REF
S0
AH29
AH19
AJ14
VCCP191
VCCP190
VCCP189
VCCP188
VCCP117
VCCP118
VCCP119
VCCP120
W27
AH18
AH26
R47
R47
J13
J24
AM12
VCCP197
VCCP196
VCCP195
VCCP194
VCCP111
VCCP112
VCCP113
VCCP114
J19
J15
AH30
5
6
VTT
CPU_GTLREF_OUT
5
4
S1
AH11
AF22
AF9
N26
VCCP187
VCCP186
VCCP185
VCCP184
VCCP183
VCCP182
VCCP181
VCCP180
VCCP179
VCCP178
VCCP177
VCCP176
VCCP175
VCCP174
VCCP173
VCCP172
VCCP171
VCCP170
VCCP169
VCCP168
VCCP167
VCCP166
VCCP165
VCCP164
VCCP163
VCCP162
VCCP161
VCCP160
VCCP159
VCCP158
VCCP157
VCCP156
VCCP155
VCCP154
VCCP153
VCCP152
VCCP151
VCCP150
VCCP149
VCCP148
VCCP147
VCCP146
VCCP145
VCCP144
VCCP143
VCCP142
VCCP141
VCCP140
VCCP139
VCCP138
VCCP137
VCCP136
VCCP135
VCCP134
VCCP133
VCCP132
VCCP131
VCCP130
VCCP129
VCCP128
VCCP127
VCCP126
VCCP125
VCCP124
VCCP123
VCCP121
VCCP122
AN8
AL25
CM4
CM4
1UF
1UF
AG9
AN12
AK8
T27
AJ19
U26
AJ8
AN15
AL22
AH12
N28
T26
AM8
AL19
K23
P8
K25
J11
J29
AH9
AJ25
AL30
N29
AG14
AK11
AJ9
AL12
AH25
AN30
AL14
K30
AJ11
AL11
AM11
AJ21
AG30
AK21
AF8
AM15
AD23
AF11
AK15
AG27
J21
J18
J26
AL15
AF18
AH15
AN9
AG26
AJ15
J10
AK26
AG11
AN29
AK22
R8
T23
U27
AH14
R44
R44
1K
1K
0402
0402
VTT_OUT_R 3,5,36
CPU_GTL_CTRL2 15
VTT_OUT_R 3,5,36
MS_ID0
MS_ID1
VTT_OUT_R 3,5,36
VTT_OUT_R 3,5,36
6
R52 X
R52 X
R53 X
R53 X
R54
R54
57.6R_1%
57.6R_1%
R56
R56
100R_1%
100R_1%
57.6R_1%
57.6R_1%
R59
R59
100R_1%
100R_1%
R57
R57
H_COMP8
IMPSEL
MS_ID0
MS_ID1
R42
R42
R45 51R
R45 51R
R48 X
R48 X
R49 X
R49 X
0402
0402
R51
R51
X
X
X_1K
X_0R
0402
0402
X_0R
0402
0402
For Quad-core CPU support in future
R55 10R_1% R55 10R_1%
CM5CM5
CLOSE TO CPU_GTLREF PIN
R58 10R_1% R58 10R_1%
CM6CM6
CLOSE TO CPU_GTLREF PIN
Q1
Q1
B
B
1
7
24R9_1%
24R9_1%
0402
0402
0402
0402
X_51R
0402
0402
0402
0402
0402
0402
R50
R50
680R
680R
C
C
X_3904_SOT23
X_3904_SOT23
E
E
2 3
X_220PF
C17 X C17 X
X_220PF
C18 X C18 X
8
VRD_EN 36
CPU_GTLREF2 3
CPU_GTLREF3 3
TITLE:
TITLE:
TITLE:
G43NB
G43NB
F F
1
2
3
4
5
6
G43NB
LGA775 2/3
LGA775 2/3
LGA775 2/3
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
7
<Doc>
<Doc>
<Doc>
Tim Zhao
Tim Zhao
Tim Zhao
Date: PAGE:
Date: PAGE:
Date: PAGE:
Saturday, April 05, 2008
Saturday, April 05, 2008
Saturday, April 05, 2008
REV:
REV:
REV:
44 6
44 6
44 6
8
0.1
0.1
0.1
of
of
of
1
2
3
4
5
6
7
8
H_BPM-[0..5] 3
A A
AG23
AF20
AL28
AA23
V26
AM4
AB1
AJ27
R30
E27
AE17
AE20
P24
AN24
AF17
AG24
AF23
AF24
AN27
AN28
AF25
AF26
AF27
AF28
AF29
H28
AF30
AE13
AG10
AA30
AB23
AB24
AB25
AN16
AB26
AB27
AN17
AG20
AB28
AB29
AB30
AK24
C13
AH1
AE26
J1D
J1D
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS260
VSS259
VSS258
VSS257T7VSS256
VSS255
VSS254
VSS253
VSS252H3VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239F7VSS238
VSS237
VSS236
VSS235
VSS234F4VSS233
VSS232N3VSS231
VSS230
VSS229
VSS228M7VSS227
VSS226
VSS225
VSS224
VSS223
VSS222E8VSS221
VSS220M1VSS219
C10
VSS1
D12
VSS2
C24
VSS3
K2
VSS4
C22
VSS5
AN1
VSS6
B14
VSS7
AE16
B11
AL10
AK23
H12
AF7
AK7
E14
E11
AL16
AL24
AK13
D21
AL20
D18
AN2
AK16
AK20
AM27
AM1
AL13
AL17
C19
E28
AK30
D24
AL23
A12
AE28
AE29
AE30
AN20
AF10
AE24
AM24
AN23
H13
AC6
AC7
AH6
C16
AM16
AE25
AE27
AJ28
F19
AH13
AD7
AH16
AK17
E17
AH17
AH20
AE5
AH23
AE7
AM13
K7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
H7
VSS16
VSS17
L28
VSS18
Y5
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
L25
VSS40
J7
VSS41
VSS42
VSS43
K5
VSS44
J4
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
H9
VSS52
H8
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
4 of 4
4 of 4
LGA775_72MMX72MM_INTEL
LGA775_72MMX72MM_INTEL
B B
C C
D D
E E
VSS218L7VSS217L6VSS216
AJ4
VSS215
VSS214
VSS213V7VSS212
VSS211
VSS210
VSS209B8VSS208B5VSS207B1VSS206D3VSS205A9VSS204D5VSS203D6VSS202A6VSS201C4VSS200D9VSS199E2VSS198A2VSS197
A18
H6
VSS196
VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS267
VSS268
FC23
FC26
VRDSEL
AF13
AE10
AF16
P29
V3
P30
R23
R24
U7
R25
R26
R27
R28
R29
E25
AL7
T6
V23
V24
T3
V25
AN10
E20
R7
V27
R5
V28
V29
R2
V30
E26
P7
AA24
AA25
P4
AA26
AA27
AN13
AA28
N7
N6
AA29
L27
Y7
AL27
D15
L29
L30
AH7
AJ7
A24
E29
AL3
T115 T115
H_BPM-[0..5] 3
ITP_CLKOUT 3
CLK_HOST_ITP 19
CLK_HOST_ITP- 19
ITP_CLKOUT- 3
SMB_CLK 10,19,23
SMB_DATA 10,19,23
VTT_OUT_R 3,4,36
SAM TEC BSH -03-01-H-D
T38T38
T39T39
R78 X
R78 X
0402
0402
X_1K
H_TDO 3
H_TDI 3
H_TMS 3
H_TCK 3
H_TRST- 3
H_BPM-0
H_BPM-1
H_BPM-2
H_BPM-3
H_BPM-4
H_BPM-5
R75 X R75 X
R73 0R R73 0R
R72 0R R72 0R
R74 X R74 X
TESTIN-
J28J28
9
BPM0*
7
BPM1*
6
BPM2*
4
BPM3*
3
BPM4*
1
BPM5*
16
100M_CLK_DP
18
100M_CLK_DN
13
XDP_H_CLK_DP
15
XDP_H_CLK_DN
22
SCL
24
SDA
14
VTT
28
NC0
H_BPM-0
H_BPM-1
H_BPM-2
H_BPM-3
H_BPM-4
H_BPM-5
NC1H1NC2
R60 51R
R60 51R
0402
0402
R61 51R
R61 51R
0402
0402
R62 51R
R62 51R
0402
0402
R63 51R
R63 51R
0402
0402
R64 51R
R64 51R
0402
0402
R65 51R
R65 51R
0402
0402
R66 62R
R66 62R
0402
0402
R67 62R
R67 62R
0402
0402
R68 62R
R68 62R
0402
0402
R69 62R
R69 62R
0402
0402
R70 62R
R70 62R
0402
0402
R71 62R
R71 62R
0402
0402
TDO
TDI
TMS
TCK
TRST*
PWRGOOD
RESET*
DBR*
TESTIN*
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
H2
CB4CB4
23
29
31
30
25
R76 1K5_1%
R76 1K5_1%
10
19
21
12
2
5
8
11
17
20
26
27
0402
0402
TESTIN-
0402
0402
VTT_OUT_R 3,4,36
R77 1K
R77 1K
H_TDO 3
H_TDI 3
H_TMS 3
H_TCK 3
H_TRST- 3
VTT_OUT_R 3,4,36
H_CPURST- 3,6,36
DBRESET- 3,15,22
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102L3VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132V6VSS133W4VSS134
VSS135
VSS136
VSS137
VSS138
VSS139Y2VSS140C7VSS141
VSS142
VSS143
VSS144
VSS145W7VSS146
VSS147
L26
L24
F22
F16
AF3
AF6
AK5
AJ30
AJ10
AJ16
AJ17
F F
AH24
1
AK29
F13
AH3
AG7
AJ23
AK10
AM10
L23
F10
2
A15
B24
A21
B20
H11
AD4
H27
AE2
AH10
AM23
AJ29
B17
H26
H25
H24
H23
H10
H22
H21
H20
H19
AA3
AA7
AK27
AK28
AM20
3
AA6
H18
AB7
H17
P28
P26
H14
AC3
AJ24
AM17
P27
AK2
AJ13
AM28
4
P23
P25
AJ20
AG17
AG16
AG13
5
6
TITLE:
TITLE:
TITLE:
G43NT
G43NT
G43NT
LGA 775 3/3
LGA 775 3/3
LGA 775 3/3
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
7
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
Sunday, April 06, 2008
Sunday, April 06, 2008
Sunday, April 06, 2008
8
REV:
REV:
REV:
0.2
0.2
0.2
54 6
54 6
54 6
of
of
of
1
U2A
AA35
AA37
AA36
L36
L37
J38
F40
H39
L38
L43
N39
N35
N37
J41
N40
M45
R35
T36
R36
R34
R37
R39
U38
T37
U34
U40
T34
Y36
U35
U37
Y37
Y34
Y38
G38
K35
J39
C43
G39
J40
T39
C39
B39
B40
K31
J31
F33
J25
K25
F26
C32
D32
D30
J42
J44
H37
L42
D27
H42
G44
J43
H45
K44
H40
G43
L44
G42
L40
U2A
FSB_AB_3
FSB_AB_4
FSB_AB_5
FSB_AB_6
FSB_AB_7
FSB_AB_8
FSB_AB_9
FSB_AB_10
FSB_AB_11
FSB_AB_12
FSB_AB_13
FSB_AB_14
FSB_AB_15
FSB_AB_16
FSB_AB_17
FSB_AB_18
FSB_AB_19
FSB_AB_20
FSB_AB_21
FSB_AB_22
FSB_AB_23
FSB_AB_24
FSB_AB_25
FSB_AB_26
FSB_AB_27
FSB_AB_28
FSB_AB_29
FSB_AB_30
FSB_AB_31
FSB_AB_32
FSB_AB_33
FSB_AB_34
FSB_AB_35
FSB_REQB_0
FSB_REQB_1
FSB_REQB_2
FSB_REQB_3
FSB_REQB_4
FSB_ADSTBB_0
FSB_ADSTBB_1
FSB_DSTBPB_0
FSB_DSTBNB_0
FSB_DINVB_0
FSB_DSTBPB_1
FSB_DSTBNB_1
FSB_DINVB_1
FSB_DSTBPB_2
FSB_DSTBNB_2
FSB_DINVB_2
FSB_DSTBPB_3
FSB_DSTBNB_3
FSB_DINVB_3
FSB_ADSB
FSB_BNRB
FSB_BPRIB
FSB_BREQ0B
FSB_CPURSTB
FSB_DBSYB
FSB_DEFERB
FSB_DRDYB
FSB_HITB
FSB_HITMB
FSB_LOCKB
FSB_RSB_0
FSB_RSB_1
FSB_RSB_2
FSB_TRDYB
EAGLELAKE
EAGLELAKE
CM7CM7
H_A-[3..35] 3
A A
B B
H_REQ-[0..4] 3
H_ADSTB0- 3
H_ADSTB1- 3
C C
H_DSTBP0- 3
H_DSTBN0- 3
H_DBI0- 3
H_DSTBP1- 3
H_DSTBN1- 3
H_DBI1- 3
H_DSTBP2- 3
H_DSTBN2- 3
H_DBI2- 3
H_DSTBP3- 3
H_DSTBN3- 3
H_DBI3- 3
D D
E E
F F
H_ADS- 3
H_BNR- 3
H_BPRI- 3
H_BR0- 3
H_CPURST- 3,5,36
H_DBSY- 3
H_DEFER- 3
H_DRDY- 3
H_HIT- 3
H_HITM- 3
H_LOCK- 3
H_RS0- 3
H_RS1- 3
H_RS2- 3
H_TRDY- 3
FSB_VTT
GTLREF Voltage should be 0.63xVTT = 0.8V
0402
0402
R99
R99
R95
R95
49R9_1%
49R9_1%
301R_1%
301R_1%
0402
0402
HD_SWING S/B 1/4xVTT +/-2%
CB6CB6
R106
R106
100R_1%
100R_1%
H_A-3
H_A-4
H_A-5
H_A-6
H_A-7
H_A-8
H_A-9
H_A-10
H_A-11
H_A-12
H_A-13
H_A-14
H_A-15
H_A-16
H_A-17
H_A-18
H_A-19
H_A-20
H_A-21
H_A-22
H_A-23
H_A-24
H_A-25
H_A-26
H_A-27
H_A-28
H_A-29
H_A-30
H_A-31
H_A-32
H_A-33
H_A-34 H_D-31
H_A-35 H_D-32
H_REQ-0
H_REQ-1
H_REQ-2
H_REQ-3
H_REQ-4
51R resistor to MCH GTLREF
pins is 1.5" max
HXSWING
0402
0402
10/10 mils
1
1 of 6
1 of 6
FSB
FSB
FSB_VTT
FSB_ACCVREF
R91: 57.6R
R100: 100R
R91
R91
57.6R_1%
57.6R_1%
R96
R96
49R9_1%
49R9_1%
R101
R101
100R_1%
100R_1%
2
FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8
FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB_DB_14
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34
FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63
FSB_SWING
FSB_RCOMP
FSB_DVREF
HPL_CLKINP
HPL_CLKINN
0402
0402
2
C21 X C21 X
H_D-0
F44
H_D-1
C44
H_D-2
D44
H_D-3
C41
H_D-4
E43
H_D-5
B43
H_D-6
D40
H_D-7
B42
H_D-8
B38
H_D-9
F38
H_D-10
A38
H_D-11
B37
H_D-12
D38
H_D-13
C37
H_D-14
D37
H_D-15
B36
H_D-16
E37
H_D-17
J35
H_D-18
H35
H_D-19
F37
H_D-20
G37
H_D-21
J33
H_D-22
L33
H_D-23
G33
H_D-24
L31
H_D-25
M31
H_D-26
M30
H_D-27
J30
H_D-28
G31
H_D-29
K30
H_D-30
M29
G30
J29
H_D-33
F29
H_D-34
H29
H_D-35
L25
H_D-36
K26
H_D-37
L29
H_D-38
J26
H_D-39
M26
H_D-40
H26
H_D-41
F25
H_D-42
F24
H_D-43
G25
H_D-44
H24
H_D-45
L24
H_D-46
J24
H_D-47
N24
H_D-48
C28
H_D-49
B31
H_D-50
F35
H_D-51
C35
H_D-52
B35
H_D-53
D35
H_D-54
D31
H_D-55
A34
H_D-56
B32
H_D-57
F31
H_D-58
D28
H_D-59
A29
H_D-60
C30
H_D-61
B30
H_D-62
E27
H_D-63
B28
HXSWING
B24
HRCOMP
A23
GMCH_GTLREF
C22
B23
P29
P30
GMCH_GTLREF
X_220PF
Place close to GMCH pin
CL_VREF
Follow CRB.
Design checklist shows 1K/465R
0:PCIE16 Lane number reversed
1:PCIE16 normal operation
0402
0402
R88
R88
16R5_1%
16R5_1%
CLK_HOST_GMCH 19
CLK_HOST_GMCH- 19
VCC3
PEG_PINB7 13,29
3
H_D-[0..63] 3
CB5CB5
FSB_SEL0 3,19
FSB_SEL1 3,19
FSB_SEL2 3,19
EXP_SLR 13
EXP_EN 13,29
0: Enable Internal TPM
Float: Disable Internal TPM
R92
R92
0402
0402
X
X
R93
R93
0402
0402
X
X
R94
R94
0402
0402
X
X
R97
R97
0402
0402
X
X
R98
R98
0402
0402
X
X
R100
R100
0402
0402
X
X
Oct 1 added
3
VCC1.125V_CL
1K_1%
1K_1%
0402
0402
R79
R79
0402
0402
464R_1%
464R_1%
R80
R80
PM_EXTTS_N
MCH_RSVD_K16
DUALX8_EN
MCH_RSVD_J15
MCH_RSVD_J20
CLK_PE_100M_GMCH 19
CLK_PE_100M_GMCH- 19
SDVO_CTRL_DATA 13,29
SDVO_CTRL_CLK 13,29
R83 10K
R83 10K
R84 10K
R84 10K
R85 10K
R85 10K
MCH_CLPWROK 16,38
EXP_RXP_0 29
EXP_RXN_0 29
EXP_RXP_1 29
EXP_RXN_1 29
EXP_RXP_2 29
EXP_RXN_2 29
EXP_RXP_3 29
EXP_RXN_3 29
EXP_RXP_4 29
EXP_RXN_4 29
EXP_RXP_5 29
EXP_RXN_5 29
EXP_RXP_6 29
EXP_RXN_6 29
EXP_RXP_7 29
EXP_RXN_7 29
EXP_RXP_8 29
EXP_RXN_8 29
EXP_RXP_9 29
EXP_RXN_9 29
EXP_RXP_10 29
EXP_RXN_10 29
EXP_RXP_11 29
EXP_RXN_11 29
EXP_RXP_12 13
EXP_RXN_12 13
EXP_RXP_13 29
EXP_RXN_13 29
EXP_RXP_14 29
EXP_RXN_14 29
EXP_RXP_15 29
EXP_RXN_15 29
DMI_RXP_0 16
DMI_RXN_0 16
DMI_RXP_1 16
DMI_RXN_1 16
DMI_RXP_2 16
DMI_RXN_2 16
DMI_RXP_3 16
DMI_RXN_3 16
R86 X
R86 X
MCH_RSVD_K16
R87
R87
X
X
R89
R89
1K
1K
CL_N_DATA 16
CL_N_CLK 16
CL_RST 16
4
U2B
U2B
2 of 6
2 of 6
F6
PEG_RXP_0
G7
PEG_RXN_0
H6
PEG_RXP_1
G4
PEG_RXN_1
J6
PEG_RXP_2
J7
PEG_RXN_2
L6
PEG_RXP_3
L7
PEG_RXN_3
N9
PEG_RXP_4
N10
PEG_RXN_4
N7
PEG_RXP_5
N6
PEG_RXN_5
R7
PEG_RXP_6
R6
PEG_RXN_6
R9
PEG_RXP_7
R10
PEG_RXN_7
U10
PEG_RXP_8
U9
PEG_RXN_8
U6
PEG_RXP_9
U7
PEG_RXN_9
AA9
PEG_RXP_10
AA10
PEG_RXN_10
R4
PEG_RXP_11
P4
PEG_RXN_11
AA7
PEG_RXP_12
AA6
PEG_RXN_12
AB10
PEG_RXP_13
AB9
PEG_RXN_13
AB3
PEG_RXP_14
AA2
PEG_RXN_14
AD10
PEG_RXP_15
AD11
PEG_RXN_15
AD7
DMI_RXP_0
AD8
DMI_RXN_0
AE9
DMI_RXP_1
AE10
DMI_RXN_1
AE6
DMI_RXP_2
AE7
DMI_RXN_2
AF9
DMI_RXP_3
AF8
DMI_RXN_3
D9
EXP_CLKP
E9
EXP_CLKN
AB13
T54T54
T55T55
0402
0402
0402
0402
0402
0402
T56T56
T57T57
0402
0402
T58T58
I_TPM_EN-
0402
0402
T59T59
TCEN
0402
0402
T60T60
T61T61
T62T62
T63T63
T64T64
T65T65
T66T66
DUALX8_EN
CL_VREF DPL_100M_REFSSCLKIN-
T67T67
T68T68
T69T69
T70T70
4
AD13
AB15
AN13
AW2
AN10
AN11
J13
G13
F17
G16
P15
M20
N17
F15
H17
K16
G15
L17
R32
J17
G20
N25
T14
T15
R14
R15
F20
AY4
AY2
AN8
AN9
AR7
RSVD15
RSVD16
SDVO_CTRLDATA
SDVO_CTRLCLK
BSEL0
BSEL1
BSEL2
ALLZTEST
XORTEST
EXP_SLR
EXP_SM
RSVD29
RSVD17
ITPM_ENB
RSVD18
CEN
BSCANTEST
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
DUALX8_ENABLE
CL_DATA
CL_CLK
CL_VREF
CL_RSTB
CL_PWROK
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
EAGLELAKE
EAGLELAKE
PM_EXTTS_N
MCH_RSVD_J20
MCH_RSVD_J15
5
T46T46
T45T45
T43T43
T44T44
T41T41
T40T40
T42T42
DP1DP1
W30
B14
AK15
AE30
AF30
AC30
AD30
A44
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
PCI Express Interface
PCI Express Interface
DMI Interface
DMI Interface
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
J20
J15
L13
L11
M16
T71T71
T72T72
5
T48T48
T47T47
BD1
NC9
RSVD6
J16
T73T73
T52T52
T51T51
T53T53
T50T50
T49T49
DP2DP2
DP3DP3
DP4DP4
DP5DP5
BD45
BE2
BE44
AN16
AW44
R42
U32
B45
AN17
AD42
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
RSVD11
RSVD10B2RSVD9
RSVD7
RSVD12
RSVD13
RSVD14
RSVD8
A45
U30
U31
R31
BE1
M17
BE45
T78T78
T77T77
T75T75
T76T76
T74T74
T79T79
DP7DP7
DP6DP6
6
PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9
PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3
EXP_RCOMPO
EXP_COMPI
EXP_ICOMPO
EXP_RBIAS
CRT_HSYNC
CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
HDA_BCLK
HDA_RSTB
HDA_SDI
HDA_SDO
HDA_SYNC
DDPC_CTRLDATA
DDPC_CTRLCLK
DPRSTPB
CRT_DDC_DATA
CRT_DDC_CLK
DPL_REFCLKINP
DPL_REFCLKINN
DPL_REFSSCLKINP
DPL_REFSSCLKINN
DAC_IREF
ICH_SYNCB
VSS
C16
6
SLPB
RSTINB
PWROK
C11
B11
A10
B9
C9
D8
B8
C7
B7
B6
B3
B4
D2
C2
H2
G2
J2
K2
K1
L2
P2
M2
T2
R1
U2
V2
W4
V3
AA4
Y4
AC1
AB2
AC2
AD2
AD4
AE4
AE2
AF2
AF4
AG4
10mils/10mils
EXP_COMP
Y7
Y8
Y6
EXP_RBIAS
AG1
HSYNC_R
D14
VSYNC_R
C14
B18
D18
C18
F13
AU4
AV4
AU2
AV1
AU3
F11
J11
P43
P42
L15
M15
E15
D15
DPL_100M_REFSSCLKIN
G8
G9
AS SHORT AS POSSIBLE
DAC_IREF
B15
AN6
AR4
K15
EXP_TXP_0 29
EXP_TXN_0 29
EXP_TXP_1 29
EXP_TXN_1 29
EXP_TXP_2 29
EXP_TXN_2 29
EXP_TXP_3 29
EXP_TXN_3 29
EXP_TXP_4 29
EXP_TXN_4 29
EXP_TXP_5 29
EXP_TXN_5 29
EXP_TXP_6 29
EXP_TXN_6 29
EXP_TXP_7 29
EXP_TXN_7 29
EXP_TXP_8 29
EXP_TXN_8 29
EXP_TXP_9 29
EXP_TXN_9 29
EXP_TXP_10 29
EXP_TXN_10 29
EXP_TXP_11 29
EXP_TXN_11 29
EXP_TXP_12 13
EXP_TXN_12 13
EXP_TXP_13 13
EXP_TXN_13 13
EXP_TXP_14 13
EXP_TXN_14 13
EXP_TXP_15 13
EXP_TXN_15 13
DMI_TXP_0 16
DMI_TXN_0 16
DMI_TXP_1 16
DMI_TXN_1 16
DMI_TXP_2 16
DMI_TXN_2 16
DMI_TXP_3 16
DMI_TXN_3 16
Follow CRB.
Design checklist shows 24R9
0402
0402
0402
0402
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_HDA_BCLK 15
MCH_HDA_RST- 15
MCH_HDA_SDIN3 15
MCH_HDA_SDO 15
MCH_HDA_SYNC 15
DDPC_CTRLDATA 29
DDPC_CTRLCLK 29
PM_DPRSTP- 3,4,15
PM_SLP_N 3
VGA_DDC_DA_3V 14
VGA_DDC_CLK_3V 14
CLK_96M_DOT
CLK_96M_DOT-
R90
R90
1K02_1%
1K02_1%
0402
0402
PRST_GMCH- 20
PWR_GD 15,20,21,23,31,38
ICH_SYNC- 15
C19 X C19 X
C20 X C20 X
7
HSYNC_R
VSYNC_R
R81 49R9_1%
R81 49R9_1%
VCC1.125V_CORE
R82 750R_1%
R82 750R_1%
VGA_RED 14
VGA_GREEN 14
VGA_BLUE 14
CLK_96M_DOT 19
CLK_96M_DOT- 19
DPL_100M_REFSSCLKIN 19
DPL_100M_REFSSCLKIN- 19
TITLE:
TITLE:
TITLE:
G43NT
G43NT
G43NT
GMCH 1/4
GMCH 1/4
GMCH 1/4
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
7
Date: PAGE:
Date: PAGE:
Date: PAGE:
Custom
Custom
Custom
VGA_DDC_CLK_3V 14
VGA_DDC_DA_3V 14
R102 33R
R102 33R
R103 33R
R103 33R
CLK_96M_DOT
DPL_100M_REFSSCLKIN
R482
R482
R485
R485
CLK_96M_DOTDPL_100M_REFSSCLKIN-
Stuff for no graphic
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Sunday, April 06, 2008
Sunday, April 06, 2008
Sunday, April 06, 2008
0402
0402
0402
0402
R490
R490
R494
R494
C22 X C22 X
X_10K
X_10K
0402
0402
X_10K
X_10K
0402
0402
C23 X C23 X
8
VCC3
0402
0402
2K2_1%
2K2_1%
R104
R104
VGA_HSYNC_3V 14
VGA_VSYNC_3V 14
VCC1.125V_CORE
X_10K
X_10K
0402
0402
X_10K
X_10K
0402
0402
REV:
REV:
REV:
8
0402
0402
2K2_1%
2K2_1%
R105
R105
0.2
0.2
0.2
64 6
64 6
64 6
of
of
of
8
VCC1.125V_CORE
F F
U2C
U2C
3 of 6
3 of 6
U21
VCC_74
U22
VCC_75
U23
VCC_76
U24
VCC_77
U25
VCC_78
U26
VCC_79
U27
VCC_80
U29
VCC_81
W19
VCC_82
W21
VCC_83
E E
FSB_VTT
D D
C C
VCC1.8V_DDR2
B B
W23
W25
W27
W29
Y20
Y22
Y24
Y26
AC4
AF3
R22
R21
R24
R23
R20
P24
P22
P21
P20
N22
N21
N20
M22
M21
K22
K21
H22
H21
G22
G21
F22
F21
E23
D24
D23
D22
C26
C24
B26
B25
A25
BE36
BE31
BE27
BE23
BD38
BD34
BD29
BD25
F9
H4
L3
P3
V4
L22
L21
J22
J21
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VTT_FSB_35
VTT_FSB_34
VTT_FSB_33
VTT_FSB_32
VTT_FSB_31
VTT_FSB_30
VTT_FSB_29
VTT_FSB_28
VTT_FSB_27
VTT_FSB_26
VTT_FSB_25
VTT_FSB_24
VTT_FSB_23
VTT_FSB_22
VTT_FSB_21
VTT_FSB_20
VTT_FSB_19
VTT_FSB_18
VTT_FSB_17
VTT_FSB_16
VTT_FSB_15
VTT_FSB_14
VTT_FSB_13
VTT_FSB_12
VTT_FSB_11
VTT_FSB_10
VTT_FSB_9
VTT_FSB_8
VTT_FSB_7
VTT_FSB_6
VTT_FSB_5
VTT_FSB_4
VTT_FSB_3
VTT_FSB_2
VTT_FSB_1
VCC_SM_15
VCC_SM_14
VCC_SM_13
VCC_SM_12
VCC_SM_11
VCC_SM_10
VCC_SM_9
VCC_SM_8
T29
VCC_73
VCC_SM_7
BD21
T27
VCC_72
VCC_SM_6
BB39
T26
VCC_71
VCC_SM_5
BA41
T25
VCC_70
VCC_SM_4
AY40
T24
VCC_69
VCC_SM_3
AV44
7
T23
VCC_68
VCC_SM_2
AT45
T22
VCC_67
VCC_SM_1
AP44
T21
VCC_66
R29
VCC_65
R27
VCC_64
R26
VCC_63
VCC_EXP_38
AK4
R25
AJ25
VCC_62
VCC_EXP_37
AK3
AK2
AJ23
VCC_61
VCC_60
VCC_EXP_36
VCC_EXP_35
AJ2
AJ21
VCC_59
VCC_EXP_34
AJ1
AJ19
VCC_58
VCC_EXP_33
Y15
AJ17
AJ16
VCC_57
VCC_EXP_32
Y14
W15
AG29
VCC_56
VCC_55
VCC_EXP_31
VCC_EXP_30
U15
AG26
VCC_54
VCC_EXP_29
U14
AG24
VCC_53
VCC_EXP_28
AK9
6
INT VRM Disable : Stuff R1078, Empty R1077
INT VRM Enable : Stuff R1077, Empty R1078
AG22
AG20
AG17
AG16
AF29
AF27
AF26
AF25
AF24
AF23
AF22
AF21
AF20
AF19
AF17
AF16
VCC_52
VCC_51
VCC_50
VCC_49
VCC_48
VCC_47
VCC_46
VCC_45
VCC_44
VCC_43
VCC_42
VCC_41
VCC_40
VCC_39
VCC_38
VCC_37
EAGLELAKE
EAGLELAKE
VCC_EXP_27
VCC_EXP_26
VCC_EXP_25
VCC_EXP_24
VCC_EXP_23
VCC_EXP_22
VCC_EXP_21
VCC_EXP_20
VCC_EXP_19
VCC_EXP_18
VCC_EXP_17
VCC_EXP_16
VCC_EXP_15
VCC_EXP_14
VCC_EXP_13
VCC_EXP_12
AJ9
AJ8
AJ7
AK8
AK7
AK6
AK13
AK12
AJ6
AJ14
AJ13
AJ12
AJ11
AK11
AK10
AJ10
AE29
VCC_36
VCC_EXP_11
AG15
AE27
VCC_35
VCC_EXP_10
AF15
AE25
VCC_34
VCC_EXP_9
AF14
AE23
VCC_33
VCC_EXP_8
AE15
AE21
VCC_32
VCC_EXP_7
AE14
AE19
VCC_31
VCC_EXP_6
AD15
AE17
VCC_30
VCC_EXP_5
AD14
AE16
VCC_29
VCC_EXP_4
AC15
AD29
VCC_28
VCC_EXP_3
AB14
AD26
AA15
5
AD24
VCC_27
VCC_26
VCC_EXP_2
VCC_EXP_1
AA14
VCC1.5V
AD22
AD20
VCC_25
VCC1.125V_CORE
R107 0R
R107 0R
R108 X
R108 X
AD17
AD16
AC29
AC27
AC25
AC23
VCC_24
VCC_23
VCC_22
VCC_21
VCC_20
VCC_19
VCCA_DAC1
VCCA_DAC2
VCCA_EXP
VCCDQ_CRT
VCCDPLL_EXP
B19
A17
B20
B12
D19
U33
AC21
VCC_18
VCC_17
VCCD_HPLL
AC19
VCC_16
VCC_SMCLK1
AK32
AC17
VCC_15
VCC_SMCLK2
AL31
AC16
VCC_14
VCC_SMCLK3
AL32
0402
0402
0402
0402
AB30
VCC_13
VCC_SMCLK4
AM31
AB29
VCC_12
AB26
VCC_11
VCCCML_DDR
AM30
AB24
VCC_10
AB22
VCC_9
4
AB20
AA30
VCC_8
VCC_7
VCC_CL84
VCC_CL85
Y29
W31
C24 X
C24 X
0805
0805
X_4.7UF
AA29
AA27
AA25
AA23
VCC_6
VCC_5
VCC_4
VCC_CL83
VCC_CL81
VCC_CL82
Y30
Y33
AJ15
AK14
AA21
AA19
VCC_3
VCC_2
VCC_1
VCC_CL78
VCC_CL79
VCC_CL80
Y32
AM29
B16
VCC_CL76
VCC_CL77
AM24
AM25
AM26
AG2
B22
VCCA_HPLL
VCCAPLL_EXP
VCCAVRM_EXP
VCC_CL73
VCC_CL74
VCC_CL75
AM21
AM22
A21
D20
C20
VCCA_MPLL
VCCA_DPLLA
VCC_CL71
VCC_CL72
AM17
AM20
VCC3
VCCA_DPLLB
AR2
E19
VCC3_3
VCC_HDA
VCC_CL1
VCC_CL2
VCC_CL3
VCC_CL4
VCC_CL5
VCC_CL6
VCC_CL7
VCC_CL8
VCC_CL9
VCC_CL10
VCC_CL11
VCC_CL12
VCC_CL13
VCC_CL14
VCC_CL15
VCC_CL16
VCC_CL17
VCC_CL18
VCC_CL19
VCC_CL20
VCC_CL21
VCC_CL22
VCC_CL23
VCC_CL24
VCC_CL25
VCC_CL26
VCC_CL27
VCC_CL28
VCC_CL29
VCC_CL30
VCC_CL31
VCC_CL32
VCC_CL33
VCC_CL34
VCC_CL35
VCC_CL36
VCC_CL37
VCC_CL38
VCC_CL39
VCC_CL40
VCC_CL41
VCC_CL42
VCC_CL43
VCC_CL44
VCC_CL45
VCC_CL46
VCC_CL47
VCC_CL48
VCC_CL49
VCC_CL50
VCC_CL51
VCC_CL52
VCC_CL53
VCC_CL54
VCC_CL55
VCC_CL56
VCC_CL57
VCC_CL58
VCC_CL59
VCC_CL60
VCC_CL61
VCC_CL62
VCC_CL63
VCC_CL64
VCC_CL65
VCC_CL66
VCC_CL67
VCC_CL68
VCC_CL69
VCC_CL70
3
VCCA_GPLLD 9
VCCA_HPLL 9
VCCA_MPLL 9
VCCA_DPLLA
VCCA_DPLLB
VCC_AZA
C270 X
C270 X
0603
VCC1.125V_CL
AA31
AB31
AC31
AD31
AE31
AF31
AG30
AG31
AJ30
AJ31
AK16
AK17
AK19
AK20
AK21
AK22
AK23
AK24
AK25
AK26
AK27
AK29
AK30
AL1
AL10
AL11
AL12
AL14
AL15
AL16
AL17
AL19
AL2
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL29
AL4
AL5
AL6
AL7
AL8
AL9
AM2
AM3
AM4
AP1
AP2
Y31
AJ27
AJ29
AA32
AA33
AB32
AB33
AD32
AD33
AE32
AE33
AF32
AJ32
AK31
AL30
AM15
AM16
0603
C208 0.1UF_X7R C208 0.1UF_X7R
2
10UH_100MA
VCCA_DPLLA
VCCA_DPLLB
VCC_SMCLK
VCCD_HPL
C269 X
C269 X
0603
0603
VCCCML_DDR
C271 X
C271 X
0603
0603
stuff 1000PF
VCC_AZA
H_VCCPLL 3
VCC_CRT
DAC FILTER
PLACE THE CAPS AT ENDS OF POWER CORRIDOR
VCC5
U3
U3
1
VIN
VOUT
3
EN
X_FAN2502S33X
X_FAN2502S33X
CM9 XCM9 X
VCCA_DAC
R113 1R
R113 1R
C272 X C272 X
C273 X C273 X
VCC_EXP
R116 1R
R116 1R
10UH_100MA
L1
L1
CE1 220UF_6.3V
CE1 220UF_6.3V
+ D5P2.5
+ D5P2.5
C25 0.1UF_X7R C25 0.1UF_X7R
L2
L2
CE2 220UF_6.3V
CE2 220UF_6.3V
C26 0.1UF_X7R C26 0.1UF_X7R
0.16UH_500MA
0.16UH_500MA
L3
L3
C27 22UF
C27 22UF
C268 X C268 X
stuff 1000PF
R110 X
R110 X
0402
0402
R112 1R
R112 1R
0402
0402
5
4
BYP
2
GND
0402
0402
R114 40.2R_1%
R114 40.2R_1%
0402
0402
10UH_100MA
10UH_100MA
+ D5P2.5
+ D5P2.5
R111 0R
R111 0R
FB_600R_100MHZ_200MA
FB_600R_100MHZ_200MA
L5
L5
FB_600R_100MHZ_200MA
FB_600R_100MHZ_200MA
CM8CM8
C28XC28
X
0402
0402
CM10 CM10
1
L_0805
L_0805
L_0805
L_0805
VCC1.8V_DDR2
L_0805
L_0805
0805
0805
R109 0R R109 0R
0.1UH_100MA
0.1UH_100MA
L4
L4
L6
L6
L_0805
L_0805
0402
0402
FB_0603
FB_0603
FB_0603
FB_0603
L7 X
L7 X
C29 X
C29 X
0805
0805
L8
L8
FB_600R_100MHZ_200MA
FB_600R_100MHZ_200MA
R115 39.2_1%
R115 39.2_1%
0402
0402
VCC1.125V_CORE
VCC1.125V_CORE
VCC1.125V_CL
VCC1.125V_CL
VCC1.5V
FB_0603
FB_0603
VCC3
FB_0603
FB_0603
C30 2.2UF
C30 2.2UF
C31 2.2UF
C31 2.2UF
C32 2.2UF
C32 2.2UF
0603
0603
0603
0603
0603
A A
8
VCC1.125V_CORE
7
0603
6
5
VCCCML_DDR
VCC_SMCLK
VCCD_HPL
VCC_CRT
VCC_EXP
VCCA_DAC
VCC_SMCLK
VCCA_GPLL 9
4
C95 X
C95 X
0603
0603
TITLE:
TITLE:
TITLE:
G43NT
G43NT
G43NT
GCMH 2/4
GCMH 2/4
GCMH 2/4
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
3
A3
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
Saturday, April 05, 2008
Saturday, April 05, 2008
Saturday, April 05, 2008
2
REV:
REV:
REV:
74 6
74 6
74 6
1
0.2
0.2
0.2
of
of
of
1
M_MAA_A[0..14] 10,12
A A
M_WE_A- 10,12
M_CAS_A- 10,12
M_RAS_A- 10,12
M_SBS_A[0..2] 10,12
M_SCS_A-[0..3] 10,12
B B
M_SCKE_A[0..3] 10,12
M_ODT_A[0..3] 10,12
C C
D D
E E
F F
DDR_CLK_P0_A 10
DDR_CLK_N0_A 10
DDR_CLK_P1_A 10
DDR_CLK_N1_A 10
DDR_CLK_P2_A 10
DDR_CLK_N2_A 10
DDR_CLK_P3_A 10
DDR_CLK_N3_A 10
DDR_CLK_P4_A 10
DDR_CLK_N4_A 10
DDR_CLK_P5_A 10
DDR_CLK_N5_A 10
1
M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
M_MAA_A13
M_MAA_A14
M_SBS_A0
M_SBS_A1
M_SBS_A2
M_SCS_A-0
M_SCS_A-1
M_SCS_A-2
M_SCS_A-3
M_SCKE_A0
M_SCKE_A1
M_SCKE_A2
M_SCKE_A3
M_ODT_A0
M_ODT_A1
M_ODT_A2
M_ODT_A3
T95T95
T96T96
T97T97
T112 T112
0402
0402
R118
R118
0R
0R
BC41
BC35
BB32
BC32
BD32
BB31
AY31
BA31
BD31
BD30
AW43
BC30
BB30
AM42
BD28
AW42
AU42
AV42
AV45
AY44
BC28
AU43
AR40
AU44
AM43
BB27
BD27
BA27
AY26
AR42
AM44
AR44
AL40
AY37
BA37
AW29
AY29
AU37
AV37
AU33
AT33
AT30
AR30
AW38
AY38
AR43
BB40
AT44
BC24
AR6
2
U2D
U2D
DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14
DDR_A_WEB
DDR_A_CASB
DDR_A_RASB
DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2
DDR_A_CSB_0
DDR_A_CSB_1
DDR_A_CSB_2
DDR_A_CSB_3
DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3
DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3
DDR_A_CK_0
DDR_A_CKB_0
DDR_A_CK_1
DDR_A_CKB_1
DDR_A_CK_2
DDR_A_CKB_2
DDR_A_CK_3
DDR_A_CKB_3
DDR_A_CK_4
DDR_A_CKB_4
DDR_A_CK_5
DDR_A_CKB_5
DDR3_A_CSB1
DDR3_A_MA0
DDR3_A_WEB
DDR3_DRAMRSTB
DDR3_DRAM_PWROK
EAGLELAKE
EAGLELAKE
2
4 of 6
4 of 6
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DM_0
DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DM_1
DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DM_2
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DM_3
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A
DDR_A
DDR_A_DQ_31
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DM_4
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DM_5
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DM_6
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DM_7
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63
BC5
BD4
BC3
BC2
BD3
BD7
BB7
BB2
BA3
BE6
BD6
BB9
BC9
BD9
BB8
AY8
BD11
BB11
BC7
BE8
BD10
AY11
BD15
BB15
BD14
BB14
BC14
BC16
BB16
BC11
BE12
BA15
BD16
AR22
AT22
AV22
AW21
AY22
AV24
AY24
AU21
AT21
AR24
AU24
AH43
AH42
AK42
AL41
AK43
AG42
AG44
AL42
AK44
AH44
AG41
AD43
AE42
AE45
AF43
AF42
AC44
AC42
AF40
AF44
AD44
AC41
Y43
Y42
AA45
AB43
AA42
W42
W41
AB42
AB44
Y44
Y40
T44
T43
T42
V42
U45
R40
P44
V44
V43
R41
R44
3
M_DQS_A0
M_DQS_A-0
M_DQM_A0
M_DQS_A1
M_DQS_A-1
M_DQM_A1
M_DQS_A2
M_DQS_A-2
M_DQM_A2
M_DQS_A3
M_DQS_A-3
M_DQM_A3
M_DQS_A4
M_DQS_A-4
M_DQM_A4
M_DQS_A5
M_DQS_A-5
M_DQM_A5
M_DQS_A6
M_DQS_A-6
M_DQM_A6
M_DQS_A7
M_DQS_A-7
M_DQM_A7
3
M_D_A0
M_D_A1
M_D_A2
M_D_A3
M_D_A4
M_D_A5
M_D_A6
M_D_A7
M_D_A8
M_D_A9
M_D_A10
M_D_A11
M_D_A12
M_D_A13
M_D_A14
M_D_A15
M_D_A16
M_D_A17
M_D_A18
M_D_A19
M_D_A20
M_D_A21
M_D_A22
M_D_A23
M_D_A24
M_D_A25
M_D_A26
M_D_A27
M_D_A28
M_D_A29
M_D_A30
M_D_A31
M_D_A32
M_D_A33
M_D_A34
M_D_A35
M_D_A36
M_D_A37
M_D_A38
M_D_A39
M_D_A40
M_D_A41
M_D_A42
M_D_A43
M_D_A44
M_D_A45
M_D_A46
M_D_A47
M_D_A48
M_D_A49
M_D_A50
M_D_A51
M_D_A52
M_D_A53
M_D_A54
M_D_A55
M_D_A56
M_D_A57
M_D_A58
M_D_A59
M_D_A60
M_D_A61
M_D_A62
M_D_A63
4
M_DQS_A[0..7] 10
M_DQS_A-[0..7] 10
M_DQM_A[0..7] 10
M_D_A[0..63] 10
VCC1.8V_DDR2
VCC1.8V_DDR2
R120 80R6_1%
R120 80R6_1%
R123 80R6_1%
R123 80R6_1%
4
M_MAA_B[0..14] 11,12
M_SBS_B[0..2] 11,12
M_SCS_B-[0..3] 11,12
M_SCKE_B[0..3] 11,12
M_ODT_B[0..3] 11,12
DDR_CLK_P0_B 11
DDR_CLK_N0_B 11
DDR_CLK_P1_B 11
DDR_CLK_N1_B 11
DDR_CLK_P2_B 11
DDR_CLK_N2_B 11
DDR_CLK_P3_B 11
DDR_CLK_N3_B 11
DDR_CLK_P4_B 11
DDR_CLK_N4_B 11
DDR_CLK_P5_B 11
DDR_CLK_N5_B 11
Place close to MCH
R117 1K_1% R117 1K_1%
0402
0402
CB8CB8
0402
0402
CB9CB9
M_CAS_B- 11,12
M_RAS_B- 11,12
R119
R119
1K_1%
1K_1%
5
U2E
BD24
BB23
BB24
BD23
BB22
BD22
BC22
BC20
BB20
BD20
BC26
BD19
BB19
BE38
BA19
BD36
BC37
BD35
BD26
BB26
BD18
BB35
BD39
BB37
BD40
BC18
AY20
BE17
BB18
BD37
BC39
BB38
BD42
AV40
AY33
AW33
AV31
AW31
AW35
AY35
AT31
AU31
AP31
AP30
AW37
AV35
AK33
AJ33
AN30
AN29
BB44
AY42
BA43
BC43
BC44
U2E
DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14
DDR_B_WEB
DDR_B_CASB
DDR_B_RASB
DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2
DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3
DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3
DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3
DDR3_B_ODT3
DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5
RSVD25
RSVD26
RSVD27
RSVD28
DDR_VREF
DDR_RPD
DDR_RPU
DDR_SPD
DDR_SPU
EAGLELAKE
EAGLELAKE
M_MAA_B0
M_MAA_B1
M_MAA_B2
M_MAA_B3
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B10
M_MAA_B11
M_MAA_B12
M_MAA_B13
M_MAA_B14
M_WE_B- 11,12
M_SBS_B0
M_SBS_B1
M_SBS_B2
M_SCS_B-0
M_SCS_B-1
M_SCS_B-2
M_SCS_B-3
M_SCKE_B0
M_SCKE_B1
M_SCKE_B2
M_SCKE_B3
M_ODT_B0
M_ODT_B1
M_ODT_B2
M_ODT_B3
T80T80
T81T81
T82T82
T84T84
T83T83
CB7CB7
DDR_VREF
DDR_RPD
DDR_RPU
DDR_SPD
DDR_SPU
0402
0402
0402
0402
80R6_1%
80R6_1%
249R_1%
249R_1%
R121
R121
R122
R122
5
6
5 of 6
5 of 6
6
DDR_B_DQS_0
DDR_B_DQSB_0
DDR_B_DM_0
DDR_B_DQ_0
DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7
DDR_B_DQS_1
DDR_B_DQSB_1
DDR_B_DM_1
DDR_B_DQ_8
DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15
DDR_B_DQS_2
DDR_B_DQSB_2
DDR_B_DM_2
DDR_B_DQ_16
DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23
DDR_B_DQS_3
DDR_B_DQSB_3
DDR_B_DM_3
DDR_B_DQ_24
DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B
DDR_B
DDR_B_DQ_31
DDR_B_DQS_4
DDR_B_DQSB_4
DDR_B_DM_4
DDR_B_DQ_32
DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39
DDR_B_DQS_5
DDR_B_DQSB_5
DDR_B_DM_5
DDR_B_DQ_40
DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47
DDR_B_DQS_6
DDR_B_DQSB_6
DDR_B_DM_6
DDR_B_DQ_48
DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55
DDR_B_DQS_7
DDR_B_DQSB_7
DDR_B_DM_7
DDR_B_DQ_56
DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62
DDR_B_DQ_63
M_DQS_B0
AW8
M_DQS_B-0
AW9
M_DQM_B0
AY6
AV7
AW4
BA9
AU11
AU7
AU8
AW7
AY9
M_DQS_B1
AT15
M_DQS_B-1
AU15
M_DQM_B1
AR15
AY13
AP15
AW15
AT16
AU13
AW13
AP16
AU16
M_DQS_B2
AR20
M_DQS_B-2
AR17
M_DQM_B2
AU17
AY17
AV17
AR21
AV20
AP17
AW16
AT20
AN20
M_DQS_B3
AU26
M_DQS_B-3
AT26
M_DQM_B3
AV25
AT25
AV26
AU29
AV29
AW25
AR25
AP26
AR29
M_DQS_B4
AR38
M_DQS_B-4
AR37
M_DQM_B4
AU39
AR36
AU38
AN35
AN37
AV39
AW39
AU40
AU41
M_DQS_B5
AK34
M_DQS_B-5
AL34
M_DQM_B5
AL37
AL35
AL36
AK36
AJ34
AN39
AN40
AK37
AL39
M_DQS_B6
AF37
M_DQS_B-6
AF36
M_DQM_B6
AJ35
AJ38
AJ37
AF38
AE37
AK40
AJ40
AF34
AE35
M_DQS_B7
AB35
M_DQS_B-7
AD35
M_DQM_B7
AD37
AD40
AD38
AB40
AA39
AE36
AE39
AB37
AB38
TITLE:
TITLE:
TITLE:
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
7
M_D_B0
M_D_B1
M_D_B2
M_D_B3
M_D_B4
M_D_B5
M_D_B6
M_D_B7
M_D_B8
M_D_B9
M_D_B10
M_D_B11
M_D_B12
M_D_B13
M_D_B14
M_D_B15
M_D_B16
M_D_B17
M_D_B18
M_D_B19
M_D_B20
M_D_B21
M_D_B22
M_D_B23
M_D_B24
M_D_B25
M_D_B26
M_D_B27
M_D_B28
M_D_B29
M_D_B30
M_D_B31
M_D_B32
M_D_B33
M_D_B34
M_D_B35
M_D_B36
M_D_B37
M_D_B38
M_D_B39
M_D_B40
M_D_B41
M_D_B42
M_D_B43
M_D_B44
M_D_B45
M_D_B46
M_D_B47
M_D_B48
M_D_B49
M_D_B50
M_D_B51
M_D_B52
M_D_B53
M_D_B54
M_D_B55
M_D_B56
M_D_B57
M_D_B58
M_D_B59
M_D_B60
M_D_B61
M_D_B62
M_D_B63
G43NT
G43NT
G43NT
GMCH 3/4
GMCH 3/4
GMCH 3/4
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
A3
A3
A3
7
Sunday, April 06, 2008
Sunday, April 06, 2008
Sunday, April 06, 2008
8
M_DQS_B[0..7] 11
M_DQS_B-[0..7] 11
M_DQM_B[0..7] 11
M_D_B[0..63] 11
8
REV:
REV:
REV:
0.2
0.2
0.2
84 6
84 6
84 6
of
of
of
8
AJ26
AJ36
AJ39
AJ44
AJ45
U2F
AK38
AK39
AL38
AL44
AL45
AN33
AN36
AN38
AN7
AP20
AP22
AP24
AP29
AP45
AR10
AR11
AR16
AR26
AR31
AR33
AR35
AR39
AR8
AR9
AT1
AT11
AT13
AT17
AT2
AT24
AT29
AT35
AU20
AU22
AU25
AU30
AU9
AV13
AV15
AV16
AV2
AV21
AV30
AV38
AV8
AW11
AW17
AW20
AW22
AW24
AW26
AW3
AW30
AY1
AY16
AY21
AY25
AY30
AY45
B21
B27
B29
B34
BA23
BA5
BB21
BB25
BB28
BB6
BD12
BD17
BD8
BE10
BE15
BE19
BE21
BE25
BE29
BE34
BE40
U2F
6 of 6
6 of 6
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
F F
E E
D D
C C
B B
AK35
VSS_105
VSS_104
VSS_103
VSS_102
VSS_101
VSS_100
AH2
AH3
AH4
AJ20
AJ22
AJ24
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
7
AE34
AE38
AE40
AE44
AE8
AF10
AF11
AF12
AF13
AF33
AF35
AF39
AF6
AF7
AG19
AG21
AG23
AG25
AG27
AG45
AG5
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
6
AE26
AE24
AE22
AE20
AE11
AE1
AD9
AD6
AD39
AD36
AD34
AD3
AD27
AD25
AD23
AD21
AD19
AD12
AC5
AC45
VSS_73
VSS_72
VSS_71
VSS_70
VSS_69
VSS_68
VSS_67
VSS_66
VSS_65
VSS_64
VSS_63
VSS_62
VSS_61
VSS_60
VSS_59
VSS_58
VSS_57
VSS_56
VSS_55
VSS_54
VSS_53
EAGLELAKE
EAGLELAKE
5
AC26
AC24
AC22
AC20
AB8
AB7
AB6
AB4
AB39
AB36
AB34
AB27
AB25
AB23
AB21
AB19
AB12
AB11
AA8
AA44
VSS_52
VSS_51
VSS_50
VSS_49
VSS_48
VSS_47
VSS_46
VSS_45
VSS_44
VSS_43
VSS_42
VSS_41
VSS_40
VSS_39
VSS_38
VSS_37
VSS_36
VSS_35
VSS_34
VSS_33
4
AA40
AA38
AA34
AA26
AA24
AA22
AA20
AA13
AA12
AA11
AA1
A40
A36
A31
A27
A19
A15
A12
C45
VSS_32
VSS_31
VSS_30
VSS_29
VSS_28
VSS_27
VSS_26
VSS_25
VSS_24
VSS_23
VSS_22
VSS_21
VSS_20
VSS_19
VSS_18
VSS_17
VSS_16
VSS_15
VSS_14F1VSS_13
3
BD44
BD2
BC45
BC1
B44
A43
BE43
BE3
VSS_9
VSS_8
VSS_12C1VSS_11
VSS_10
B17
VSS_7
VSS_6
VSS_5
VSS_4A6VSS_3
VSS_2A3VSS_1
BD43
VSS_368
R30
VSS_367
Y17
VSS_366
Y16
VSS_365
W17
VSS_364
W16
VSS_363
U20
VSS_362
U19
VSS_361
U17
VSS_360
U16
VSS_359
T30
VSS_358
T20
VSS_357
T19
VSS_356
T17
VSS_355
T16
VSS_354
R19
VSS_353
R17
VSS_352
R16
VSS_351
P17
VSS_350
P16
VSS_349
N16
VSS_348
AB17
VSS_347
AB16
VSS_346
AA17
VSS_345
AA16
VSS_344
AV33
VSS_343
AY15
VSS_342
AU35
VSS_341
AN25
VSS_340
AN24
VSS_339
AE12
VSS_338
AE13
VSS_337
AN21
VSS_336
AN22
VSS_335
W44
VSS_334
T33
VSS_333
T32
VSS_332
T31
VSS_331
P31
VSS_330
N30
VSS_329
K11
VSS_328
AV9
VSS_327
AV6
VSS_326
AV11
VSS_325
AU6
VSS_324
AU5
VSS_323
AR3
VSS_322
AR13
VSS_321
AP25
VSS_320
AP21
VSS_319
AN26
VSS_318
B10
VSS_317
A8
VSS_316
Y9
VSS_315
Y39
VSS_314
Y35
VSS_313
Y3
VSS_312
Y27
VSS_311
Y25
VSS_310
Y23
VSS_309
Y21
VSS_308
Y2
VSS_307
Y19
VSS_306
Y13
VSS_305
Y12
VSS_304
Y11
VSS_303
Y10
VSS_302
W5
VSS_301
W45
VSS_300
W26
VSS_299
W24
VSS_298
W22
VSS_297
W20
VSS_296
W2
VSS_295
W1
VSS_294
U8
VSS_293
U44
VSS_292
U39
VSS_291
2
J22
J22
1
N1
HSP
HSP
J23
J23
1
N1
HSP
HSP
J24
J24
1
N1
HSP
HSP
VCCA_MPLL 7
VCCA_HPLL 7
VCCA_GPLLD 7
VCCA_GPLL 7
1
2
3
4
5
6
7
8
J25
J25
1
N1
HSP
HSP
R126 1R
R126 1R
R127 1R
R127 1R
C35 10UF
C35 10UF
0805
0805
C36 0.1UF_X7R
C36 0.1UF_X7R
0603
0603
R128 1R
R128 1R
R129 1R
R129 1R
C37 10UF
C37 10UF
0805
0805
C38 0.1UF_X7R
C38 0.1UF_X7R
0603
0603
1
U4
U4
H1
H2
H3
H4
H5
H6
H7
H8
BW_HEATSINK_ATX
BW_HEATSINK_ATX
2.2UH_150MA
2.2UH_150MA
L9
L9
R124
R124
1R
1R
C33 10UF
C33 10UF
0402
0402
R125
R125
1R
1R
0402
0402
VCC1.125V_CL
0.27UH_250MA
0.27UH_250MA
L10
L10
0402
0402
0402
0402
0402
0402
0402
0402
C34 2.2UF
C34 2.2UF
0603
0603
L11
L11
VCC1.125V_CORE
L12
L12
L_0805
L_0805
VCC1.125V_CORE
1UH_300MA
1UH_300MA
1UH_300MA
1UH_300MA
VCC1.125V_CL
L_0805
L_0805
0805
0805
L_0805
L_0805
L_0805
L_0805
VSS_186C3VSS_187C5VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194D6VSS_195D7VSS_196E3VSS_197
VSS_198
VSS_199E5VSS_200
VSS_201F2VSS_202
VSS_203F4VSS_204
VSS_205
VSS_206F8VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212G3VSS_213
VSS_214H1VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_223
VSS_222
VSS_221
VSS_220
F16
F30
F42
E31
D39
E41
D11
D16
D21
D25
D26
A A
8
F45
G11
G17
G24
7
G26
G29
G35
H11
H13
H15
H16
H20
H25
H30
H31
H33
H38
VSS_224
VSS_229J3VSS_228H9VSS_227H8VSS_226H7VSS_225
H44
6
VSS_235
VSS_234J9VSS_233J8VSS_232J5VSS_231J4VSS_230
J37
K13
K17
VSS_236
K20
VSS_237
K24
VSS_238
K29
VSS_239
K33
VSS_240
VSS_241
K45
L10
VSS_242
L16
VSS_243
L20
VSS_244
VSS_247
VSS_246
VSS_245
L39
L35
L30
L26
5
VSS_254
VSS_253
VSS_252M1VSS_251L9VSS_250L8VSS_249L4VSS_248
M25
M24
M44
VSS_255
N11
VSS_256
N13
VSS_257
N26
VSS_258
N29
VSS_259
VSS_260
N33
N36
VSS_261
N38
VSS_266
VSS_265
VSS_264
VSS_263N8VSS_262
P26
P25
R12
R11
4
VSS_273
VSS_272R8VSS_271R5VSS_270
VSS_269
VSS_268R2VSS_267
T11
T10
R45
R38
VSS_274
T12
VSS_275
VSS_280T4VSS_279
VSS_278
VSS_277T3VSS_276
T40
T38
T35
T13
VSS_290
VSS_289
VSS_288
VSS_287
VSS_286U1VSS_285T9VSS_284T8VSS_283T7VSS_282T6VSS_281
U36
U13
U12
U11
TITLE:
TITLE:
TITLE:
G43NT
G43NT
G43NT
GMCH 4/4
GMCH 4/4
GMCH 4/4
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
3
A3
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
Saturday, April 05, 2008
Saturday, April 05, 2008
Saturday, April 05, 2008
2
REV:
REV:
REV:
94 6
94 6
94 6
1
0.2
0.2
0.2
of
of
of
8
M_ODT_A[0..3] 8,12
M_DQS_A-[0..7] 8
M_DQS_A[0..7] 8
J3
J3
M_ODT_A0
M_ODT_A1
102
68
19
NC1
NC3
195
ODT177ODT0
CB042CB143CB248CB349CB4
F F
M_ODT_A[0..3]
M_DQS_A0
7
161
162
167
168
CB5
CB6
CB7
DQS0
NC2_TEST
M_DQS_A1
M_DQS_A2
M_DQS_A-0
M_DQS_A-1
16
28
6
15
DQS1
DQS2
DQS-0
DQS-1
DDR2_240P_DIMM0
DDR2_240P_DIMM0
7
M_DQS_A-2
27
DQS-2
M_DQS_A3
M_DQS_A-3
37
36
DQS3
DQS-3
M_DQS_A4
M_DQS_A-4
84
83
DQS4
DQS-4
M_DQS_A5
M_DQS_A-5
93
92
DQS5
DQS-5
BLUE
BLUE
M_DQS_A6
M_DQS_A-6
105
104
DQS6
DQS-6
M_DQS_A7
M_DQS_A-7
114
113
DQS7
DQS-7
6
M_DQM_A[0..7] 8 M_D_A[0..63] 8
M_DQM_A0
M_DQM_A1
M_DQM_A2
M_DQM_A3
M_DQM_A4
134
146
155
46
45
DQS8
135
125
126
DQS-8
NC_DQS-9
DM0_DQS9
NC_DQS-10
DM1_DQS10
202
147
156
203
NC_DQS-11
NC_DQS-12
DM2_DQS11
NC_DQS-13
DM3_DQS12
DM4_DQS13
5
M_DQM_A5
M_DQM_A6
M_DQM_A7
211
223
232
212
224
NC_DQS-14
NC_DQS-15
DM5_DQS14
DM6_DQS15
DM7_DQS16
M_D_A0
M_D_A1
M_D_A2
M_D_A3
M_D_A4
M_D_A5
M_D_A6
M_D_A7
164
233
165
NC_DQS-16
NC_DQS-17
DM8_DQS17
122
DQ03DQ14DQ29DQ310DQ4
123
128
DQ5
DQ6
4
M_D_A8
M_D_A9
M_D_A10
M_D_A11
M_D_A12
M_D_A13
M_D_A14
M_D_A15
M_D_A16
M_D_A17
M_D_A18
M_D_A19
M_D_A20
M_D_A21
M_D_A22
M_D_A23
M_D_A24
M_D_A25
M_D_A26
M_D_A27
131
132
140
141
143
144
149
DQ21
DQ22
150
DQ23
DQ2433DQ2534DQ2639DQ2740DQ28
129
13
DQ7
DQ812DQ9
DQ1021DQ1122DQ12
DQ13
DQ14
DQ15
DQ1624DQ1725DQ1830DQ1931DQ20
3
M_D_A28
M_D_A29
M_D_A30
M_D_A31
M_D_A32
M_D_A33
M_D_A34
M_D_A35
M_D_A36
M_D_A37
M_D_A38
M_D_A39
M_D_A40
M_D_A41
M_D_A42
M_D_A43
M_D_A44
M_D_A45
M_D_A46
M_D_A47
152
153
158
159
199
200
205
206
208
209
214
215
DQ29
DQ30
DQ31
DQ3280DQ3381DQ3486DQ3587DQ36
DQ37
DQ38
DQ39
DQ4089DQ4190DQ4295DQ4396DQ44
DQ45
DQ46
DQ47
M_D_A48
M_D_A49
M_D_A50
DQ4898DQ4999DQ50
2
M_D_A51
M_D_A52
M_D_A53
M_D_A54
M_D_A55
M_D_A56
M_D_A57
M_D_A58
M_D_A59
M_D_A60
M_D_A61
M_D_A62
M_D_A63
107
108
217
218
226
227
110
111
116
117
229
230
235
236
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
1
E E
D D
C C
B B
A A
VSS12VSS25VSS38VSS411VSS514VSS617VSS720VSS823VSS926VSS1029VSS1132VSS1235VSS1338VSS1441VSS1544VSS1647VSS1750VSS1865VSS1966VSS2079VSS2182VSS2285VSS2388VSS2491VSS2594VSS2697VSS27
SM BUS address : A0h
DDR2 CHANNEL A DIMM 0
M_DQS_A-[0..7] 8
M_DQS_A[0..7] 8
M_ODT_A2
M_ODT_A3
M_DQS_A0
M_DQS_A1
M_DQS_A-0
7
161
162
167
68
19
195
102
J4
J4
NC1
NC3
ODT177ODT0
CB042CB143CB248CB349CB4
168
6
CB5
CB6
CB7
DQS0
DQS-0
NC2_TEST
DDR2_240P_DIMM0
DDR2_240P_DIMM0
VSS12VSS25VSS38VSS411VSS514VSS617VSS720VSS823VSS926VSS1029VSS1132VSS1235VSS1338VSS1441VSS1544VSS1647VSS1750VSS1865VSS1966VSS2079VSS2182VSS2285VSS2388VSS2491VSS2594VSS2697VSS27
SM BUS address : A0h
DDR2 CHANNEL A DIMM 0
VCC3.3V_CL VCC3
0402
R130
R130
X
X
R133 0R
R133 0R
R135 0R
R135 0R
R137 X
R137 X
R138 X
R138 X
0402
R131
R131
0R
0R
FOR AMT
FOR NON-AMT
0402
0402
SMB_DATA_STBY 15,19,23,29,30
SMB_CLK_STBY 15,19,23,29,30
SMB_DATA 5,19,23
SMB_CLK 5,19,23
8
M_DQS_A-1
16
15
DQS1
DQS-1
FOR AMT FOR NON-AMT
0402
0402
0402
0402
0402
0402
0402
0402
M_DQS_A3
M_DQS_A2
M_DQS_A-2
28
37
27
DQS2
DQS3
DQS-2
VDDSPD 11
7
VSS28
VSS29
VSS30
100
103
106
109
112
M_DQS_A4
M_DQS_A-3
M_DQS_A-4
84
36
83
DQS4
DQS-3
DQS-4
VSS28
VSS29
VSS30
100
103
106
109
112
SMB_DATA_OPTION 11
SMB_CLK_OPTION 11
VSS31
VSS32
115
M_DQS_A5
M_DQS_A-5
93
DQS5
X_BLACK
X_BLACK
VSS31
VSS32
115
118
92
118
VSS33
DQS-5
VSS33
VSS34
121
124
M_DQS_A6
105
VSS34
121
124
VSS35
VSS36
VSS37
127
130
M_DQS_A-6
104
DQS6
DQS-6
VSS35
VSS36
VSS37
127
130
VSS38
VSS39
133
136
M_DQS_A7
M_DQS_A-7
114
113
DQS7
DQS-7
VSS38
VSS39
133
136
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VDDQ151VDDQ256VDDQ362VDDQ472VDDQ575VDDQ678VDDQ7
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
M_DQM_A[0..7] 8
M_DQM_A0
M_DQM_A1
M_DQM_A2
M_DQM_A3
M_DQM_A4
M_DQM_A5
M_DQM_A6
M_DQM_A7
134
146
155
202
211
223
46
45
DQS8
VSS40
VSS41
139
142
145
135
147
156
125
126
203
DQS-8
NC_DQS-9
DM0_DQS9
NC_DQS-10
NC_DQS-11
NC_DQS-12
DM1_DQS10
DM2_DQS11
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
148
151
154
157
160
163
166
169
198
6
NC_DQS-13
DM3_DQS12
DM4_DQS13
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
201
204
207
210
213
216
219
222
232
212
224
233
NC_DQS-14
NC_DQS-15
DM6_DQS15
VSS61
VSS62
VSS63
228
231
234
NC_DQS-16
DM7_DQS16
VSS64
VDDQ151VDDQ256VDDQ362VDDQ472VDDQ575VDDQ678VDDQ7
237
5
DM5_DQS14
VSS59
VSS60
225
191
194
VCC1.8V_DDR2
M_D_A0
164
165
NC_DQS-17
DM8_DQS17
191
194
VCC1.8V_DDR2
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDD153VDD259VDD364VDD4
181
175
170
SMB_DATA_OPTION 11
M_D_A[0..63] 8
M_D_A1
M_D_A2
M_D_A3
M_D_A4
122
DQ03DQ14DQ29DQ310DQ4
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDD153VDD259VDD364VDD4
181
175
170
SMB_DATA_OPTION 11
VCC1.8V_DDR2
R132
R132
1K_1%
1K_1%
CB12 CB12
R134 0R R134 0R
R136
R136
1K_1%
1K_1%
VDD569VDD6
VDD7
VDD8
VDD9
VDD10
VDD1167RC118RC055VDDSPD
197
172
187
184
178
189
VDDSPD 11
DQ6
DIMM_VREF_A
M_D_A7
M_D_A8
M_D_A9
M_D_A10
M_D_A11
M_D_A12
M_D_A13
M_D_A14
131
132
13
DQ812DQ9
VDD569VDD6
172
DQ1021DQ1122DQ12
VDD7
VDD8
187
184
178
VDDSPD 11
CB15 CB15
140
DQ13
DQ14
VDD9
VDD10
VDD1167RC118RC055VDDSPD
189
DIMM_VREF_A
DIMM_VREF_A
4
129
DQ7
197
SMB_CLK_OPTION 11
M_D_A5
M_D_A6
123
128
DQ5
SMB_CLK_OPTION 11
M_D_A15
M_D_A16
M_D_A17
M_D_A18
141
DQ15
DQ1624DQ1725DQ1830DQ1931DQ20
VREF1SCL
SDA
SA2
SA1
SA0
BA1
BA071CKE1
CKE052S1-76S0-
CK2-_RFU
CK2_RFU
CK1-_RFU
CK1_RFU
CK0-
CK0
A263A3
A461A560A6
A758A8
A10_AP70A1157A12
A13
A14
A15
A0
238
120
119
101
240
239
190
171
193
221
220
138
137
186
185A1183
182
180
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_D_A46
M_D_A47
M_D_A48
M_D_A49
214
215
DQ45
DQ46
DQ47
DQ4898DQ4999DQ50
A263A3
A461A560A6
182
180
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
TITLE:
TITLE:
TITLE:
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
M_D_A50
107
179A9177
M_MAA_A7
M_MAA_A8
M_D_A51
108
DQ51
A758A8
179A9177
M_MAA_A7
M_MAA_A8
A3
A3
A3
M_MAA_A9
M_MAA_A10
M_D_A52
M_D_A53
217
218
DQ52
DQ53
A10_AP70A1157A12
M_MAA_A9
M_MAA_A10
G43NT
G43NT
G43NT
DDR II CHA
DDR II CHA
DDR II CHA
188
M_D_A39
M_D_A40
M_D_A41
206
DQ38
DQ39
DQ4089DQ4190DQ4295DQ4396DQ44
CK1-_RFU
CK1_RFU
CK0-
137
186
185A1183
M_MAA_A1
M_MAA_A0
M_D_A42
M_D_A43
M_D_A44
M_D_A45
208
209
CK0
A0
188
M_MAA_A0
M_MAA_A1
M_SBS_A1
M_SBS_A0
M_SCKE_A1
M_SCKE_A0
M_SCS_A-1
M_SCS_A-0
CB10 CB10
M_D_A19
M_D_A20
M_D_A21
M_D_A22
M_D_A23
M_D_A24
M_D_A25
M_D_A26
M_D_A27
M_D_A28
M_D_A29
M_D_A30
M_D_A31
M_D_A32
M_D_A33
M_D_A34
M_D_A35
M_D_A36
M_D_A37
M_D_A38
143
144
149
150
152
153
158
159
199
200
205
DQ21
DQ22
DQ23
DQ2433DQ2534DQ2639DQ2740DQ28
DQ29
DQ30
DQ31
DQ3280DQ3381DQ3486DQ3587DQ36
DQ37
VREF1SCL
SDA
SA2
SA1
SA0
BA1
BA071CKE1
CKE052S1-76S0-
CK2-_RFU
CK2_RFU
238
120
119
101
240
239
190
171
193
221
220
M_SCKE_A3
M_SCKE_A2
M_SBS_A1
M_SBS_A0
CB11 CB11
CB13 CB13
CB14 CB14
138
M_SCS_A-3
M_SCS_A-2
VDDSPD 11
NEAR TO PIN238
3
A16_BA2
CAS-74RAS-
WE-
54
176
196
174
M_MAA_A12
M_MAA_A11
M_MAA_A13
M_D_A54
M_D_A55
M_D_A56
M_D_A57
226
227
110
111
DQ54
DQ55
DQ56
A13
176
196
174
M_MAA_A12
M_MAA_A11
M_MAA_A13
Date: PAGE:
Date: PAGE:
Date: PAGE:
2
73
173
192
M_MAA_A14
M_SBS_A2
M_D_A58
M_D_A59
M_D_A60
M_D_A61
M_D_A62
M_D_A63
116
117
229
230
235
236
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
A14
A15
A16_BA2
CAS-74RAS-
54
73
173
192
M_SBS_A2
M_MAA_A14
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Sunday, April 06, 2008
Sunday, April 06, 2008
Sunday, April 06, 2008
M_WE_A- 8,12
M_RAS_A- 8,12
M_CAS_A- 8,12
M_MAA_A[0..14] 8,12
DDR_CLK_P0_A 8
DDR_CLK_N0_A 8
DDR_CLK_P1_A 8
DDR_CLK_N1_A 8
DDR_CLK_P2_A 8
DDR_CLK_N2_A 8
M_SCS_A-[0..3] 8,12
M_SCKE_A[0..3] 8,12
M_SBS_A[0..2] 8,12
DQ63
WE-
M_WE_A- 8,12
M_RAS_A- 8,12
M_CAS_A- 8,12
M_MAA_A[0..14] 8,12
DDR_CLK_P3_A 8
DDR_CLK_N3_A 8
DDR_CLK_P4_A 8
DDR_CLK_N4_A 8
DDR_CLK_P5_A 8
DDR_CLK_N5_A 8
M_SCS_A-[0..3] 8,12
M_SCKE_A[0..3] 8,12
M_SBS_A[0..2] 8,12
1
REV:
REV:
REV:
0.2
0.2
0.2
10 46
10 46
10 46
of
of
of
8
M_ODT_B[0..3] 8,12
M_DQS_B-[0..7] 8
M_DQS_B[0..7] 8
J5
J5
M_ODT_B0
M_ODT_B1
102
68
19
NC1
NC3
195
ODT177ODT0
CB042CB143CB248CB349CB4
F F
M_ODT_B[0..3]
M_DQS_B0
M_DQS_B-0
7
161
162
167
168
6
CB5
CB6
CB7
DQS0
DQS-0
NC2_TEST
7
M_DQS_B-1
M_DQS_B1
M_DQS_B-2
M_DQS_B2
16
28
15
27
DQS1
DQS2
DQS-1
DQS-2
DDR2_240P_DIMM2
DDR2_240P_DIMM2
M_DQS_B-3
M_DQS_B3
37
36
DQS3
DQS-3
M_DQS_B-4
M_DQS_B4
84
83
DQS4
DQS-4
M_DQS_B-5
M_DQS_B5
93
92
DQS5
DQS-5
BLUE
BLUE
M_DQS_B-6
M_DQS_B6
105
104
DQS6
DQS-6
M_DQS_B-7
M_DQS_B7
114
113
DQS7
DQS-7
6
M_DQM_B[0..7] 8
M_DQM_B0
M_DQM_B1
M_DQM_B2
M_DQM_B3
M_DQM_B4
M_DQM_B5
134
146
155
202
46
45
DQS8
135
125
126
147
DQS-8
NC_DQS-9
DM0_DQS9
NC_DQS-10
NC_DQS-11
DM1_DQS10
DM2_DQS11
211
156
203
NC_DQS-12
NC_DQS-13
DM3_DQS12
DM4_DQS13
DM5_DQS14
5
M_D_B[0..63] 8
M_DQM_B6
M_DQM_B7
223
232
212
224
NC_DQS-14
NC_DQS-15
DM6_DQS15
DM7_DQS16
M_D_B0
M_D_B1
M_D_B2
M_D_B3
M_D_B4
M_D_B5
M_D_B6
M_D_B7
M_D_B8
164
233
165
NC_DQS-16
NC_DQS-17
DM8_DQS17
122
DQ03DQ14DQ29DQ310DQ4
123
128
129
DQ5
DQ6
DQ7
M_D_B9
13
DQ812DQ9
M_D_B10
M_D_B11
M_D_B12
131
DQ1021DQ1122DQ12
M_D_B13
132
DQ13
M_D_B14
4
140
M_D_B15
141
DQ14
DQ15
M_D_B16
M_D_B17
M_D_B18
M_D_B19
DQ1624DQ1725DQ1830DQ1931DQ20
M_D_B20
143
M_D_B21
144
DQ21
M_D_B22
149
M_D_B23
150
DQ22
M_D_B24
DQ23
M_D_B25
M_D_B26
M_D_B27
M_D_B28
M_D_B29
152
153
DQ2433DQ2534DQ2639DQ2740DQ28
M_D_B30
158
DQ29
M_D_B31
DQ30
3
M_D_B32
M_D_B33
M_D_B34
159
DQ31
DQ3280DQ3381DQ3486DQ3587DQ36
2
M_D_B35
M_D_B36
M_D_B37
M_D_B38
M_D_B39
M_D_B40
M_D_B41
M_D_B42
M_D_B43
M_D_B44
M_D_B45
M_D_B46
M_D_B47
M_D_B48
M_D_B49
M_D_B50
M_D_B51
M_D_B52
M_D_B53
M_D_B54
M_D_B55
M_D_B56
M_D_B57
M_D_B58
M_D_B59
M_D_B60
M_D_B61
M_D_B62
M_D_B63
199
200
205
206
208
209
214
215
107
108
217
218
226
227
110
111
116
117
229
230
235
236
DQ37
DQ38
DQ39
DQ4089DQ4190DQ4295DQ4396DQ44
DQ45
DQ46
DQ47
DQ4898DQ4999DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
1
E E
D D
C C
B B
A A
VSS12VSS25VSS38VSS411VSS514VSS617VSS720VSS823VSS926VSS1029VSS1132VSS1235VSS1338VSS1441VSS1544VSS1647VSS1750VSS1865VSS1966VSS2079VSS2182VSS2285VSS2388VSS2491VSS2594VSS2697VSS27
SM BUS address : A4h
DDR2 CHANNEL B DIMM 0
M_DQS_B-[0..7] 8
M_DQS_B[0..7] 8
M_ODT_B2
M_ODT_B3
M_DQS_B0
M_DQS_B-0
M_DQS_B-1
M_DQS_B1
M_DQS_B2
102
68
19
NC1
NC3
195
ODT177ODT0
CB042CB143CB248CB349CB4
J6
J6
7
161
162
167
CB5
16
168
6
15
CB6
CB7
DQS0
DQS1
DQS-0
DQS-1
NC2_TEST
DDR2_240P_DIMM2
DDR2_240P_DIMM2
VSS12VSS25VSS38VSS411VSS514VSS617VSS720VSS823VSS926VSS1029VSS1132VSS1235VSS1338VSS1441VSS1544VSS1647VSS1750VSS1865VSS1966VSS2079VSS2182VSS2285VSS2388VSS2491VSS2594VSS2697VSS27
SM BUS address : A4h
DDR2 CHANNEL B DIMM 0
8
7
100
M_DQS_B-2
28
27
DQS2
DQS-2
VSS28
103
106
M_DQS_B3
37
VSS29
VSS30
109
112
M_DQS_B-3
36
DQS3
DQS-3
100
103
VSS31
VSS32
115
M_DQS_B-4
M_DQS_B4
84
DQS4
VSS28
VSS29
106
118
83
109
VSS33
DQS-4
VSS30
VSS34
121
124
M_DQS_B5
93
VSS31
112
115
VSS35
VSS36
VSS37
127
130
M_DQS_B-5
92
DQS5
DQS-5
X_BLACK
X_BLACK
VSS32
VSS33
VSS34
118
121
VSS38
VSS39
133
136
M_DQS_B-6
M_DQS_B6
105
104
DQS6
DQS-6
VSS35
VSS36
124
127
VSS40
VSS41
VSS42
VSS43
139
142
145
148
M_DQS_B-7
M_DQS_B7
114
113
DQS7
DQS-7
VSS37
VSS38
VSS39
VSS40
130
133
136
139
VCC1.8V_DDR2
CB18 CB18
R140 0R R140 0R
VSS44
151
46
DQS8
VSS41
142
R139
R139
1K_1%
1K_1%
R141
R141
1K_1%
1K_1%
VSS45
154
45
DQS-8
VSS42
145
6
VSS46
VSS47
157
160
M_DQM_B0
125
DM0_DQS9
VSS43
VSS44
148
151
VSS48
VSS49
VSS50
VSS51
163
166
169
198
M_DQM_B[0..7] 8
M_DQM_B1
134
135
126
NC_DQS-9
NC_DQS-10
DM1_DQS10
VSS45
VSS46
VSS47
VSS48
154
157
160
163
DIMM_VREF_B
CB19 CB19
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VDDQ151VDDQ256VDDQ362VDDQ472VDDQ575VDDQ678VDDQ7
201
204
207
210
213
216
219
222
225
228
231
234
237
M_DQM_B2
M_DQM_B3
M_DQM_B4
M_DQM_B5
M_DQM_B6
146
155
202
211
147
156
NC_DQS-11
NC_DQS-12
DM2_DQS11
DM3_DQS12
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
166
169
198
201
204
207
210
213
223
203
212
224
NC_DQS-13
NC_DQS-14
DM4_DQS13
VSS56
VSS57
216
NC_DQS-15
DM5_DQS14
DM6_DQS15
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
219
222
225
228
231
234
5
VDDQ8
191
194
VCC1.8V_DDR2
M_DQM_B7
232
164
233
165
NC_DQS-16
NC_DQS-17
DM7_DQS16
DM8_DQS17
VSS64
VDDQ151VDDQ256VDDQ362VDDQ472VDDQ575VDDQ678VDDQ7
237
VCC1.8V_DDR2
181
CB20 CB20
VDDQ9
175
191
VDDQ10
VDDQ11
VDD153VDD259VDD364VDD4
170
SMB_CLK_OPTION 10
SMB_DATA_OPTION 10
M_D_B0
M_D_B1
M_D_B2
M_D_B3
DQ03DQ14DQ29DQ310DQ4
VDDQ8
VDDQ9
VDDQ10
194
181
175
170
SMB_DATA_OPTION 10
CB21 CB21
VDD569VDD6
VDD7
VDD8
197
172
187
184
VDDSPD 10
DIMM_VREF_B
M_D_B[0..63] 8
M_D_B4
M_D_B5
M_D_B6
M_D_B7
M_D_B8
122
123
128
129
DQ5
DQ6
DQ7
DQ812DQ9
VDDQ11
VDD153VDD259VDD364VDD4
VDD569VDD6
197
VDDSPD 10
DIMM_VREF_B
SMB_CLK_OPTION 10
VDDSPD 10
NEAR TO PIN238
VDD9
VDD10
VDD1167RC118RC055VDDSPD
178
189
M_D_B9
M_D_B10
M_D_B11
13
DQ1021DQ1122DQ12
VDD7
VDD8
172
187
184
4
M_D_B12
M_D_B13
M_D_B14
131
132
140
DQ13
VDD9
VDD10
178
189
VREF1SCL
SDA
238
120
119
CB16 CB16
M_D_B15
M_D_B16
M_D_B17
M_D_B18
M_D_B19
141
DQ14
DQ15
DQ1624DQ1725DQ1830DQ1931DQ20
VDD1167RC118RC055VDDSPD
238
M_D_B20
CB17 CB17
SA2
101
143
VREF1SCL
SA1
240
M_D_B21
144
DQ21
120
M_D_B22
239
149
119
SA0
M_D_B23
150
DQ22
SDA
101
190
M_D_B24
DQ23
SA2
240
BA1
BA071CKE1
CKE052S1-76S0-
171
M_SCKE_B0
M_SCKE_B1
M_SBS_B0
M_SBS_B1
M_D_B25
M_D_B26
M_D_B27
M_D_B28
152
DQ2433DQ2534DQ2639DQ2740DQ28
SA1
SA0
BA1
BA071CKE1
239
190
M_SBS_B0
M_SBS_B1
M_D_B29
M_D_B30
153
DQ29
193
M_SCS_B-0
M_SCS_B-1
M_D_B31
M_D_B32
158
159
DQ30
DQ31
CKE052S1-76S0-
171
M_SCKE_B2
M_SCKE_B3
3
CK2-_RFU
CK2_RFU
CK1-_RFU
CK1_RFU
221
220
138
137
186
M_D_B33
M_D_B34
M_D_B35
M_D_B36
M_D_B37
199
200
DQ3280DQ3381DQ3486DQ3587DQ36
CK2-_RFU
193
221
220
M_SCS_B-2
M_SCS_B-3
CK0-
CK0
185A1183
M_D_B38
M_D_B39
205
206
DQ37
DQ38
DQ39
CK2_RFU
CK1-_RFU
CK1_RFU
138
137
A263A3
A0
182
188
M_MAA_B0
M_MAA_B1
M_MAA_B2
M_MAA_B3
M_D_B40
M_D_B41
M_D_B42
M_D_B43
M_D_B44
208
DQ4089DQ4190DQ4295DQ4396DQ44
CK0-
CK0
A0
186
185A1183
188
M_MAA_B0
A461A560A6
A758A8
180
179A9177
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_D_B45
M_D_B46
M_D_B47
M_D_B48
M_D_B49
209
214
215
DQ45
DQ46
DQ47
DQ4898DQ4999DQ50
A263A3
A461A560A6
182
180
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B1
M_MAA_B2
M_MAA_B3
TITLE:
TITLE:
TITLE:
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
A10_AP70A1157A12
A13
A14
A15
A16_BA2
CAS-74RAS-
WE-
54
173
192
M_SBS_B2
M_MAA_B14
M_D_B55
M_D_B56
M_D_B57
M_D_B58
M_D_B59
227
110
111
116
117
DQ54
DQ55
DQ56
DQ57
DQ58
A13
A14
A15
54
176
196
174
173
M_MAA_B11
M_MAA_B13
M_MAA_B14
M_MAA_B12
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Sunday, April 06, 2008
Sunday, April 06, 2008
Sunday, April 06, 2008
73
M_D_B60
M_D_B61
229
230
DQ59
DQ60
A16_BA2
M_SBS_B2
M_D_B62
DQ61
CAS-74RAS-
M_WE_B- 8,12
M_RAS_B- 8,12
M_CAS_B- 8,12
M_MAA_B[0..14] 8,12
DDR_CLK_P0_B 8
DDR_CLK_N0_B 8
DDR_CLK_P1_B 8
DDR_CLK_N1_B 8
DDR_CLK_P2_B 8
DDR_CLK_N2_B 8
M_SCS_B-[0..3] 8,12
M_SCKE_B[0..3] 8,12
M_SBS_B[0..2] 8,12
M_D_B63
235
236
DQ62
DQ63
WE-
73
192
176
196
174
M_MAA_B11
M_MAA_B13
M_MAA_B10
M_MAA_B12
M_D_B50
M_D_B51
M_D_B52
M_D_B53
M_D_B54
107
108
217
218
226
DQ51
DQ52
DQ53
A758A8
A10_AP70A1157A12
179A9177
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B10
G43NT
G43NT
G43NT
DDR II CHB
DDR II CHB
DDR II CHB
Date: PAGE:
Date: PAGE:
Date: PAGE:
2
M_WE_B- 8,12
M_RAS_B- 8,12
M_CAS_B- 8,12
M_MAA_B[0..14] 8,12
DDR_CLK_P3_B 8
DDR_CLK_N3_B 8
DDR_CLK_P4_B 8
DDR_CLK_N4_B 8
DDR_CLK_P5_B 8
DDR_CLK_N5_B 8
M_SCS_B-[0..3] 8,12
M_SCKE_B[0..3] 8,12
M_SBS_B[0..2] 8,12
REV:
REV:
REV:
1
0.2
0.2
0.2
11 46
11 46
11 46
of
of
of
8
FSB_VTT VCC1.125V_CORE
F F
0603
0603
0603
0603
0603
0603
C39 2.2UF_6.3V_X5R
C39 2.2UF_6.3V_X5R
C41 2.2UF_6.3V_X5R
C41 2.2UF_6.3V_X5R
C40 2.2UF_6.3V_X5R
C40 2.2UF_6.3V_X5R
CAPS OF DSB GENERIC PLACE IN PCI-E BREAKOUT
E E
D D
VCC1.125V_CL
10UF
10UF
10UF
10UF
0805
0805
0805
0805
C49
C49
C50
C50
VCC1.125V_CL VCC1.125V_CORE
GMCH_0805
GMCH_0805
GMCH_0805
C55 X
C55 X
GMCH_0805
GMCH_0805
C56 X
C56 X
GMCH_0805
GMCH_0805
GMCH_0603
GMCH_0603
C59 10UF_6.3V_X5R
C59 10UF_6.3V_X5R
C60 1UF_6.3V_X5R
C60 1UF_6.3V_X5R
GMCH_0805
GMCH_0603
GMCH_0603
C61 10UF_6.3V_X5R
C61 10UF_6.3V_X5R
C62 1UF_6.3V_X5R
C62 1UF_6.3V_X5R
7
GMCH_0603
GMCH_0603
C63 1UF_6.3V_X5R
C63 1UF_6.3V_X5R
GMCH_0805
GMCH_0805
GMCH_0805
GMCH_0805
C43 22UF_6.3V_X5R
C43 22UF_6.3V_X5R
C44 22UF_6.3V_X5R
C44 22UF_6.3V_X5R
GMCH_0603
GMCH_0603
GMCH_0603
GMCH_0603
C64 1UF_6.3V_X5R
C64 1UF_6.3V_X5R
0603
0603
GMCH_0805
GMCH_0805
C46 1UF_6.3V_X5R
C46 1UF_6.3V_X5R
C45 22UF_6.3V_X5R
C45 22UF_6.3V_X5R
GMCH_0603
GMCH_0603
C66 1UF_6.3V_X5R
C66 1UF_6.3V_X5R
C65 1UF_6.3V_X5R
C65 1UF_6.3V_X5R
0603
0603
0603
0603
C48 1UF_6.3V_X5R
C48 1UF_6.3V_X5R
C47 1UF_6.3V_X5R
C47 1UF_6.3V_X5R
GMCH_0603
GMCH_0603
C67 1UF_6.3V_X5R
C67 1UF_6.3V_X5R
X
X
GMCH_0603
GMCH_0603
C68
C68
6
M_MAA_A[0..14] 8,10
M_RAS_A- 8,10
M_CAS_A- 8,10
M_SBS_A[0..2] 8,10
M_SCS_A-[0..1] 8,10
M_SCKE_A[0..1] 8,10
M_ODT_A[0..1] 8,10
VTT_MEM VCC1.8V_DDR2
5
M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
M_MAA_A13
M_MAA_A14
M_WE_A- 8,10
M_SBS_A0
M_SBS_A1
M_SBS_A2
M_SCS_A-0
M_SCS_A-1
M_SCKE_A0
M_SCKE_A1
M_ODT_A0
M_ODT_A1
VTT_MEM
Channel A Termination resistors Channel B Termination resistors
CB22 CB22
CB25 CB25
CB24 CB24
CB23 CB23
Channel A VTT Decoupling Caps Channel B VTT Decoupling Caps
R142 33R
R142 33R
R144 33R
R144 33R
R146 33R
R146 33R
R148 33R
R148 33R
R150 33R
R150 33R
R152 33R
R152 33R
R154 33R
R154 33R
R156 33R
R156 33R
R158 33R
R158 33R
R160 33R
R160 33R
R162 33R
R162 33R
R164 33R
R164 33R
R166 33R
R166 33R
R168 33R
R168 33R
R170 33R
R170 33R
R172 33R
R172 33R
R174 33R
R174 33R
R176 33R
R176 33R
R178 33R
R178 33R
R180 33R
R180 33R
R182 33R
R182 33R
R184 33R
R184 33R
R186 33R
R186 33R
R188 33R
R188 33R
R190 33R
R190 33R
R192 33R
R192 33R
R194 33R
R194 33R
CB28 CB28
CB27 CB27
CB26 CB26
CB29 CB29
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0805
0805
C52
C52
C51
C51
4.7UF_16V_X5R
4.7UF_16V_X5R
VCC1.8V_DDR2
4
VTT_MEM VTT_MEM
0805
0805
4.7UF_16V_X5R
4.7UF_16V_X5R
3
M_MAA_B[0..14] 8,11
M_RAS_B- 8,11
M_CAS_B- 8,11
M_WE_B- 8,11
M_SBS_B[0..2] 8,11
M_SCS_B-[0..1] 8,11
M_SCKE_B[0..1] 8,11
M_ODT_B[0..1] 8,11
VTT_MEM
CB31 CB31
CB30 CB30
VTT_MEM
2
M_MAA_B0
M_MAA_B1
M_MAA_B2
M_MAA_B3
M_MAA_B4
M_MAA_B5
M_MAA_B6
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_MAA_B10
M_MAA_B11
M_MAA_B12
M_MAA_B13
M_MAA_B14
M_SBS_B0
M_SBS_B1
M_SBS_B2
M_SCS_B-0
M_SCS_B-1
M_SCKE_B0
M_SCKE_B1
M_ODT_B0
M_ODT_B1
CB32 CB32
R143 33R
R143 33R
R145 33R
R145 33R
R147 33R
R147 33R
R149 33R
R149 33R
R151 33R
R151 33R
R153 33R
R153 33R
R155 33R
R155 33R
R157 33R
R157 33R
R159 33R
R159 33R
R161 33R
R161 33R
R163 33R
R163 33R
R165 33R
R165 33R
R167 33R
R167 33R
R169 33R
R169 33R
R171 33R
R171 33R
R173 33R
R173 33R
R175 33R
R175 33R
R177 33R
R177 33R
R179 33R
R179 33R
R181 33R
R181 33R
R183 33R
R183 33R
R185 33R
R185 33R
R187 33R
R187 33R
R189 33R
R189 33R
R191 33R
R191 33R
R193 33R
R193 33R
R195 33R
R195 33R
CB35 CB35
CB33 CB33
CB36 CB36
CB34 CB34
VCC1.8V_DDR2 VCC1.8V_DDR2
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0805
0805
C53
C53
CB37 CB37
4.7UF_16V_X5R
4.7UF_16V_X5R
0805
0805
C54
C54
4.7UF_16V_X5R
4.7UF_16V_X5R
1
C C
CB40 CB40
CB38 CB38
CB39 CB39
Channel A
CB43 CB43
CB42 CB42
CB41 CB41
CM14 CM14
CM11 CM11
CM12 CM12
CM13 CM13
Channel A
(Each DIMM must have
4 X 1.0UF capacitors)
CB44 CB44
VCC_HVGIO
DECOUPLING
VCC1.125V_CORE
X
X
X
X
X
X
B B
A A
8
GMCH_0603
GMCH_0603
GMCH_0805
GMCH_0805
C72 X
C72 X
C73
C73
GMCH_0603
GMCH_0603
GMCH_0603
GMCH_0603
C74
C74
X
C75
C75
GMCH_0603
GMCH_0603
X
X
X
X
GMCH_0603
GMCH_0603
C77
C77
C76
C76
X
X
GMCH_0603
GMCH_0603
C78
C78
7
X
GMCH_0603
GMCH_0603
C79
C79
VCC3 VCC3
0603
0603
0805
0805
0.1UF
0.1UF
4.7UF
4.7UF
C69
C69
C70
C70
FSB GENERIC
DECOUPLING
FSB_VTT
0603
0603
0.1UF
0.1UF
C93
C93
0603
0603
0603
0603
0.1UF
0.1UF
0.1UF
0.1UF
C89
C89
C96
C96
6
PCI-E SIGNAL TRANSITION
STITCHING CAPS
VCC1.125V_CORE
10UF
10UF
10UF
10UF
0805
0603
0603
X
X
C80
C80
VCC1.125V_CORE
0603
0603
C86
C86
0.1UF_X7R
0.1UF_X7R
0805
0805
0805
C81
C81
10UF
10UF
0805
0805
C90
C90
5
0603
0603
C82
C82
C83
C83
0.1UF_X7R
0.1UF_X7R
0603
0603
0603
0603
C97
C97
C84
C84
0.1UF_X7R
0.1UF_X7R
0.1UF_X7R
0.1UF_X7R
4
VCC1.8V_DDR2
GMCH_0603
GMCH_0603
GMCH_0603
GMCH_0603
GMCH_0603
GMCH_0603
GMCH_0603
GMCH_0603
C94 2.2UF_6.3V_X5R
C94 2.2UF_6.3V_X5R
C88 2.2UF_6.3V_X5R
C88 2.2UF_6.3V_X5R
C85 2.2UF_6.3V_X5R
C85 2.2UF_6.3V_X5R
C87 2.2UF_6.3V_X5R
C87 2.2UF_6.3V_X5R
MCH MEMORY DECOUPLING
GMCH_0603
GMCH_0603
GMCH_0603
GMCH_0603
C91 2.2UF_6.3V_X5R
C91 2.2UF_6.3V_X5R
C92 2.2UF_6.3V_X5R
C92 2.2UF_6.3V_X5R
3
CB45 CB45
+ D6.3P2.5
+ D6.3P2.5
470UF_10V
470UF_10V
CE3
CE3
CB47 CB47
CB48 CB48
CB46 CB46
Channel B
CE4
CE4
+ D6.3P2.5
+ D6.3P2.5
+ D6.3P2.5
+ D6.3P2.5
470UF_10V
470UF_10V
470UF_10V
470UF_10V
TITLE:
TITLE:
TITLE:
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
CB49 CB49
CM15 CM15
VCC1.8V_DDR2
CE6
CE6
CE5
CE5
A3
A3
A3
CE7
CE7
CE8
CE8
+ D6.3P2.5
+ D6.3P2.5
+ D6.3P2.5
+ D6.3P2.5
+ D6.3P2.5
470UF_10V
470UF_10V
G43NT
G43NT
G43NT
MEM DECOUPLE
MEM DECOUPLE
MEM DECOUPLE
+ D6.3P2.5
470UF_10V
470UF_10V
470UF_10V
470UF_10V
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
Sunday, April 06, 2008
Sunday, April 06, 2008
Sunday, April 06, 2008
2
CM17 CM17
CM16 CM16
CM18 CM18
Channel B
(Each DIMM must have
4 X 1.0UF capacitors)
CE9
CE9
+ D6.3P2.5
+ D6.3P2.5
470UF_10V
470UF_10V
REV:
REV:
REV:
1
VTT_MEM
CE10
CE10
+ D6.3P2.5
+ D6.3P2.5
470UF_10V
470UF_10V
12 46
12 46
12 46
0.2
0.2
0.2
of
of
of
8
U5
U5
SEL_18
T191 T191
T189 T189
2
IN_0+
3
IN_0-
4
IN_1+
5
IN_1-
7
IN_2+
8
IN_2-
9
IN_3+
10
IN_3-
12
OUT+
13
OUT-
14
X+
15
X-
18
SEL
19
LE
1
GND1
11
GND2
16
GND3
20
GND4
21
GND5
28
GND6
29
GND7
35
GND8
48
GND9
49
GND10
56
GND11
57
GND12
PI3PCIE2612-A
PI3PCIE2612-A
EXP_TXP_15 6
EXP_TXN_15 6
EXP_TXP_14 6
F F
E E
EXP_TXN_14 6
EXP_TXP_13 6
EXP_TXN_13 6
EXP_TXN_12 6
EXP_TXP_12 6
EXP_RXP_12 6
EXP_RXN_12 6
PEG_PINB7
R1185
R1185
0R
0R
0402
0402
VCC3 VCC3 VCC3
D D
R754
R754
X_1K
X_1K
0402
0402
SEL_18
C
C
Q8
0402
0402
VCC3
B
B
B
B
1
0402
0402
R225
R225
1K
1K
C
C
Q7
Q7
3904_SOT23
3904_SOT23
E
E
2 3
Q8
TMDSC_SW_HPD
E
E
2 3
X_3904_SOT23
X_3904_SOT23
R199
R199
100K
100K
0402
0402
R756
PEG_PINB7
C C
R756
X_1K
X_1K
VCC3
0402
0402
R197
R197
X
X
R198
HP_DETECT
B B
R198
1K
1K
0402
0402
R259
R259
100K
100K
0402
0402
1
VCC3 VCC5
0402
0402
R202
0402
0402
B
B
1
R202
1K
1K
DV_SW_EN
C
C
Q6
Q6
E
E
2 3
0402
0402
R204
R204
1K
1K
R208
A A
PEG_PINB7 6,29
8
R208
10K
10K
VCC3
0402
0402
R196
R196
1K
1K
TMDSC_HPD_SINK
C
C
B
B
Q2
Q2
1
3904_SOT23
3904_SOT23
E
E
2 3
3904_SOT23
3904_SOT23
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
D0+
D0-
D1+
D1-
D2+
D2-
D3+
D3-
TX0+
TX0-
TX1+
TX1-
TX2+
TX2-
TX3+
TX3-
RX0+
RX0-
RX1+
RX1-
AUX+
AUX-
HPD
0402
0402
R758
R758
X_4K7
X_4K7
R205
R205
1K
1K
7
NC
7
6
17
22
27
34
50
55
43
42
41
40
39
38
37
36
54
53
52
51
47
46
45
44
33
32
31
30
26
25
24
23
R759
R759
1
0402
0402
X_1K
X_1K
+12V
B
B
1
0402
0402
R211 X
R211 X
T176 T176
T177 T177
T178 T178
T179 T179
PCIE_SW_HPD
0402
0402
R757
R757
X_1K
X_1K
PCIE_SW_HPD
C
C
Q9
Q9
B
B
X_3904_SOT23
X_3904_SOT23
E
E
2 3
0402
0402
R201
R201
1K
1K
C
C
Q5
Q5
3904_SOT23
3904_SOT23
E
E
2 3
0402
0402
CB54
CB54
CB56
CB56
CB58
CB58
CB60
CB60
R203
R203
CM19 CM19
0R
0R
VCC3
CB51 CB51
CB50 CB50
CB52 CB52
CB53
CB53
X7R
X7R
CB55
CB55
X7R
X7R
CB57
CB57
X7R
X7R
CB59
CB59
X7R
X7R
EXP_SW_TXP_15 29
EXP_SW_TXN_15 29
EXP_SW_TXP_14 29
EXP_SW_TXN_14 29
EXP_SW_TXP_13 29
EXP_SW_TXN_13 29
EXP_SW_TXN_12 29
EXP_SW_TXP_12 29
EXP_SW_RXP_12 29
EXP_SW_RXN_12 29
0R
0R
R760
R760
R212
R212
0402
0402
6
X7R
X7R
X7R
X7R
X7R
X7R
X7R
X7R
TMDSC_SW_HPD
0402
0402
DV_SW_EN
0402
0402
X
X
VCC3
G
G
1
6
DVI_LANE0_DP
DVI_LANE0_DN
DVI_LANE1_DP
DVI_LANE1_DN
DVI_LANE2_DP
DVI_LANE2_DN
DVI_LANE3_DN
DVI_LANE3_DP
CB69 CB69
VCC3
R226 X
R226 X
R227
R227
R340 X
R340 X
R641 X
R641 X
R738 X
R738 X
R739 X
R739 X
R744 0R
R744 0R
R743 0R
R743 0R
R745 0R
R745 0R
R740 0R
R740 0R
R741 0R
R741 0R
R742 0R
R742 0R
D
D
Q3
Q3
2N7002
2N7002
S
S
2 3
0402
0402
R206
R206
1K
1K
5
D1
D1
1
CH1
CH4
2
VN
TMDSC_SW_DATA2
TMDSC_SW_CLK1-
TMDSC_SW_DATA0
TMDS_SCLDDC
HP_DETECT
VCC3
CB61 CB61
CB67 CB67
CB68 CB68
DVI_LANE3_DP
DVI_LANE3_DN
DVI_LANE2_DP
DVI_LANE2_DN
DVI_LANE1_DP
DVI_LANE1_DN
DVI_LANE0_DP
DVI_LANE0_DN
0402
0402
0402
0402
X
X
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
U6
U6
2
VCC3V_1
11
VCC3V_2
15
VCC3V_3
21
VCC3V_4
26
VCC3V_5
33
VCC3V_6
40
VCC3V_7
46
VCC3V_8
39
IN_D1+
38
IN_D1-
42
IN_D2+
41
IN_D2-
45
IN_D3+
44
IN_D3-
48
IN_D4+
47
IN_D4-
25
OE-
3
OC_0
4
OC_1
6
OC_2_REXT
10
OC_3
34
EQ_0
35
EQ_1
PI3VDP411LS
PI3VDP411LS
PEG_PINB7 6,29
CH23CH3
CM1293A_04SO
CM1293A_04SO
D2
D2
1
CH1
2
VN
CH23CH3
CM1293A_04SO
CM1293A_04SO
D3
D3
1
CH1
2
VN
CH23CH3
CM1293A_04SO
CM1293A_04SO
VP
CH4
VP
CH4
VP
HPD_SOURCE
SDA_SOURCE
SCL_SOURCE
1
VCC3
0402
0402
R644
R644
X_1K
X_1K
1
D
D
Q4
Q4
G
G
2N7002
2N7002
1
S
S
2 3
0402
0402
R207
R207
1K
1K
PEG_PINB7 6,29
R206,R207,R209,R210 change to 2.2K
D
D
Q11
Q11
G
G
X_2N7002
X_2N7002
1
S
S
2 3
SDVO_CTRL_DATA 6,29
SDVO_CTRL_CLK 6,29
5
4
VCC5
6
5
4
CB64 CB64
6
5
4
CB65 CB65
6
5
4
CB66 CB66
SDA_SINK
SCL_SINK
HPD_SINK
DDC_EN
OUT_D1+
OUT_D1-
OUT_D2+
OUT_D2-
OUT_D3+
OUT_D3-
OUT_D4+
OUT_D4-
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
R779 22R
R779 22R
D
D
Q10
Q10
G
G
X_2N7002
X_2N7002
S
S
2 3
R777 X_22R
R777 X_22R
D
D
Q16
Q16
G
G
X_2N7002
X_2N7002
S
S
2 3
4
TMDSC_SW_DATA1- TMDSC_SW_DATA1
TMDSC_SW_DATA2-
TMDSC_SW_CLK1
TMDSC_SW_DATA0-
TMDS_SDADDC
TMDSC_SW_HPD
7
8
9
29
28
30
PEG_PINB7
32
22
23
19
20
16
17
13
14
1
5
12
18
24
27
31
36
37
43
49
0402
0402
VCC1.125V_CORE
R776
R776
150R
150R
0402
0402
0402
0402
0402
0402
R778
R778
X
X
VCC5
R209 1K8_1%
R209 1K8_1%
R210 1K8_1%
R210 1K8_1%
TMDS_SDADDC
TMDS_SCLDDC
TMDSC_HPD_SINK
R200 X_10K
R200 X_10K
0402
TMDSC_SW_CLK1P
TMDSC_SW_CLK1N
TMDSC_SW_DATA0P
TMDSC_SW_DATA0N
TMDSC_SW_DATA1P
TMDSC_SW_DATA1N
TMDSC_SW_DATA2P
TMDSC_SW_DATA2N
0402
EXP_SLR 6
EXP_EN 6,29
FAB B change
TMDS_SDADDC
0402
0402
TMDS_SCLDDC
0402
0402
3
DIS_PWR 14
TMDSC_SW_DATA2TMDSC_SW_DATA2
TMDSC_SW_DATA1TMDSC_SW_DATA1
TMDSC_SW_DATA0TMDSC_SW_DATA0
TMDSC_SW_CLK1
TMDSC_SW_CLK1-
TMDS_SCLDDC
TMDS_SDADDC
HP_DETECT
SDVO_CTRL_DATA 6,29
SDVO_CTRL_CLK 6,29
VCC3
TMDSC_SW_DATA0P
TMDSC_SW_DATA0N
TMDSC_SW_DATA1P
TMDSC_SW_DATA1N
3
TMDSC_SW_CLK1P
TMDSC_SW_CLK1N
TMDSC_SW_DATA2P
TMDSC_SW_DATA2N
P1
P1
14
+5V
1
DATA2-
2
DATA2+
3
DATA2_4_SHIELD
4
DATA4-
5
DATA4+
9
DATA1-
10
DATA1+
11
DATA1_3_SHIELD
12
DATA3-
13
DATA3+
17
DATA0-
18
DATA0+
19
DATA0_5_SHIELD
20
DATA5-
21
DATA5+
22
CLK_SHIELD
23
CLK+
24
CLK-
6
DCC_CLOCK
7
DCC_DATA
8
ANALOG_VERTICAL_SYNC
16
HOT_PLUG_DET
15
GND
DVI-D_1STACK
DVI-D_1STACK
0R
0R
R215
R215
0402
0402
L51
L51
1 2
3 4
X_WCM2012F2S
X_WCM2012F2S
0R
0R
R216
R216
0402
0402
0R
0R
R218
R218
0402
0402
L82
L82
1 2
3 4
X_WCM2012F2S
X_WCM2012F2S
0R
0R
R217
R217
0402
0402
0R
0R
R220
R220
0402
0402
L83
L83
3 4
X_WCM2012F2S
X_WCM2012F2S
0R
0R
R219
R219
0402
0402
0R
0R
R222
R222
0402
0402
L84
L84
3 4
X_WCM2012F2S
X_WCM2012F2S
0R
0R
R221
R221
0402
0402
TITLE:
TITLE:
TITLE:
G43NT
G43NT
G43NT
PCIE_DVI-D_SWITCH
PCIE_DVI-D_SWITCH
PCIE_DVI-D_SWITCH
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
2
H1
H1
H2
H2
TMDSC_SW_CLK1
TMDSC_SW_CLK1-
TMDSC_SW_DATA0
TMDSC_SW_DATA0-
TMDSC_SW_DATA1
1 2
TMDSC_SW_DATA1-
TMDSC_SW_DATA2
1 2
TMDSC_SW_DATA2-
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
Sunday, April 06, 2008
Sunday, April 06, 2008
Sunday, April 06, 2008
2
1
1
REV:
REV:
REV:
0.2
0.2
0.2
13 46
13 46
13 46
of
of
of
8
7
6
5
4
3
2
1
F F
1 2
TH1
TH1
1.6A
1.6A
FUSE_1812
FUSE_1812
R230 100R
R230 100R
R231 100R
R231 100R
FB_0805
L14
L14
FB_0805
CB74 CB74
P3
P3
VGA_PORT
FB_30R_100MHZ_3000MA
FB_30R_100MHZ_3000MA
6
1
7
2
8
3
9
4
10
5
VGA_PORT
H1
H2
H1
H2
16
17
11
12
13
14
15
C98 X C98 X
X_100PF
C99 X C99 X
C101 47PF C101 47PF
X_100PF
D6
D6
C102 47PF C102 47PF
1
VGA_CON_HS
4
3
GND VDD
GND VDD
2
5
6
AZ1015_04S
AZ1015_04S
R232
R232
R233
R233
VCC5 VCC3
U9
1
VCC_SYNC
2
VCC_VIDEO
3
VIDEO_1
4
VIDEO_2
5
VIDEO_3
6
GND
7
VCC_DDC
8
BYP
CM2009U9CM2009
SYNC_OUT2
SYNC_OUT1
DDC_OUT2
DDC_OUT1
SYNC_IN2
SYNC_IN1
DDC_IN2
DDC_IN1
16
15
14
13
12
11
10
9
E E
CON_RED
CON_GREEN
CON_BLUE
DIS_PWR 13
D D
C C
DIS_PWR
VCC5 VCC5
0402
0402
R228
R228
2K2_1%
2K2_1%
0402
0402
0402
0402
VCC5
22R
22R
0402
0402
22R
22R
0402
0402
VGA_HSYNC
VGA_VSYNC
VGA_DDCSDA_5V
VGA_DDCSCL_5V
0402
0402
R229
R229
2K2_1%
2K2_1%
VGA_DDCSDA_5V
VGA_DDCSCL_5V
C100 X C100 X
VGA_HSYNC
VGA_VSYNC VGA_CON_VS
VGA_HSYNC_3V 6
VGA_VSYNC_3V 6
VGA_DDC_DA_3V 6
VGA_DDC_CLK_3V 6
D9
D8
C104
C104
C105
C103
C103
B B
C105
C106
C106
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
0.22UF
D7
D7
0.22UF
0.22UF
VGA_RED 6
VGA_GREEN 6
D8
C A
X_AZ2025_01H
X_AZ2025_01H
FB_47R_100MHZ_300MA
FB_47R_100MHZ_300MA
L15
L15
FB_47R_100MHZ_300MA
FB_47R_100MHZ_300MA
VGA_BLUE 6
R236
R236
R237
R234
R234
R235
0402
0402
150R
150R
0402
0402
R235
150R
150R
0402
0402
A A
150R
150R
0402
0402
R237
150R
150R
0402
0402
R238
R238
150R
150R
0402
0402
R239
R239
150R
150R
C107
C107
10PF
10PF
C108
C108
10PF
10PF
Close to GMCH
8
7
6
D9
C A
X_AZ2025_01H
X_AZ2025_01H
FB_0603
FB_0603
L17
L17
FB_0603
FB_0603
L19
L19
C109
C109
10PF
10PF
FB_47R_100MHZ_300MA
FB_47R_100MHZ_300MA
C A
X_AZ2025_01H
X_AZ2025_01H
FB_0603
FB_0603
D10
D10
C A
X_AZ2025_01H
X_AZ2025_01H
FB_47R_100MHZ_300MA
FB_47R_100MHZ_300MA
L16
L16
C110
C110
22PF
22PF
C111
C111
22PF
22PF
5
FB_0603
FB_0603
L18
L18
FB_47R_100MHZ_300MA
FB_47R_100MHZ_300MA
FB_0603
FB_0603
FB_47R_100MHZ_300MA
FB_47R_100MHZ_300MA
L20
L20
FB_0603
FB_0603
C112
C112
22PF
22PF
C113
C113
10PF
10PF
CON_RED
CON_GREEN
CON_BLUE
TITLE:
TITLE:
TITLE:
G43NT
G43NT
C115
C115
C114
C114
10PF
10PF
10PF
10PF
4
3
G43NT
VGA
VGA
VGA
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
2
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
Saturday, April 05, 2008
Saturday, April 05, 2008
Saturday, April 05, 2008
1
REV:
REV:
REV:
0.2
0.2
0.2
14 46
14 46
14 46
of
of
of
8
A20GATE 20
H_A20M- 3
H_FERR- 3
H_IGNNE- 3
F F
H_INIT- 3
H_INTR 3
H_NMI 3
KBREST 20
SERIRQ 20
H_SMI- 3
H_STPCLK- 3
THERMTRIP_ICH- 3
H_PECI 3,20
PECISB 20
SATA0TXP 23
SATA0TXN 23
SATA0RXN 23
SATA0RXP 23
SATA1TXP 23
E E
D D
CLK_100M_SATA 19
CLK_100M_SATA- 19
SATA1TXN 23
SATA1RXN 23
SATA1RXP 23
SATA2TXP 23
SATA2TXN 23
SATA2RXN 23
SATA2RXP 23
SATA3TXP 23
SATA3TXN 23
SATA3RXN 23
SATA3RXP 23
SATA4TXP 23
SATA4TXN 23
SATA4RXN 23
SATA4RXP 23
SATA5TXP 23
SATA5TXN 23
SATA5RXN 23
SATA5RXP 23
SATALED- 22
R263 10K
R266 10K
VCC3
C C
R266 10K
R268 10K
R268 10K
R270 10K
R270 10K
R272 10K
R272 10K
R274 10K
R274 10K
R263 10K
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
RTCRST- 18
ICH_LAN_JRX0 28
ICH_LAN_JRX1 28
ICH_LAN_JRX2 28
ICH_LAN_JTX0 28
ICH_LAN_JTX1 28
ICH_LAN_JTX2 28
ICH_LAN_JRST 28
ICH_LAN_JCLK 28
R282 33R
AC_SYNC 26
AC_RST- 26
HDA_SDIN0 27
B B
HDA_SDIN1 27
AC_SDIN2 26,27
AC_BITCLK 26
HDA_SDIN3 27
AC_SDOUT 26
CLK_14M_ICH 19
ICH_SPI_CS0- 18
ICH_SPI_MOSI 18
ICH_SPI_MISO 18
ICH_SPI_CLK 18
PM_DPRSTP- 3,4,6
DPSLP- 3
A A
C283 X C283 X
MCH_HDA_SDIN3 6
8
R282 33R
R283 33R
R283 33R
R286 33R
R286 33R
R289 33R
R289 33R
R290 15R
R290 15R
R291 15R
R291 15R
R292 15R
R292 15R
TP0
ICH_GPIO58
MCH_HDA_SYNC 6
MCH_HDA_RST- 6
MCH_HDA_BCLK 6
MCH_HDA_SDO 6
7
T93T93
R246 0R
R246 0R
0402
0402
R256 24R9_1%
R256 24R9_1%
0402
0402
RTX1
RTX2
LAN_RSTHDA_SYNC
0402
0402
HDA_RST-
0402
0402
HDA_SDIN0
HDA_SDIN1
HDA_BCLK
0402
0402
HDA_SDIN3
HDA_SDO
0402
0402
0402
0402
SMI_MOSI
0402
0402
0402
0402
T100 T100
R302 X_33R
R302 X_33R
R303 X_33R
R303 X_33R
R305 X_33R
R305 X_33R
R307 X_33R
R307 X_33R
R308 X_33R
R308 X_33R
7
U10B
U10B
P8
A20GATE
AJ28
A20M#
AJ27
FERR#
AC22
IGNNE#
AE23
INIT#
AH27
INTR
AF24
NMI
L3
RCIN#
N6
SERIRQ
AH26
SMI#
AJ29
STPCLK#
M3
INIT3_3V#
AD24
THRMTRIP#
AC23
PECI
AJ19
SATA0TXP
AK19
SATA0TXN
AK17
SATA0RXN
AJ17
SATA0RXP
AF16
SATA1TXP
AH16
SATA1TXN
AJ15
SATA1RXN
AK15
SATA1RXP
AF14
SATA2TXP
AH14
SATA2TXN
AJ13
SATA2RXN
AK13
SATA2RXP
AH12
SATA3TXP
AF12
SATA3TXN
AJ11
SATA3RXN
AK11
SATA3RXP
AH9
SATA4TXP
AF10
SATA4TXN
AJ9
SATA4RXN
AK9
SATA4RXP
AH7
SATA5TXP
AF8
SATA5TXN
AJ7
SATA5RXN
AK7
SATA5RXP
AJ6
SATARBIAS
AK6
SATARBIAS#
AF19
SATA_CLKP
AF18
SATA_CLKN
AE7
SATALED#
AK25
SATA0GP_GPIO21
AE20
SATA1GP_GPIO19
AE21
SATA2GP_GPIO36
AE22
SATA3GP_GPIO37
AF22
SATA4GP
AD21
SATA5GP
A21
RTCX1
B21
RTCX2
A25
RTCRST#
G15
LAN_RXD0
H14
LAN_RXD1
E13
LAN_RXD2
F15
LAN_TXD0
F14
LAN_TXD1
G14
LAN_TXD2
E14
LAN_RSTSYNC
F25
GLAN_CLK
C21
LAN_RST#
AK1
HDA_SYNC
AJ1
HDA_RST#
AK3
HDA_SDIN0
AH4
HDA_SDIN1
AH1
HDA_SDIN2
AH3
HDA_BIT_CLK
AJ3
HDA_SDIN3
AJ2
HDA_SDOUT
M5
CLK14
E25
SPI_CS0#
C26
SPI_MOSI
B26
SPI_MISO
G23
SPI_CLK
F23
SPI_CS1#
C13
GPIO72_TP0
AK28
DPRSTP#
AE24
DPSLP#
F20
TP3
ICH10_CORPORATE_WITH_HS_36.2X24
ICH10_CORPORATE_WITH_HS_36.2X24
R300 X
R300 X
R309 X_3K3
R309 X_3K3
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
HDA_SYNC
HDA_RSTHDA_BCLK
HDA_SDIN3
HDA_SDO
6
2 of 4
2 of 4
GPIO10-CPU_MISSING-JTAGTMS
GPIO14_JTAGTDI-QST_BMBUSY#
GPIO0_BMBUSY#
DRAMPWROK_GPIO8
GPIO9-WOL_EN
STP_PCI#_GPIO15
DPRSLPVR_GPIO16
GPIO24-MEM_LED
STP_CPU#_GPIO25
S4_STATE#_GPIO26
SATACLKREQ#_GPIO35
GPIO57-TPM_PP-JTAGTCK
SUSCLK_GPIO62
SUS_STAT#-LPCPD-GPIO61
SLP_S5#-GPIO63
SYS_RESET#
VRMPWRGD
MCH_SYNC#
LAN100_SLP
LINKALERT#_GPIO60_JTAGRST#
SMBALERT#_GPIO11_JTAGTDO
OC0#_GPIO59
OC1#_GPIO40
OC2#_GPIO41
OC3#_GPIO42
OC4#_GPIO43
OC5#_GPIO29
OC6#_GPIO30
OC7#_GPIO31
OC8#_GPIO44
OC9#_GPIO45
OC10#_GPIO46
OC11#_GPIO47
VCC1.5V
0402
0402
HDA_SYNC 27
HDA_RST- 27
HDA_BCLK 27
HDA_SDIN3 27
HDA_SDO 27
0402
0402
6
ICH10 C :1X4 PCIE ENABLE(R696,R223)
ICH10 C :DANBURY ENABLE STUFF(R223)
GPIO12
GPIO13
GPIO18
GPIO20
GPIO27
GPIO28
GPIO32
GPIO33
GPIO34
GPIO56
CPUPWRGD
SPKR
PWRBTN#
SLP_S3#
SLP_S4#
SLP_M#
GPIO49
THRM#
INTVRMEN
INTRUDER#
WAKE#
PLTRST#
RSMRST#
PWROK
CK_PWRGD
SMBCLK
SMBDATA
SMLINK0
SMLINK1
SRTCRST#
USBP0P
USBP0N
USBP1P
USBP1N
USBP2P
USBP2N
USBP3P
USBP3N
USBP4P
USBP4N
USBP5P
USBP5N
USBP6P
USBP6N
USBP7P
USBP7N
USBP8P
USBP8N
USBP9P
USBP9N
USBP10P
USBP10N
USBP11P
USBP11N
USBRBIAS
USBRBIAS#
CLK48
MCH_HDA_BCLK 6
MCH_HDA_SDIN3 6
MCH_HDA_SDO 6
5
PECI_REQ-
N7
GPIO8
A20
A18
C17
A8
A19
PECI_REQ1-
A9
C15
T111 T111
M2
K1
AF5
T113 T113
A14
B18
C11
A11
G18
T141 T141
K2
AF6
AH5
L1
F16
C12
AD23
N8
G19
RI#
T3
R5
R1
A13
B13
G17
F17
F19
C22
AJ25
AK26
E23
G21
AH25
E20
E21
C14
F22
C25
T8
H16
E16
A15
B15
F18
C16
H20
AD5
AD6
AE2
AE3
AD2
AD1
AB5
AB6
AC2
AC3
AB2
AB1
Y5
Y6
AA2
AA3
Y2
Y1
V5
V6
W3
W2
V2
V1
P5
N3
P7
R7
N2
N1
N5
M1
P3
R6
T7
P1
AG2
AG1
T142 T142
PWRBTN
T98T98
T119 T119
T99T99
LAN100SLP_EN
SMLINK0
SMLINK1
TEMP_THERMSRTCRST-
USBRBIAS
GPIO33
GPIO35
THRMINTVRMEN
INTRUDER-
AG3
MCH_HDA_SYNC 6
MCH_HDA_RST- 6
5
WOL_ONLY 32
SKTOCC- 3,20
LAN_DISABLE- 28
SIO_WAKE- 20
CK_STP_PCI- 19
AFP_DETECT- 26
CPU_GTL_CTRL2 4
CK_STP_CPU- 19
S4_STATE- 22,32
LED_ICH_GP27 22
PW_LED- 22
DDR_V1 20,34
DDR_V2 20,34
H_PWRGD- 3
SB_SPKR 18,26
WOR- 22
SLP_S3- 20,32
SLP_S4- 22,32,34
SLP_M- 32,34
DBRESET- 3,5,22
VRMPWRGD 36
1394_EN- 31
ICH_SYNC- 6
WAKE- 29
PLTRST- 16,20
ICH_RSMRST- 16,21
PWR_GD 6,20,21,23,31,38
CK_PWRGD 19
SMB_CLK_STBY 10,19,23,29,30
SMB_DATA_STBY 10,19,23,29,30
CPU_GTL_CTRL1 4
USB_P0 24
USB_P0- 24
USB_P1 24
USB_P1- 24
USB_P2 24
USB_P2- 24
USB_P3 24
USB_P3- 24
USB_P4 24
USB_P4- 24
USB_P5 24
USB_P5- 24
USB_P6 23
USB_P6- 23
USB_P7 23
USB_P7- 23
USB_P8 23
USB_P8- 23
USB_P9 23
USB_P9- 23
USB_P10 23
USB_P10- 23
USB_P11 23
USB_P11- 23
USB_ICH_OC0- 24
USB_ICH_OC1- 24
USB_ICH_OC2- 24
USB_ICH_OC3- 23
USB_ICH_OC4- 23
USB_ICH_OC5- 23
R294 22R6_1%
R294 22R6_1%
0402
0402
CLK_48M_USB 19
stuff 0R
R296 X
R296 X
R298 X
R298 X
R301 X
R301 X
R304 X
R304 X
R306 X
R306 X
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
4
GPIO33
VCC3
R243 4K7
R243 4K7
3
0402
0402
JP31
JP31
1
2
X_HEADER_1X2_2.54MM
X_HEADER_1X2_2.54MM
2
LAN100SLP_EN
INTVRMEN
INTRUDER-
SRTCRST-
1
R240 330K
R240 330K
R241 330K
R241 330K
R242 1M
R242 1M
INTEL_INTRUDER_JUMPER_1X2_P2.54
INTEL_INTRUDER_JUMPER_1X2_P2.54
0402
0402
0402
0402
0402
0402
JP1
JP1
1
2
Tamper Switch connector
R245 180K_1%
R245 180K_1%
CB75 CB75
0402
0402
VBAT
VBAT
VBAT
R247 20K_1%
R248 0R
R248 0R
R249 X
R249 X
R247 20K_1%
CM21 CM21
0402
0402
0402
0402
0402
0402
PSOUT 20
SW_ON- 20,22
R893 0R
R893 0R
0402
0402
PECI_REQ1- PECI_REQ-
Q156
Q156
2N7002
2N7002
1
VTTPG 33
2 3
RTCRST- 18
PWRBTN
SB5V
0402
0402
R753
R753
Q163
Q163
X_2N7002
X_2N7002
4K7
4K7
1
3904_SOT23
3904_SOT23
C
1K
1K
0402
0402
Q15
Q15
C
B
B
1
E
E
2 3
Q159
Q159
2N7002
2N7002
R254
SLP_S3- 20,32
R254
1
H_PROCHOT- 3
0402
0402
E
E
R260
R260
X
X
THRM-
X1
X1
32.768KHZ_DIP_SMD_CO_LAY
32.768KHZ_DIP_SMD_CO_LAY
7
NC1
NC1
8 6
NC2
NC2
GND
GND
3
4
H1_GND
H1_GND
5
H2_GND
H2_GND
RTX1
RTX2
2
1
9
2 3
Q12
Q12
1
B
B
C
C
3904_SOT23
3904_SOT23
C117 12PF C117 12PF
for Corwin spring support
R295 X
PWR_GD 6,20,21,23,31,38
ICH_RSMRST- 16,21
LAN_RST-
4
R295 X
R297 0R
R297 0R
R299 X
R299 X
C119 X_2.2UF_6.3V_X5R
C119 X_2.2UF_6.3V_X5R
3
R261
R261
4K7
4K7
0603
0603
0402
0402
0402
0402
0402
0402
2 3
2 3
PWR_GD
R281 10M
R281 10M
0402
0402
X_0R
VR_READY 3,36
0402
0402
R751
R751
X_10K
X_10K
FSB_VTT
0402
0402
C118 12PF C118 12PF
VCC3.3V_CL
0402
0402
R293
R293
X_60K4_1%
X_60K4_1%
THERMTRIP_ICH- 3
LAN_DISABLE- 28
WOL_ONLY 32
WOR- 22
DBRESET- 3,5,22
TP0
WAKE- 29
GPIO8
TEMP_THERM-
SIO_WAKE- 20
ICH_GPIO58
SLP_M- 32,34
1394_EN- 31
WOL_ONLY 32
ICH_GPIO58
VDD_CLK 19
CLK_14M_ICH 19
CLK_48M_USB 19
TITLE:
TITLE:
TITLE:
G43NT
G43NT
G43NT
ICH 1/4
ICH 1/4
ICH 1/4
Document Number :
Document Number :
Document Number :
Prepared by :
Prepared by :
Prepared by :
SIZE :
SIZE :
SIZE :
A3
A3
A3
2
R250 62R
R250 62R
C116 X C116 X
GPIO35
R251 10K
R251 10K
THRM-
R253 10K
R253 10K
PECI_REQ-
CPU_GTL_CTRL2
CPU_GTL_CTRL1
SMLINK0
SMLINK1
R255 10K
R255 10K
R460 X
R460 X
R765 10K
R765 10K
R257 10K
R257 10K
R258 10K
R258 10K
R264 10K
R264 10K
R262 10K
R262 10K
R265 10K
R265 10K
R267 10K
R267 10K
R269 10K
R269 10K
R271 1K
R271 1K
R273 10K
R273 10K
R275 10K
R275 10K
R276 10K
R276 10K
R277 10K
R277 10K
CM22XCM22
R278 X
R278 X
R279 X
R279 X
R280 X
R280 X
R284 47K
R284 47K
R285 47K
R285 47K
R287 33K
R287 33K
R288 33K
R288 33K
CLOSE TO CK505
SMI_MOSI
R419 X
R418 X
R418 X
0402
0402
<Doc>
<Doc>
<Doc>
James Xiong
James Xiong
James Xiong
Date: PAGE:
Date: PAGE:
Date: PAGE:
Sunday, April 06, 2008
Sunday, April 06, 2008
Sunday, April 06, 2008
R419 X
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
X
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
0402
1
X_10K
REV:
REV:
REV:
FSB_VTT
VCC3
SB3V
VCC3.3V_CL
0402
0402
0.2
0.2
0.2
15 46
15 46
15 46
of
of
of