Includes Over-voltage,
Under-voltage, And Current
Sensing Circuits
•
Internal 1% Accurate
Reference
•
Programmable Time Delays
•
SCR “Crowbar” Drive Of
300mA
•
Remote Activation Capability
•
Optional Over-voltage Latch
•
Uncommitted Comparator
Inputs For Low Voltage
Sensing (UC1544 Series
Only)
The monolithic integrated circuits contain all the functions necessar y to monitor
and control the output of a sophisticated power supply sy stem. Over-voltage (O.V.)
sensing with provision to t rigger an exter nal SCR “crowbar” shutdown; an undervoltage (U.V.) circuit which can be us ed to monitor either the output or to sample
the input line voltage; and a third op amp/comparator usable for current sensing
(C.L.) are all inclu ded in this IC, together with an independent, accurate reference
generator.
Both over- and under- voltage sensing circuits can be externally programmed for
minimum time dura tion of fault before tri ggeri ng. All functions contain open collector outputs wh ich can be used independently or wire-or’ed together, and although
the SCR trigger is directly connected only to the over-voltage sensing circuit, it
may be optionall y ac t ivate d by any of the other outputs, or fr om an external signal.
The O.V. circuit also includes an optional latch and external reset capability.
The UC1544/254 4/3544 devices have the ad ded versatility of completely uncommitted inputs to the voltage sensing c omparators so that levels less than 2.5V may
be monitored by dividing down the internal reference voltage. The current sense
circuit may be us ed wi th exter nal c ompen sation as a linear amplifier or as a highgain comparator. Although nominally s et for zero input offset, a fixed threshold may
be added with an external resistor. Instead of current limiting, this circuit may also
be used as an additional voltage monitor.
UC1543 UC1544
UC2543 UC2544
UC3543 UC3544
BLOCK DIAGRAM
The reference generat or circuit is internall y trimmed to el iminate the need for external potentiometers and the entire circuit may be powered directly from either the
output being monitored or from a separate bias voltage.
Note: For each terminal, firs t n um be r refers to 1543 series, se co nd to 15 44 series.
* On 1543 series, this function is internally connected to V
Note 1: At higher input voltages, a diss ipation limiti ng resistor, RG, is required.
Note 2: Currents are positive-into, negative-out of the specified terminal. Consult Packaging section of Databook for thermal limitations and considerations
of package.
UC1543 and UC1 544; -25°C to +85°C for the UC2543 and UC2544; and 0°C to +70°C for the UC3543 and UC3544. Electrical
tests are performed with VIN = 10V and 2kΩ pull-up resistors on all indicator outputs. All electrical specifications for the UC1544,
UC2544, and UC3544 devices are tested with the inve rting over-voltage input and th e non-inverting under-voltage input externally
connected to the 2.5V reference. TA = T
PARAMETERTEST CONDITIONS
Input Voltage R angeT
Supply CurrentV
Reference Section
Output VoltageT
Output VoltageOver Temperature Range2.452.552.402.60V
Line RegulationV
Load RegulationI
Short Circuit CurrentV
Temperature Stability5050ppm
SCR Trigger Section
Peak Output CurrentVIN = 5V, RG = 0, VO = 0-100-300-600-100-300-600mA
Peak Output VoltageV
Output Off VoltageV
Remote Activate CurrentR/A Pin = Gnd-0.4-0.8-0.4-0.8mA
Remote Activate VoltageR/A Pin Open2626V
Reset CurrentReset = Gnd, R/A = Gnd-0.4-0.8-0.4-0.8mA
Reset VoltageReset open, R/A = Gnd 2626V
Output Current Rise TimeR
Prop. Delay from R/AR
Prop. Delay from O/V input R
Comparator Section
Input Threshold (Inp ut
voltage rising on O.V. and
falling on U.V.)
Input Hysteresis2525mV
Input Bias CurrentSense Input = 0V-0.3-1.0-0.3-1.0
Delay Satura tion0.20.50.20.5V
Delay High Level6767V
Delay Charging CurrentV
Indicate SaturationI
Indicate LeakageV
Propagation DelayInput Over Drive = 200mV, T
Current Limit Section
Input Voltage R ange0V
Input Bias CurrentOffset Pin Open, V
Input Offset VoltageOffset Pin Open, V
CMRR0 ≤ VCM ≤ 12V, V
AVOLOffset Pin Open, V
Output SaturationI
Output Leakag eV
Small Signal BandwidthA
Propagation DelayV
= 25°C to T
J
T
to T
MIN
= 40V, Output Open, TJ = 25°C710710mA
IN
≤ TJ ≤ T
T
MIN
= 25°C2.482.502.522.452.502.55V
J
= 5 to 30V1515mV
IN
= 0 to 10mA110110mV
REF
= 0-10-20-40-12-20-40mA
REF
= 15V, IO = -100mA12131213V
IN
= 40V00.100.1V
IN
= 50Ω, TJ = 25°C, CD = 0400400mA/µs
L
= 50Ω, TJ = 25°C, CD = 0300300ns
L
= 50Ω, TJ = 25°C, CD = 0500500ns
L
= 25°C2.452.502.552.402.502.60V
T
J
Over Temperature Range2.402.602.352.65V
= 0-200-250-300-200-250-300µA
O
= 10mA0.20.50.20.5V
L
= 40V.011.0.011.0µA
IND
Input Over Drive = 200mV, T
10kΩ from Offset Pin to Gnd8010012080100120mV
RL = 10k to 15kΩ, ∆V
= 10mA0.20.50.20.5V
L
= 40V.011.0.011.0µA
IND
= 0dB, TJ = 25°C55MHz
V
OVERDRIVE
Unless otherwise stated, these specif ic ations apply for TA = -55°C to +125°C for the
J.
UC1543/UC1544
UC3543/UC3544UNITS
UC2543/UC2544
MINTYPMAXMINTYPMAX
4.5404.540V
4.7404.740V
1515mA
-3V0V
IN
3VV
IN
-
72807280dB
MAX
MAX
MAX
= 25°C, CD = 0400400ns
J
= 25°C, CD = 1µF1010 ms
J
= 0-0.3-1.0-0.3-1.0
CM
= 0010010mV
CM
= 15V60706070dB
IN
= 0V,
CM
= 1 to 6V
OUT
= 100mV, TJ = 25°C200200ns
µ
A
µ
A
/°C
3
UC1543 UC1544
UC2543 UC2544
UC3543 UC3544
SCR T rigger P o wer Limiting
Activation Delay vs Capacitor Value
Comparator Input Hysteresis
Current Limit Input Threshold
Current Limit Amplifier Gain
Note: RT is connected from Offset Pin to Gnd. Values of
R
below 5.0k may cause Amplifier Cutoff at -55°C.
T
Current Limit Amplifier Frequency Response
4
UC1543 UC1544
UC2543 UC2544
UC3543 UC3544
APPLICATIONS
(Pin numbers given for UC1543 series devices)
Typical Application
Sensing Multiple Supply Voltages
The values for the external components are determined
as follows:
Current limit input threshold, VTH =
is determ ined by the current loop dynamics
C
S
Peak current to load, I
Short Circuit Current, ISC =
Low outpu t voltage limi t, VO (Low) =
High output voltage limit, VO (High) =
Voltage sens ing delay, tD = 10,000Cd
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
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Copyright 1999, Texas Instruments Incorporated
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