UNISONIC TECHNOLOGIES CO U74LVC2G240 Technical data

UNISONIC TECHNOLOGIES CO., LTD
U74LVC2G240
CMOS IC
DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
DESCRIPTION
outputs. It is designed for 1.65V to 5.5V operation.
The U74LVC2G240 is composed of two 1-bit buffers/drivers
with separate output-enable ( data passes from A (input) to Y (output). When
outputs are in the high-impedance state. To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor, and the minimum value of the resistor is determined by the
current-sinking capability of the driver.
The U74LVC2G240 is fully specified for partial-power-down
applications using I and prevents damaging current backflow through the device when it is powered down.
OFF
. The I
FEATURES
) inputs. When OE is low,
OE
is high, the
OE
circuitry disables the outputs
OFF
TSSOP-8
* Wide Supply Voltage Range from 1.65V to 5.5V * Max t * Up to 5.5V Inputs Accept Voltages * Low Power Consumption, I * ±24 mA Output Driver at 3.3V * Typical V V * Typical V V
of 4.6 ns at 3.3V
PD
(Output Ground Bounce) < 0.8V,
OLP
= 3.3 V, TA = 25
CC
(Output VOH Undershoot) > 2V,
OHV
= 3.3 V, T
CC
= 25
A
= 10 μA (Max.)
CC
ORDERING INFORMATION
Ordering Number Package Packing
U74LVC2G240G-P08-R TSSOP-8 Tape Reel
U74LVC2G240G-P08-R
(1) Packing Type
(2) Package Type
(3) Halogen Free
(1) R: Tape Reel
(2) P08:TSSOP-8
(3) G: Halogen Free
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U74LVC2G240 CMOS IC
PIN CONFIGURATION
FUNCTION TABLE (Each Buffer)
INPUTS OUTPUT
OE
L H L L L H
H X Z
LOGIC DIAGRAM (Positive Logic)
A Y
1
1OE
2
1A 1Y
7
2OE
5
2A 2Y
6
3
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