UNISEM US3011CW Datasheet
5 BIT PROGRAMMABLE SYNCHRONOUS BUCK
FEATURESFEATURES
Dual Layout Compatible with HIP6004A
Designed to meet Intel specification of VRM8.4
for Pentium III
On board DAC programs the output voltage
from 1.3V to 3.5V. The US3011 remains on for
VID code of (11111).
Loss less Short Circuit Protection
Synchronous operation allows maximum
efficiency
Patented architecture allows fixed frequency
operation as well as 100% duty cycle during
dynamic load
Over Voltage Protection Output
Soft Start
High current totem pole driver for direct
driving of the external Power MOSFET
Power Good function
APPLICATIONSAPPLICATIONS
Pentium III & Pentium II processor DC to DC converter application
Low cost Pentium with AGP
US3011
CONTROLLER IC
PRELIMINARY DATASHEET
DESCRIPTIONDESCRIPTION
The US3011controller IC is specifically designed to meet
Intel specification for latest Pentium III microprocessor applications as well as the next generation P6 family processors. These products feature a patented topology that in combination with a few external components
as shown in the typical application circuit ,will provide in
excess of 20A of output current for an on- board DC/DC
converter while automatically providing the right output
voltage via the 5 bit internal DAC.These devices also
features, loss less current sensing by using the Rds-
on of the high side Power MOSFET as the sensing
resistor, a Power Good window comparator that switches
its open collector output low when the output is outside
of a ±10% window and an OVP output. Other features of
the device are ; Undervoltage lockout for both 5V and
12V supplies , an external programmable soft start function as well as programming the oscillator frequency by
using an external capacitor.
TYPICAL APPLICATIONTYPICAL APPLICATION
5V
C1
12V
Notes: Pentium II and Pentium III are
trade marks of Intel Corp.
L1 L2
C5 R1
C3
1882
NC/Gnd
11
SS
3
C2
VID4
VID3
VID2
VID1
VID0
Q1
R2 R3
C6
D1 C4
14
HDrv LDrv
CS+ Gnd NC/Sen
D3 D2D4 D1 D0
7
Boot
US3011
6155134
PACKAGE ORDER INFORMATIONPACKAGE ORDER INFORMATION
Ta (°C) Device Package VID Voltage Range
0 TO 70 US3011CW 20 pin Plastic SOIC WB 1.3V to 3.5V
CS-V12 NC/
C7
Q2
171216201
V5/Comp
OVP PGdCt/Rt
19
C8
R4
Vfb
10
9
C10
C11
R9
R7
C12
C13
R5
C9
R8
R6
C14
3011app1-1.1
Power Good
OVP
Rev. 1.3
12/8/00
4-1
US3011
ABSOLUTE MAXIMUM RATINGSABSOLUTE MAXIMUM RATINGS
V5 supply Voltage ........................................... 7V
V12 Supply Voltage ............................................ 20V
Storage Temperature Range ................................. -65 TO 150°C
Operating Junction Temperature Range .......... 0 TO 125°C
PACKAGE INFORMATIONPACKAGE INFORMATION
20 PIN WIDE BODY PLASTIC SOIC (W)
TOP VIEW
1
NC
2
CS+
3
SS
4
D0
5
D1
6
D2
7
D3
8
D4
9
V5
10
Vfb
θJA =85°C/W
20
Ct
19
OVP
18
V12
17
LDrv
16
Gnd
15
NC
14
HDrv
13
CS-
12
PGd
11
NC
ELECTRICAL SPECIFICATIONSELECTRICAL SPECIFICATIONS
Unless otherwise specified ,these specifications apply over ,V12 = 12V, V5 = 5V and Ta=0 to 70°C. Typical values
refer to Ta =25°C. Low duty cycle pulse testing are used which keeps junction and case temperatures equal to the
ambient temperature.
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
VID Section
DAC output voltage 0.99Vs Vs 1.01Vs V
(note 1)
DAC Output Line Regulation 0.1 %
DAC Output Temp Variation 0.5 %
VID Input LO 0.4 V
VID Input HI 2 V
VID input internal pull-up 27 kΩ
resistor to V5
Power Good Section
Under voltage lower trip point Vout ramping down 0.89Vs 0.90Vs 0.91Vs V
Under voltage upper trip point Vout ramping up 0.92Vs V
UV Hysterises .015Vs .02Vs .025Vs V
Over voltage upper trip point Vout ramping up 1.09Vs 1.10Vs 1.11Vs V
Over voltage lower trip point Vout ramping down 1.08Vs V
OV Hysterises .015Vs .02Vs .025Vs V
Power Good Output LO RL=3mA 0.4 V
Power Good Output HI RL=5K pull up to 5V 4.8 V
Soft Start Section
Soft Start Current CS+ =0V , CS- =5V 10 uA
4-2
Rev. 1.3
12/8/00
US3011
UVLO Section
UVLO Threshold-12V Supply ramping up 9.2 10 10.8 V
UVLO Hysterises-12V 0.3 0.4 0.5 V
UVLO Threshold-5V Supply ramping up 4.1 4.3 4.5 V
UVLO Hysterises-5V 0.2 0.3 0.4 V
Error Comparator Section
Input bias current 2 uA
Input Offset Voltage -2 +2 mV
Delay to Output Vdiff=10mV 100 nS
Current Limit Section
C.S Threshold Set Current 160 200 240 uA
C.S Comp Offset Voltage -5 +5 mV
Hiccup Duty Cycle Css=0.1 uF 2 %
Supply Current
Operating Supply Current CL=3000pF
V5 20
V12 14 mA
Output Drivers Section
Rise Time CL=3000pF 70 100 nS
Fall Time CL=3000pF 70 130 nS
Dead band Time CL=3000pF 100 200 300 nS
Oscillator Section
Osc Frequency Ct=150pF 190 220 250 Khz
Osc Valley 0.2 V
Osc Peak V5 V
Over Voltage Section
OVP Drive Current 50 mA
Note 1: Vs refers to the set point voltage given in Table 1.
D4 D3 D2 D1 D0 Vs D4 D3 D2 D1 D0 Vs
0 1 1 1 1 1.30 1 1 1 1 1 2.0
0 1 1 1 0 1.35 1 1 1 1 0 2.1
0 1 1 0 1 1.40 1 1 1 0 1 2.2
0 1 1 0 0 1.45 1 1 1 0 0 2.3
0 1 0 1 1 1.50 1 1 0 1 1 2.4
0 1 0 1 0 1.55 1 1 0 1 0 2.5
0 1 0 0 1 1.60 1 1 0 0 1 2.6
0 1 0 0 0 1.65 1 1 0 0 0 2.7
0 0 1 1 1 1.70 1 0 1 1 1 2.8
0 0 1 1 0 1.75 1 0 1 1 0 2.9
0 0 1 0 1 1.80 1 0 1 0 1 3.0
0 0 1 0 0 1.85 1 0 1 0 0 3.1
0 0 0 1 1 1.90 1 0 0 1 1 3.2
0 0 0 1 0 1.95 1 0 0 1 0 3.3
0 0 0 0 1 2.00 1 0 0 0 1 3.4
0 0 0 0 0 2.05 1 0 0 0 0 3.5
Table 1 - Set point voltage vs. VID codes
Rev. 1.3
12/8/00
4-3
US3011
PIN DESCRIPTIONSPIN DESCRIPTIONS
PIN# PIN SYMBOL
4 D0
5 D1
6 D2
7 D3
8 D4
12 PGd
10 Vfb
2 CS+
13 CS3 SS
20 Ct
16 Gnd
17 LDrv
14 HDrv
18 V12
9 V5
19 OVP
15,11 NC
Pin Description
LSB input to the DAC that programs the output voltage. This pin can be pulled up externally by a 10k resistor to either 3.3V or 5V supply.
Input to the DAC that programs the output voltage.This pin can be pulled up externally by
a 10kΩ resistor to either 3.3V or 5V supply.
Input to the DAC that programs the output voltage.This pin can be pulled up externally by
a 10k resistor to either 3.3V or 5V supply.
MSB input to the DAC that programs the output voltage.This pin can be pulled up externally by a 10k resistor to either 3.3V or 5V supply.
This pin selects a range of output voltages for the DAC.
This pin is an open collector output that switches LO when the output of the converter is
not within ±10% (typ) of the nominal output voltage.When PWRGD pin switches LO the
sat voltage is less than 0.4V at 3mA.
This pin is connected directly to the output of the Core supply to provide feedback to the
Error comparator.
This pin is connected to the Drain of the power MOSFET of the Core supply and it
provides the positive sensing for the internal current sensing circuitry. An external resistor programs the C.S threshold depending on the Rds of the power MOSFET. An external
capacitor is placed in parallel with the programming resistor to provide high frequency
noise filtering.
This pin is connected to the Source of the power MOSFET for the Core supply and it
provides the negative sensing for the internal current sensing circuitry.
This pin provides the soft start for the switching regulator. An internal current source
charges an external capacitor that is conected from this pin to the GND which ramps up
the outputs of the switching regulator, preventing the outputs from overshooting as wellas
limiting the input current. The second function of the Soft Start cap is to provide long off
time for the synchronous MOSFET or the Catch diode (HICCUP) during current limiting.
This pin programs the oscillator frequency in the range of 50 kHZ to 500kHZ with an
external capacitor connected from this pin to the GND.
This pin serves as the ground pin and must be conected directly to the ground plane. A
high frequency capacitor (0.1 to 1 uF) must be connected from V5 and V12 pins to this
pin for noise free operation.
Output driver for the synchronous power MOSFET.
Output driver for the high side power MOSFET.
This pin is connected to the 12 V supply and serves as the power Vcc pin for the output
drivers.A high frequency capacitor (0.1 to 1 uF) must be connected directly from this pin
to GND pin in order to supply the peak current to the power MOSFET during the transitions.
5V supply voltage.
Over voltage comparator output.
No connect
4-4
Rev. 1.3
12/8/00
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