u blox TOBYL200, TOBYL210 System Integration Manual

Abstract

This document describes the features and the system integration of TOBY-L2 and MPCI-L2 series multi-mode cellular modules.

These modules are a complete and cost efficient LTE/3G/2G solution offering up to 150 Mb/s download and 50 Mb/s upload data rates, covering up to six LTE bands, up to five WCDMA/DC-HSPA+ bands and four GSM/EGPRS bands in the compact TOBY LGA form factor of TOBY-L2 modules or in the industry standard PCI Express Mini Card form factor of MPCI-L2 modules.

TOBY-L2 series

www.u-blox.com

UBX-13004618 - R04

MPCI-L2 series

TOBY-L2 and MPCI-L2 series

LTE/DC-HSPA+/EGPRS modules

System Integration Manual

Document Information

Title

TOBY-L2 and MPCI-L2 series

Subtitle

LTE/DC-HSPA+/EGPRS modules

Document type

System Integration Manual

Document number

UBX-13004618

Revision and date

R04

30-Sep-2014

Document status

Advance Information

Document status explanation

Objective Specification

Document contains target values. Revised and supplementary data will be published later.

Advance Information

Document contains data based on early testing. Revised and supplementary data will be published later.

Early Production Information

Document contains data from product verification. Revised and supplementary data may be published later.

Production Information

Document contains the final product specification.

Name

Type number

Firmware version

PCN / IN

TOBY-L200

TOBY-L200-00S-00

09.40

UBX-14040967

TOBY-L210

TOBY-L210-00S-00

09.40

UBX-14040967

MPCI-L200

MPCI-L200-00S-00

09.34

UBX-14040967

MPCI-L210

MPCI-L210-00S-00

09.34

UBX-14040967

This document applies to the following products:

TOBY-L2 and MPCI-L2 series - System Integration Manual

u-blox reserves all rights to this document and the information contained herein. Products, names, logos and designs described herein may in whole or in part be subject to intellectual property rights. Reproduction, use, modification or disclosure to third parties of this document or any part thereof without the express permission of u-blox is strictly prohibited.

The information contained herein is provided “as is” and u-blox assumes no liability for the use of the information. No warranty, either express or implied, is given, including but not limited, with respect to the accuracy, correctness, reliability and fitness for a particular purpose of the information. This document may be revised by u-blox at any time. For most recent documents, please visit www.u-blox.com.

u-blox® is a registered trademark of u-blox Holding AG in the EU and other countries. PCI, PCI Express, PCIe, and PCI-SIG are trademarks or registered trademarks of PCI-SIG. Microsoft and Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. ARM® is a registered trademark of ARM Limited in the EU and other countries. All other registered trademarks or trademarks mentioned in this document are property of their respective owners.

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Preface

u-blox Technical Documentation

As part of our commitment to customer support, u-blox maintains an extensive volume of technical documentation for our products. In addition to our product-specific technical data sheets, the following manuals are available to assist u-blox customers in product design and development.

 AT Commands Manual: This document provides the description of the AT commands supported by the

u-blox cellular modules.

 System Integration Manual: This document provides the description of u-blox cellular modules’ system

from the hardware and the software point of view, it provides hardware design guidelines for the optimal integration of the cellular modules in the application device and it provides information on how to set up production and final product tests on application devices integrating the cellular modules.

 Application Note: These documents provide guidelines and information on specific hardware and/or

software topics on u-blox cellular modules. See Related documents for a list of Application Notes related to your Cellular Module.

How to use this Manual

The TOBY-L2 and MPCI-L2 series System Integration Manual provides the necessary information to successfully design and configure the u-blox cellular modules.

This manual has a modular structure. It is not necessary to read it from the beginning to the end. The following symbols are used to highlight important information within the manual:

An index finger points out key information pertaining to module integration and performance.

A warning symbol indicates actions that could negatively impact or damage the module.

Questions

If you have any questions about u-blox Cellular Integration:

 Read this manual carefully.  Contact our information service on the homepage http://www.u-blox.com/

Technical Support

Worldwide Web

Our website (http://www.u-blox.com/) is a rich pool of information. Product information, technical documents can be accessed 24h a day.

By E-mail

Contact the closest Technical Support office by email. Use our service pool email addresses rather than any personal email address of our staff. This makes sure that your request is processed as soon as possible. You will find the contact details at the end of the document.

Helpful Information when Contacting Technical Support

When contacting Technical Support, have the following information ready:

 Module type (TOBY-L200) and firmware version  Module configuration  Clear description of your question or the problem  A short description of the application  Your complete contact details

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Contents

Preface ................................................................................................................................ 3

Contents .............................................................................................................................. 4

1 System description ....................................................................................................... 8

1.1 Overview .............................................................................................................................................. 8

1.2 Architecture ........................................................................................................................................ 10

1.2.1 Internal blocks ............................................................................................................................. 11

1.3 Pin-out ............................................................................................................................................... 12

1.3.1 TOBY-L2 series pin assignment .................................................................................................... 12

1.3.2 MPCI-L2 series pin assignment .................................................................................................... 16

1.4 Operating modes ................................................................................................................................ 18

1.5 Supply interfaces ................................................................................................................................ 20

1.5.1 Module supply input (VCC or 3.3Vaux) ....................................................................................... 20

1.5.2 RTC supply input/output (V_BCKP) .............................................................................................. 27

1.5.3 Generic digital interfaces supply output (V_INT) ........................................................................... 28

1.6 System function interfaces .................................................................................................................. 29

1.6.1 Module power-on ....................................................................................................................... 29

1.6.2 Module power-off ....................................................................................................................... 31

1.6.3 Module reset ............................................................................................................................... 33

1.6.4 Module configuration selection by host processor ....................................................................... 33

1.7 Antenna interface ............................................................................................................................... 34

1.7.1 Antenna RF interfaces (ANT1 / ANT2) .......................................................................................... 34

1.7.2 Antenna detection interface (ANT_DET) ...................................................................................... 37

1.8 SIM interface ...................................................................................................................................... 37

1.8.1 SIM interface ............................................................................................................................... 37

1.8.2 SIM detection interface ............................................................................................................... 37

1.9 Data communication interfaces .......................................................................................................... 38

1.9.1 Universal Serial Bus (USB) ............................................................................................................ 38

1.9.2 Asynchronous serial interface (UART)........................................................................................... 42

1.9.3 DDC (I2C) interface ...................................................................................................................... 44

1.9.4 Secure Digital Input Output interface (SDIO) ................................................................................ 45

1.10 Audio .............................................................................................................................................. 45

1.10.1 Digital audio over I2S interface ..................................................................................................... 45

1.11 General Purpose Input/Output ........................................................................................................ 46

1.12 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#) .................................................................. 47

1.13 Reserved pins (RSVD) ...................................................................................................................... 47

1.14 Not connected pins (NC) ................................................................................................................. 47

1.15 System features............................................................................................................................... 48

1.15.1 Network indication ...................................................................................................................... 48

1.15.2 Antenna supervisor ..................................................................................................................... 48

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1.15.3 Jamming detection ...................................................................................................................... 48

1.15.4 IP modes of operation ................................................................................................................. 49

1.15.5 Dual stack IPv4/IPv6 ..................................................................................................................... 49

1.15.6 TCP/IP and UDP/IP ....................................................................................................................... 49

1.15.7 FTP and FTPS ............................................................................................................................... 49

1.15.8 HTTP and HTTPS .......................................................................................................................... 50

1.15.9 SSL .............................................................................................................................................. 50

1.15.10 AssistNow clients and GNSS integration ................................................................................... 50

1.15.11 Hybrid positioning and CellLocate® .......................................................................................... 50

1.15.12 Firmware update Over AT (FOAT)............................................................................................. 53

1.15.13 Firmware update Over The Air (FOTA) ...................................................................................... 53

1.15.14 In-band Modem (eCall / ERA-GLONASS) .................................................................................. 54

1.15.15 SIM Access Profile (SAP) ........................................................................................................... 54

1.15.16 Smart temperature management ............................................................................................. 56

1.15.17 Power saving ........................................................................................................................... 58

2 Design-in ..................................................................................................................... 59

2.1 Overview ............................................................................................................................................ 59

2.2 Supply interfaces ................................................................................................................................ 60

2.2.1 Module supply (VCC or 3.3Vaux)................................................................................................. 60

2.2.2 RTC supply output (V_BCKP) ....................................................................................................... 72

2.2.3 Generic digital interfaces supply output (V_INT) ........................................................................... 74

2.3 System functions interfaces ................................................................................................................ 75

2.3.1 Module power-on (PWR_ON) ...................................................................................................... 75

2.3.2 Module reset (RESET_N or PERST#) .............................................................................................. 76

2.3.3 Module configuration selection by host processor ....................................................................... 77

2.4 Antenna interface ............................................................................................................................... 78

2.4.1 Antenna RF interfaces (ANT1 / ANT2) .......................................................................................... 78

2.4.2 Antenna detection interface (ANT_DET) ...................................................................................... 86

2.5 SIM interface ...................................................................................................................................... 88

2.5.1 Guidelines for SIM circuit design.................................................................................................. 88

2.5.2 Guidelines for SIM layout design ................................................................................................. 94

2.6 Data communication interfaces .......................................................................................................... 95

2.6.1 Universal Serial Bus (USB) ............................................................................................................ 95

2.6.2 Asynchronous serial interface (UART)........................................................................................... 97

2.6.3 DDC (I2C) interface .................................................................................................................... 101

2.6.4 Secure Digital Input Output interface (SDIO) .............................................................................. 105

2.7 Audio interface ................................................................................................................................. 106

2.7.1 Digital audio interface ............................................................................................................... 106

2.8 General Purpose Input/Output .......................................................................................................... 108

2.9 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#) .................................................................... 109

2.10 Reserved pins (RSVD) .................................................................................................................... 110

2.11 Module placement ........................................................................................................................ 111

2.12 TOBY-L2 series module footprint and paste mask ......................................................................... 112

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2.13 MPCI-L2 series module installation ................................................................................................ 113

2.14 Thermal guidelines ........................................................................................................................ 115

2.15 ESD guidelines .............................................................................................................................. 116

2.15.1 ESD immunity test overview ...................................................................................................... 116

2.15.2 ESD immunity test of TOBY-L2 and MPCI-L2 series reference designs ........................................ 117

2.15.3 ESD application circuits .............................................................................................................. 117

2.16 Schematic for TOBY-L2 and MPCI-L2 series module integration .................................................... 118

2.17 Design-in checklist ........................................................................................................................ 120

2.17.1 Schematic checklist ................................................................................................................... 120

2.17.2 Layout checklist ......................................................................................................................... 121

2.17.3 Antenna checklist ...................................................................................................................... 121

3 Handling and soldering ........................................................................................... 122

3.1 Packaging, shipping, storage and moisture preconditioning ............................................................. 122

3.2 Handling ........................................................................................................................................... 122

3.3 Soldering .......................................................................................................................................... 123

3.3.1 Soldering paste.......................................................................................................................... 123

3.3.2 Reflow soldering ....................................................................................................................... 123

3.3.3 Optical inspection ...................................................................................................................... 124

3.3.4 Cleaning .................................................................................................................................... 124

3.3.5 Repeated reflow soldering ......................................................................................................... 125

3.3.6 Wave soldering.......................................................................................................................... 125

3.3.7 Hand soldering .......................................................................................................................... 125

3.3.8 Rework ...................................................................................................................................... 125

3.3.9 Conformal coating .................................................................................................................... 125

3.3.10 Casting ...................................................................................................................................... 125

3.3.11 Grounding metal covers ............................................................................................................ 125

3.3.12 Use of ultrasonic processes ........................................................................................................ 125

4 Approvals .................................................................................................................. 126

4.1 Product certification approval overview ............................................................................................. 126

4.2 Federal Communications Commission and Industry Canada notice ................................................... 127

4.2.1 Safety warnings review the structure ......................................................................................... 127

4.2.2 Declaration of Conformity – United States only ......................................................................... 127

4.2.3 Modifications ............................................................................................................................ 127

4.3 R&TTED and European Conformance CE mark ................................................................................. 129

5 Product testing ......................................................................................................... 130

5.1 u-blox in-series production test ......................................................................................................... 130

5.2 Test parameters for OEM manufacturer ............................................................................................ 131

5.2.1 “Go/No go” tests for integrated devices .................................................................................... 131

5.2.2 RF functional tests ..................................................................................................................... 131

Appendix ........................................................................................................................ 133

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A Glossary .................................................................................................................... 133

B Migration between TOBY-L1 and TOBY-L2 ............................................................ 135

B.1 Overview .......................................................................................................................................... 135

B.2 Pin-out comparison between TOBY-L1 and TOBY-L2 ........................................................................ 136

B.3 Schematic for TOBY-L1 and TOBY-L2 integration .............................................................................. 138

Related documents......................................................................................................... 139

Revision history .............................................................................................................. 140

Contact ............................................................................................................................ 141

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Module

LTE

UMTS

GSM

Positioning

Interfaces

Audio

Features

LTE category

Bands

HSDPA category

HSUPA category

Bands

GPRS/EDGE multi-slot class

Bands

GNSS receiver

GNSS Via Modem

Assist Now Software

CellLocate

UART

USB 2.0

SDIO

DCC (I

GPIOs

MIMO 2x2 / Rx Diversity

Analog audio

Digital Audio

Network indication

Antenna supervisor

Jamming detection

Embedded TCP/UDP stack

Embedded HTTP,FTP,SSL

FOTA

eCall / ERA GLONASS

Dual stack IPv4/IPv6

TOBY-L200

2,4,5,

7,17

850/900/AWS

1900/2100

Quad

F F F F • F F F • F • F F F F F F

•

TOBY-L210

1,3,5,

7,8,20

850/900

1900/2100

Quad

F F F F • F F F • F • F F F F F F

•

MPCI-L200

2,4,5,

7,17

850/900/AWS

1900/2100

Quad • • • F F F F •

MPCI-L210

1,3,5,

7,8,20

850/900

1900/2100

Quad • • • F F F F •

F = will be supported in future product version “01”

1 System description

1.1 Overview

TOBY-L2 and MPCI-L2 series comprises LTE/3G/2G multi-mode modules supporting up to six LTE bands, up to five UMTS/DC-HSPA+ bands and four GSM/(E)GPRS bands for voice and/or data transmission as following:

 TOBY-L200 and MPCI-L200 are designed primarily for operation in America  TOBY-L210 and MPCI-L210 are designed primarily for operation in Europe, Asia and other countries

TOBY-L2 and MPCI-L2 series are designed in two different form-factors suitable for applications as following:

 TOBY-L2 modules are designed in the small TOBY 152-pin Land Grid Array form-factor (35.6 x 24.8 mm),

easy to integrate in compact designs and form-factor compatible with the u-blox cellular module families: this allows customers to take the maximum advantage of their hardware and software investments, and provides very short time-to-market.

 MPCI-L2 modules are designed in the industry standard PCI Express Full-Mini Card form-factor (51 x 30 mm)

easy to integrate into industrial and consumer applications and also ideal for manufacturing of small series.

With LTE Category 4 data rates at up to 150 Mb/s (down-link) and 50 Mb/s (up-link), the modules are ideal for applications requiring the highest data-rates and high-speed internet access. TOBY-L2 and MPCI-L2 series modules are the perfect choice for consumer fixed-wireless terminals, mobile routers and gateways, and applications requiring video streaming. They are also optimally suited for industrial (M2M) applications, such as remote access to video cameras, digital signage, telehealth, and security and surveillance systems.

Table 1 summarizes the TOBY-L2 and MPCI-L2 series main features and interfaces.

Table 1: TOBY-L2 and MPCI-L2 series main features summary

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4G LTE

3G UMTS/HSDPA/HSUPA

2G GSM/GPRS/EDGE

3GPP Release 9 Long Term Evolution (LTE) Evolved Uni.Terrestrial Radio Access (E-UTRA) Frequency Division Duplex (FDD) DL Multi-Input Multi-Output (MIMO) 2 x 2

3GPP Release 8 Dual-Cell HS Packet Access (DC-HSPA+) UMTS Terrestrial Radio Access (UTRA) Frequency Division Duplex (FDD) DL Rx diversity

3GPP Release 8 Enhanced Data rate GSM Evolution (EDGE) GSM EGPRS Radio Access (GERA) Time Division Multiple Access (TDMA) DL Advanced Rx Performance (DARP) Phase 1

Band support:

 TOBY-L200 / MPCI-L200:

 Band 17 (700 MHz)  Band 5 (850 MHz)  Band 4 (1700 MHz)  Band 2 (1900 MHz)  Band 7 (2600 MHz)

 TOBY-L210 / MPCI-L210:

 Band 20 (800 MHz)  Band 5 (850 MHz)  Band 8 (900 MHz)  Band 3 (1800 MHz)  Band 1 (2100 MHz)  Band 7 (2600 MHz)

Band support:

 TOBY-L200 / MPCI-L200:

 Band 5 (850 MHz)  Band 8 (900 MHz)  Band 4 (AWS, 1700 MHz)  Band 2 (1900 MHz)  Band 1 (2100 MHz)

 TOBY-L210 / MPCI-L210:

 Band 5 (850 MHz)  Band 8 (900 MHz)  Band 2 (1900 MHz)  Band 1 (2100 MHz)

Band support

 TOBY-L200 / MPCI-L200:

 GSM 850 MHz  E-GSM 900 MHz  DCS 1800 MHz  PCS 1900 MHz

 TOBY-L210 / MPCI-L210:

 GSM 850 MHz  E-GSM 900 MHz  DCS 1800 MHz  PCS 1900 MHz

LTE Power Class  Power Class 3 (23 dBm)

for LTE mode

WCDMA/HSDPA/HSUPA Power Class  Power Class 3 (24 dBm)

for UMTS/HSDPA/HSUPA mode

GSM/GPRS Power Class  Power Class 4 (33 dBm)

for GSM/E-GSM bands

 Power Class 1 (30 dBm)

for DCS/PCS bands

EDGE Power Class  Power Class E2 (27 dBm)

for GSM/E-GSM bands

 Power Class E2 (26 dBm)

for DCS/PCS bands

Data rate  LTE category 4:

up to 150 Mb/s DL, 50 Mb/s UL

Data rate

 TOBY-L200 / MPCI-L200:

 HSDPA cat.14, up to 21 Mb/s DL

 HSUPA cat.6, up to 5.6 Mb/s UL

 TOBY-L210 / MPCI-L210:

 HSDPA cat.24, up to 42 Mb/s DL  HSUPA cat.6, up to 5.6 Mb/s UL

Data rate2  GPRS multi-slot class 12

, CS1-CS4,

up to 85.6 kb/s DL/UL

 EDGE multi-slot class 12

, MCS1-MCS9

up to 236.8 kb/s DL/UL

Table 2 reports a summary of LTE, 3G and 2G cellular radio access technologies characteristics and features of the TOBY-L2 and MPCI-L2 series modules.

Table 2: TOBY-L2 and MPCI-L2 series LTE, 3G and 2G characteristics summary

HSDPA category 24 capable GPRS/EDGE multi-slot class determines the number of timeslots available for upload and download and thus the speed at which data can

be transmitted and received, with higher classes typically allowing faster data transfer rates.

GPRS/EDGE multi-slot class 12 implies a maximum of 4 slots in DL (reception) and 4 slots in UL (transmission) with 5 slots in total.

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Cellular

Base-band

Processor

Memory

Power Management Unit

26 MHz

32.768 kHz

ANT1

Transceiver

ANT2

V_INT (I/O)

V_BCKP (RTC)

VCC (Supply)

SIM

USB

GPIO

Power On

External Reset

PAs

LNAs Filters

Filters

Duplexer

Filters

PAs

LNAs Filters

Filters

Duplexer

Filters

LNAs FiltersFilters

Switch

DDC(I2C)

SDIO

UART

Digital audio (I2S)

ANT_DET

Host Select

ANT1

SIM

USB

W_DISABLE#

TOBY-L2

series

Signal

Conditioning

ANT2

PERST#

LED_WWAN#

U.FL

3.3Vaux (Supply)

Boost

Converter

VCC

1.2 Architecture

Figure 1 summarizes the internal architecture of TOBY-L2 series modules.

Figure 1: TOBY-L2 series block diagram

As described in the Figure 2, each MPCI-L2 series module integrates one TOBY-L2 series module:

 The MPCI-L200 integrates a TOBY-L200 module  The MPCI-L210 integrates a TOBY-L210 module

The TOBY-L2 module represents the core of the device, providing the related LTE/3G/2G modem and processing functionalities. Additional signal conditioning circuitry is implemented for PCI Express Mini Card compliance, and two UF.L connectors are available for easy antenna integration.

Figure 2: MPCI-L2 series block diagram

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1.2.1 Internal blocks

As described in Figure 2, each MPCI-L2 series module integrates one TOBY-L2 series module, which consists of the following internal sections: RF, baseband and power management.

RF section

The RF section is composed of RF transceiver, PAs, LNAs, crystal oscillator, filters, duplexers and RF switches. Tx signal is pre-amplified by RF transceiver, then output to the primary antenna input/output port (ANT1) of the

module via power amplifier (PA), SAW band pass filters band, specific duplexer and antenna switch. Dual receiving paths are implemented according to LTE Down-Link MIMO 2 x 2 and 3G Receiver Diversity radio

technologies supported by the modules as LTE category 4 and HSDPA category 24 User Equipments: incoming signals are received through the primary (ANT1) and the secondary (ANT2) antenna input ports which are connected to the RF transceiver via specific antenna switch, diplexer, duplexer, LNA, SAW band pass filters.

 RF transceiver performs modulation, up-conversion of the baseband I/Q signals for Tx, down-conversion and

demodulation of the dual RF signals for Rx. The RF transceiver contains:

Automatically gain controlled direct conversion Zero-IF receiver, Highly linear RF demodulator / modulator capable GMSK, 8-PSK, QPSK, 16-QAM, 64-QAM, Fractional-N Sigma-Delta RF synthesizer, VCO.

 Power Amplifiers (PA) amplify the Tx signal modulated by the RF transceiver  RF switches connect primary (ANT1) and secondary (ANT2) antenna ports to the suitable Tx / Rx path  Low Noise Amplifiers (LNA) enhance the received sensitivity  SAW duplexers separate the Tx and Rx signal paths and provide RF filtering  SAW band pass filters enhance the rejection of out-of-band signals  26 MHz crystal oscillator generates the clock reference in active-mode or connected-mode.

Baseband and power management section

The Baseband and Power Management section is composed of the following main elements:

 A mixed signal ASIC, which integrates

Microprocessor for control functions DSP core for LTE/3G/2G Layer 1 and digital processing of Rx and Tx signal paths Memory interface controller Dedicated peripheral blocks for control of the USB, SIM and GPIO digital interfaces Analog front end interfaces to RF transceiver ASIC

 Memory system, which includes NAND flash and LPDDR  Voltage regulators to derive all the subsystem supply voltages from the module supply input VCC  Voltage sources for external use: V_BCKP and V_INT (not available on MPCI-L2 series modules)  Hardware power on  Hardware reset  Low power idle-mode support  32.768 kHz crystal oscillator to provide the clock reference in the low power idle-mode, which can be set by

enable power saving configuration using the AT+UPSV command.

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Function

Pin Name

Pin No

I/O

Description

Remarks

Power

VCC

70,71,72

Module supply input

VCC pins are internally connected each other. VCC supply circuit affects the RF performance and

compliance of the device integrating the module with applicable required certification schemes. See section 1.5.1 for functional description and requirements for the VCC module supply. See section 2.2.1 for external circuit design-in.

GND

2, 30, 32, 44, 46, 69, 73, 74, 76, 78, 79, 80, 82, 83, 85, 86, 88-90, 92-152

N/A

Ground

GND pins are internally connected each other. External ground connection affects the RF and thermal performance of the device. See section 1.5.1 for functional description. See section 2.2.1 for external circuit design-in.

V_BCKP

I/O

RTC supply input/output

V_BCKP = 3.0 V (typical) generated by internal regulator when valid VCC supply is present. See section 1.5.2 for functional description. See section 2.2.2 for external circuit design-in.

V_INT

5 O Generic digital interfaces supply output

V_INT = 1.8 V (typical) generated by internal regulator when the module is switched on. See section 1.5.3 for functional description. See section 2.2.3 for external circuit design-in.

System

PWR_ON

20 I Power-on input

Internal active pull-up to the VCC enabled. See section 1.6.1 for functional description. See section 2.3.1 for external circuit design-in.

RESET_N

23 I External reset input

Internal active pull-up to the VCC enabled. See section 1.6.3 for functional description. See section 2.3.2 for external circuit design-in.

HOST_SELECT0

26 I Selection of module configuration by the host processor

Note: Not supported by TOBY-L2x0-00S product version See section 1.6.4 for functional description. See section 2.3.3 for external circuit design-in.

HOST_SELECT1

62 I Selection of module configuration by the host processor

Note: Not supported by TOBY-L2x0-00S product version See section 1.6.4 for functional description. See section 2.3.3 for external circuit design-in.

Antennas

ANT1

I/O

Primary antenna

Main Tx / Rx antenna interface. 50  nominal characteristic impedance. Antenna circuit affects the RF performance and application

device compliance with required certification schemes. See section 1.7 for functional description / requirements. See section 2.4 for external circuit design-in.

ANT2

87 I Secondary antenna

Rx only for MIMO 2x2 and Rx diversity. 50  nominal characteristic impedance. Antenna circuit affects the RF performance and application

device compliance with required certification schemes. See section 1.7 for functional description / requirements See section 2.4 for external circuit design-in.

ANT_DET

75 I Antenna detection

Note: antenna detection not supported by TOBY-L2x0-00S. See section 1.7.2 for functional description. See section 2.4.2 for external circuit design-in.

1.3 Pin-out

1.3.1 TOBY-L2 series pin assignment

Table 3 lists the pin-out of the TOBY-L2 series modules, with pins grouped by function.

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Function

Pin Name

Pin No

I/O

Description

Remarks

SIM

VSIM

59 O SIM supply output

VSIM = 1.8 V / 3 V automatically generated according to the connected SIM type.

See section 1.8 for functional description. See section 2.5 for external circuit design-in.

SIM_IO

I/O

SIM data

Data input/output for 1.8 V / 3 V SIM Internal 4.7 k pull-up to VSIM. See section 1.8 for functional description. See section 2.5 for external circuit design-in.

SIM_CLK

56 O SIM clock

3.25 MHz clock output for 1.8 V / 3 V SIM See section 1.8 for functional description. See section 2.5 for external circuit design-in.

SIM_RST

58 O SIM reset

Reset output for 1.8 V / 3 V SIM See section 1.8 for functional description. See section 2.5 for external circuit design-in.

USB

VUSB_DET

4 I USB detect input

Input for VBUS (5 V typical) USB supply sense. See section 1.9.1 for functional description. See section 2.6.1 for external circuit design-in.

USB_D-

I/O

USB Data Line D-

USB interface for AT commands, data communication, FOAT, FW update by u-blox EasyFlash tool and diagnostic.

90  nominal differential impedance (Z0) 30  nominal common mode impedance (Z

) Pull-up or pull-down resistors and external series resistors as required by the USB 2.0 specifications [4] are part of the USB pad driver and need not be provided externally. See section 1.9.1 for functional description. See section 2.6.1 for external circuit design-in.

USB_D+

I/O

USB Data Line D+

USB interface for AT commands, data communication, FOAT, FW update by u-blox EasyFlash tool and diagnostic.

90  nominal differential impedance (Z0) 30  nominal common mode impedance (Z

UART

RXD

17 O UART data output

Note: UART not supported by TOBY-L2x0-00S.

1.8 V output, Circuit 104 (RXD) in ITU-T V.24, for AT command, data communication, FOAT.

Add Test-Point and series 0  to access for diagnostic. See section 1.9.2 for functional description. See section 2.6.2 for external circuit design-in.

TXD

16 I UART data input

Note: UART not supported by TOBY-L2x0-00S.

1.8 V input, Circuit 103 (TXD) in ITU-T V.24, for AT command, data communication, FOAT.

Add Test-Point and series 0  to access for diagnostic. See section 1.9.2 for functional description. See section 2.6.2 for external circuit design-in.

CTS

15 O UART clear to send output

Note: UART not supported by TOBY-L2x0-00S.

1.8 V output, Circuit 106 (CTS) in ITU-T V.24. Add Test-Point and series 0  to access for diagnostic. See section 1.9.2 for functional description. See section 2.6.2 for external circuit design-in.

RTS

14 I UART ready to send input

Note: UART not supported by TOBY-L2x0-00S.

1.8 V input, Circuit 105 (RTS) in ITU-T V.24. Add Test-Point and series 0  to access for diagnostic. See section 1.9.2 for functional description. See section 2.6.2 for external circuit design-in.

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Function

Pin Name

Pin No

I/O

Description

Remarks

DSR

O / I/O

UART data set ready output / GPIO

Note: UART / GPIO not supported by TOBY-L2x0-00S.

1.8 V, Circuit 107 in ITU-T V.24, configurable as GPIO. Add Test-Point and series 0  to access for diagnostic. See section 1.9.2 and 1.11 for functional description. See section 2.6.2 and 2.8 for external circuit design-in.

O / I/O

UART ring indicator output / GPIO

Note: UART / GPIO not supported by TOBY-L2x0-00S.

1.8 V, Circuit 125 in ITU-T V.24, configurable as GPIO. Add Test-Point and series 0  to access for diagnostic. See section 1.9.2 and 1.11 for functional description. See section 2.6.2 and 2.8 for external circuit design-in.

DTR

I / I/O

UART data terminal ready input / GPIO

Note: UART / GPIO not supported by TOBY-L2x0-00S.

1.8 V, Circuit 108/2 in ITU-T V.24, configurable as GPIO. Add Test-Point and series 0  to access for diagnostic. See section 1.9.2 and 1.11 for functional description. See section 2.6.2 and 2.8 for external circuit design-in.

DCD

O / I/O

UART data carrier detect output / GPIO

Note: UART / GPIO not supported by TOBY-L2x0-00S.

1.8 V, Circuit 109 in ITU-T V.24, configurable as GPIO. Add Test-Point and series 0  to access for diagnostic. See section 1.9.2 and 1.11 for functional description. See section 2.6.2 and 2.8 for external circuit design-in.

DDC

SCL

54 O I2C bus clock line

Note: I2C not supported by TOBY-L2x0-00S.

1.8 V open drain, for communication with u-blox GNSS receivers and other I2C-slave devices as an audio codec. External pull-up required. See section 1.9.3 for functional description. See section 2.6.3 for external circuit design-in.

SDA

I/O

I2C bus data line

Note: I2C not supported by TOBY-L2x0-00S.

SDIO

SDIO_D0

I/O

SDIO serial data [0]

Note: SDIO not supported by TOBY-L2x0-00S. SDIO interface for communication with external Wi-Fi chip See section 1.9.4 for functional description. See section 2.6.4 for external circuit design-in.

SDIO_D1

I/O

SDIO serial data [1]

Note: Not supported by TOBY-L2x0-00S. SDIO interface for communication with external Wi-Fi chip See section 1.9.4 for functional description. See section 2.6.4 for external circuit design-in.

SDIO_D2

I/O

SDIO serial data [2]

Note: SDIO not supported by TOBY-L2x0-00S. SDIO interface for communication with external Wi-Fi chip See section 1.9.4 for functional description. See section 2.6.4 for external circuit design-in.

SDIO_D3

I/O

SDIO serial data [3]

Note: SDIO not supported by TOBY-L2x0-00S. SDIO interface for communication with external Wi-Fi chip See section 1.9.4 for functional description. See section 2.6.4 for external circuit design-in.

SDIO_CLK

64 O SDIO serial clock

Note: SDIO not supported by TOBY-L2x0-00S. SDIO interface for communication with external Wi-Fi chip See section 1.9.4 for functional description. See section 2.6.4 for external circuit design-in.

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Function

Pin Name

Pin No

I/O

Description

Remarks

SDIO_CMD

I/O

SDIO command

Note: SDIO not supported by TOBY-L2x0-00S. SDIO interface for communication with external Wi-Fi chip See section 1.9.4 for functional description. See section 2.6.4 for external circuit design-in.

Audio

I2S_TXD

O / I/O

I2S transmit data / GPIO

Note: I2S and GPIO not supported by TOBY-L2x0-00S. I2S transmit data output, alternatively configurable as GPIO. See sections 1.10 and 1.11 for functional description. See sections 2.7 and 2.8 for external circuit design-in.

I2S_RXD

I / I/O

I2S receive data / GPIO

Note: I2S and GPIO not supported by TOBY-L2x0-00S. I2S receive data input, alternatively configurable as GPIO. See sections 1.10 and 1.11 for functional description. See sections 2.7 and 2.8 for external circuit design-in.

I2S_CLK

I/O / I/O

I2S clock / GPIO

Note: I2S and GPIO not supported by TOBY-L2x0-00S. I2S serial clock, alternatively configurable as GPIO. See sections 1.10 and 1.11 for functional description. See sections 2.7 and 2.8 for external circuit design-in.

I2S_WA

I/O / I/O

I2S word alignment / GPIO

Note: I2S and GPIO not supported by TOBY-L2x0-00S. I2S word alignment, alternatively configurable as GPIO. Note: I2S not supported by TOBY-L2x0-00S. See sections 1.10 and 1.11 for functional description. See sections 2.7 and 2.8 for external circuit design-in.

GPIO

GPIO1

I/O

GPIO

Note: GPIO not supported by TOBY-L2x0-00S except for Wireless Network status indication configured on GPIO1.

1.8 V GPIO with alternatively configurable functions See section 1.11 for functional description. See section 2.8 for external circuit design-in.

GPIO2

I/O

GPIO

Note: GPIO not supported by TOBY-L2x0-00S.

1.8 V GPIO with alternatively configurable functions See section 1.11 for functional description. See section 2.8 for external circuit design-in.

GPIO3

I/O

GPIO

Note: GPIO not supported by TOBY-L2x0-00S.

1.8 V GPIO with alternatively configurable functions See section 1.11 for functional description. See section 2.8 for external circuit design-in.

GPIO4

I/O

GPIO

Note: GPIO not supported by TOBY-L2x0-00S.

1.8 V GPIO with alternatively configurable functions See section 1.11 for functional description. See section 2.8 for external circuit design-in.

GPIO5

I/O

GPIO

Note: GPIO not supported by TOBY-L2x0-00S.

1.8 V GPIO with alternatively configurable functions See section 1.11 for functional description. See section 2.8 for external circuit design-in.

GPIO6

I/O

GPIO

Note: GPIO not supported by TOBY-L2x0-00S.

1.8 V GPIO See section 1.11 for functional description. See section 2.8 for external circuit design-in.

Reserved

RSVD

N/A

Reserved pin

This pin must be connected to ground. See section 2.10

RSVD

1, 7-9, 18, 19, 29, 31, 33-43, 45, 47-49, 77, 84, 91

N/A

Reserved pin

Leave unconnected. See section 2.10

Table 3: TOBY-L2 series module pin definition, grouped by function

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Function

Pin Name

Pin No

I/O

Description

Remarks

Power

3.3Vaux

2, 24, 39, 41, 52

Module supply input

3.3Vaux pins are internally connected each other.

3.3Vaux supply circuit affects the RF performance and

compliance of the device integrating the module with applicable required certification schemes. See section 1.5.1 for functional description and requirements for the 3.3Vaux module supply. See section 2.2.1 for external circuit design-in.

GND

4, 9, 15, 18, 21, 26, 27, 29, 34, 35, 37, 40, 43, 50

N/A

Ground

Auxiliary Signals

PERST#

22 I External reset input

Internal 45 k pull-up to 3.3 V supply. See section 1.6.3 for functional description. See section 2.3.2 for external circuit design-in.

Antennas

ANT1

U.FL

I/O

Primary antenna

Main Tx / Rx antenna interface. 50  nominal characteristic impedance. Antenna circuit affects the RF performance and

compliance of the device integrating the module with applicable required certification schemes. See section 1.7 for functional description / requirements.

See section 2.4 for external circuit design-in.

ANT2

U.FL I Secondary antenna

Rx only for MIMO 2x2 and Rx diversity. 50  nominal characteristic impedance. Antenna circuit affects the RF performance and

compliance of the device integrating the module with applicable required certification schemes. See section 1.7 for functional description / requirements See section 2.4 for external circuit design-in.

SIM

UIM_PWR

8 O SIM supply output

UIM_PWR = 1.8 V / 3 V automatically generated according to the connected SIM type. See section 1.8 for functional description. See section 2.5 for external circuit design-in.

UIM_DATA

I/O

SIM data

Data input/output for 1.8 V / 3 V SIM Internal 4.7 k pull-up to UIM_PWR. See section 1.8 for functional description. See section 2.5 for external circuit design-in.

UIM_CLK

12 O SIM clock

3.25 MHz clock output for 1.8 V / 3 V SIM See section 1.8 for functional description. See section 2.5 for external circuit design-in.

UIM_RESET

14 O SIM reset

Reset output for 1.8 V / 3 V SIM See section 1.8 for functional description. See section 2.5 for external circuit design-in.

1.3.2 MPCI-L2 series pin assignment

Table 4 lists the pin-out of the MPCI-L2 series modules, with pins grouped by function.

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Function

Pin Name

Pin No

I/O

Description

Remarks

USB

USB_D-

I/O

USB Data Line D-

USB interface for AT commands, data communication, FOAT, FW update by u-blox EasyFlash tool and diagnostic.

90  nominal differential impedance (Z0) 30  nominal common mode impedance (Z

USB_D+

I/O

USB Data Line D+

USB interface for AT commands, data communication, FOAT, FW update by u-blox EasyFlash tool and diagnostic.

90  nominal differential impedance (Z0) 30  nominal common mode impedance (Z

Specific Signals

LED_WWAN#

42 O LED indicator output

Open drain active low output. See section 1.12 for functional description. See section 2.9 for external circuit design-in.

W_DISABLE#

20 I Wireless radio disable input

Internal 22 k pull-up to 3.3Vaux. See section 1.12 for functional description. See section 2.9 for external circuit design-in.

Not Connected

1, 3, 5-7, 11, 13, 16, 17, 19, 23, 25, 28, 30-33, 44-46, 47-49, 51

N/A

Not connected

Internally not connected. See section 1.14 for the description.

Table 4: MPCI-L2 series module pin definition, grouped by function

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General Status

Operating Mode

Definition Power-down

Not-Powered Mode

VCC or 3.3Vaux supply not present or below operating range: module is switched off.

Power-Off Mode

VCC or 3.3Vaux supply within operating range and module is switched off.

Normal Operation

Idle-Mode

Module processor core runs with 32 kHz reference generated by the internal oscillator.

Active-Mode

Module processor core runs with 26 MHz reference generated by the internal oscillator.

Connected-Mode

RF Tx/Rx data connection enabled and processor core runs with 26 MHz reference.

Operating Mode

Description

Transition between operating modes

Not-Powered Mode

Module is switched off. Application interfaces are not accessible.

When VCC or 3.3Vaux supply is removed, the modules enter not-powered mode. When in not-powered mode, TOBY-L2 modules cannot be switched on by PWR_ON, RESET_N or RTC alarm and enter active-mode after applying VCC supply (see 1.6.1). When in not-powered mode, MPCI-L2 modules cannot be switched on by RTC alarm and enter active-mode after applying 3.3Vaux supply (see 1.6.1).

Power-Off Mode

Module is switched off: normal shutdown by an appropriate power-off event (see 1.6.2). Application interfaces are not accessible. MPCI-L2 modules do not support Power-Off Mode but halt mode (see 1.6.2 and u-blox AT Commands Manual [3], AT+CFUN=127 command).

When the modules are switched off by an appropriate power-off event (see 1.6.2), the modules enter power-off mode from active-mode. When in power-off mode, TOBY-L2 modules can be switched on by PWR_ON, RESET_N or an RTC alarm. When in power-off mode, TOBY-L2 modules enter the not-powered mode after removing VCC supply.

Idle-Mode

Module is switched on with application interfaces disabled or suspended: the module is temporarily not ready to communicate with an external device by means of the application interfaces as configured to reduce the current consumption. The module enters the low power idle-mode whenever possible if power saving is enabled by AT+UPSV (see u-blox AT Commands Manual [3]) reducing current consumption (see 1.5.1.5). Power saving configuration is not enabled by default: it can be enabled by the AT+UPSV command (see the u-blox AT Commands Manual [3]).

The modules automatically switch from active-mode to low power idle-mode whenever possible if power saving is enabled (see sections 1.5.1.5, 1.9.1.4, 1.9.2.4 and u-blox AT Commands Manual [3], AT+UPSV). The modules wake up from idle-mode to active-mode in the following events:

 Automatic periodic monitoring of the paging channel

for the paging block reception according to network conditions (see 1.5.1.5)

 The connected USB host forces a remote wakeup of

the module as USB device (see 1.9.1.4)

 A preset RTC alarm occurs (see u-blox AT Commands

Manual [3], AT+CALA)

Active-Mode

Module is switched on with application interfaces enabled or not suspended: the module is ready to communicate with an external device by means of the application interfaces unless power saving configuration is enabled by AT+UPSV (see 1.9.1.4,

1.9.2.4 and u-blox AT Commands Manual [3]).

When the modules are switched on by an appropriate power-on event (see 1.6.1), the module enter active-mode from power-off mode.

If power saving configuration is enabled by the AT+UPSV command, the module automatically switches from active to idle-mode whenever possible and the module wakes up from idle to active-mode in the events listed above (see idle-mode to active-mode transition description above).

When a RF Tx/Rx data connection is initiated or when RF Tx/Rx is required due to a connection previously initiated, the module switches from active to connected-mode.

1.4 Operating modes

TOBY-L2 and MPCI-L2 series modules have several operating modes. The operating modes are defined in Table 5 and described in detail in Table 6, providing general guidelines for operation.

Table 5: TOBY-L2 and MPCI-L2 series modules operating modes definition

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Operating Mode

Description

Transition between operating modes

Connected-Mode

RF Tx/Rx data connection is in progress. The module is prepared to accept data signals from

an external device unless power saving configuration is enabled by AT+UPSV (see sections 1.9.1.4, 1.9.2.4 and u-blox AT Commands Manual [3]).

When a data connection is initiated, the module enters connected-mode from idle-mode.

If power saving configuration is enabled by the AT+UPSV command, the module automatically switches from connected to active and then idle-mode whenever possible and the module wakes up from idle to active and then connected mode if RF Transmission/Reception is necessary.

When a data connection is terminated, the module returns to the active-mode.

TOBY-L2 Switch ON:

• Apply VCC MPCI-L2 Switch ON:

• Apply 3.3Vaux

If power saving is enabled

and there is no activity for a defined time interval

Any wake up event described in the module operating

modes summary table above

Incoming/outgoing call or

other dedicated device network communication

No RF Tx/Rx in progress, Call terminated, Communication dropped

TOBY-L2x0 Switch ON:

• PWR_ON

• RESET_N

• RTC alarm

Not

powered

Power off

ActiveConnected Idle

TOBY-L2x0 Switch OFF:

• AT+CPWROFF

• RESET_N

MPCI-L2:

• Remove 3.3Vaux

TOBY-L2:

• Remove VCC

Table 6: TOBY-L2 and MPCI-L2 series modules operating modes description

Figure 3 describes the transition between the different operating modes.

Figure 3: TOBY-L2 and MPCI-L2 series modules operating modes transition

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Item

Requirement

Remark

VCC or 3.3Vaux

nominal voltage

Within VCC or 3.3Vaux normal operating range: See “Supply/Power pins” section in the TOBY-L2 Data Sheet [1] or in the MPCI-L2 Data Sheet [2].

The modules cannot be switched on if the supply voltage is below the normal operating range minimum limit.

VCC or 3.3Vaux voltage during normal operation

Within VCC or 3.3Vaux extended operating range: See “Supply/Power pins” section in the TOBY-L2 Data Sheet [1] or in the MPCI-L2 Data Sheet [2].

The modules may switch off if the supply voltage drops below the extended operating range minimum limit.

VCC or 3.3Vaux average current

Support with adequate margin the highest averaged current consumption value in connected-mode conditions specified for VCC in TOBY-L2 Data Sheet [1] or specified for 3.3Vaux in MPCI-L2 Data Sheet [2].

The maximum average current consumption can be greater than the specified value according to the actual antenna mismatching, temperature and supply voltage. Sections 1.5.1.2, 1.5.1.3 and 1.5.1.4 describe current consumption profiles in 2G, 3G and LTE connected-mode.

VCC or 3.3Vaux peak current

Support with margin the highest peak current consumption value in 2G connected-mode conditions specified for VCC in TOBY-L2 Data Sheet [1] or specified for 3.3Vaux in MPCI-L2 Data Sheet [2].

The specified maximum peak of current consumption occurs during GSM single transmit slot in 850/900 MHz connected-mode, in case of mismatched antenna.

Section 1.5.1.2 describes 2G Tx peak/pulse current.

VCC or 3.3Vaux voltage drop during 2G Tx slots

Lower than 400 mV

Supply voltage drop values greater than recommended during 2G TDMA transmission slots directly affect the RF compliance with applicable certification schemes.

Figure 5 describes supply voltage drop during 2G Tx slots.

VCC or 3.3Vaux voltage ripple during RF transmission

Noise in the supply has to be minimized

High supply voltage ripple values during LTE/3G/2G RF transmissions in connected-mode directly affect the RF compliance with applicable certification schemes.

Figure 5 describes supply voltage ripple during RF Tx.

VCC or 3.3Vaux under/over-shoot at start/end of Tx slots

Absent or at least minimized

Supply voltage under-shoot or over-shoot at the start or the end of 2G TDMA transmission slots directly affect the RF compliance with applicable certification schemes.

Figure 5 describes supply voltage under/over-shoot

1.5 Supply interfaces

1.5.1 Module supply input (VCC or 3.3Vaux)

TOBY-L2 modules are supplied via the three VCC pins, and MPCI-L2 modules are supplied via the five 3.3Vaux pins. All supply voltages used inside the modules are generated from the VCC or the 3.3Vaux supply input by integrated voltage regulators, including the V_BCKP RTC supply, the V_INT generic digital interface supply, and the VSIM or UIM_PWR SIM interface supply.

The current drawn by the TOBY-L2 and MPCI-L2 series modules through the VCC or 3.3Vaux pins can vary by several orders of magnitude depending on radio access technology, operation mode and state. It is important that the supply source is able to support both the high peak of current consumption during 2G transmission at maximum RF power level (as described in the section 1.5.1.2) and the high average current consumption during 3G and LTE transmission at maximum RF power level (as described in the sections 1.5.1.3 and 1.5.1.4).

1.5.1.1 VCC or 3.3Vaux supply requirements

Table 7 summarizes the requirements for the VCC or 3.3Vaux modules supply. See section 2.2.1 for suggestions to properly design a VCC or 3.3Vaux supply circuit compliant with the requirements listed in Table 7.

The supply circuit affects the RF compliance of the device integrating TOBY-L2 and MPCI-L2

series modules with applicable required certification schemes as well as antenna circuit design. Compliance is guaranteed if the requirements summarized in the Table 7 are fulfilled.

Table 7: Summary of VCC or 3.3Vaux modules supply requirements

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Time [ms]

slot

unused

slot

unused

slot

unused

slot

unused

slot

MON

slot

unused

slot

unused

slot

unused

slot

unused

slot

unused

slot

MON

slot

unused

slot

GSM frame

4.615 ms

(1 frame = 8 slots)

Current [A]

200 mA

60-120 mA

1900 mA

Peak current depends

on TX power and

actual antenna load

GSM frame

4.615 ms

(1 frame = 8 slots)

60-120 mA

10-40 mA

0.0

1.5

1.0

0.5

2.0

2.5

Time [ms]

undershoot

overshoot

ripple

drop

Voltage [mV]

3.8 V (typ)

slot

unused

slot

unused

slot

unused

slot

unused

slot

MON

slot

unused

slot

unused

slot

unused

slot

unused

slot

unused

slot

MON

slot

unused

slot

GSM frame

4.615 ms

(1 frame = 8 slots)

GSM frame

4.615 ms

(1 frame = 8 slots)

1.5.1.2 VCC or 3.3Vaux current consumption in 2G connected-mode

When a GSM call is established, the VCC or 3.3Vaux module current consumption is determined by the current consumption profile typical of the GSM transmitting and receiving bursts.

The peak of current consumption during a transmission slot is strictly dependent on the RF transmitted power, which is regulated by the network. The transmitted power in the transmit slot is also the more relevant factor for determining the average current consumption.

If the module is transmitting in 2G single-slot mode in the 850 or 900 MHz bands, at the maximum RF power level (approximately 2 W or 33 dBm in the allocated transmit slot/burst) the current consumption can reach an high peak (see the “Current consumption” section in the TOBY-L2 Data Sheet [1] or the MPCI-L2 Data Sheet [2]) for 576.9 µs (width of the transmit slot/burst) with a periodicity of 4.615 ms (width of 1 frame = 8 slots/burst), so with a 1/8 duty cycle according to GSM TDMA (Time Division Multiple Access).

If the module is transmitting in 2G single-slot mode in the 1800 or 1900 MHz bands, the current consumption figures are quite less high than the one in the low bands, due to 3GPP transmitter output power specifications.

During a GSM call, current consumption is not so significantly high in receiving or in monitor bursts and is low in the inactive unused bursts.

Figure 4 shows an example of the module current consumption profile versus time in 2G single-slot mode.

Figure 4: VCC or 3.3Vaux current consumption profile versus time during a 2G single-slot call (1 TX slot, 1 RX slot)

Figure 5 illustrates VCC or 3.3Vaux voltage profile versus time during a 2G single-slot call, according to the relative VCC or 3.3Vaux current consumption profile described in Figure 4.

Figure 5: VCC or 3.3Vaux voltage profile versus time during a 2G single-slot call (1 TX slot, 1 RX slot)

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Time [ms]

slot

unused

slot

MON

slot

unused

slot

unused

slot

MON

slot

unused

slot

GSM frame

4.615 ms

(1 frame = 8 slots)

Current [A]

200mA

60-130mA

Peak current depends

on TX power and

actual antenna load

GSM frame

4.615 ms

(1 frame = 8 slots)

1600 mA

0.0

1.5

1.0

0.5

2.0

2.5

When a GPRS connection is established, more than one slot can be used to transmit and/or more than one slot can be used to receive. The transmitted power depends on network conditions, which set the peak current consumption, but following the 3GPP specifications the maximum Tx RF power is reduced if more than one slot is used to transmit, so the maximum peak of current is not as high as can be in case of a 2G single-slot call.

If the module transmits in GPRS class 12 in the 850 or 900 MHz bands, at the maximum RF power control level, the current consumption can reach a quite high peak but lower than the one achievable in 2G single-slot mode. This happens for 2.307 ms (width of the 4 transmit slots/bursts) with a periodicity of 4.615 ms (width of 1 frame = 8 slots/bursts), so with a 1/2 duty cycle, according to 2G TDMA.

If the module is in GPRS connected mode in the 1800 or 1900 MHz bands, the current consumption figures are quite less high than the one in the low bands, due to 3GPP transmitter output power specifications.

Figure 6 reports the current consumption profiles in GPRS class 12 connected mode, in the 850 or 900 MHz bands, with 4 slots used to transmit and 1 slot used to receive.

Figure 6: VCC or 3.3Vaux current consumption profile during a 2G GPRS/EDGE multi-slot connection (4 TX slots, 1 RX slot)

In case of EDGE connections the VCC current consumption profile is very similar to the GPRS current profile, so the image shown in Figure 6, representing the current consumption profile in GPRS class 12 connected mode, is valid for the EDGE class 12 connected mode as well.

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Time

[ms]

3G frame

10 ms

(1 frame = 15 slots)

Current [mA]

Current consumption value

depends on TX power and

actual antenna load

170 mA

1 slot

666 µs

850 mA

300

200

100

500

400

600

700

800

1.5.1.3 VCC or 3.3Vaux current consumption in 3G connected mode

During a 3G connection, the module can transmit and receive continuously due to the Frequency Division Duplex (FDD) mode of operation with the Wideband Code Division Multiple Access (WCDMA).

The current consumption depends again on output RF power, which is always regulated by network commands. These power control commands are logically divided into a slot of 666 µs, thus the rate of power change can reach a maximum rate of 1.5 kHz.

There are no high current peaks as in the 2G connection, since transmission and reception are continuously enabled due to FDD WCDMA implemented in the 3G that differs from the TDMA implemented in the 2G case.

In the worst scenario, corresponding to a continuous transmission and reception at maximum output power (approximately 250 mW or 24 dBm), the average current drawn by the module at the VCC pins is high (see the “Current consumption” section in TOBY-L2 Data Sheet [1] or in MPCI-L2 Data Sheet [2]). Even at lowest output RF power (approximately 0.01 µW or -50 dBm), the current is still not so low due to module baseband processing and transceiver activity.

Figure 7 shows an example of current consumption profile of the module in 3G WCDMA/DC-HSPA+ continuous transmission mode.

Figure 7: VCC or 3.3Vaux current consumption profile versus time during a 3G connection (TX and RX continuously enabled)

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Time

[ms]

Current [mA]

Current consumption value

depends on TX power and

actual antenna load

1 Slot

1 Resource Block

(0.5 ms)

1 LTE Radio Frame

(10 ms)

300

200

100

500

400

600

700

800

1.5.1.4 VCC or 3.3Vaux current consumption in LTE connected-mode

During a LTE connection, the module can transmit and receive continuously due to LTE radio access technology. The current consumption is strictly dependent on the transmitted RF output power, which is always regulated by

network commands. These power control commands are logically divided into a slot of 0.5 ms (time length of one Resource Block), thus the rate of power change can reach a maximum rate of 2 kHz.

Figure 8 shows an example of the module current consumption profile versus time in LTE connected-mode. Detailed current consumption values can be found in TOBY-L2 Data Sheet [1] and in MPCI-L2 Data Sheet [2].

Figure 8: VCC or 3.3Vaux current consumption profile versus time during LTE connection (TX and RX continuously enabled)

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~50 ms

IDLE MODE ACTIVE MODE IDLE MODE

Active Mode

Enabled

Idle Mode

Enabled

2G case: 0.44-2.09 s 3G case: 0.61-5.09 s LTE case: 0.27-2.51 s

IDLE MODE

~50 ms

ACTIVE MODE

Time [s]

Current [mA]

Time [ms]

Current [mA]

Enabled

100

1.5.1.5 VCC or 3.3Vaux current consumption in cyclic idle/active mode (power saving enabled)

The power saving configuration is by default disabled, but it can be enabled using the AT+UPSV command (see the u-blox AT Commands Manual [3]). When power saving is enabled, the module automatically enters the low power idle-mode whenever possible, reducing current consumption.

During low power idle-mode, the module processor runs with 32 kHz reference clock frequency. When the power saving configuration is enabled and the module is registered or attached to a network , the

module automatically enters the low power idle-mode whenever possible, but it must periodically monitor the paging channel of the current base station (paging block reception), in accordance to the 2G/3G/LTE system requirements, even if connected-mode is not enabled by the application. When the module monitors the paging channel, it wakes up to the active-mode, to enable the reception of paging block. In between, the module switches to low power idle-mode. This is known as discontinuous reception (DRX).

The module processor core is activated during the paging block reception, and automatically switches its reference clock frequency from 32 kHz to the 26 MHz used in active-mode.

The time period between two paging block receptions is defined by the network. This is the paging period parameter, fixed by the base station through broadcast channel sent to all users on the same serving cell.

In case of 2G radio access technology, the paging period can vary from 470.76 ms (DRX = 2, length of 2 x 51 2G frames = 2 x 51 x 4.615 ms) up to 2118.42 ms (DRX = 9, length of 9 x 51 2G frames = 9 x 51 x 4.615 ms).

In case of 3G radio access technology, the paging period can vary from 640 ms (DRX = 6, i.e. length of 26 3G frames = 64 x 10 ms) up to 5120 ms (DRX = 9, length of 29 3G frames = 512 x 10 ms).

In case of LTE radio access technology, the paging period can vary from 320 ms (DRX = 5, length of 25 LTE frames = 32 x 10 ms) up to 2560 ms (DRX = 8, length of 28 LTE frames = 256 x 10 ms).

Figure 9 illustrates a typical example of the module current consumption profile when power saving is enabled. The module is registered with network, automatically enters the low power idle-mode and periodically wakes up to active-mode to monitor the paging channel for the paging block reception. Detailed current consumption values can be found in TOBY-L2 Data Sheet [1] and in MPCI-L2 Data Sheet [2].

Figure 9: VCC or 3.3Vaux current consumption profile with power saving enabled and module registered with the network: the module is in idle-mode and periodically wakes up to active-mode to monitor the paging channel for paging block reception

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ACTIVE MODE

2G case: 0.44-2.09 s 3G case: 0.61-5.09 s

LTE case: 0.32-2.56 s

Paging period

Time [s]

Current [mA]

Time [ms]

Current [mA]

Enabled

100

1.5.1.6 VCC or 3.3Vaux current consumption in fixed active-mode (power saving disabled)

When power saving is disabled, the module does not automatically enter the low power idle-mode whenever possible: the module remains in active-mode. Power saving configuration is by default disabled. It can also be disabled using the AT+UPSV command (see u-blox AT Commands Manual [3] for detail usage).

The module processor core is activated during idle-mode, and the 26 MHz reference clock frequency is used. It would draw more current during the paging period than that in the power saving mode.

Figure 10 illustrates a typical example of the module current consumption profile when power saving is disabled. In such case, the module is registered with the network and while active-mode is maintained, the receiver is periodically activated to monitor the paging channel for paging block reception.

Figure 10: VCC or 3.3Vaux current consumption profile with power saving disabled and module registered with the network: active-mode is always held and the receiver is periodically activated to monitor the paging channel for paging block reception

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Baseband

Processor

VCC

V_BCKP

Linear

LDO

Power

Management

TOBY-L2 series

32 kHz

RTC

1.5.2 RTC supply input/output (V_BCKP)

The RTC supply V_BCKP pin is not available on MPCI-L2 series modules.

The V_BCKP pin of TOBY-L2 series modules connects the supply for the Real Time Clock (RTC). A linear LDO regulator integrated in the Power Management Unit internally generates this supply, as shown in Figure 11, with low current capability (see the TOBY-L2 series Data Sheet [1]). The output of this regulator is always enabled when the main module voltage supply applied to the VCC pins is within the valid operating range.

Figure 11: TOBY-L2 series RTC supply (V_BCKP) simplified block diagram

The RTC provides the module time reference (date and time) that is used to set the wake-up interval during the low power idle-mode periods, and is able to make available the programmable alarm functions.

The RTC functions are available also in power-down mode when the V_BCKP voltage is within its valid range (specified in the “Input characteristics of Supply/Power pins” table in TOBY-L2 series Data Sheet [1]). The RTC can be supplied from an external back-up battery through the V_BCKP, when the main module voltage supply is not applied to the VCC pins. This lets the time reference (date and time) run until the V_BCKP voltage is within its valid range, even when the main supply is not provided to the module.

Consider that the module cannot switch on if a valid voltage is not present on VCC even when the RTC is supplied through V_BCKP (meaning that VCC is mandatory to switch on the module).

The RTC has very low current consumption, but is highly temperature dependent. For example, V_BCKP current consumption at the maximum operating temperature can be higher than the typical value at 25 °C specified in the “Input characteristics of Supply/Power pins” table in the TOBY-L2 series Data Sheet [1].

If V_BCKP is left unconnected and the module main supply is not applied to the VCC pins, the RTC is supplied from the bypass capacitor mounted inside the module. However, this capacitor is not able to provide a long buffering time: within few milliseconds the voltage on V_BCKP will go below the valid range (1.4 V min). This has no impact on cellular connectivity, as all the module functionalities do not rely on date and time setting.

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Baseband

Processor

VCC

V_INT

Switching

Step-Down

Power

Management

TOBY-L2 series

Digital I/O

1.5.3 Generic digital interfaces supply output (V_INT)

The generic digital interfaces supply V_INT pin is not available on MPCI-L2 series modules.

The V_INT output pin of the TOBY-L2 series modules is connected to an internal 1.8 V supply with current capability specified in the TOBY-L2 series Data Sheet [1]. This supply is internally generated by a switching stepdown regulator integrated in the Power Management Unit and it is internally used to source the generic digital I/O interfaces of the TOBY-L2 module, as described in Figure 12. The output of this regulator is enabled when the module is switched on and it is disabled when the module is switched off.

Figure 12: TOBY-L2 series generic digital interfaces supply output (V_INT) simplified block diagram

The switching regulator operates in Pulse Width Modulation (PWM) mode for greater efficiency at high output loads and it automatically switches to Pulse Frequency Modulation (PFM) power save mode for greater efficiency at low output loads. The V_INT output voltage ripple is specified in the TOBY-L2 series Data Sheet [1].

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Baseband Processor

PWR_ON

TOBY-L2 series

VCC

Power-on

Power

Management

Power-on

50k

1.6 System function interfaces

1.6.1 Module power-on

The PWR_ON input pin is not available on MPCI-L2 series modules.

When the TOBY-L2 and MPCI-L2 series modules are in the not-powered mode (switched off, i.e. the VCC or

3.3Vaux module supply is not applied), they can be switched on as following:

 Rising edge on the VCC or 3.3Vaux supply input to a valid voltage for module supply, so that the module

switches on applying a proper VCC or 3.3Vaux supply within the normal operating range.

 Alternately, the RESET_N or PERST# pin can be held to the low level during the VCC or 3.3Vaux rising

edge, so that the module switches on releasing the RESET_N or PERST# pin when the VCC or 3.3Vaux module supply voltage stabilizes at its proper nominal value within the normal operating range.

The status of the PWR_ON input pin of TOBY-L2 modules while applying the VCC module supply is not relevant: during this phase the PWR_ON pin can be set high or low by the external circuit.

When the TOBY-L2 modules are in the power-off mode (i.e. switched off with valid VCC module supply applied), they can be switched on as following:

 Low level on the PWR_ON pin, which is normally set high by an internal pull-up, for a valid time period.  Low level on the RESET_N pin, which is normally set high by an internal pull-up, for a valid time period.  RTC alarm, i.e. pre-programmed alarm by AT+CALA command (see u-blox AT Commands Manual [3]).

As described in Figure 13, the TOBY-L2 series PWR_ON input is equipped with an internal active pull-up resistor to the VCC module supply: the PWR_ON input voltage thresholds are different from the other generic digital interfaces. Detailed electrical characteristics are described in TOBY-L2 series Data Sheet [1].

Figure 13: TOBY-L2 series PWR_ON input description

For more pin information and electrical characteristics, see the TOBY-L2 Data Sheet [1] and MPCI-L2 Data

Sheet [2].

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VCC or 3.3Vaux

V_BCKP

PWR_ON

RESET_N or PERST#

V_INT

Internal Reset

System State

BB Pads State

Internal Reset → Operational Operational

Tristate / Floating

Internal Reset

OFF

0 ms

~10 ms

~20 s

Start of interface

configuration

Module interfaces

are configured

Start-up

event

~5 ms

Figure 14 shows the module power-on sequence from the not-powered mode, describing the following phases:

 The external supply is applied to the VCC or 3.3Vaux module supply inputs, representing the start-up event.  The PWR_ON and the RESET_N or PERST# pins suddenly rise to high logic level due to internal pull-ups.  The V_BCKP RTC supply output is suddenly enabled by the module as VCC reaches a valid voltage value.  All the generic digital pins of the module are tri-stated until the switch-on of their supply source (V_INT).  The internal reset signal is held low: the baseband core and all the digital pins are held in the reset state.

The reset state of all the digital pins is reported in the pin description table of TOBY-L2 Series Data Sheet [1].

 When the internal reset signal is released, any digital pin is set in a proper sequence from the reset state to

the default operational configured state. The duration of this pins’ configuration phase differs within generic digital interfaces and the USB interface due to host / device enumeration timings (see section 1.9.1).

 The module is fully ready to operate after all interfaces are configured.

Figure 14: TOBY-L2 and MPCI-L2 series power-on sequence description

The Internal Reset signal is not available on a module pin, but the host application can monitor:

Before the switch-on of the generic digital interface supply source (V_INT) of the module, no voltage Before the TOBY-L2 and MPCI-L2 series module is fully ready to operate, the host application processor

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 The V_INT pin to sense the start of the TOBY-L2 module power-on sequence.  The USB interface to sense the start of the MPCI-L2 module power-on sequence: the module, as USB

device, informs the host of the attach event via a reply on its status change pipe for proper bus enumeration process according to Universal Serial Bus Revision 2.0 specification [6].

driven by an external application should be applied to any generic digital interface of TOBY-L2 module.

should not send any AT command over the AT communication interfaces (USB, UART) of the module.

+ 111 hidden pages

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Specifications and Main Features

Frequently Asked Questions

User Manual