This document describes the features and the system integration of
the SARA-G3 series GSM/GPRS cellular modules and the SARA-U2
GSM/EGPRS/HSPA cellular modules.
These modules are complete and cost efficient solutions offering
voice and/or data communication over diverse cellular radio access
technologies in the same compact SARA form factor: the SARA-G3
series support up to four GSM/GPRS bands, while the SARA-U2
series support up to five high-speed HSPA bands and up to four
GSM/EGPRS bands.
www.u-blox.com
UBX-13000995 - R26
SARA-G3 and SARA-U2 series
GSM/GPRS and GSM/EGPRS/HSPA
Cellular Modules
System Integration Manual
SARA-G3 and SARA-U2 series - System Integration Manual
Document Information
Title
SARA-G3 and SARA-U2 series
Subtitle
GSM/GPRS and GSM/EGPRS/HSPA Cellular Modules
Document type
System Integration Manual
Document number
UBX-13000995
Revision and date
R26
02-Jan-2018
Disclosure restriction
u-blox reserves all rights to this document and the information contained herein. Products, names, logos and designs described herein may in
whole or in part be subject to intellectual property rights. Reproduction, use, modification or disclosure to third parties of this document or
any part thereof without the express permission of u-blox is strictly prohibited.
The information contained herein is provided “as is” and u-blox assumes no liability for the use of the information. No warranty, either
express or implied, is given, including but not limited, with respect to the accuracy, correctness, reliability and fitness for a particular purpose
of the information. This document may be revised by u-blox at any time. For most recent documents, visit www.u-blox.com.
SARA-G3 and SARA-U2 series - System Integration Manual
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SARA-G3 and SARA-U2 series - System Integration Manual
Preface
u-blox Technical Documentation
As part of our commitment to customer support, u-blox maintains an extensive volume of technical
documentation for our products. In addition to our product-specific technical data sheets, the following manuals
are available to assist u-blox customers in product design and development.
AT Commands Manual: This document provides the description of the AT commands supported by the
u-blox cellular modules.
System Integration Manual: This document provides the description of u-blox cellular modules’ system
from the hardware and the software points of view, it provides hardware design guidelines for the optimal
integration of the cellular modules in the application device, and it provides information on how to set up
production and final product tests on application devices which integrate the cellular modules.
Application Notes: These documents provide guidelines and information on specific hardware and/or
software topics on u-blox cellular modules. See the Related documents section for a list of application notes
related to your cellular module.
How to use this Manual
The SARA-G3 and SARA-U2 series System Integration Manual provides the necessary information to successfully
design in and configure these u-blox cellular modules.
This manual has a modular structure. It is not necessary to read it from the beginning to the end.
The following symbols are used to highlight important information within the manual:
An index finger points out key information pertaining to module integration and performance.
A warning symbol indicates actions that could negatively impact or damage the module.
Questions
If you have any questions about u-blox cellular Integration:
Read this manual carefully.
Contact our information service on the homepage http://www.u-blox.com
Technical Support
Worldwide Web
Our website (http://www.u-blox.com) is a rich pool of information. Product information and technical documents
can be accessed 24 hours a day.
By E-mail
If you have technical problems or cannot find the required information in the provided documents, contact the
closest Technical Support office. To ensure that we process your request as soon as possible, use our service pool
email addresses rather than personal staff email addresses. Contact details are at the end of the document.
Helpful Information when Contacting Technical Support
When contacting Technical Support, have the following information ready:
Module type (e.g. SARA-G350) and firmware version
Module configuration
A clear description of your question or the problem
A short description of the application
Your complete contact details
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1.9 Serial interfaces .................................................................................................................................. 45
1.9.1 Asynchronous serial interface (UART) .......................................................................................... 46
1.9.2 Auxiliary asynchronous serial interface (AUX UART) ..................................................................... 59
1.9.3 USB interface .............................................................................................................................. 63
2.6 Serial interfaces ................................................................................................................................ 134
2.6.1 Asynchronous serial interface (UART) ........................................................................................ 134
2.6.2 Auxiliary asynchronous serial interface (UART AUX) ................................................................... 140
2.6.3 Universal Serial Bus (USB) .......................................................................................................... 142
SARA-G3 and SARA-U2 series - System Integration Manual
1 System description
1.1 Overview
SARA-G3 series GSM/GPRS cellular modules and SARA-U2 series GSM/EGPRS/HSPA cellular modules are versatile
solutions offering voice and/or data communication over diverse radio access technologies in the same miniature
SARA LGA form factor (26 x 16 mm), which allows for seamless drop-in migration between the two SARA-G3
and SARA-U2 series and to and from the other u-blox cellular modules families.
SARA-G350 and SARA-G340 are respectively quad-band and dual-band full feature GSM/GPRS cellular modules
with a comprehensive feature set, including an extensive set of internet protocols and access to u-blox GNSS
positioning chips and modules with embedded A-GPS (AssistNow Online and AssistNow Offline) functionality.
SARA-G310 and SARA-G300 are respectively quad-band and dual-band GSM/GPRS cellular modules targeted for
high volume cost sensitive applications, providing GSM/GPRS functionalities with a reduced set of additional
features to minimize the customer’s total cost of ownership.
SARA-U2 series includes variants supporting various band combinations for worldwide operation, for North
America operation and for operation in Europe, Asia and other countries. A cost-saving UMTS-only variant is also
available.
All SARA-U2 series modules provide a rich feature set including an extensive set of internet protocols, dual-stack
IPv4 / IPv6 and access to u-blox GNSS positioning chips and modules, with embedded A-GPS (AssistNow Online
and AssistNow Offline) functionality.
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Module
Data rate
Bands
Interfaces
Audio
Features
Grade
3G Up-Link [Mbit/s]
3G Down-Link [Mbit/s]
2G Up-Link [kbit/s]
2G Down-Link [kbit/s]
3G bands [MHz]
2G bands [MHz]
UART
USB 2.0
DDC (I
2
C)
GPIO
Analog audio
Digital audio
Network indication
Antenna supervisor
Jamming detection
Embedded TCP / UDP
Embedded HTTP, FTP, SMTP
Embedded SSL / TLS
GNSS via Modem
AssistNow Software
CellLocate
®
FW update via serial
FOTA
eCall / ERA-GLONASS
Low power idle mode
Dual stack IPv4/IPv6
Standard
Professional
Automotive
SARA-G300
42.8
85.6 900/1800
2 •
■
SARA-G310
42.8
85.6 4-band
2 •
■ SARA-G340
42.8
85.6 900/1800
2 1 4 1 1 • • • • • ○ • • • • • • □
SARA-G340 ATEX
42.8
85.6 900/1800
2 1 4 1 1 • • • • • ○ • • • • • • □
SARA-G350
42.8
85.6 4-band
2 1 4 1 1 • • • • • ○ • • • • • • □
SARA-G350 ATEX
42.8
85.6 4-band
2 1 4 1 1 • • • • • ○ • • • • • • □
SARA-U201
5.76
7.2
236.8
236.8
5-band
4-band
21 1 1 9 1 • • • • • • • • • • •1 • • •
SARA-U201 ATEX
5.76
7.2
236.8
236.8
5-band
4-band
21 1 1 9 1 • • • • • • • • • • •1 • • •
SARA-U260
5.76
7.2
85.6
236.8
850/1900
850/1900
1 1 1 9 1 • • • • • • • • • • • •
SARA-U270
5.76
7.2
85.6
236.8
900/2100
900/18002
1 1 1 9 1 • • • • • • • • • • • • •
SARA-U270 ATEX
5.76
7.2
85.6
236.8
900/2100
900/1800
1 1 1 9 1 • • • • • • • • • • • • •
SARA-U280
5.76
7.2
850/1900
1 1 1 9 1 • • • • • • • • • • • •
● = supported by all product versions
○ = supported by product version “01” onwards
■ = 32 kHz signal at EXT32K input is required for low power idle mode
□ = supported by product versions “02” onwards
Table 1 describes a summary of interfaces and features provided by SARA-G3 and SARA-U2 series modules.
Table 1: SARA-G3 and SARA-U2 series3 features summary
1
Secondary UART and FOTA not supported by "03" and "63" product versions
2
2
SARA-U270-73S module product version (approved by SKT Korean network operator) and SARA-U270-53S module product version
SARA-U270-73S module product version (approved by SKT Korean network operator) and SARA-U270-53S module product version
(approved by KT Korean network operator) do not support 2G radio access technology.
3
SARA-G350 ATEX modules provide the same feature set of the SARA-G350 modules plus the certification for use in potentially explosive
atmospheres; the same applies to SARA-U201 ATEX and SARA-U201 modules, and to SARA-U270 ATEX and SARA-U270 modules. Unless
otherwise specified, SARA-G350 refers to all SARA-G350 ATEX and SARA-G350 modules; SARA-U201 refers to all SARA-U201 ATEX and
SARA-U201 modules; whereas SARA-U270 refers to all SARA-U270 ATEX modules and SARA-U270 modules.
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3G UMTS/HSDPA/HSUPA characteristics
2G GSM/GPRS/EDGE characteristics4
Class A User Equipment5
Class B Mobile Station6
Protocol stack
SARA-U2 series:
3GPP Release 7
Protocol stack
SARA-U2 series:
3GPP Release 7
SARA-G3 series:
3GPP Release 99
Band support
SARA-U201:
Band 19 (800 MHz)
Band 5 (850 MHz)
Band 8 (900 MHz)
Band 2 (1900 MHz)
Band 1 (2100 MHz)
Power Class 4 (33 dBm) for GSM/E-GSM bands
Power Class 1 (30 dBm) for DCS/PCS bands
EDGE Power Class
SARA-U201
7
:
Power Class E2 (27 dBm) for GSM/E-GSM bands
Power Class E2 (26 dBm) for DCS/PCS bands
PS (Packet Switched) data rate8
SARA-U2 series:
HSUPA category 6, up to 5.76 Mbit/s UL
HSDPA category 8, up to 7.2 Mbit/s DL
WCDMA PS data, up to 384 kbit/s DL/UL
PS (Packet Switched) data rate9
SARA-U2 series:
GPRS multi-slot class 1210, CS1-CS4 up to 85.6 kbit/s DL/UL
EDGE multi-slot class 1211, MCS1-MCS912 up to 236.8 kbit/s DL/UL
SARA-G3 series:
GPRS multi-slot class 1013, CS1-CS4 up to 85.6 kbit/s DL, 42.8 kbit/s UL
CS (Circuit Switched) data rate8
SARA-U2 series:
WCDMA CS data, up to 64 kbit/s DL/UL
CS (Circuit Switched) data rate8
SARA-U2 series, SARA-G3 series:
GSM CS data, up to 9.6 kbit/s DL/UL, transparent/non transparent mode
Table 2 lists a summary of cellular radio access technologies characteristics of SARA-G3 and SARA-U2 modules.
Table 2: SARA-G3 series and SARA-U2 series 2G characteristics summary
4
Not supported by SARA-U270-53S, SARA-U270-73S modules
5
Device can work simultaneously in Packet Switch and Circuit Switch mode: voice calls are possible while the data connection is active
without any interruption in service.
6
Device can be attached to both GPRS and GSM services (i.e. Packet Switch and Circuit Switch mode) using one service at a time. For
example, if an incoming call occurs during data transmission, the data connection is suspended to allow the voice communication. Once the
voice call has terminated, the data service is resumed.
7
SARA-U260 and SARA-U270 modules do not support 8-PSK modulation in uplink; the EDGE Power Class corresponds to the GSM/GPRS
Power Class
8
The maximum bit rate of the module depends on the actual network environmental conditions and settings.
9
GPRS / EDGE multi-slot class determines the number of timeslots available for upload and download and thus the speed at which data can
be transmitted and received, with higher classes typically allowing faster data transfer rates.
10
GPRS multi-slot class 12 implies a maximum of 4 slots in DL (reception) and 4 slots in UL (transmission) with 5 slots in total.
11
EDGE multi-slot class 12 implies a maximum of 4 slots in DL (reception) and 4 slots in UL (transmission) with 5 slots in total.
12
SARA-U260 and SARA-U270 modules support EDGE multi-slot class 12: MCS1-MCS9 up to 236.8 kbit/s DL, MCS1-MCS4 up to 70.4 kbit/s
UL
13
GPRS multi-slot class 10 implies a maximum of 4 slots in DL (reception) and 2 slots in UL (transmission) with 5 slots in total.
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Memory
V_BCKP (RTC)
V_INT (I/O)
32 kHz
26 MHz
RF
Transceiver
Power
Management
ANT
SAW
Filter
Switch
VCC (Supply)
32 kHz
Auxiliary UART
SIM
UART
Power-On
Reset
Cellular
BaseBand
Processor
PA
Memory
V_BCKP (RTC)
V_INT (I/O)
26 MHz
32.768 kHz
RF
Transceiver
Power
Management
Cellular
BaseBand
Processor
ANT
SAW
Filter
Switch
PA
VCC (Supply)
Auxiliary UART
DDC (for GNSS)
SIM Card Detection
SIM
UART
Power-On
Reset
Digital Audio
Analog Audio
GPIO
Antenna Detection
1.2 Architecture
Figure 1 summarizes the architecture of the SARA-G300 and SARA-G310 modules, while Figure 2 summarizes
the architecture of the SARA-G340 and SARA-G350 modules, illustrating the internal blocks of the modules,
consisting of the RF, Baseband and Power Management main sections and the available interfaces.
Figure 1: SARA-G300 and SARA-G310 modules block diagram
Figure 2: SARA-G340 and SARA-G350 modules block diagram
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Memory
V_BCKP (RTC)
V_INT (I/O)
RF
transceiver
Power
Management
Cellular
BaseBand
Processor
ANT
VCC (Supply)
USB
DDC (I2C) / AUX UART
SIM card detection
SIM
UART
Power-On
Reset
Digital audio (I2S)
GPIO
Antenna detection
26 MHz
Duplexers
Filters
Switch
2G PA
32 kHz
LNAs
3G PA
Memory
V_BCKP (RTC)
V_INT (I/O)
RF
transceiver
Power
Management
Cellular
BaseBand
Processor
ANT
VCC (Supply)
USB
DDC (I2C)
SIM card detection
SIM
UART
Power-On
Reset
Digital audio (I2S)
GPIO
Antenna detection
3G PA
26 MHz
Duplexer
Filter
Switch
2G PA
LNA
32 kHz
Figure 3 shows the architecture of the SARA-U201 modules, Figure 4 summarizes the architecture of the SARAU260 and SARA-U270 modules, while Figure 5 summarizes the architecture of the SARA-U280 modules,
illustrating the internal blocks of the modules, consisting of the RF, Baseband and Power Management main
sections and the available interfaces.
Figure 3: SARA-U201 block diagram
Figure 4: SARA-U260 and SARA-U270 modules block diagram
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Memory
V_BCKP (RTC)
V_INT (I/O)
RF
transceiver
Power
Management
Cellular
BaseBand
Processor
ANT
VCC (Supply)
USB
DDC (I2C)
SIM card detection
SIM
UART
Power-On
Reset
Digital audio (I2S)
GPIO
Antenna detection
3G PA
26 MHz
Duplexer
Filter
Switch
LNA
32 kHz
Figure 5: SARA-U280 modules block diagram
1.2.1 Internal blocks
SARA-G3 and SARA-U2 series modules internally consist of the RF, Baseband and Power Management sections,
described below with more details than are shown in the simplified block diagrams of Figure 1 to Figure 5.
RF section
The RF section is composed of the following main elements:
2G / 3G RF transceiver performing modulation, up-conversion of the baseband I/Q signals, down-conversion
and demodulation of the RF received signals. The RF transceiver includes:
Constant gain direct conversion receiver with integrated LNAs
Highly linear RF quadrature GMSK demodulator
Digital Sigma-Delta transmitter GMSK modulator
Fractional-N Sigma-Delta RF synthesizer
3.8 GHz VCO
Digital controlled crystal oscillator
2G / 3G Power Amplifier, which amplifies the signals modulated by the RF transceiver
RF switch, which connects the antenna input/output pin (ANT) of the module to the suitable RX/TX path
RX diplexer SAW (band pass) filters
26 MHz crystal, connected to the digital controlled crystal oscillator to perform the clock reference in active
mode or connected mode
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Baseband and Power Management section
The Baseband and Power Management section is composed of the following main elements:
Baseband processor, a mixed signal ASIC which integrates:
Microprocessor for controller functions
DSP core for 2G / 3G Layer 1 and audio processing
Dedicated peripheral blocks for parallel control of the digital interfaces
Audio analog front-end
The SARA-U201 module integrates only a baseband memory SiP including a NAND flash non-volatile
memory and a RAM volatile memory
Memory system in a multi-chip package integrating two devices
14
:
NOR flash non-volatile memory
RAM volatile memory
Voltage regulators to derive all the system supply voltages from the module supply VCC
Circuit for the RTC clock reference in low power idle mode:
SARA-G340, SARA-G350 and SARA-U2 series modules are equipped with an internal 32.768 kHz crystal
connected to the oscillator of the RTC (Real Time Clock) block that gives the RTC clock reference needed
to provide the RTC functions as well as to reach the very low power idle mode (with power saving
configuration enabled by the AT+UPSV command).
SARA-G300 and SARA-G310 modules are not equipped with an internal 32.768 kHz crystal: a proper
32 kHz signal must be provided at the EXT32K input pin of the modules to give the RTC clock reference
and to provide the RTC functions as well as to reach the very low power idle mode (with power saving
configuration enabled by AT+UPSV). The 32K_OUT output pin of SARA-G300 and SARA-G310 provides
a 32 kHz reference signal suitable only to feed the EXT32K input pin, furnishes the reference clock for
the RTC, and allows low power idle mode and RTC functions support with modules switched on.
14
In all SARA-U2 series and SARA-G3 series modules except for the SARA-U201 modules
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Function
Pin Name
Module
Pin No
I/O
Description
Remarks
Power
VCC
All
51, 52, 53
I
Module supply
input
VCC pins are internally connected to each other,
except for SARA-G3 modules product versions ‘02’
onwards.
VCC supply circuit affects the RF performance and
compliance of the device integrating the module
with applicable required certification schemes.
See section 1.5.1 for description and requirements.
See section 2.2.1 for external circuit design-in.
GND pins are internally connected to each other.
External ground connection affects the RF and
thermal performance of the device.
See section 1.5.1 for functional description.
See section 2.2.1 for external circuit design-in.
V_BCKP
All 2 I/O
Real Time Clock
supply
input/output
V_BCKP = 2.3 V (typical) on SARA-G3 series.
V_BCKP = 1.8 V (typical) on SARA-U2 series.
V_BCKP is generated by internal low power linear
regulator when a valid VCC supply is present.
See section 1.5.2 for functional description.
See section 2.2.2 for external circuit design-in.
V_INT
All 4 O
Generic Digital
Interfaces supply
output
V_INT = 1.8 V (typical), generated by internal DC/DC
regulator when the module is switched on.
Access by external test-point is recommended.
See section 1.5.3 for functional description.
See section 2.2.3 for external circuit design-in.
System
PWR_ON
All
15 I Power-on input
High input impedance: input voltage level must be
properly fixed, e.g. adding external pull-up.
Access by external test-point is recommended.
See section 1.6.1 for functional description.
See section 2.3.1 for external circuit design-in.
RESET_N
All
18
I
External reset
input
Internal 10 k pull-up to V_INT on SARA-G3,
Internal 10 k pull-up to V_BCKP on SARA-U2.
Access by external test-point is recommended.
See section 1.6.3 for functional description.
See section 2.3.2 for external circuit design-in.
EXT32K
SARA-G300
SARA-G310
31 I 32 kHz input
Input for RTC reference clock, needed to enter the
low power idle mode and provide RTC functions.
See section 1.6.4 for functional description.
See section 2.3.3 for external circuit design-in.
32K_OUT
SARA-G300
SARA-G310
24 O 32 kHz output
32 kHz output suitable only to feed the EXT32K
input giving the RTC reference clock, allowing low
power idle mode and RTC function support.
See section 1.6.5 for functional description.
See section 2.3.3 for external circuit design-in.
Antenna
ANT
All
56
I/O
RF input/output
for antenna
50 nominal characteristic impedance.
Antenna circuit affects the RF performance and
compliance of the device integrating the module
with applicable required certification schemes.
See section 1.7 for description and requirements.
See section 2.4 for external circuit design-in.
ANT_DET
SARA-G340
SARA-G350
SARA-U2
62
I
Input for antenna
detection
ADC input for antenna detection function.
See section 1.7.2 for functional description.
See section 2.4.2 for external circuit design-in.
1.3 Pin-out
Table 3 lists the pin-out of the SARA-G3 and SARA-U2 series modules, with pins grouped by function.
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Function
Pin Name
Module
Pin No
I/O
Description
Remarks
SIM
VSIM
All
41 O SIM supply output
VSIM = 1.80 V typ. or 2.85 V typ. automatically
generated according to the connected SIM type.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_IO
All
39
I/O
SIM data
Data input/output for 1.8 V / 3 V SIM
Internal 4.7 k pull-up to VSIM.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_CLK
All
38 O SIM clock
3.25 MHz clock output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_RST
All
40 O SIM reset
Reset output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_DET
All
42
I /
I/O
SIM detection /
GPIO
1.8 V input for SIM presence detection function.
Pin configurable also as GPIO on SARA-U2 series.
See section 1.8.2 for functional description.
See section 2.5 for external circuit design-in.
UART
RXD
All
13 O UART data output
1.8 V output, Circuit 104 (RXD) in ITU-T V.24,
for AT, data, Mux, FOAT on SARA-G3 modules,
for AT, data, Mux, FOAT, FW upgrade via EasyFlash
tool and diagnostics on SARA-U2 modules.
Access by external test-point is recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
TXD
All
12 I UART data input
1.8 V input, Circuit 103 (TXD) in ITU-T V.24,
for AT, data, Mux, FOAT on SARA-G3 modules,
for AT, data, Mux, FOAT, FW upgrade via EasyFlash
tool and diagnostics on SARA-U2 modules.
Internal active pull-up to V_INT.
Access by external test-point is recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
CTS
All
11
O
UART clear to
send output
1.8 V output, Circuit 106 (CTS) in ITU-T V.24.
Access by external test-point is recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
RTS
All
10
I
UART ready to
send input
1.8 V input, Circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT.
Access by external test-point is recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DSR
All 6 O
UART data set
ready output
1.8 V output, Circuit 107 (DSR) in ITU-T V.24.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
RI
All 7 O
UART ring
indicator output
1.8 V output, Circuit 125 (RI) in ITU-T V.24.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DTR
All 9 I
UART data
terminal ready
input
1.8 V input, Circuit 108/2 (DTR) in ITU-T V.24.
Internal active pull-up to V_INT.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DCD
All 8 O
UART data carrier
detect output
1.8 V input, Circuit 109 (DCD) in ITU-T V.24.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
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Function
Pin Name
Module
Pin No
I/O
Description
Remarks
Auxiliary
UART
RXD_AUX
SARA-G3
28
O
Auxiliary UART
data output
1.8 V output, Circuit 104 (RXD) in ITU-T V.24,
for FW upgrade via EasyFlash tool, AT command
mode15, GNSS tunneling15 and diagnostics.
Access by external test-point is recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
TXD_AUX
SARA-G3
29
I
Auxiliary UART
data input
1.8 V input, Circuit 103 (TXD) in ITU-T V.24,
for FW upgrade via EasyFlash tool, AT command
mode15, GNSS tunneling15 and diagnostics.
Internal active pull-up to V_INT.
Access by external test-point is recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
SCL
SARA-U2
27
O
Auxiliary UART
data output
Not supported by “00” and “x3” product versions.
1.8 V output, Circuit 104 (RXD) in ITU-T V.24,
for AT command mode and diagnostics.
By default configured as I2C bus clock line.
Access by external test-point is recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
SDA
SARA-U2
26
I
Auxiliary UART
data input
Not supported by “00” and “x3” product versions.
1.8 V input, Circuit 103 (TXD) in ITU-T V.24,
for AT command mode and diagnostics.
Internal active pull-up to V_INT.
By default configured as I2C bus data line.
Access by external test-point is recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
USB
VUSB_DET
SARA-U2
17 I USB detect input
High-Speed USB 2.0 interface input for VBUS (5 V typ)
USB supply sense. USB available for AT, data, GNSS
tunneling, SAP, Ethernet-over-USB16, FOAT, FW
upgrade via EasyFlash tool, and diagnostics.
Access by external test-point is recommended.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
USB_D-
SARA-U2
28
I/O
USB Data Line D-
High-Speed USB 2.0 interface data line for AT, data,
GNSS tunneling, SAP, Ethernet-over-USB16, FOAT, FW
upgrade via EasyFlash tool, and diagnostics.
90 nominal differential impedance.
Pull-up, pull-down and series resistors as required by
USB 2.0 specifications [14] are part of the USB pin
driver and need not be provided externally.
Access by external test-point is recommended.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
USB_D+
SARA-U2
29
I/O
USB Data Line D+
High-Speed USB 2.0 interface data line for AT, data,
GNSS tunneling, SAP, Ethernet-over-USB16, FOAT, FW
upgrade via EasyFlash tool, and diagnostics.
90 nominal differential impedance.
Pull-up, pull-down and series resistors as required by
USB 2.0 specifications [14] are part of the USB pin
driver and need not be provided externally.
Access by external test-point is recommended.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
15
Supported by product versions “02” onwards
16
Supported by product versions “x3” onwards
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Function
Pin Name
Module
Pin No
I/O
Description
Remarks
DDC
SCL
SARA-G340
SARA-G350
SARA-U2
27 O I2C bus clock line
1.8 V open drain, for communication with the
u-blox positioning modules / chips. Communication
with other external I2C-slave devices as an audio
codec is additionally supported by SARA-U2 series.
External pull-up required.
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDA
SARA-G340
SARA-G350
SARA-U2
26
I/O
I2C bus data line
1.8 V open drain, for the communication with
u-blox positioning modules / chips. Communication
with other external I2C-slave devices as an audio
codec is additionally supported by SARA-U2 series.
External pull-up required.
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
Analog
Audio
MIC_BIAS
SARA-G340
SARA-G350
46
O
Microphone
supply output
Supply output (2.2 V typ) for external microphone.
See section 1.10.1 for functional description.
See section 2.7.1 for external circuit design-in.
MIC_GND
SARA-G340
SARA-G350
47
I
Microphone
analog reference
Local ground for the external microphone (reference
for the analog audio uplink path).
See section 1.10.1 for functional description.
See section 2.7.1 for external circuit design-in.
MIC_N
SARA-G340
SARA-G350
48
I
Differential
analog audio
input (negative)
Differential analog audio signal input (negative)
shared for all the analog uplink path modes:
handset, headset, hands-free mode.
No internal DC blocking capacitor.
See section 1.10.1 for functional description.
See section 2.7.1 for external circuit design-in.
MIC_P
SARA-G340
SARA-G350
49
I
Differential
analog audio
input (positive)
Differential analog audio signal input (positive)
shared for all the analog uplink path modes:
handset, headset, hands-free mode.
No internal DC blocking capacitor.
See section 1.10.1 for functional description.
See section 2.7.1 for external circuit design-in.
SPK_P
SARA-G340
SARA-G350
44
O
Differential
analog audio
output (positive)
Differential analog audio signal output (positive)
shared for all the analog downlink path modes:
earpiece, headset and loudspeaker mode.
See section 1.10.1 for functional description.
See section 2.7.1 for external circuit design-in.
SPK_N
SARA-G340
SARA-G350
45
O
Differential
analog audio
output (negative)
Differential analog audio signal output (negative)
shared for all the analog downlink path modes:
earpiece, headset and loudspeaker mode.
See section 1.10.1 for functional description.
See section 2.7.1 for external circuit design-in.
Digital
Audio
I2S_CLK
SARA-G340
SARA-G350
SARA-U2
36
O /
I/O
I2S clock /
GPIO
1.8 V serial clock for PCM / normal I2S modes.
Pin configurable also as GPIO on SARA-U2 series.
Access by external test-point is recommended.
See section 1.10.2 for functional description.
See section 2.7.2 for external circuit design-in.
I2S_RXD
SARA-G340
SARA-G350
SARA-U2
37
I /
I/O
I2S receive data /
GPIO
1.8 V data input for PCM / normal I2S modes.
Pin configurable also as GPIO on SARA-U2 series.
Internal active pull-down to GND.
Access by external test-point is recommended.
See section 1.10.2 for functional description.
See section 2.7.2 for external circuit design-in.
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Function
Pin Name
Module
Pin No
I/O
Description
Remarks
I2S_TXD
SARA-G340
SARA-G350
SARA-U2
35
O /
I/O
I2S transmit data /
GPIO
1.8 V data output for PCM / normal I2S modes.
Pin configurable also as GPIO on SARA-U2 series.
Access by external test-point is recommended.
See section 1.10.2 for functional description.
See section 2.7.2 for external circuit design-in.
I2S_WA
SARA-G340
SARA-G350
SARA-U2
34
O /
I/O
I2S word alignment /
GPIO
1.8 V word alignment for PCM / normal I2S modes
Pin configurable also as GPIO on SARA-U2 series.
Access by external test-point is recommended.
See section 1.10.2 for functional description.
See section 2.7.2 for external circuit design-in.
CODEC_CLK
SARA-U2
19 O Clock output
1.8 V master clock output for external audio codec
See section 1.10.2 for functional description.
See section 2.7.2 for external circuit design-in
GPIO
GPIO1
SARA-G340
SARA-G350
SARA-U2
16
I/O
GPIO
1.8 V GPIO by default configured as pin disabled.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO2
SARA-G340
SARA-G350
SARA-U2
23
I/O
GPIO
1.8 V GPIO by default configured to provide the
custom GNSS supply enable function.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO3
SARA-G340
SARA-G350
SARA-U2
24
I/O
GPIO
1.8 V GPIO by default configured to provide the
custom GNSS data ready function.
Access by external test-point is recommended.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO4
SARA-G340
SARA-G350
SARA-U2
25
I/O
GPIO
1.8 V GPIO by default configured to provide the
custom GNSS RTC sharing function.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
Reserved
RSVD
All
33
N/A
RESERVED pin
This pin must be connected to ground.
See section 2.9
RSVD
SARA-G3
17, 19
N/A
RESERVED pin
Leave unconnected.
See section 2.9
RSVD
SARA-G340
SARA-G350
SARA-U2
31
N/A
RESERVED pin
Internally not connected. Leave unconnected.
See section 2.9
RSVD
SARA-G300
SARA-G310
16, 23,
25-27,
34-37
N/A
RESERVED pin
Pin disabled. Leave unconnected.
See section 2.9
RSVD
SARA-G300
SARA-G310
SARA-U2
44-49
N/A
RESERVED pin
Leave unconnected.
See section 2.9
RSVD
SARA-G300
SARA-G310
62
N/A
RESERVED pin
Leave unconnected.
See section 2.9
Table 3: SARA-G3 and SARA-U2 series modules pin definition, grouped by function
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General Status
Operating Mode
Definition
Power-down
Not-powered mode
VCC supply not present or below operating range: module is switched off.
Power-off mode
VCC supply within operating range and module is switched off.
Normal operation
Idle mode
Module processor core runs with 32 kHz reference, that is generated by:
The internal 32 kHz oscillator (SARA-G340, SARA-G350 and SARA-U2 series)
The 32 kHz signal provided at the EXT32K pin (SARA-G300 and SARA-G310)
Active mode
Module processor core runs with 26 MHz reference generated by the internal oscillator.
Connected mode
Voice or data call enabled and processor core runs with 26 MHz reference.
Operating
Mode
Description
Transition between operating modes
Not-Powered
Module is switched off.
Application interfaces are not accessible.
Internal RTC operates on SARA-G340/G350,
SARA-U2 if a valid voltage is applied to V_BCKP.
Additionally, a proper external 32 kHz signal
must be fed to EXT32K on SARA-G300/G310
modules to let internal RTC timer running.
When VCC supply is removed, the module enters not-powered mode.
When in not-powered mode, the modules cannot be switched on by
PWR_ON, RESET_N or RTC alarm.
When in not-powered mode, the modules can be switched on applying
VCC supply (see 2.3.1) so that the module switches from not-powered
to active mode.
Power-Off
Module is switched off: normal shutdown by an
appropriate power-off event (see 1.6.2).
Application interfaces are not accessible.
Internal RTC operates on SARA-G340/G350,
SARA-U2 as V_BCKP is internally generated.
A proper external 32 kHz signal must be fed to
the EXT32K pin on SARA-G300/G310 to let RTC
timer running that otherwise is not in operation.
When the module is switched off by an appropriate power-off event
(see 1.6.2), the module enters power-off mode from active mode.
When in power-off mode, the modules can be switched on by
PWR_ON, RESET_N or RTC alarm (see 2.3.1): the module switches
from power-off to active mode.
When VCC supply is removed, the module switches from power-off
mode to not-powered mode.
Idle
The module is not ready to communicate with
an external device by means of the application
interfaces as configured to reduce consumption.
The module automatically enters idle mode
whenever possible if power saving is enabled by
the AT+UPSV command (see the u-blox AT Commands Manual [3]), reducing power
consumption (see section 1.5.1.4).
The CTS output line indicates when the UART
interface is disabled/enabled due to the module
idle/active mode according to power saving and
HW flow control settings (see 1.9.1.3, 1.9.1.4).
Power saving configuration is not enabled by
default: it can be enabled by AT+UPSV (see the
u-blox AT Commands Manual [3]).
A proper 32 kHz signal must be fed to the
EXT32K pin of SARA-G300/G310 modules to let
idle mode that otherwise cannot be reached
(this is not needed for the other SARA-G3 and
SARA-U2 series modules).
The module automatically switches from active mode to idle mode
whenever possible if power saving is enabled (see sections 1.5.1.4,
1.9.1.4 and the u-blox AT Commands Manual [3], AT+UPSV).
The module wakes up from idle to active mode in the following events:
Automatic periodic monitoring of the paging channel for the
paging block reception according to network conditions (see
1.5.1.4, 1.9.1.4)
Automatic periodic enable of the UART interface to receive and
send data, if AT+UPSV=1 power saving is set (see 1.9.1.4)
RTC alarm occurs (see the u-blox AT Commands Manual [3],
+CALA)
Data received on the UART interface, according to HW flow
control (AT&K) and power saving (AT+UPSV) settings (see 1.9.1.4)
RTS input line set to the ON state by the DTE, if HW flow control
is disabled by AT&K0 and AT+UPSV=2 is set (see 1.9.1.4)
DTR input line set to the ON state by the DTE, if AT+UPSV=3
power saving is set (see 1.9.1.4)
USB detection, applying 5 V (typ.) to VUSB_DET input (see 1.9.3)
The connected USB host forces a remote wakeup of the module
as a USB device (see 1.9.3)
GNSS data ready: when the GPIO3 pin is informed by the
connected u-blox GNSS receiver that it is ready to send data over
the DDC (I2C) communication interface (see 1.11, 1.9.4)
1.4 Operating modes
SARA-G3 modules have several operating modes. The operating modes defined in Table 4 and described in
detail in Table 5 provide general guidelines for operation.
Table 4: Module operating mode definition
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Operating
Mode
Description
Transition between operating modes
Active
The module is ready to communicate with an
external device by means of the application
interfaces unless power saving configuration is
enabled by the AT+UPSV command (see
sections 1.5.1.4, 1.9.1.4 and the u-blox AT Commands Manual [3]).
When the module is switched on by an appropriate power-on event
(see 2.3.1), the module enters active mode from not-powered or
power-off mode.
If power saving configuration is enabled by the AT+UPSV command,
the module automatically switches from active to idle mode whenever
possible and the module wakes up from idle to active mode in the
events listed above (see idle to active transition description).
When a voice call or a data call is initiated, the module switches from
active mode to connected mode.
Connected
A voice call or a data call is in progress.
The module is ready to communicate with an
external device by means of the application
interfaces unless power saving configuration is
enabled by the AT+UPSV command (see
sections 1.5.1.4, 1.9.1.4 and the u-blox AT Commands Manual [3]).
When a voice call or a data call is initiated, the module enters
connected mode from active mode.
When a voice call or a data call is terminated, the module returns to
active mode.
Switch ON:
• Apply VCC
If power saving is enabled
and there is no activity for
a defined time interval
Any wake-up event described
in the module operating
modes summary table above
Incoming/outgoing call or
other dedicated device
network communication
No RF Tx/Rx in progress,
Call terminated,
Communication dropped
Remove VCC
Switch ON:
• PWR_ON
• RTC alarm
• RESET_N
(SARA-U2)
Not
powered
Power off
ActiveConnectedIdle
Switch OFF:
• AT+CPWROFF
• PWR_ON
(SARA-U2)
Table 5: Module operating mode descriptions
Figure 6 describes the transition between the different operating modes.
Figure 6: Operating mode transitions
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53
VCC
52
VCC
51
VCC
SARA-U2 series
Power
Management
Unit
Memory
Baseband
Processor
Transceiver
RF PMU
PA PMU3G PA
2G PA
53
VCC
52
VCC
51
VCC
SARA-G3 series
(product versions ‘00’ and ’01’)
Power
Management
Unit
Memory
Baseband
Processor
Transceiver
RF PMU
2G PA
53
VCC
52
VCC
51
VCC
SARA-G3 series
(product versions ‘02’ onwards)
Power
Management
Unit
Memory
Baseband
Processor
Transceiver
RF PMU
2G PA
1.5 Supply interfaces
1.5.1 Module supply input (VCC)
The modules must be supplied via the three VCC pins that represent the module power supply input.
The VCC pins are internally connected to the RF power amplifier and to the integrated Power Management Unit:
all supply voltages needed by the module are generated from the VCC supply by integrated voltage regulators,
including the V_BCKP Real Time Clock supply, V_INT digital interfaces supply and VSIM SIM card supply.
During operation, the current drawn by the SARA-G3 and SARA-U2 series modules through the VCC pins can
vary by several orders of magnitude. This ranges from the high peak of current consumption during GSM
transmitting bursts at maximum power level in connected mode (as described in section 1.5.1.2) to the low
current consumption during low power idle mode with power saving enabled (as described in section 1.5.1.4).
SARA-G3 modules, versions “02” onwards, provide separate supply inputs over the three VCC pins:
VCC pins #52 and #53 represent the supply input for the internal RF power amplifier, demanding most of
the total current drawn of the module when RF transmission is enabled during a voice/data call
VCC pin #51 represents the supply input for the internal baseband Power Management Unit and the internal
transceiver, demanding a minor part of the total current drawn of the module when RF transmission is
enabled during a voice/data call
The following Figure 7 and Figure 8 provide a simplified block diagram of SARA-G3 and SARA-U2 series modules
internal VCC supply routing.
Figure 8: SARA-G3 module VCC supply simplified block diagram (product versions “00” / “01” versus product version “02”)
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Item
Requirement
Remark
VCC nominal voltage
Within VCC normal operating range:
3.35 V min / 4.50 V max for SARA-G3 series
3.30 V min / 4.40 V max for SARA-U2 series
The module cannot be switched on if the VCC voltage
value is below the normal operating range minimum
limit.
Ensure that the input voltage at VCC pins is above the
minimum limit of the normal operating range for at least
more than 3 seconds after the module switch-on.
VCC voltage during
normal operation
Within VCC extended operating range:
3.00 V min / 4.50 V max for SARA-G3 series
3.10 V min / 4.50 V max for SARA-U2 series
The module may switch off when the VCC voltage drops
below the extended operating range minimum limit.
Operation above extended operating range limit is not
recommended and may affect device reliability.
VCC average current
Support with adequate margin the highest averaged
VCC current consumption value in connected mode
conditions specified in the SARA-G3series Data Sheet [1] and in the SARA-U2 series Data Sheet [2].
The highest averaged VCC current consumption can be
greater than the specified value according to the actual
antenna mismatching, temperature and VCC voltage.
See 1.5.1.2, 1.5.1.3 for connected mode current profiles.
VCC peak current
Support with margin the highest peak VCC current
consumption value specified in the SARA-G3series
Data Sheet [1] and in the SARA-U2 series Data
Sheet [2].
The specified highest peak of VCC current consumption
occurs during GSM single transmit slot in 850/900 MHz
connected mode, in the event of a mismatched antenna.
See1.5.1.2 for 2G connected mode current profiles.
VCC voltage drop
during 2G Tx slots
Lower than 400 mV
VCC voltage drop directly affects the RF compliance with
applicable certification schemes.
Figure 10 describes VCC voltage drop during Tx slots.
VCC voltage ripple
during 2G/3G Tx
Lower than 50 mVpp if f
ripple
≤ 200 kHz
Lower than 10 mVpp if 200 kHz < f
ripple
≤ 400 kHz
Lower than 2 mVpp if f
ripple
> 400 kHz
VCC voltage ripple directly affects the RF compliance with
applicable certification schemes.
Figure 10 describes VCC voltage ripple during Tx slots.
VCC under/over-shoot
at start/end of Tx slots
Absent or at least minimized
VCC under/over-shoot directly affects the RF compliance
with applicable certification schemes.
Figure 10 describes VCC voltage under/over-shoot.
1.5.1.1 VCC supply requirements
Table 6 summarizes the requirements for the VCC module supply. See section 2.2.1 for all the suggestions to
properly design a VCC supply circuit compliant to the requirements listed in Table 6.
VCC supply circuit affects the RF compliance of the device integrating SARA-G3 and SARA-U2
series modules with applicable required certification schemes as well as antenna circuit design.
Compliance is guaranteed if the VCC requirements summarized in Table 6 are fulfilled.
For the additional specific requirements for SARA-G340 ATEX, SARA-G350 ATEX, SARA-U201 ATEX and
SARA-U270 ATEX modules integrated in potentially explosive atmospheres, see section 2.14.
Table 6: Summary of VCC supply requirements
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Time [ms]
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
Current [A]
200 mA
60-120 mA
1900 mA
Peak current depends
on TX power and
actual antenna load
GSM frame
4.615 ms
(1 frame = 8 slots)
1.5
1.0
0.5
0.0
2.0
60-120 mA
10-40 mA
Time
undershoot
overshoot
ripple
drop
Voltage
3.8 V
(typ)
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
GSM frame
4.615 ms
(1 frame = 8 slots)
1.5.1.2 VCC current consumption in 2G connected mode
When a GSM call is established, the VCC consumption is determined by the current consumption profile typical
of the GSM transmitting and receiving bursts.
The current consumption peak during a transmission slot is strictly dependent on the transmitted power, which
is regulated by the network. The transmitted power in the transmit slot is also the more relevant factor for
determining the average current consumption.
If the module is transmitting in 2G single-slot mode (as in GSM talk mode) in the 850 or 900 MHz bands, at the
maximum RF power control level (approximately 2 W or 33 dBm in the Tx slot/burst), the current consumption
can reach a high peak / pulse (see the SARA-G3 series Data Sheet [1] and the SARA-U2 series Data Sheet [2])for
576.9 µs (width of the transmit slot/burst) with a periodicity of 4.615 ms (width of 1 frame = 8 slots/burst), so
with a 1/8 duty cycle according to GSM TDMA (Time Division Multiple Access).
If the module is transmitting in 2G single-slot mode in the 1800 or 1900 MHz bands, the current consumption
figures are quite less high than the one in the low bands, due to the 3GPP transmitter output power
specifications.
During a GSM call, current consumption is not so significantly high in receiving or in monitor bursts and it is low
in the bursts unused to transmit / receive.
Figure 9 shows an example of the module current consumption profile versus time in GSM talk mode.
Figure 9: VCC current consumption profile versus time during a GSM call (1 TX slot, 1 RX slot)
Figure 10 illustrates the VCC voltage profile versus time during a GSM call, according to the related VCC current
consumption profile described in Figure 9.
Figure 10: Description of the VCC voltage profile versus time during a GSM call (1 TX slot, 1 RX slot)
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Time [ms]
RX
slot
unused
slot
unused
slot
TX
slot
TX
slot
unused
slot
MON
slot
unused
slot
RX
slot
unused
slot
unused
slot
TX
slot
TX
slot
unused
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
Current [A]
60-120mA
GSM frame
4.615 ms
(1 frame = 8 slots)
1.5
1.0
0.5
0.0
60-120mA
10-40mA
200mA
Peak current depends
on TX power and
actual antenna load
1600 mA
Time [ms]
RX
slot
unused
slot
TX
slot
TX
slot
TX
slot
TX
slot
MON
slot
unused
slot
RX
slot
unused
slot
TX
slot
TX
slot
TX
slot
TX
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
Current [A]
60-120mA
GSM frame
4.615 ms
(1 frame = 8 slots)
1.5
1.0
0.5
0.0
60-120mA
10-40mA
200mA
Peak current depends
on TX power and
actual antenna load
1600 mA
When a GPRS connection is established, more than one slot can be used to transmit and/or more than one slot
can be used to receive. The transmitted power depends on network conditions, which set the peak current
consumption, but following the GPRS specifications the maximum transmitted RF power is reduced if more than
one slot is used to transmit, so the maximum peak of current is not as high as can be in the case of a GSM call.
If the module transmits in GPRS multi-slot class 10 or 12, in 850 or 900 MHz bands, at maximum RF power level,
the consumption can reach a quite high peak but lower than the one achievable in 2G single-slot mode. This
happens for 1.154 ms (width of the 2 Tx slots/bursts) in the case of multi-slot class 10 or for 2.308 ms (width of
the 4 Tx slots/bursts) in the case of multi-slot class 12, with a periodicity of 4.615 ms (width of 1 frame =
8 slots/bursts), so with a 1/4 or 1/2 duty cycle, according to GSM TDMA.
If the module is in GPRS connected mode in the 1800 or 1900 MHz bands, consumption figures are lower than
in the 850 or 900 MHz band because of the 3GPP Tx power specifications.
Figure 11 reports the current consumption profiles in GPRS connected mode, in the 850 or 900 MHz bands, with
2 slots used to transmit and 1 slot used to receive, as for the GPRS multi-slot class 10.
Figure 11: VCC current consumption profile versus time during a GPRS multi-slot class 10 connection (2 TX slots, 1 RX slot)
Figure 12 reports the current consumption profiles in GPRS connected mode, in the 850 or 900 MHz bands, with
4 slots used to transmit and 1 slot used to receive, as for the GPRS multi-slot class 12.
Figure 12: VCC current consumption profile versus time during a GPRS multi-slot class 12 connection (4 TX slots, 1 RX slot)
For detailed current consumption values during 2G single-slot or multi-slot connection, see theSARA-G3 series
Data Sheet [1] and the SARA-U2 series Data Sheet [2].
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Time
[ms]
3G frame
10 ms
(1 frame = 15 slots)
Current [mA]
Current consumption
depends on TX power and
actual antenna load
170 mA
1 slot
666 µs
850 mA
0
300
200
100
500
400
600
700
800
1.5.1.3 VCC current consumption in 3G connected mode
During a 3G connection, the SARA-U2 modules can transmit and receive continuously due to the Frequency
Division Duplex (FDD) mode of operation with Wideband Code Division Multiple Access (WCDMA).
The current consumption depends again on output RF power, which is always regulated by network commands.
These power control commands are logically divided into a slot of 666 µs, and so the rate of power change can
reach a maximum rate of 1.5 kHz.
There are no high current peaks as in the 2G connection, since transmission and reception are continuously
enabled due to FDD WCDMA implemented in the 3G that differs from the TDMA implemented in the 2G case.
In the worst scenario, corresponding to a continuous transmission and reception at maximum RF output power
(approximately 250 mW or 24 dBm), the average current drawn by the module at the VCC pins is high (see the
SARA-U2 series Data Sheet [2]).Even at lowest RF output power level (approximately 0.01 µW or -50 dBm), the
average current is still not so low as in the equivalent 2G case, also due to module continuous baseband
processing and transceiver activity.
Figure 13 shows an example of the current consumption profile of SARA-U2 series modules in 3G
WCDMA/HSPA continuous transmission and reception mode. For detailed current consumption values during a
3G connection, see the SARA-U2 series Data Sheet [2].
Figure 13: VCC current consumption profile versus time during a 3G connection (TX and RX continuously enabled)
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20-30 ms
IDLE MODEACTIVE MODEIDLE MODE
Active Mode
Enabled
Idle Mode
Enabled
2G case: 0.44-2.09 s
3G case: 0.61-5.09 s
IDLE MODE
20-30 ms
ACTIVE MODE
Time [s]
Current [mA]
100
50
0
Time [ms]
Current [mA]
100
50
0
RX
Enabled
DSP
Enabled
1.5.1.4 VCC current consumption in cyclic idle/active mode (power saving enabled)
The power saving configuration is disabled by default, but it can be enabled using the appropriate AT command
(see the u-blox AT Commands Manual [3], AT+UPSV command). When power saving is enabled, the module
automatically enters low power idle mode whenever possible, reducing current consumption.
During idle mode, the module processor runs with 32 kHz reference clock:
the internal oscillator automatically generates the 32 kHz clock on SARA-G340, SARA-G350, SARA-U2 series
a valid 32 kHz signal must be properly provided to the EXT32K input pin of the SARA-G300 and
SARA-G310 modules to let low power idle mode, that otherwise cannot be reached by these modules.
When the power saving configuration is enabled and the module is registered or attached to a network, the
module automatically enters the low power idle mode whenever possible, but it must periodically monitor the
paging channel of the current base station (paging block reception), in accordance to the 2G or 3G system
requirements, even if connected mode is not enabled by the application. When the module monitors the paging
channel, it wakes up to the active mode to enable paging block reception. In between, the module switches to
low power idle mode. This is known as discontinuous reception (DRX).
The module processor core is activated during the paging block reception, and automatically switches its
reference clock frequency from 32 kHz to the 26 MHz used in active mode.
The time period between two paging block receptions is defined by the network. This is the paging period
parameter, fixed by the base station through broadcast channel sent to all users on the same serving cell.
For 2G radio access technology, the paging period varies from 470.8 ms (DRX = 2, length of 2 x 51 2G
frames = 2 x 51 x 4.615 ms) up to 2118.4 ms (DRX = 9, length of 9 x 51 2G frames = 9 x 51 x 4.615 ms)
For 3G radio access technology, the paging period can vary from 640 ms (DRX = 6, i.e. length of 26 3G
frames = 64 x 10 ms) up to 5120 ms (DRX = 9, length of 29 3G frames = 512 x 10 ms).
Figure 14 roughly describes the current consumption profile of SARA-G300 and SARA-G310 modules (when
their EXT32K input pin is fed by an external 32 kHz signal with characteristics compliant to the one specified in
the SARA-G3 seriesData Sheet [1]), or the SARA-G340 and SARA-G350 modules, or the SARA-U2 modules,
when power saving is enabled. The module is registered with the network, automatically enters the very low
power idle mode, and periodically wakes up to active mode to monitor the paging channel for paging block
reception.
Figure 14: VCC current consumption profile versus time of the SARA-G300 and SARA-G310 modules (with the EXT32K input fed
by a proper external 32 kHz signal), or the SARA-G340 and SARA-G350 modules, or the SARA-U2 modules, when registered
with the network, with power saving enabled: the very low power idle mode is reached and periodical wake up to active mode
are performed to monitor the paging channel
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20-30 ms
IDLE MODEACTIVE MODEIDLE MODE
Active Mode
Enabled
Idle Mode
Enabled
0.44-2.09 s
IDLE MODE
20-30 ms
ACTIVE MODE
Time [s]
Current [mA]
100
50
0
Time [ms]
Current [mA]
100
50
0
RX
Enabled
DSP
Enabled
Figure 15 roughly describes the current consumption profile of SARA-G300 and SARA-G310 modules when the
EXT32K input pin is fed by the 32K_OUT output pin provided by these modules, when power saving is enabled.
The module is registered with the network, automatically enters the low power idle mode and periodically wakes
up to active mode to monitor the paging channel for paging block reception.
Figure 15: VCC current consumption profile versus time of the SARA-G300 and SARA-G310 modules (with the EXT32K input pin
fed by the 32K_OUT output pin provided by these modules), when registered with the network, with power saving enabled:
the low power idle mode is reached and periodical wake up to active mode are performed to monitor the paging channel
For the modules’ detailed VCC current consumption values in low-power idle mode or in cyclic idle/active mode
(module registered with 2G / 3G network with power saving enabled), see the SARA-G3 series Data Sheet [1]
and the SARA-U2 series Data Sheet [2].
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