u-blox NINA-W1 series, NINA-W13 series, NINA-W15 series, NINA-W10 series, NINA-W101 System Integration Manual

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NINA-W1 series

Stand-alone Wi-Fi and multiradio modules

System Integration Manual

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Abstract

This document describes the system integration of NINA-W1 series stand-

alone modules, which

includes the NINA-W13 series (Wi-Fi) and NINA-W10 and NINA-W15 series (multiradio)

modules.

The module has a number of imp

ortant security features embedded, including secure boot, which

ensures that only authenticated software can run on the module. This makes NINA-

W1 ideal for

critical IoT applications where security is important. It connects to a host system using UART,

high-speed RMII, or a GPIO interface.

www.u-blox.com

UBX-17005730 - R07

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Document Information

Title NINA-W1 series

Subtitle Stand-alone Wi-Fi and multiradio modules

Document type System Integration Manual

Document number UBX-17005730

Revision and date R07 18-Dec-2018

Disclosure Restriction

Product status

Corresponding content status

Functional Sample Draft For functional testing. Revised and supplementary data will be published later.

In Development / Prototype

Objective Specification Target values. Revised and supplementary data will be published later.

Engineering Sample Advance Information Data based on early testing. Revised and suppleme ntary data will be published later.

Initial Production Early Production Information Data from product verification. Revised and supplementary data may be published later.

Mass Production / End of Life

Production Information Document contains the final product specification.

This document applies to the following products:

Product name Type number

u-blox connectivity software version

Hardware version

PCN reference Product status

NINA-W131 NINA-W131-00B-00 1.0.0 06 N/A Initial Production

NINA-W131-00B-01 1.0.1 06 UBX-18016827 Initial Production NINA-W131-01B-00 2.0.0 06 N/A Initial Production

NINA-W132 NINA-W132-00B-00 1.0.0 06 N/A Initial Production

NINA-W132-00B-01 1.0.1 06 UBX-18016827 Initial Production

NINA-W132-01B-00 2.0.0 06 N/A Initial Production NINA-W101 NINA-W101-00B-00 - 06 N/A Initial Production

NINA-W102 NINA-W102-00B-00 - 06 N/A Initial Production NINA-W151 NINA-W151-00B-00 1.0.0 06 N/A In Development NINA-W152 NINA-W152-00B-00 1.0.0 06 N/A In Development

u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this document. Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only permitted with the

express written permission of u-blox.

The information contained herein is provided “as is” and u

-blox assumes no liability for its use. No warranty, either express or

implied, is given, including but not limited

to, with respect to the accuracy, correctness, reliability and fitness for a particular

purpose of the information. This document may be revised by u

-blox at any time without notice. For the most recent

documents, visit www.u

-blox.com.

-blox AG.

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Contents

Document Information ................................................................................................................................ 2

Contents .......................................................................................................................................................... 3

System description ............................................................................................................................... 5

1.1 Overview ........................................................................................................................................................ 5

1.2 Architecture ................................................................................................................................................. 6

1.2.1 Block diagrams .................................................................................................................................... 6

1.3 CPU................................................................................................................................................................. 7

1.4 Operating modes ......................................................................................................................................... 7

1.4.1 Power modes ....................................................................................................................................... 7

1.5 Supply interfaces ........................................................................................................................................ 8

1.5.1 Module supply design (VCC) ............................................................................................................. 8

1.5.2 Digital I/O interfaces reference voltage (VCC_IO) ........................................................................ 8

1.5.3 VCC application circuits .................................................................................................................... 8

1.6 System function interfaces ...................................................................................................................... 8

1.6.1 Boot strapping pins ............................................................................................................................ 8

1.7 Data Interfaces ............................................................................................................................................ 9

1.7.1 Universal asynchronous serial interface (UART) ......................................................................... 9

1.7.2 Ethernet (RMII+SMI) ........................................................................................................................10

1.8 Antenna interfaces ...................................................................................................................................11

1.8.1 Antenna pin – NINA-W101/W131/W151 .....................................................................................11

1.8.2 Integrated antenna – NINA-W102/W132/W152 .......................................................................12

1.9 Reserved pins (RSVD) ..............................................................................................................................12

1.10 GND pins .....................................................................................................................................................12

Software ................................................................................................................................................. 13

2.1 Flashing the NINA module .......................................................................................................................13

2.2 Updating the NINA-W13/W15 u-blox connectivity software ..........................................................13

2.3 Developing and flashing the NINA-W10 open CPU software ..........................................................14

2.3.1 Setup Toolchain ................................................................................................................................14

2.3.2 Get ESP-IDF .......................................................................................................................................15

2.3.3 Setup path to ESP-IDF .....................................................................................................................16

2.3.4 Building and flashing ........................................................................................................................16

2.3.5 Automatic bootloader on NINA-W10 EVK ...................................................................................19

2.4 Arduino support for NINA-W10 ..............................................................................................................19

2.4.1 Downloading the Arduino IDE .........................................................................................................19

2.4.2 Downloading from the GIT repository ...........................................................................................20

2.4.3 Downloading the Toolchain ............................................................................................................21

2.5 Output power configuration ...................................................................................................................24

2.5.1 NINA-W10 series ..............................................................................................................................24

2.5.2 NINA-W13/W15 series ....................................................................................................................26

Design-in ................................................................................................................................................. 27

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3.1 Overview ......................................................................................................................................................27

3.2 Supply interfaces ......................................................................................................................................27

3.2.1 Module supply (VCC) design ...........................................................................................................27

3.2.2 Digital I/O interfaces reference voltage (VCC_IO) ......................................................................27

3.3 Antenna interface .....................................................................................................................................28

3.3.1 RF transmission line design (NINA-W101/W131/W151) ........................................................28

3.3.2 Antenna design (NINA-W101/W131/W151) ..............................................................................30

3.3.3 On-board antenna design (NINA-W102/W132/W152 only) ....................................................33

3.4 Data communication interfaces ............................................................................................................34

3.4.1 Asynchronous serial interface (UART) design ............................................................................34

3.4.2 Ethernet (RMII+SMI) ........................................................................................................................34

3.5 General High Speed layout guidelines ..................................................................................................34

3.5.1 General considerations for schematic design and PCB floor-planning .................................34

3.5.2 Module placement ............................................................................................................................35

3.5.3 Layout and manufacturing .............................................................................................................35

3.6 Module footprint and paste mask .........................................................................................................35

3.7 Thermal guidelines ...................................................................................................................................36

3.8 ESD guidelines ...........................................................................................................................................36

Handling and soldering ...................................................................................................................... 37

4.1 Packaging, shipping, storage and moisture preconditioning ..........................................................37

4.2 Handling ......................................................................................................................................................37

4.3 Soldering .....................................................................................................................................................37

4.3.1 Reflow soldering process ................................................................................................................37

4.3.2 Cleaning ..............................................................................................................................................38

4.3.3 Other remarks ...................................................................................................................................39

Approvals ............................................................................................................................................... 40

5.1 General requirements ..............................................................................................................................40

5.2 FCC/IC End-product regulatory compliance ........................................................................................40

5.2.1 NINA-W10 series FCC ID and IC certification number ..............................................................40

5.2.2 NINA-W13/W15 series FCC ID and IC certification number ....................................................40

5.2.3 Antenna requirements ....................................................................................................................41

Product testing ................................................................................................................................... 42

6.1 u-blox In-Series production test .............................................................................................................42

6.2 OEM manufacturer production test .....................................................................................................42

6.2.1 “Go/No go” tests for integrated devices ......................................................................................43

Appendix ....................................................................................................................................................... 44

A Glossary ................................................................................................................................................. 44

Related documents ................................................................................................................................... 46

Revision history .......................................................................................................................................... 46

Contact ........................................................................................................................................................... 47

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System description

1.1 Overview

The NINA-W1 series is a stand-alone Wireless and multiradio MCU IoT module suitable for industrial markets where security is important. The NINA-W1 series includes the following tree variants as listed in the table below:

Model Description

NINA-W13 series

Wireless MCU mod

ule that integrates a powerful microcontroller (MCU) and a radio for wireless

communication. The NINA-W13x modules come with pre-

flashed application software, supporting

802.11b/g/n in the 2.4 GHz ISM band. The host system can set up and control the module

through the AT

command interface. This greatly reduces the time and complexity to add Wi-Fi and Bluetooth

connectivity

to the end product. The NINA-

W13x modules provide top grade security, thanks to secure boot, which

ensures the module boots up only with original u-blox software.

NINA-W15 series

The NINA-W15x modules has similar performance as the NINA-W13x modules

but provides support for

dual-mode Bluetooth (Bluetooth BR/EDR low energy v4.2) making it a multiradio gateway.

NINA-W10 series

Multiradio

MCU module that integrates a powerful microcontroller (MCU) and a radio for wireless

communication. With the open CPU architecture, customers can develop advanced applications running

on the dual core 32-bit MCU. The radio provides support for Wi-Fi 802.1

1b/g/n in the 2.4 GHz ISM band, Bluetooth BR/EDR, and Bluetooth low energy communication. The module can be used to design solutions with top grade security, thanks to integrated cryptographic hardware accelerators. This enables secure

boot, which ensures the module boots up only in the presence of authenticated software.

NINA-W1 modules have full modular approval for Europe (RED), US (FCC), Canada (IC / ISED RSS), Japan (MIC), Taiwan (NCC), South Korea (KCC), Australia / New Zealand (ACMA)

, Brazil (Anatel) 1,

South Africa (ICASA)

. The modules will be qualified for professional grade operation, supporting an

extended temperature range of -40 °C to +85 °C.

Approvals are pending.

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1.2 Architecture

1.2.1 Block diagrams

Figure 1: Block diagram of NINA-W13 series

Figure 2: Block diagram of NINA-W15 series

Flash (16Mbit)

Linear voltage regulators

ROM

-Fi

baseband

IO Buffers

2xXtensa 32-bit LX6 MCU

SRAM (4Mbit)

Cryptographics

hardware

accelerations

Antenna

(NINA-W132)

PLL

Quad SPI

VCC_IO

VCC (3.0

-3.6V)

40 MHz

Reset

UART

RMII

EFUSE

GPIO

BPF

ANT (NINA-

W131)

Flash (16Mbit)

Linear voltage regulators

ROM

Wi-Fi baseband

IO Buffers

2xXtensa 32-bit LX6 MCU

SRAM (4Mbit)

Cryptographics

hardware

accelerations

Antenna

(NINA-W152)

PLL

Quad SPI

VCC_IO

VCC (3.0

- 3.6V)

40 MHz

Reset

UART

RMII

EFUSE

GPIO

BPF

ANT (NINA-

W151)

Bluetooth

baseband

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Figure 3: Block diagram of NINA-W10 series

1.3 CPU

The NINA-W1 series has a dual-core system with two Harvard Architecture Xtensa LX6 CPUs with maximum 240 MHz internal clock frequency. The internal memory of NINA-W1 includes the following:

• 448 Kbyte ROM for booting and core functions

• 520 Kbyte SRAM for data and instruction

• 16 Mbit FLASH for code storage including hardware encryption to protect programs and data

• 1 kbit EFUSE (non- erasable memory) for MAC addresses, module configuration, Flash-

Encryption, and Chip-ID

The open CPU variants (NINA-W101/NINA-W102) also support external FLASH and SRAM memory via a Quad SPI interface (see section 2.7.2.4).

1.4 Operating modes

1.4.1 Power modes

The NINA-W1 series modules are power efficient devices capable of operating in different power saving modes and configurations. Different sections of the module can be powered off when not needed and complex wake up events can be generated from different external and internal inputs. For the lowest current consumption modes, an external LPO clock is required (available for NINAW10 series modules).

Flash (16Mbit)

Linear voltage regulators

ROM

Wi-Fi baseband

Bluetooth Baseband

IO Buffers

2xXtensa 32-bit LX6 MCU

RAM (4Mbit)

Cryptographics

hardware

accelerations

Antenna

(NINA-W102)

PLL

Quad SPI

CC_IO

VCC (3.0- 3.6V)

40 MHz

Reset

ANT (NINA-W10

UART

RMII

SPI

SDIO

Quad SPI

JTAG

GPIO

ADC/DAC

EFUSE

CAN

BPF

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1.5 Supply interfaces

1.5.1 Module supply design (VCC)

The NINA-W1 series modules use an integrated Linear Voltage converter to transform the supply voltage presented at the VCC pin into a stable system voltage.

1.5.2 Digital I/O interfaces reference voltage (VCC_IO)

All modules in the NINA-W1 series provide an additional voltage supply input for setting the I/O voltage level.

The separate VCC_IO pin enables integration of the module in many applications with different voltage levels (for example, 1.8 V or 3.3 V) without any level converters. The NINA-W1 modules support only 3.3 V as IO voltage level currently.

1.5.3 VCC application circuits

The power for the NINA-W1 series modules is provided through the VCC pins, which can be one of the following:

• Switching Mode Power Supply (SMPS)

• Low Drop Out (LDO) regulator

The SMPS is the ideal choice when the available primary supply source has higher value than the operating supply voltage of the NINA-W1 series modules. The use of SMPS provides the best power efficiency for the overall application and minimizes current drawn from the main supply source.

⚠ While selecting SMPS, ensure that AC voltage ripple at switching frequency is kept as low as

possible. Layout shall be implemented to minimize impact of high frequency ringing.

The use of an LDO linear regulator is convenient for a primary supply with a relatively low voltage where the typical 85-90% efficiency of the switching regulator leads to minimal current saving. Linear regulators are not recommended for high voltage step-down as they will dissipate a considerable amount of energy.

DC/DC efficiency should be evaluated as a tradeoff between active and idle duty cycle of the specific application. Although some DC/DC can achieve high efficiency at extremely light loads, a typical DC/DC efficiency quickly degrades as idle current drops below a few mA greatly reducing the battery life.

It is considered as a best practice to have decoupling capacitors on the supply rails close to the NINA-W1 series module, although depending on the design of the power routing on the host system, capacitance might not be needed.

See the NINA-W13 series Data Sheet [2] and NINA-W10 series Data Sheet [3] for electrical specifications.

1.6 System function interfaces

1.6.1 Boot strapping pins

There are several boot configuration pins available on the module that must have the correct settings during boot. It is important that they are in the default state (marked with bold in Table 1) during startup for normal operation. The default state is automatically selected (with internal pullups or pull-downs) if the pins are left unconnected.

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Pin State during boot Default Behavior Description

VDD_SDIO=

3.3V

Voltage of Internal Flash

kΩ pull-up

VDD_SDIO=1

.8V

(VDD_SDIO should always be 1.8 V)

27, 25

00 Download Boot

Booting Mode, see section 2 for information about software upgrade.

01 Reserved, do not use

Pull-up*, Pull-down

Normal Boot from internal Flash

Silent

Debugging Log on U0TXD during booting

Pull-up* U0TXD Toggling

32, 28

Falling-edge input, falling-edge output

Timing of SDIO Slave

Falling-edge input, rising-edge output

Rising-edge input, falling-edge output

Pull-up*, Pull-up

Rising-edge input, rising-edge output

☞

About 30 kΩ

Table 1: NINA-W1 series boot strapping pins

1.7 Data Interfaces

1.7.1 Universal asynchronous serial interface (UART)

The NINA-W1 series module provides three Universal Asynchronous Serial Interface (UART) for data communication. The following UART signals are available:

• Data lines (RXD as input, TXD as output)

• Hardware flow control lines (CTS as input, RTS as output)

• DSR and DTS are used to set and indicate the system modes

The UART can be used as 4-wire UART with hardware flow control and 2-wire UART with only TXD and RXD.

If the UART is used in 2-wire mode, CTS should be connected to the GND on the NINA-W1 module. The UART interface is also be used for firmware upgrade. See the Software section for more information.

The u-blox connectivity software adds the DSR and DTR pins to the UART interface. These pins are not used as originally intended, but to control the state of the NINA module. Depending on the current configuration, the DSR can be used to:

• Enter command mode

• Disconnect and/or toggle connectable status

• Enable/disable the rest of the UART interface

• Enter/wake up from the sleep mode

The functionality of the DSR and DTR pins are configured by AT commands. See the u-blox Short Range Modules AT commands manual [1]

for more information.

See NINA-W13 series Data Sheet [2], NINA-W10 series Data Sheet [3], and NINA-W15 series Data Sheet [4] for characteristic information about the UART interface.

Interface Default configuration

UART interface 115200 baud, 8 data bits, no parity, 1 stop bit, hardware flow control

Table 2: Default settings for the UART port while using the u-blox connectivity software

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It is recommended to make the UART0 available either as test points or connected to a header for firmware upgrade. The IO level of the UART will follow the VCC_IO.

1.7.2 Ethernet (RMII+SMI)

For NINA-W13, RMII is supported from software version 2.0.0 onwards. For NINA-W15, direct MAC to MAC connection will be supported when the module reaches

Engineering Sample status.

The NINA-W1 series module includes a full RMII for Ethernet MAC to PHY communication using the included Station Management Interface (SMI). The RMII and SMI use 9 signals in total. The interface requires an external 50 MHz clock source either from a compatible PHY chip or from an external oscillator. The NINA-W1 series module cannot provide this clock signal by itself.

The two-wire SMI is used to configure the PHY chip. It uses a clock line and a data line to setup the internal registers on PHY chip.

Due to pin muxing of the RMII interface, there is a limitation in the functionality of NINA-W13/W15 series module when using RMII. The following functions will be turned off when RMII communication is initiated:

• Red, Green and Blue LED will be disabled

• UART will be run without flow control as CTS and RTS functionality will be disabled

• DSR and DTR functionality will be disabled

A pull up resistor of 1.5 kΩ must be added to MDIO pin.

1.7.2.1 Startup precautions

The RMII_CLK input (GPIO27) is muxed with the boot pin and must be held high 1.2 ms after the reset signal is released to ensure not to enter the boot mode.

EVK-NINA-W1 uses two buffers and a low pass filter to delay the reset signal going to the PHY circuit. See Figure 4.

This will delay the clock so that it starts a short time after the module is released from reset.

Figure 4: Delay circuit for RMII clock

Also the u-blox connectivity software will sense the RMII_CLK input (GPIO27) at startup. If an RMII clock is discovered, then Ethernet communication will be initiated.

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During startup of the NINA-W13/W15 series module, the RMII clock must be started within 100 us but not before the initial delay of 1.2 ms.

1.7.2.2 MAC to PHY connection

When connecting the NINA-W1 series module to an external PHY circuit, both the RMII and SMI interfaces must be connected. The default PHY address (0x1) must be configured on the PHY side. Follow the recommendations from the selected PHY chip for implementation details.

An example of a PHY implementation is shown in Figure 5. The PHY KSZ8081 is the recommended PHY that is used on the EVK-NINA-W1.

Figure 5: Ethernet PHY implementation on the EVK-NINA-W1

1.7.2.3 MAC to MAC connection

If you connect the NINA-W1 series module using a direct MAC to MAC connection, the SMI interface can be left unconnected. Depending on the routing of the RMII interface on the host PCB, termination resistors might also be needed.

An external 50 MHz oscillator is needed while running a MAC to MAC connection.

1.8 Antenna interfaces

The antenna interface is different for each module variant in the NINA-W1 series.

1.8.1 Antenna pin – NINA-W101/W131/W151

The NINA-W101/W131/W151 modules are equipped with an RF pin. The RF pin has a nominal characteristic impedance of 50 Ω and must be connected to the antenna through a 50 Ω transmission line to allow reception of radio frequency (RF) signals in the 2.4 GHz frequency band.

Choose an antenna with optimal radiating characteristics for the best electrical performance and overall module functionality. An internal antenna, integrated on the application board or an external antenna that is connected to the application board through a proper 50 Ω connector can be used.

While using an external antenna, the PCB-to-RF-cable transition must be implemented using either a suitable 50 Ω connector, or an RF-signal solder pad (including GND) that is optimized for 50 Ω characteristic impedance.

1.8.1.1 Antenna matching

The antenna return loss should be as good as possible across the entire band when the system is operational to provide optimal performance. The enclosure, shields, other components, and surrounding environment will impact the return loss seen at the antenna port. Matching components are often required to retune the antenna to bring the return loss within an acceptable range.

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It is difficult to predict the actual matching values for the antenna in the final form factor. Therefore, it is a good practice to have a placeholder in the circuit with a ”pi” network, with two shunt components and a series component in the middle, to allow maximum flexibility while tuning the matching to the antenna feed.

1.8.1.2 Approved antenna designs

NINA-W1 modules come with a pre-certified design that can be used to save costs and time during the certification process. To take advantage of this service, you have to implement the antenna layout according to the u-blox reference designs. The reference design is available on request from u-blox.

The designer integrating a u-blox reference design into an end-product is solely responsible for the unintentional emission levels produced by the end product.

The module may be integrated with other antennas. In this case, the OEM installer must certify his design with respective regulatory agencies.

1.8.2 Integrated antenna – NINA-W102/W132/W152

The NINA-W102/W132/W152 modules are equipped with an integrated antenna on the module for simpler integration.

1.9 Reserved pins (RSVD)

RSVD pins should be left unconnected.

1.10 GND pins

Good connection of the module's GND pins with solid ground layer of the host application board is required for correct RF performance. It significantly reduces the EMC issues and provides a thermal heat sink for the module.

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Software

The NINA-W13/W15 series module is delivered with the u-blox connectivity software.

The u-blox connectivity software enables the use of Wi-Fi, Bluetooth and Bluetooth low energy, controlled by the AT commands over the UART interface. More information on the features and capabilities of the u-blox connectivity software and how to use it can be found in the

u-blox Short

Range Modules AT Commands Manual [1] and NINA-W1 Getting Started [6].

The NINA-W10 series module is delivered without any software flashed.

2.1 Flashing the NINA module

The NINA-W13 and NINA-W15 application can be flashed using the s-center (XMODEM protocol is used). The following pins should be made available as either headers or test points to flash the module:

• UART (RXD, TXD, CTS, RTS)

• Bootstrap pins 25 and 27

• Reset_n

• SWITCH_1 and SWITCH_2

2.2 Updating the NINA-W13/W15 u-blox connectivity software

The u-blox connectivity software for NINA-W13/W15 is designed to validate the hardware, bootloader, and the binary image itself to make sure it runs only on a validated hardware such as NINA-W13/W15.

The u-blox connectivity software is delivered in a zip file – “NINA-W1xX_SW1.0.0.zip”.

Unzip this file before downloading. The secure boot is included in the file – *.json.

In s-center software, secure boot is supported from version 4.7 onwards. The *.json-file should be selected to make to use secure boot in the s-center as shown in Figure 6.

The s-center will handle the download using the information in the *.json file. No other interaction is needed from the user.

To manually start the download using a software other than s-center, use the following AT command to start updating the NINA-W13/W15 u-blox connectivity software:

AT+UFWUPD=<mode>,<baud>,<image id>,<image size>,<base64 encoded signature>,<image name>,<flags>

Sample parameters that can be used while doing the flash update is provided below:

AT+UFWUPD=0,115200,0,651840,jzlRIkg37ir/pVpDKVrPot2ZdsaNvUtSYP2pDAUVJc7iQI9yzIo8V Fv8C1olP/9I4UJ4WmgC5oRay4AC0V8jRJSFFX/wop6x/sBJGOeDEu7yC/s0+Oj7CLs4TzNbiRqK0zLwKR iHohgVyzWqhwKFpmcxcDXphjkCTIvpffY8TwDLzkowuuD59R+sQCueJtBHBg9KDB3TOs8bsXLaVtT2x1r LfMg8/pb+BPQEK9NcNB4hbp693ATivYE3cmxzWykIjEje819SIRGhHFt0wAsqh7WFgSJYNgDi5cLdOYz+ r1+j7+l4RqrMl/A/QYyWS9z0Q15QcJ3GlAJlXYa5v/ISjA==,nina-w1-debug,rwx

When a ‘C’ character is received from NINA-W13/W15, the XMODEM download is ready to begin from the host.

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Figure 6: Software Update using s-center

For more information about the parameters, see the Software update +UFWUPD command in u-blox Short Range Modules AT Commands Manual [1] and NINA-W1 Getting Started [6].

2.3 Developing and flashing the NINA-W10 open CPU software

If you are using the NINA-W10 open CPU variant, it is not possible to use the u-blox connectivity software. Use the software developed and compiled using the Espressif SDK on this variant.

The build and flash information while using Espressif SDK is available at the following URL -

http://esp-idf.readthedocs.io/en/latest/get-started/index.html.

This URL provides information on how to set up the software environment using the hardware based on the Espressif ESP32 such as NINA-W10 and also how to use the ESP-IDF (Espressif IoT Development Framework).

The following must be setup in order to compile, flash, and execute a program on NINA-W10:

• Setup Toolchain o Windows, Mac, and Linux is supported

• Get ESP-IDF o Download the GIT repository provided by Espressif

• Setup Path to ESP-IDF o The toolchain program can access the ESP-IDF using IDF_PATH environment variable

• Build and Flash o Start a Project, Connect, Configure, Build and Flash a program

More information about this is available at - http://esp-idf.readthedocs.io/en/latest/index.html

2.3.1 Setup Toolchain

To start development with ESP32, it is recommended to use a prebuilt toolchain. Currently, Windows, Mac, and Linux is supported. The example in this document will use a Toolchain for running Windows, that is, a bash shell window. The toolchain contains all programs and compiler to build an application.

The latest toolchain for Windows can be downloaded from

https://dl.espressif.com/dl/esp32_win32_msys2_environment_and_toolchain-20170918.zip

Unzip the file to c:\ msys32. This path is assumed in the following examples, but it can be located in another folder as well. The file size is around 500 MB.

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Start the bash shell using the“mingw32.exe” (“mingw64.exe” is currently not supported).

☞ If you encounter any issues, use the “autorebase.bat” and the “msys2_shell.cmd” shortcuts. This

will reset the path variable with a Cygwin installation on some computers, which can have problems with the path to the compiler or the python tool.

2.3.2 Get ESP-IDF

The source files for Espressif ESP-IDF repository is located on github at

https://github.com/espressif/esp-idf.

To download the files, open the “mingw32.exe”, navigate to the directory where you want to have the ESP-IDF (like c:\git), and clone it using “git clone” command.

☞ Use the “--recursive” parameter

In this example, the esp-idf repository will be created in the c:\git folder.

git clone --recursive https://github.com/espressif/esp-idf.git

To checkout a specific tag such as v2.1, use the following command as shown in the example below:

git clone https://github.com/espressif/esp-idf.git esp-idf-v3.1 cd esp-idf-v3.1/ git checkout v3.1 git submodule update --init --recursive

Figure 7: Example of the git clone of ESP-IDF

Go to the new folder by typing “cd esp-idf” and then type “ls” to show the folder content.

cd esp-idf ls

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export IDF_PATH="C:/git/esp-idf"

cd examples/get-started/hello_world

Figure 8: Verification of all the downloaded files

2.3.3 Setup path to ESP-IDF

The toolchain for the ESP-IDF uses the IDF_PATH environment variable. This variable must be set up for building the projects.

Figure 9: Setting up the PATH variable

2.3.4 Building and flashing

The environment is now ready to build and flash a project. In this case, we use “hello world” as a sample project.

This project will print out “Hello World” ten times on the UART and then reboot.

To build this sample project, go to the “hello world” folder using the following command:

Plug in NINA-W10 to the PC and note down the com port number with which it is connected. In this example, the com port number is assumed to be “COM10”.

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make menuconfig

Now enter “make menuconfig” to open the ESP-IDF configuration window. You can select and modify a lot of configuration options about the environment using this tool; in this example, only the com port that is used to flash NINA-W10 is modified.

Use the arrow keys to navigate and select the “Serial flasher config” as shown in Figure 10.

Figure 10: Screenshot that shows selection of “Serial flasher config”

Enter the com port name; in this case, enter “COM10”, and click OK.

Figure 11: Screenshot that shows selection of the sample com port number ("COM10")

Save the sdkconfig by entering a filename to which this configuration should be saved as shown in Figure 12.

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make flash

make flash monitor

make monitor

Figure 12: Screenshot after entering the filename for the sdkconfig

☞ Make sure your configuration is saved first and then enter Exit to exit the console.

Now the project is ready to build, but before building and flashing, NINA-W10 should be prepared to accept the downloaded file. This is done by holding the BOOT button while resetting or powering on the board.

Then, enter “make flash” to build and flash the NINA-W10 as shown below:

Figure 13: Compiling of the example application

Now, reset the NINA-W10 by clicking the RESET button.

Then, enter “make monitor” to open a serial port monitor program to the NINA-W10.

You could also enter “make flash monitor” to build and flash and then start the serial port monitor program using only one command.

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Figure 14: Hello world example as displayed on the monitor

2.3.5 Automatic bootloader on NINA-W10 EVK

The “esptool.py” flashtool supports automatic entry to the bootloader on the NINA-W10 EVK without pressing the BOOT button and RESET the module. To use this functionality, you need to connect the following pins:

• RESET to IO19 (CTS)

• IO0 (IO zero) to IO26 (DSR)

The jumpers CTS (J14-8) and DSR (J14-7) should also be removed so that they do not interfere.

☞ It is not possible to use the Hardware Flow control or the DSR signals on the UART while using

this setup.

More information about the esptool is available at - https://github.com/espressif/esptool

2.4 Arduino support for NINA-W10

It is possible to use Arduino electronics platform on the NINA-W10. The Arduino platform and open source community provides the possibility to access a lot of third party hardware such as displays and sensors.

2.4.1 Downloading the Arduino IDE

Windows, Mac, and Linux environment are supported. The example below uses the Windows environment. Download the Arduino IDE using the URL - https://www.arduino.cc/en/Main/Software.

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mkdir hardware

cd hardware

Figure 15: Screenshot during installation of the Arduino IDE

Click Install button in the dialog box that pops up during installation as shown in the screenshots below:

Open the Arduino IDE - "C:\Program Files (x86)\Arduino\arduino.exe" and then close the program again. Do this to ensure that the folder is created correctly before downloading the Arduino files as mentioned in the next step.

The Arduino IDE user folder is typically located in “C:\Users\user_name\Documents\Arduino”

2.4.2 Downloading from the GIT repository

Download from the URL - https://github.com/espressif/arduino-esp32.git

The files should be placed in “C:\Users\user_name\Documents\Arduino\hardware\espressif\esp32”

Open the “mingw32.exe” located in c:\msys32.

The Arduino user folder is normally stored at the following location “C:\Users\user_name\Documents\Arduino”

Check if the hardware folder exists. If not, create the same by entering the following command:

Check if the espressif folder exists; if not, create the same by entering the following command:

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git clone --recursive https://github.com/espressif/arduino-esp32.git esp32

mkdir espressif

cd espressif

Now clone the repository to the folder esp32 folder.

Figure 16: Cloning the Arduino Esp32 repository

2.4.3 Downloading the Toolchain

Go to the folder - “C:\Users\user_name\Documents\Arduino\hardware\espressif\esp32\tools” to execute the program – “get.exe”.

Double click on the “get.exe” to start the download. This will download the toolchain that is needed to build and flash the project. All the files are extracted on successful download.

Figure 17: Screenshot after selecting "get.exe"

☞ Normally, it takes around 15-30 minutes to download this program.

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Figure 18: Sample screenshot during download

Open the Arduino application again from the following location - "C:\Program Files

(x86)\Arduino\arduino.exe"

In the Tools -> Board menu, select “ESP32 Dev Module” and then select the following;

• Flash Mode: “DIO”

• Flash Frequency: “40 MHz”

• Flash Size: “2 MB (16 Mb)”

• Upload Speed “921600”

• Core Debug Level “Debug” (optional)

Figure 19: Screenshot that depicts selection of the ESP32 Dev Module

☞ u-blox NINA-W10 module will soon be added to the list of supported boards; Until then, use the

ESP32 Dev Module.

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Start the WiFiScan example, which is available at the following folder -

C:\Users\ user_name \Documents\Arduino\hardware\espressif\esp32\libraries\WiFi\examples\WiFiScan

Press the “->” (arrow) button, as shown highlighted in red in the below screenshot (Figure 20), to start the upload to NINA-W10.

Figure 20: Screenshot that depicts the arrow at the top

Select "Serial Monitor" from the Tools menu as shown in Figure 21 to view the events.

Figure 21: Screenshot that depicts selection of the “Serial Monitor”

The Wi-Fi scan starts and will display results as shown in the sample screenshot below (Figure 22).

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Figure 22: Sample screenshot of the Wi-Fi scan

2.5 Output power configuration

2.5.1 NINA-W10 series

To operate within the regulatory output power limits, the integrator must configure the module as per the instructions in the following subsections.

The following power configuration for Wi-Fi, Bluetooth BR/EDR and Bluetooth low energy is only valid for the official v3.1 esp-idf git repository.

2.5.1.1 Wi-Fi output power configuration for version v2.1

The original file (phy_init.c) is located in the folder - ...\esp-idf\components\esp32\ in the official v2.1 esp-idf git repository. Update this file with the values provided below:

init_data[50] = 0; //msc0 init_data[51] = 0; //msc1 init_data[52] = 0; //msc2 init_data[53] = 0; //msc3 init_data[54] = 0; //msc4 init_data[55] = 2; //msc5 init_data[56] = 4; //msc6 init_data[57] = 5; //msc7

init_data[58] = 1; //11B special rate enable init_data[59] = 3; //11B 1m, 2m init_data[60] = 3; //11B 5.5, 11m

init_data[61] = 1; //channel backoff enable

init_data[62] = 18; //backoff channel 1 init_data[63] = 4;//backoff channel 2 init_data[64] = 2;//backoff channel 3 init_data[65] = 2;//backoff channel 4 init_data[66] = 2;//backoff channel 5 init_data[67] = 0;//backoff channel 6

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init_data[68] = 0;//backoff channel 7 init_data[69] = 0;//backoff channel 8 init_data[70] = 0;//backoff channel 9 init_data[71] = 0;//backoff channel 10 init_data[72] = 14;//backoff channel 11 init_data[73] = 26;//backoff channel 12 init_data[74] = 255;//backoff channel 13 init_data[75] = 255;//backoff channel 14

init_data[76] = 15; //backoff rate on channel 1 init_data[77] = 15; //backoff rate on channel 2 init_data[78] = 8; //backoff rate on channel 3 init_data[79] = 8; //backoff rate on channel 4 init_data[80] = 8; //backoff rate on channel 5 init_data[81] = 0; //backoff rate on channel 6 init_data[82] = 0; //backoff rate on channel 7 init_data[83] = 0; //backoff rate on channel 8 init_data[84] = 0; //backoff rate on channel 9 init_data[85] = 0; //backoff rate on channel 10 init_data[86] = 7; //backoff rate on channel 11 init_data[87] = 63; //backoff rate on channel 12 init_data[88] = 63; //backoff rate on channel 13 init_data[89] = 63; //backoff rate on channel 14 apply_rf_frequency_calibration(init_data);

ESP_LOGD(TAG, "loading PHY init data from application binary"); return (esp_phy_init_data_t*)init_data; }

2.5.1.2 Wi-Fi output power configuration for version v3.1

The original file (phy_init.c) is located in the folder - ...\esp-idf\components\esp32\ in the official v3.1 esp-idf git repository. Update this file with the values provided below:

const esp_phy_init_data_t* esp_phy_get_init_data() { int8_t *init_data = malloc(sizeof(esp_phy_init_data_t)); memcpy(init_data, &phy_init_data, sizeof(esp_phy_init_data_t)); init_data[44] = 56;//target power 0 init_data[45] = 54;//target power 1 init_data[46] = 48;//target power 2 init_data[47] = 46;//target power 3 init_data[48] = 42;//target power 4 init_data[49] = 36;//target power 5 init_data[50] = 0; //msc0 init_data[51] = 0; //msc1 init_data[52] = 0; //msc2 init_data[53] = 0; //msc3 init_data[54] = 0; //msc4 init_data[55] = 1; //msc5 init_data[56] = 3; //msc6 init_data[57] = 4; //msc7 init_data[58] = 1; //11B special rate enable init_data[59] = 2; //11B 1m, 2m init_data[60] = 2; //11B 5.5, 11m init_data[61] = 2; //fcc enable 2: enable 62-80 bytes to set maximum power init_data[62] = 0x53; //channel 1 init_data[63] = 0x52;//channel 2 init_data[64] = 0x30;//channel 3 init_data[65] = 0x20;//channel 4 init_data[66] = 0x20;//channel 5 init_data[67] = 0x20;//channel 6 init_data[68] = 0x20;//channel 7 init_data[69] = 0x20;//channel 8 init_data[70] = 0x20;//channel 9 init_data[71] = 0x20;//channel 10 init_data[72] = 0x22;//channel 11 init_data[73] = 0x10;//channel 12

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init_data[74] = 0x10;//channel 13 init_data[75] = 0xAA;//channel 14 init_data[76] = 0x44; //channel 3, 4 init_data[77] = 0x44; //channel 5, 6 init_data[78] = 0x44; //channel 7, 8 init_data[79] = 0x44; //channel 9, 10 init_data[80] = 0x44; //channel 11 apply_rf_frequency_calibration(init_data); ESP_LOGD(TAG, "loading PHY init data from application binary"); return (esp_phy_init_data_t*)init_data; }

2.5.1.3 Bluetooth BR/EDR output power configuration

No output power configuration for Bluetooth BR/EDR is required. With default settings, the module will operate at ~6 dBm, which is within the regulatory limit for NINA-W1.

2.5.1.4 Bluetooth low energy output power configuration

No output power configuration for Bluetooth low energy is required. With default settings, the module will operate at ~6 dBm, which is within the regulatory limit for NINA-W1.

2.5.2 NINA-W13/W15 series

No output power configuration required by the integrator. Using the u-blox connectivity software guarantees operation within regulatory limits.

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Design-in

3.1 Overview

For an optimal integration of NINA-W1 series modules in the final application board, it is recommended to follow the design guidelines stated in this chapter. Every application circuit must be properly designed to guarantee the correct functionality of the related interface, however a number of points require high attention during the design of the application device.

The following list provides important points sorted by rank of importance in the application design, starting from the highest relevance:

1. Module antenna connection: Ant pad

Antenna circuit affects the RF compliance of the device integrating NINA-W101 and NINAW131 modules with applicable certification schemes. Follow the recommendations provided in section 3.3 for schematic and layout design.

2. Module supply: VCC, VCC_IO, and GND pins

The supply circuit affects the performance of the device integrating NINA-W1 series module. Follow the recommendations provided in section 3.2 for schematic and layout design.

3. High speed interfaces: UART pins

High speed interfaces can be a source of radiated noise and can affect compliance with regulatory standards for radiated emissions. Follow the recommendations provided in section

3.4.1 for schematic and layout design.

4. System functions: RESET_N, GPIO and other System input and output pins

Accurate design is required to guarantee that the voltage level is well defined during module boot.

5. Other pins:

Accurate design is required to guarantee proper functionality.

3.2 Supply interfaces

3.2.1 Module supply (VCC) design

Good connection of the module’s VCC pin with DC supply source is required for correct RF performance. The guidelines are summarized below:

• The VCC connection must be as wide and short as possible.

• The VCC connection must be routed through a PCB area separated from sensitive analog signals

and sensitive functional units. It is a good practice to interpose at least one layer of the PCB ground between VCC track and other signal routing.

There is no strict requirement of adding bypass capacitance to the supply net close to the module. But depending on the layout of the supply net and other consumers on the same net, bypass capacitors might still be beneficial. Though the GND pins are internally connected, connect all the available pins to solid ground on the application board, as a good (low impedance) connection to an external ground can minimize power loss and improve RF and thermal performance.

3.2.2 Digital I/O interfaces reference voltage (VCC_IO)

Good connection of the module’s VCC_IO pin with DC supply source is required for correct performance. The guidelines are summarized below:

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• The VCC_IO connection must be as wide and short as possible.

• The VCC_IO connection must be routed through a PCB area separated from sensitive analog

signals and sensitive functional units. It is a good practice to interpose at least one layer of PCB ground between VCC_IO track and other signal routing.

3.3 Antenna interface

As the unit cannot be mounted arbitrarily, the placement should be chosen with consideration so that it does not interfere with radio communication. The NINA-W102, NINA-W132 and W152 modules with an internal surface mounted antenna cannot be mounted in a metal enclosure. No metal casing or plastics using metal flakes should be used. Avoid metallic based paint or lacquer as well. The NINA-W101 and NINA-W131 modules offer more freedom as an external antenna can be mounted further away from the module.

⚠ According to the FCC regulations, the transmission line from the module’s antenna pin to the

antenna or antenna connector on the host PCB is considered part of the approved antenna design. Therefore, module integrators must either follow exactly one of the antenna reference design used in the module’s FCC type approval or certify their own designs.

3.3.1 RF transmission line design (NINA-W101/W131/W151)

RF transmission lines, such as the ones from the ANT pad up to the related antenna connector or up to the related internal antenna pad, must be designed so that the characteristic impedance is as close as possible to 50 Ω. Figure 23 illustrates the design options and the main parameters to be taken into account when implementing a transmission line on a PCB:

• The micro strip (a track coupled to a single ground plane, separated by dielectric material)

• The coplanar micro strip (a track coupled to the ground plane and side conductors, separated by

dielectric material)

• The strip line (a track sandwiched between two parallel ground planes, separated by dielectric

material).

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Figure 23: Transmission line trace design

To properly design a 50 Ω transmission line, the following remarks should be taken into account:

• The designer should provide enough clearance from surrounding traces and ground in the same

layer; in general, a trace to ground clearance of at least two times the trace width should be considered and the transmission line should be ‘guarded’ by ground plane area on each side.

• The characteristic impedance can be calculated as first iteration using tools provided by the

layout software. It is advisable to ask the PCB manufacturer to provide the final values that are usually calculated using dedicated software and available stack-ups from production. It could also be possible to request an impedance coupon on panel’s side to measure the real impedance of the traces.

• FR-4 dielectric material, although its high losses at high frequencies can be considered in RF

designs provided that:

o RF trace length must be minimized to reduce dielectric losses. o If traces longer than few centimeters are needed, it is recommended to use a coaxial

connector and cable to reduce losses

o Stack-up should allow for thick 50 Ω traces and at least 200 µm trace width is

recommended to assure good impedance control over the PCB manufacturing process.

o FR-4 material exhibits poor thickness stability and thus less control of impedance

over the trace length. Contact the PCB manufacturer for specific tolerance of controlled impedance traces.

• The transmission lines width and spacing to the GND must be uniform and routed as smoothly as

possible: route RF lines in 45 °C angle or in arcs.

• Add GND stitching vias around transmission lines.

• Ensure solid metal connection of the adjacent metal layer on the PCB stack-up to main ground

layer, providing enough vias on the adjacent metal layer.

• Route RF transmission lines far from any noise source (as switching supplies and digital lines)

and from any sensitive circuit to avoid crosstalk between RF traces and Hi-impedance or analog signals.

• Avoid stubs on the transmission lines, any component on the transmission line should be placed

with the connected pad over the trace. Also avoid any unnecessary component on RF traces.

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Figure 24: Example of RF trace and ground design from NINA-W1 Evaluation Kit (EVK)

3.3.2 Antenna design (NINA-W101/W131/W151)

NINA-W101/W131/W151 is suited for designs when an external antenna is needed due to mechanical integration or placement of the module.

Designers must take care of the antennas from all perspective at the beginning of the design phase when the physical dimensions of the application board are under analysis/decision, as the RF compliance of the device integrating NINA-W1 module with all the applicable required certification schemes heavily depends on the radiating performance of the antennas. The designer is encouraged to consider one of the u-blox suggested antenna part numbers and follow the layout requirements.

• External antennas such as linear monopole:

o External antennas basically do not imply physical restriction to the design of the PCB

where the module is mounted.

o The radiation performance mainly depends on the antennas. It is required to select

antennas with optimal radiating performance in the operating bands.

o RF cables should be carefully selected with minimum insertion losses. Additional

insertion loss will be introduced by low quality or long cable. Large insertion loss reduces radiation performance.

o A high quality 50 Ω coaxial connector provides proper PCB-to-RF-cable transition.

• Integrated antennas such as patch-like antennas:

o Internal integrated antennas imply physical restriction to the PCB design:

Integrated antenna excites RF currents on its counterpoise, typically the PCB ground plane of the device that becomes part of the antenna; its dimension defines the minimum frequency that can be radiated. Therefore, the ground plane can be reduced down to a minimum size that should be similar to the quarter of the wavelength of the minimum frequency that has to be radiated, given that the orientation of the ground plane related to the antenna element must be considered. The RF isolation between antennas in the system has to be as high as possible and the correlation between the 3D radiation patterns of the two antennas has to be as low as possible. In general, an RF separation of at least a quarter wavelength between the two antennas is required to achieve a maximum isolation and low pattern correlation;

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increased separation should be considered if possible, to maximize the performance and fulfil the requirements in Table 3. As a numerical example, the physical restriction to the PCB design can be considered as shown below: Frequency = 2.4 GHz  Wavelength = 12.5 cm  Quarter wavelength = 3.125 cm

o Radiation performance depends on the whole product and antenna system design,

including product mechanical design and usage. Antennas should be selected with optimal radiating performance in the operating bands according to the mechanical specifications of the PCB and the whole product.

Table 3 summarizes the requirements for the antenna RF interface:

Item Requirements Remarks

Impedance

50 Ω nominal characteristic impedance

The impedance of the antenna RF connection must match the 50 Ω impedance of the ANT pin.

Frequency Range 2400 - 2500 MHz Wi-Fi.

Return Loss

< -10 dB (VSWR < 2:1) recommended S

< -6 dB (VSWR < 3:1) acceptable

The Return loss or the S

, as the VSWR, refers to the amount of reflected power, measuring how well the primary antenna RF connection matches the 50 Ω characteristic impedance of the ANT pin. The impedance of the antenna termination must match as much as possible the 50 Ω nominal impedance of the ANT pin over the operating frequency range thus, maximizing the amount of the power transferred to the antenna.

Efficiency > -1.5 dB ( > 70% ) recommended

> -3.0 dB ( > 50% ) acceptable

The radiation efficiency is the ratio of the radiated power to the power delivered to the antenna input; the efficiency is a measure of how well an antenna receives or transmits.

Maximum Gain Refer to Datasheet

The maximum antenna gain must not exceed the value

specified in type approval documentation to comply with the

radiation exposure limits specified by regulatory agencies.

Table 3: Summary of antenna interface (ANT) requirements for NINA-W101/W131/W151

Observe the following recommendations while selecting external or internal antennas:

• Select antennas that provide optimal return loss (or VSWR) figure over all the operating frequencies.

• Select antennas that provide optimal efficiency figure over all the operating frequencies.

• Select antennas that provide appropriate gain figure (that is, combined antenna directivity and

efficiency figure) so that the electromagnetic field radiation intensity does not exceed the regulatory limits specified in some countries (for example, by FCC in the United States).

3.3.2.1 RF Connector Design

If an external antenna is required, the designer should consider using a proper RF connector. It is the responsibility of the designer to verify the compatibility between plugs and receptacles used in the design.

Table 4 suggests some RF connector plugs that can be used by the designers to connect RF coaxial cables based on the declaration of the respective manufacturers. The Hirose U.FL-R-SMT RF receptacles (or similar parts) require a suitable mated RF plug from the same connector series. Due to wide usage of this connector, several manufacturers offer compatible equivalents.

Wavelength referred to a signal propagating over the air.

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Manufacturer Series Remarks

Hirose U.FL® Ultra Small Surface Mount Coaxial Connector Recommended

I-PEX MHF® Micro Coaxial Connector

Tyco UMCC® Ultra-Miniature Coax Connector

Amphenol RF AMC® Amphenol Micro Coaxial

Lighthorse Technologies, Inc. IPX ultra micro-miniature RF connector

Table 4: U.FL compatible plug connector

Typically, the RF plug is available as a cable assembly. Different types of cable assembly are available; the user should select the cable assembly best suited to the application. The key characteristics are:

• RF plug type: select U.FL or equivalent

• Nominal impedance: 50 Ω

• Cable thickness: Typically from 0.8 mm to 1.37 mm. Select thicker cables to minimize insertion

loss.

• Cable length: Standard length is typically 100 mm or 200 mm; custom lengths may be available on request. Select shorter cables to minimize insertion loss.

• RF connector on the other side of the cable: For example, another U.FL. (for board-to-board connection) or SMA (for panel mounting)

Consider that SMT connectors are typically rated for a limited number of insertion cycles. Additionally, the RF coaxial cable may be relatively fragile compared to other types of cables. To increase application ruggedness, connect U.FL connector to a more robust connector such as SMA fixed on panel.

• A de-facto standard for SMA connectors implies the usage of reverse polarity connectors (RP-SMA) on Wi-Fi and Bluetooth

end products to increase the difficulty for the end user to

replace the antenna with higher gain versions and exceed regulatory limits.

The following recommendations apply for proper layout of the connector:

• Strictly follow the connector manufacturer’s recommended layout:

o SMA Pin-Through-Hole connectors require GND keep-out (that is, clearance, a void area)

on all the layers around the central pin up to annular pads of the four GND posts.

o U.FL. surface mounted connectors require no conductive traces (that is, clearance, a

void area) in the area below the connector between the GND land pads.

• If the connector’s RF pad size is wider than the micro strip, remove the GND layer beneath the RF connector to minimize the stray capacitance thus keeping the RF line 50 Ω. For example, the active pad of the U.FL. connector must have a GND keep-out (that is, clearance, a void area) at least on the first inner layer to reduce parasitic capacitance to ground.

3.3.2.2 Integrated antenna design

If integrated antennas are used, the transmission line is terminated by the integrated antennas themselves. Follow the guidelines mentioned below:

• The antenna design process should begin at the start of the whole product design process. Self- made PCBs and antenna assembly are useful in estimating overall efficiency and radiation path of the intended design.

• Use antennas designed by an antenna manufacturer providing the best possible return loss (or VSWR).

• Provide a ground plane large enough according to the related integrated antenna requirements. The ground plane of the application PCB may be reduced down to a minimum size that must be

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similar to one quarter of wavelength of the minimum frequency that has to be radiated; however overall antenna efficiency may benefit from larger ground planes.

• Proper placement of the antenna and its surroundings is also critical for antenna performance. Avoid placing the antenna close to conductive or RF-absorbing parts such as metal objects, ferrite sheets and so on as they may absorb part of the radiated power or shift the resonant frequency of the antenna or affect the antenna radiation pattern.

• It is highly recommended to strictly follow the detailed and specific guidelines provided by the antenna manufacturer regarding correct installation and deployment of the antenna system, including PCB layout and matching circuitry.

• Further to the custom PCB and product restrictions, antennas may require tuning/matching to comply with all the applicable required certification schemes. It is recommended to consult the antenna manufacturer for the design-in guidelines and plan the validation activities on the final prototypes like tuning/matching and performance measures (see Table 3).

• RF section may be affected by noise sources like hi-speed digital buses. Avoid placing the antenna close to buses such as DDR or consider taking specific countermeasures like metal shields or ferrite sheets to reduce the interference.

⚠ Take care of interaction between co-located RF systems like LTE sidebands on 2.4 GHz band.

Transmitted power may interact or disturb the performance of NINA-W1 modules.

3.3.3 On-board antenna design (NINA-W102/W132/W152 only)

If a plastic enclosure is used it is possible to use NINA-W1 with embedded antenna. In order to reach optimum operating range the following instruction shall be implemented.

• The module shall be placed in the corner of the host PCB with the antennas feed point in the corner (pin 15 and 16), according to Figure 22. Other edge placements positions, with the antenna closest to the edge, are also possible. These will however give moderate reduced antenna performance compared to the corner placement.

• A large ground plane on the host PCB is a prerequisite for good antenna performance.

• The host PCB shall include a full GND plane underneath the entire module, including the antenna

section. This to facilitate efficient grounding of the module.

• High / large parts including metal shall not be placed closer than 10 mm to the modules antenna.

• At least 5 mm clearance between the antenna and the casing is needed. If less than 5 mm can be

achieved the antenna performance will be affected. PC and ABS gives less impact and POS type plastic gives more.

• The module shall be placed such that the antenna faces outwards from the product and is not obstructed by any external items in close vicinity of the products intended use case.

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Figure 25: NINA-W102 or NINA-W132 with internal antenna

⚠ Take care while handling the EVK-NINA-W102/W132/W152. Applying force to the module might

damage the internal antenna.

3.4 Data communication interfaces

3.4.1 Asynchronous serial interface (UART) design

The layout of the UART bus should be done so that noise injection and cross talk are avoided. It is recommended to use the hardware flow control with RTS/CTS to prevent temporary UART buffer overrun.

• If CTS is 1, then the Host/Host Controller is allowed to send.

• If CTS is 0, then the Host/Host Controller is not allowed to send.

3.4.2 Ethernet (RMII+SMI)

It is recommended to route all signals in the RMII bus with the same length and have appropriate grounding in the surrounding layers; total bus length should also be minimized. The layout of the RMII bus should be done so that crosstalk with other parts of the circuit is minimized providing adequate isolation between the signals, the clock and the surrounding busses/traces.

Termination resistors are recommended on the RX and TX lines of the RMII bus.

Pull-up resistor is required for MDIO.

The General High Speed layout guidelines in section 3.5 apply for the RMII and the SMI bus.

3.5 General High Speed layout guidelines

These general design guidelines are considered as best practices and are valid for any bus present in the NINA-W1 series modules; the designer should prioritize the layout of higher speed busses. Low frequency signals are generally not critical for layout.

☞ One exception is represented by High Impedance traces (such as signals driven by weak pull

resistors) that may be affected by crosstalk. For those traces, a supplementary isolation of 4w from other busses is recommended.

3.5.1 General considerations for schematic design and PCB floor-planning

• Verify which signal bus requires termination and add series resistor terminations to the schematics.

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• Carefully consider the placement of the module with respect to antenna position and host processor.

• Verify with PCB manufacturer allowable stack-ups and controlled impedance dimensioning.

• Verify that the power supply design and power sequence are compliant with the specification of

NINA-W1 series module.

3.5.2 Module placement

• Accessory parts like bypass capacitors should be placed as close as possible to the module to improve filtering capability, prioritizing the placement of the smallest size capacitor close to module pads.

⚠ Particular care should be taken not to place components close to the antenna area. The designer

should carefully follow the recommendations from the antenna manufacturer about the distance of the antenna vs. other parts of the system. The designer should also maximize the distance of the antenna to Hi-frequency busses like DDRs and related components or consider an optional metal shield to reduce interferences that could be picked up by the antenna thus reducing the module’s sensitivity.

• An optimized module placement allows better RF performance. See section 3.3 for more information on antenna consideration during module placement.

3.5.3 Layout and manufacturing

• Avoid stubs on high speed signals. Even through-hole vias may have an impact on signal quality.

• Verify the recommended maximum signal skew for differential pairs and length matching of

buses.

• Minimize the routing length; longer traces will degrade signal performance. Ensure that maximum allowable length for high speed busses is not exceeded.

• Ensure that you track your impedance matched traces. Consult with your PCB manufacturer early in the project for proper stack-up definition.

• RF and digital sections should be clearly separated on the board.

• Ground splitting is not allowed below the module.

• Minimize bus length to reduce potential EMI issues from digital busses.

• All traces (including low speed or DC traces) must couple with a reference plane (GND or power);

Hi-speed busses should be referenced to the ground plane. In this case, if the designer needs to change the ground reference, an adequate number of GND vias must be added in the area of transition to provide a low impedance path between the two GND layers for the return current.

• Hi-Speed busses are not allowed to change reference plane. If a reference plane change is unavoidable, some capacitors should be added in the area to provide a low impedance return path through the different reference planes.

• Trace routing should keep a distance greater than 3W from the ground plane routing edge.

• Power planes should keep a distance from the PCB edge sufficient to route a ground ring around

the PCB, the ground ring must then be connected to other layers through vias.

3.6 Module footprint and paste mask

The mechanical outline of the NINA-W1 series modules can be found in the NINA-W13 series Data Sheet [2], NINA-W10 series Data Sheet [3] and NINA-W15 series Data Sheet [4]. The proposed land pattern layout reflects the pads layout of the module.

The Non Solder Mask Defined (NSMD) pad type is recommended over the Solder Mask Defined (SMD) pad type, which implements the solder mask opening 50 μm larger per side than the corresponding copper pad.

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The suggested paste mask layout for the NINA-W1 series modules is to follow the copper mask layout as described in the NINA-W13 series Data Sheet [2], NINA-W10 series Data Sheet [3] and NINA-W15 series Data Sheet [4].

⚠ These are recommendations only and not specifications. The exact mask geometries, distances

and stencil thicknesses must be adapted to the specific production processes of the customer.

3.7 Thermal guidelines

The NINA-W1 series modules have been successfully tested in -40 °C to +85 °C. A good grounding should be observed for temperature relief during high ambient temperature.

3.8 ESD guidelines

The immunity of devices integrating NINA-W1 modules to Electro-Static Discharge (ESD) is part of the Electro-Magnetic Compatibility (EMC) conformity, which is required for products bearing the CE marking, compliant with the R&TTE Directive (99/5/EC), the EMC Directive (89/336/EEC) and the Low Voltage Directive (73/23/EEC) issued by the Commission of the European Community.

Compliance with these directives implies conformity to the following European Norms for device ESD immunity: ESD testing standard

CENELEC EN 61000-4-2

and the radio equipment standards

ETSI EN 301 489-1, ETSI EN 301 489-7, ETSI EN 301 489-24

, the requirements of which are

summarized in Table 5.

The ESD immunity test is performed at the enclosure port, defined by

ETSI EN 301 489-1

as the physical boundary through which the electromagnetic field radiates. If the device implements an integral antenna, the enclosure port is seen as all insulating and conductive surfaces housing the device. If the device implements a removable antenna, the antenna port can be separated from the enclosure port. The antenna port includes the antenna element and its interconnecting cable surfaces.

The applicability of ESD immunity test to the whole device depends on the device classification as defined by

ETSI EN 301 489-1

. Applicability of ESD immunity test to the related device ports or the related interconnecting cables to auxiliary equipment, depends on the device accessible interfaces and manufacturer requirements, as defined by the

ETSI EN 301 489-1

Contact discharges are performed at conductive surfaces, while air discharges are performed at insulating surfaces. Indirect contact discharges are performed on the measurement setup horizontal and vertical coupling planes as defined in the

CENELEC EN 61000-4-2

For the definition of integral antenna, removable antenna, antenna port, and device classification, refer to the ETSI EN 301 489-1. For the contact and air discharges definitions, refer to CENELEC EN 61000-4-2.

Application Category Immunity Level

All exposed surfaces of the radio equipment and ancillary equipment in a representative configuration

Indirect Contact Discharge ±8 kV

Table 5: Electro-Magnetic Compatibility ESD immunity requirements as defined by CENELEC EN 61000-4-2, ETSI EN 301 489-1, ETSI EN 301 489-7, ETSI EN 301 489-24

NINA-W1 is manufactured taking into account specific standards to minimize the occurrence of ESD events; the highly automated process complies with the IEC61340-5-1 (STM5.2-1999 Class M1 devices) standard. Thus, the designer should implement proper measures to protect from ESD events any pin that may be exposed to the end user.

Compliance with standard protection level specified in the EN61000-4-2 can be achieved by including the ESD protections in parallel to the line, close to areas accessible by the end user.

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Handling and soldering

No natural rubbers, hygroscopic materials or materials containing asbestos are employed.

4.1 Packaging, shipping, storage and moisture preconditioning

For information pertaining to reels, tapes or trays, moisture sensitivity levels (MSL), shipment and storage, as well as drying for preconditioning refer to NINA-W13 series Data Sheet [2], NINA-W10 series Data Sheet [3], NINA-W15 series Data Sheet [4],

and u-blox Package Information Guide [5].

4.2 Handling

The NINA-W1 series modules are Electro-Static Discharge (ESD) sensitive devices and require special precautions during handling. Particular care must be exercised when handling patch antennas, due to the risk of electrostatic charges. In addition to standard ESD safety practices, the following measures should be taken into account whenever handling the receiver:

•

Unless there is a galvanic coupling between the local GND (i.e. the work table) and the

PCB GND, then the first point of contact when handling the PCB must always be

between the local GND and PCB GND.

• Before mounting an antenna patch,

connect ground of the device

•

When handling the RF pin, do not come into contact with any charged capacitors and be careful when contacting materials that can

develop charges (e.g. patch antenna ~10

pF, coax cable ~50-80 pF/m, soldering iron, …)

•

To prevent electrostatic discharge through

the RF input, do not touch any exposed

antenna area. If there is any risk that such

exposed antenna area is touched in non ESD protected work area, implement

oper ESD protection measures in the

design.

•

When soldering RF connectors and patch

antennas to the receiver’s RF pin, make

sure to use an ESD safe soldering iron (tip).

4.3 Soldering

4.3.1 Reflow soldering process

The NINA-W1 series modules are surface mount modules supplied on a FR4-type PCB with gold plated connection pads and are produced in a lead-free process with a lead-free soldering paste. The bow and twist of the PCB is maximum 0.75% according to IPC-A-610E. The thickness of solder resist between the host PCB top side and the bottom side of the NINA-W1 series module must be considered for the soldering process.

The module is compatible with industrial reflow profile for RoHS solders. Use of "No Clean" soldering paste is strongly recommended.

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The reflow profile used is dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven, and particular type of solder paste used. The optimal soldering profile used has to be trimmed for each case depending on the specific process and PCB layout.

Process parameter Unit Value

Pre-heat Ramp up rate to T

SMIN

K/s 3

SMIN

°C 150

SMAX

°C 200

tS (from 25 °C) s 150

tS (Pre-heat) s 110

Peak TL °C 217

tL (time above TL) s 90

TP (absolute max) °C 245

tP (time above TP -5 °C) s 40

Cooling Ramp-down from TL K/s 4

General T

to peak

s 300

Allowed soldering cycles - 1

Table 6: Recommended reflow profile

Figure 26: Reflow profile

Lower value of TP and slower ramp down rate (2 – 3 °C/sec) is preferred.

After reflow soldering, optical inspection of the modules is recommended to verify proper alignment.

⚠ Target values in Table 6 should be taken as general guidelines for a Pb-free process. Refer to

JEDEC J-STD-020C standard for further information.

4.3.2 Cleaning

Cleaning the modules is not recommended. Residues underneath the modules cannot be easily removed with a washing process.

• Cleaning with water will lead to capillary effects where water is absorbed in the gap between the

baseboard and the module. The combination of residues of soldering flux and encapsulated water leads to short circuits or resistor-like interconnections between neighboring pads. Water will also damage the sticker and the ink-jet printed text.

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• Cleaning with alcohol or other organic solvents can result in soldering flux residues flooding into

the two housings, areas that are not accessible for post-wash inspections. The solvent will also damage the sticker and the ink-jet printed text.

• Ultrasonic cleaning will permanently damage the module, in particular the crystal oscillators.

For best results, use a "no clean" soldering paste and eliminate the cleaning step after the soldering process.

4.3.3 Other remarks

• Only a single reflow soldering process is allowed for boards with a module populated on it.

• Boards with combined through-hole technology (THT) components and surface-mount

technology (SMT) devices may require wave soldering to solder the THT components. Only a single wave soldering process is allowed for boards populated with the modules.

Miniature Wave

Selective Solder

process is preferred over traditional wave soldering process.

• Hand soldering is not recommended.

• Rework is not recommended.

• Conformal coating may affect the performance of the module, it is important to prevent the liquid

from flowing into the module. The RF shields do not provide protection for the module from coating liquids with low viscosity, therefore care is required in applying the coating. Conformal coating of the module will void the warranty.

• Grounding metal covers: attempts to improve grounding by soldering ground cables, wick or other

forms of metal strips directly onto the EMI covers is done at the customer's own risk and will void module’s warranty. The numerous ground pins are adequate to provide optimal immunity to interferences.

• The module contains components that are sensitive to Ultrasonic Waves. Use of any ultrasonic

processes such as cleaning, welding etc., may damage the module. Use of ultrasonic processes on an end product integrating this module will void the warranty.

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Approvals

For additional regulatory information, see the NINA-W13 series Data Sheet [2], NINA-W10 series Data Sheet [3], and NINA-W15 series Data Sheet [4].

5.1 General requirements

⚠ IC approvals are pending. The IC (Industry Canada) certification is pending and the information in

this section will be valid and applicable when the module IC certification is completed.

The NINA-W1 series modules comply with the regulatory demands of Federal Communications Commission (FCC), Industry Canada (IC)

and the CE mark. This section provides the instructions

that must be followed by an integrator while including NINA-W1 series into an end product.

• Any changes to hardware, hosts or co-location configuration may require new radiated emission

and SAR evaluation and/or testing.

• The regulatory compliance of NINA-W1 series does not exempt the end product from being

evaluated against applicable regulatory demands; for example, FCC Part 15B criteria for unintentional radiators [9].

• Only authorized antenna(s) may be used.

• Any notification to the end user about how to install or remove the integrated radio module is

NOT allowed.

5.2 FCC/IC End-product regulatory compliance

u-blox warrants that the modular transmitter fulfills the FCC/IC regulations when operating in authorized modes on any host product given that the integrator follows the instructions as described in this document.

5.2.1 NINA-W10 series FCC ID and IC certification number

u-blox FCC ID and IC certification number for NINA-W10 series is restricted to be used by u-blox only. Integrators other than u-blox may not refer to the u-blox FCC ID and IC certification number on their end product.

Following the processes called “Change in ID” (FCC) and “Multiple listing” (IC), an integrator can use all the certifications done by u-blox. Through these processes, the integrator becomes the grantee of a copy of the original u-blox FCC/IC certification. As grantee, the integrator is free to perform any updates to the new certification if needed; for example, adding new antennas to the authorization for NINA-W101 module using the antenna pin.

u-blox will guide customers through this process and support with the approval letter that shall be filed as a Cover Letter exhibit with the application to the authority.

⚠ The integrator must replace the module’s label with a new label containing the new FCC/IC ID.

⚠ It is the responsibility of the integrator to comply with any upcoming regulatory requirements.

5.2.2 NINA-W13/W15 series FCC ID and IC certification number

An end product integrating the NINA-W13 series or NINA-W15 series module using u-blox connectivity software can refer to the u-blox FCC ID and IC certification number.

Official name is Innovation, Science and Economic Development (ISED) Canada.

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u-blox can support updates to the u-blox regulatory authorization, if needed. For example, adding new antennas to the u-blox authorization for NINA-W131 module using the antenna pin.

5.2.3 Antenna requirements

In addition to the general requirement to use only authorized antennas, the u-blox grant also requires a separation distance of at least 20 cm from the antenna to all persons. Also, the antenna must not be co-located with any other antenna or transmitter (simultaneous transmission) as well. If this cannot be met, a Permissive Change as described below must be made to the grant.

5.2.3.1 Separation distance

If the required separation distance of 20 cm cannot be fulfilled, a SAR evaluation must be performed. This consists of additional calculations and/or measurements. The result must be added to the grant file as a Class II Permissive Change.

5.2.3.2 Co-location (simultaneous transmission)

If the module is to be co-located with another transmitter, additional measurements for simultaneous transmission is required. The results must be added to the grant file as a Class II Permissive Change.

5.2.3.3 Adding a new antenna for authorization

If the authorized antennas and/or antenna trace design cannot be used, the new antenna and/or antenna trace designs must be added to the grant file. This is done by a Class I Permissive Change or a Class II Permissive Change, depending on the specific antenna and antenna trace design.

• Antennas of the same type and with less or same gain as an already approved antenna can be

added under a Class I Permissive Change.

• Antenna trace designs deviating from the u-blox reference design and new antenna types are

added under a Class II Permissive Change.

⚠ Integrators who want to refer to the u-blox FCC ID / IC certification ID must send an email to the

support team email address for your area as listed in the Contact section to discuss the Permissive Change Process. Class II Permissive Changes will be subject to NRE costs.

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Product testing

6.1 u-blox In-Series production test

u-blox focuses on high quality for its products. All units produced are fully tested automatically in production line. Stringent quality control process has been implemented in the production line. Defective units are analyzed in detail to improve the production quality.

This is achieved with automatic test equipment (ATE) in production line, which logs all production and measurement data. A detailed test report for each unit can be generated from the system. Figure 27 illustrates typical automatic test equipment (ATE) in a production line.

The following tests are performed as part of the production tests:

• Digital self-test (firmware download, MAC address programming)

• Measurement of currents

• Functional tests

• Digital I/O tests

• Measurement and verification of RF characteristics in all supported bands (calibration of

transmitter power levels, modulation and frequency accuracy, power levels, sensitivity, and so on.)

Figure 27: Automatic test equipment for module test

6.2 OEM manufacturer production test

As the testing is already done by u-blox, an OEM manufacturer does not need to repeat firmware tests or measurement of the module’s RF performance or tests over analog and digital interfaces in their production test.

However, an OEM manufacturer should focus on:

• Module assembly on the device: It should be verified that:

o Soldering and handling process did not damage the module components o All module pins are well soldered on device board o There are no short circuits between the pins

• Component assembly on the device: It should be verified that:

o Communication with the host controller can be established o The interfaces between the module and device are working o Overall RF performance test of the device including antenna

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Dedicated tests can be implemented to check the device. For example, the measurement of module current consumption when set in a specified state can detect a short circuit if compared with a “Golden Device” result.

The standard operational module firmware and test software on the host can be used to perform functional tests (communication with the host controller, check interfaces) and to perform basic RF performance tests.

6.2.1 “Go/No go” tests for integrated devices

A “Go/No go” test compares the signal quality with a “Golden Device” in a location with known signal quality. This test can be performed after establishing a connection with an external device.

A very simple test can be performed by just scanning for a known Bluetooth low energy device and checking the signal level.

These kinds of test may be useful as a “go/no go” test but not for RF performance measurements.

This test is suitable to check the functionality of the communication with the host controller and the power supply. It is also a means to verify if the components are well soldered.

A basic RF functional test of the device including the antenna can be performed with standard Bluetooth low energy devices as remote stations. The device containing the NINA-W1 series module and the antennas should be arranged in a fixed position inside an RF shield box to prevent interferences from other possible radio devices to get stable test results.

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Appendix A Glossary

Abbreviation Definition

AP Access Point

ATE Automatic Test Equipment

BP Band Pass

BPF Band Pass Filter

BT Bluetooth

CAN Controller Area Network

CPU Central Processing Unit

CTS Clear To Send

DC Direct Current

DDR Double Data Rate

DSR Data Set Ready

DTR Data Terminal Ready

EIRP Equivalent Isotropically Radiated Power

EMC Electro-magnetic Compatibility

EMI Electromagnetic Interference

ESD Electro-Static Discharge

GND Ground

IoT Internet of Things

ISM Industrial, Scientific, and Medical radio

LED Light-Emitting Diode

LPO Low Power Oscillator

LTE Long-Term Evolution

MAC Media Access Control

MCU Microcontroller

MCS Modulation Coding Scheme

MSL Moisture Sensitivity Level

NSMD Non Solder Mask Defined

OEM Original Equipment Manufacturer

PCB Printed Circuit Board

RF Radio Frequency

ROM Read-only Memory

RMII Reduced Media-independent Interface

RSSI Received Signal Strength Indicator

SMA SubMiniature version A

SRAM Static random-access memory

TBD To be Defined

THT Through-hole Technology

UART Universal Asynchronous Receiver-Transmitter

ASCII American Standard Code for Information Interchange

ARM Arm (Advanced RISC Machines) Holdings

AEC Automotive Electronics Council

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Abbreviation Definition

BBR Battery Backed RAM

BER Bit Error Rate

CPU Central Processing Unit

UTC Coordinated Universal Time

DCE Data Circuit-terminating Equipment* / Data Communication Equipment*

DTE Data Terminal Equipment

DC Direct Current

DRX Discontinuous Reception

DDC Display Data Channel

DL Down Link (Reception)

XYZ This table can be automatically constructed using the custom macro.

Table 7: Explanation of the abbreviations and terms used

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UBX-17005730 - R07 Related documents Page 46 of 47

u-blox NINA-W1 series, NINA-W13 series, NINA-W15 series, NINA-W10 series, NINA-W101 System Integration Manual

Specifications and Main Features

Frequently Asked Questions

User Manual