u-blox NINA-B2 User Manual

alone Bluetooth®
important security
NINA-B2 series
Stand-alone dual-mode Bluetooth modules
System integration manual
Abstract
This document describes the system integration of NINA-B2 series stand­modules. The NINA-B2 modules come with pre-flashed application software and support dual-mode Bluetooth (Bluetooth BR/EDR and Bluetooth low energy). The module has many features embedded, including secure boot, which ensures that only authenticated software can run on the module. This makes NINA-B2 ideal for critical IoT applications where security is important.
UBX-18011096 - R05 C1- Public www.u-blox.com
NINA-B2 series - System integration manual
u
included in this document. Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only permitted with the express written permission of u
The information contained herein is provided “as is” and u
. No warranty, either express or
implied, is given, including but not limited
, with respect to the accuracy, correctness, reliability and fitness for a particular
purpose of the information. This document may be revis
most recent documents,
visit www.u
Copyright © u

Document information

Title NINA-B2 series
Subtitle Stand-alone dual-mode Bluetooth modules
Document type System integration manual
Document number UBX-18011096
Revision and date R05 18-Sep-2020
Disclosure Restriction C1- Public
Product status
Functional Sample Draft For functional testing. Revised and supplementary data will be published later.
In Development / Prototype
Engineering Sample Advance Information Data based on early testing. Revised and supplementary data will be published later.
Initial Production Early Production Information Data from product verification. Revised and supplementary data may be published later.
Mass Production / End of Life
Corresponding content status
Objective Specification Target values. Revised and supplementary data will be published later.
Production Information Document contains the final product specification.
This document applies to the following products:
Product name Product status
NINA-B221 Initial Production
NINA-B222 Initial Production
-blox or third parties may hold intellectual property rights in the products, names, logos and designs
-blox.
-blox assumes no liability for its use
to
ed by u-blox at any time without notice. For the
UBX-18011096 - R05 Document information Page 2 of 31 C1- Public
-blox.com.
-blox AG.
NINA-B2 series - System integration manual

Contents

Document information ............................................................................................................................. 2
Contents ....................................................................................................................................................... 3
1 System description ............................................................................................................................ 5
1.1 Overview ........................................................................................................................................................ 5
1.1.1 Block diagram ...................................................................................................................................... 5
1.2 Product description .................................................................................................................................... 6
1.2.1 Radio in NINA-B2 series ..................................................................................................................... 6
1.3 CPU................................................................................................................................................................. 6
1.4 Operating modes ......................................................................................................................................... 6
1.4.1 Power modes ....................................................................................................................................... 6
1.5 Supply interfaces ........................................................................................................................................ 6
1.5.1 Module supply design (VCC) ............................................................................................................. 6
1.5.2 Digital I/O interfaces reference voltage (VCC_IO) ........................................................................ 7
1.5.3 VCC application circuits .................................................................................................................... 7
1.6 System function interfaces ...................................................................................................................... 7
1.6.1 Boot strapping pins ............................................................................................................................ 7
1.7 Serial Interfaces .......................................................................................................................................... 8
1.7.1 Universal asynchronous serial interface (UART) ......................................................................... 8
1.7.2 Serial peripheral interface (SPI) ....................................................................................................... 8
1.8 Antenna interfaces ..................................................................................................................................... 9
1.8.1 Antenna pin – NINA-B221 ................................................................................................................. 9
1.8.2 Integrated antenna – NINA-B222 .................................................................................................... 9
1.9 Reserved pins (RSVD) ................................................................................................................................ 9
1.10 GND pins ..................................................................................................................................................... 10
2 Software ............................................................................................................................................. 11
2.1 Flashing the NINA module ....................................................................................................................... 11
2.2 Updating the NINA-B2 u-blox connectivity software ........................................................................ 11
3 Design-in ............................................................................................................................................. 13
3.1 Overview ...................................................................................................................................................... 13
3.2 Supply interfaces ...................................................................................................................................... 13
3.2.1 Module supply (VCC) design ........................................................................................................... 13
3.2.2 Digital I/O interfaces reference voltage (VCC_IO) ...................................................................... 13
3.3 Antenna interface ..................................................................................................................................... 14
3.3.1 RF transmission line design (NINA-B221 only) .......................................................................... 14
3.3.2 Antenna design (NINA-B221) ......................................................................................................... 16
3.3.3 On-board antenna design (NINA-B222) ....................................................................................... 19
3.4 Data communication interfaces ............................................................................................................ 19
3.4.1 Asynchronous serial interface (UART) design ............................................................................ 19
3.5 General High Speed layout guidelines .................................................................................................. 19
3.5.1 General considerations for schematic design and PCB floor-planning ................................. 20
3.5.2 Module placement ............................................................................................................................ 20
3.5.3 Layout and manufacturing ............................................................................................................. 20
UBX-18011096 - R05 Contents Page 3 of 31 C1- Public
NINA-B2 series - System integration manual
3.6 Module footprint and paste mask ......................................................................................................... 20
3.7 Thermal guidelines ................................................................................................................................... 21
3.8 ESD guidelines ........................................................................................................................................... 21
4 Handling and soldering ................................................................................................................... 22
4.1 Packaging, shipping, storage and moisture preconditioning .......................................................... 22
4.2 Handling ...................................................................................................................................................... 22
4.3 Soldering ..................................................................................................................................................... 22
4.3.1 Reflow soldering process ................................................................................................................ 22
4.3.2 Cleaning .............................................................................................................................................. 23
4.3.3 Other remarks ................................................................................................................................... 24
5 Approvals ............................................................................................................................................ 25
5.1 General requirements .............................................................................................................................. 25
5.2 FCC/IC End-product regulatory compliance ........................................................................................ 25
5.2.1 NINA-B2 series FCC ID and IC certification number .................................................................. 25
5.2.2 Antenna requirements .................................................................................................................... 25
6 Product testing ................................................................................................................................. 27
6.1 u-blox In-Series production test ............................................................................................................. 27
6.2 OEM manufacturer production test ..................................................................................................... 27
6.2.1 “Go/No go” tests for integrated devices ...................................................................................... 28
Appendix .................................................................................................................................................... 29
Related documents ................................................................................................................................ 30
Revision history ....................................................................................................................................... 30
Contact ....................................................................................................................................................... 31
UBX-18011096 - R05 Contents Page 4 of 31 C1- Public
NINA-B2 series - System integration manual
S
Cryptographics
accelerations
Quad SPI
VCC_IO
VCC (3.0
Reset
UART
GPIO
B221)

1 System description

1.1 Overview

The NINA-B2 series are small stand-alone dual-mode Bluetooth modules designed for ease-of-use and integration in professional applications where security is important. The modules are delivered with u-blox connectivity software, which provides support for both peripheral and central roles, Serial Port Profile, GATT client and server, beacons, u-blox Bluetooth low energy Serial Port Service – all configurable from a host using AT commands.
NINA-B222 comes with an internal antenna while NINA-B221 has a pin for use with an external antenna. The internal PIFA antenna is specifically designed for the small NINA form factor and provides an extensive range, independent of ground plane and component placement.

1.1.1 Block diagram

Antenna
(NINA-B222)
ANT (NINA-
Figure 1: Block diagram of NINA-B2 series
BPF
RF
PLL
40 MHz
Linear voltage regulators
Bluetooth baseband
hardware
EFUSE
RAM (4Mbit)
ROM
Flash (16Mbit)
- 3.6V)
IO Buffers
2xXtensa 32-bit LX6 MCU
UBX-18011096 - R05 System description Page 5 of 31 C1- Public
NINA-B2 series - System integration manual

1.2 Product description

1.2.1 Radio in NINA-B2 series

The NINA-B2 series modules support Bluetooth BR/EDR, and Bluetooth Low Energy as explained in Table 1.
Bluetooth BR/EDR Bluetooth low energy
Bluetooth v4.2+EDR Maximum number of slaves: 7
Band support
2.4 GHz, 79 channels
Typical conducted output power
- 1 Mbit/s: 6 dBm
- 2/3 Mbit/s: 8 dBm
Typical conducted output power
- 1 Mbit/s: 6 dBm
- 2/3 Mbit/s: 8 dBm
Typical radiated output power
- 1 Mbit: 9 dBm EIRP
- 2/3 Mbit/s: 11 dBm EIRP
Conducted sensitivity
-88 dBm
Data rates: 1 / 2 / 3 Mbit/s
* RF power including maximum antenna gain (3 dBi).
Table 1: NINA-B2 series - Bluetooth characteristics
*
*

1.3 CPU

Bluetooth 4.2 Low Energy dual-mode
Band support
2.4 GHz, 40 channels
Typical conducted output power 6 dBm
Typical conducted output power 6 dBm
Typical radiated output power
9 dBm EIRP
Conducted sensitivity
-88 dBm
Data rates: 1 Mbit/s
*
The NINA-B2 series has a dual-core system with two Harvard Architecture Xtensa LX6 CPUs with maximum 240 MHz internal clock frequency. The internal memory of NINA-B2 includes the following:
448 Kbyte ROM for booting and core functions
520 Kbyte SRAM for data and instruction
16 Mbit FLASH for code storage including hardware encryption to protect programs and
data
1 kbit EFUSE (non- erasable memory) for MAC addresses, module configuration, Flash­Encryption, and Chip-ID

1.4 Operating modes

1.4.1 Power modes

The NINA-B2 series modules are power efficient devices capable of operating in different power saving modes and configurations. Different sections of the module can be powered off when not needed and complex wake up events can be generated from different external and internal inputs.

1.5 Supply interfaces

1.5.1 Module supply design (VCC)

The NINA-B2 series modules use an integrated Linear Voltage converter to transform the supply voltage presented at the VCC pin into a stable system voltage.
UBX-18011096 - R05 System description Page 6 of 31 C1- Public
NINA-B2 series - System integration manual

1.5.2 Digital I/O interfaces reference voltage (VCC_IO)

All modules in the NINA-B2 series provide an additional voltage supply input for setting the I/O voltage level.
The separate VCC_IO pin enables integration of the module in many applications with different voltage levels (for example, 1.8 V or 3.3 V) without any level converters. The NINA-B2 modules support only 3.3 V as IO voltage level currently.

1.5.3 VCC application circuits

The power for the NINA-B2 series modules is provided through the VCC pins, which can be one of the following:
Switching Mode Power Supply (SMPS)
Low Drop Out (LDO) regulator
The SMPS is the ideal choice when the available primary supply source has higher value than the operating supply voltage of the NINA-B2 series modules. The use of SMPS provides the best power efficiency for the overall application and minimizes current drawn from the main supply source.
While selecting SMPS, ensure that AC voltage ripple at switching frequency is kept as low as
possible. Layout shall be implemented to minimize impact of high frequency ringing.
The use of an LDO linear regulator is convenient for a primary supply with a relatively low voltage where the typical 85-90% efficiency of the switching regulator leads to minimal current saving. Linear regulators are not recommended for high voltage step-down as they will dissipate a considerable amount of energy.
DC/DC efficiency should be evaluated as a tradeoff between active and idle duty cycle of the specific application. Although some DC/DC can achieve high efficiency at extremely light loads, a typical DC/DC efficiency quickly degrades as idle current drops below a few mA greatly reducing the battery life.
It is considered as a best practice to have decoupling capacitors on the supply rails close to the NINA­B2 series module, although depending on the design of the power routing on the host system, capacitance might not be needed.
See the NINA-B2 series Data Sheet [2]
for electrical specifications.

1.6 System function interfaces

1.6.1 Boot strapping pins

There are several boot configuration pins available on the module that must have the correct settings during boot (see Table 2). The boot strap pins are configured to the default state internally on the module and must NOT be configured externally.
During boot, pin 32 controls if additional system information should be transmitted on the UART interface during startup. After the system has booted it is reconfigured to SPI_CS, the SPI chip select signal.
During boot, pin 36 controls the voltage level of the internal flash during startup. After the system has booted it is reconfigured to SPI_MISO, the SPI slave data output signal. It must NOT be pulled down by an external MCU or circuitry.
UBX-18011096 - R05 System description Page 7 of 31 C1- Public
NINA-B2 series - System integration manual
Pin State during boot Default Behavior Description
27 0 ESP boot mode (factory boot) ESP Factory boot
1 Pull-up* Normal Boot from internal Flash
32 0 Silent
1 Pull-up* UART0 TXD Toggling
36 0 VDD_SDIO=3.3V (Not allowed) Internal flash voltage
1 10 k pull-up VDD_SDIO=1.8V
(VDD_SDIO should always be at 1.8 V)
*About 30 k
Table 2: NINA-B2 series boot strapping pins
Mode/RMII clock line.
Printout on UART0 TXD during boot

1.7 Serial Interfaces

1.7.1 Universal asynchronous serial interface (UART)

The NINA-B2 series module provides a Universal Asynchronous Serial Interface (UART) for data communication. The following UART signals are available:
Data lines (RXD as input, TXD as output)
Hardware flow control lines (CTS as input, RTS as output)
DSR and DTS are used to set and indicate the system modes
The UART can be used as 4-wire UART with hardware flow control and 2-wire UART with only TXD and RXD. In 2-wire mode, CTS must be connected to the GND on the NINA-B2 module.
The UART interface is also be used for firmware upgrade. See the Software section for more information.
The u-connectXpress software adds the DSR and DTR pins to the UART interface. Not used as they were originally intended, these pins are used to control the state of NINA modules.
Depending on the configuration, DSR can be used to:
Enter command mode
Disconnect and/or toggle connectable status
Enable/disable the rest of the UART interface
Enter/wake up from the Stop mode
The functionality of the DSR and DTR pins are configured by AT commands. See the u-blox Short Range Modules AT commands manual [1] for more information.
See NINA-B2 series Data Sheet [2] for characteristic information about the UART interface.
Interface Default configuration
UART interface 115200 baud, 8 data bits, no parity, 1 stop bit, hardware flow control
Table 3: Default settings for the UART port while using the u-blox connectivity software
It is recommended to make the UART available either as test points or connected to a header for firmware upgrade.
The IO level of the UART will follow the VCC_IO.

1.7.2 Serial peripheral interface (SPI)

On NINA-B2, SPI is supported from software version 3.0.0 onwards.
In addition to UART support, NINA-B2 modules also include a Serial Peripheral Interface (SPI) for data communication. The module acts as an SPI slave.
UBX-18011096 - R05 System description Page 8 of 31 C1- Public
NINA-B2 series - System integration manual
The following SPI signals are available:
Chip select as input (SPI_CS)
Data lines (SPI_MOSI as input, SPI_MISO as output)
Clock (SPI_SCLK as input)
Optional hardware flow control lines (SPI_NORX and SPI_DRDY as output)
For details on SPI operation, see the Communicating with a u-blox module over SPI bus, application note [7].

1.8 Antenna interfaces

The antenna interface is different for each module variant in the NINA-B2 series.

1.8.1 Antenna pin – NINA-B221

NINA-B221 modules are equipped with an RF pin. The RF pin has a nominal characteristic impedance of 50 Ω and must be connected to the antenna through a 50 Ω transmission line to allow reception of radio frequency (RF) signals in the 2.4 GHz frequency band.
Choose an antenna with optimal radiating characteristics for the best electrical performance and overall module functionality. An internal antenna, integrated on the application board or an external antenna that is connected to the application board through a proper 50 connector can be used.
While using an external antenna, the PCB-to-RF-cable transition must be implemented using either a suitable 50 Ω connector, or an RF-signal solder pad (including GND) that is optimized for 50 characteristic impedance.
1.8.1.1 Antenna matching
The antenna return loss should be as good as possible across the entire band when the system is operational to provide optimal performance. The enclosure, shields, other components, and surrounding environment will impact the return loss seen at the antenna port. Matching components are often required to retune the antenna to bring the return loss within an acceptable range.
It is difficult to predict the actual matching values for the antenna in the final form factor. Therefore, it is a good practice to have a placeholder in the circuit with a ”pi” network, with two shunt components and a series component in the middle, to allow maximum flexibility while tuning the matching to the antenna feed.
1.8.1.2 Approved antenna designs
NINA-B2 modules come with a pre-certified design that can be used to save costs and time during the certification process. To take advantage of this service, you have to implement the antenna layout according to the u-blox reference designs. The reference design is available on request from u-blox.
The designer integrating a u-blox reference design into an end-product is solely responsible for the unintentional emission levels produced by the end product.
The module may be integrated with other antennas. In this case, the OEM installer must certify his design with respective regulatory agencies.

1.8.2 Integrated antenna – NINA-B222

The NINA-B222 modules are equipped with an integrated antenna on the module for simpler integration.

1.9 Reserved pins (RSVD)

RSVD pins should be left unconnected.
UBX-18011096 - R05 System description Page 9 of 31 C1- Public
NINA-B2 series - System integration manual

1.10 GND pins

Good connection of the module's GND pins with solid ground layer of the host application board is required for correct RF performance. It significantly reduces the EMC issues and provides a thermal heat sink for the module.
UBX-18011096 - R05 System description Page 10 of 31 C1- Public
Loading...
+ 21 hidden pages