Ublox TOBY-L201, TOBY-L220, TOBY-L280, TOBY-L210, MPCI-L200 System Integration Manual
...
Abstract
This document describes the features and the system integration of TOBY-L2 and MPCI-L2 series
multi-mode cellular modules. These modules are a complete and cost efficient LTE/3G/2G solution
offering up to 150 Mb/s download and 50 Mb/s upload data rates, covering up to six LTE bands, up
to five WCDMA/DC-HSPA+ bands and up to four GSM/EGPRS bands in the compact TOBY LGA form
factor of TOBY-L2 modules or in the industry standard PCI Express Mini Card form factor of MPCI-L2
modules.
www.u-blox.com
UBX-13004618 - R28
TOBY-L2 and MPCI-L2 series
LTE/DC-HSPA+/EGPRS modules
System Integration Manual
TOBY-L2 and MPCI-L2 series - System Integration Manual
Title
TOBY-L2 and MPCI-L2 series
Subtitle
LTE/DC-HSPA+/EGPRS modules
Document type
System Integration Manual
Document number
UBX-13004618
Revision and date
R28
12-Apr-2019
Disclosure Restriction
Product status
Corresponding content status
Functional Sample
Draft
For functional testing. Revised and supplementary data will be published later.
In Development /
Prototype
Objective Specification
Target values. Revised and supplementary data will be published later.
Engineering Sample
Advance Information
Data based on early testing. Revised and supplementary data will be published later.
Initial Production
Early Production Information
Data from product verification. Revised and supplementary data may be published later.
Mass Production /
End of Life
Production Information
Document contains the final product specification.
u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this document.
Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only permitted with the
express written permission of u-blox.
The information contained herein is provided “as is” and u-blox assumes no liability for its use. No warranty, either express or
implied, is given, including but not limited to, with respect to the accuracy, correctness, reliability and fitness for a particular
purpose of the information. This document may be revised by u-blox at any time without notice. For the most recent documents,
visit www.u-blox.com.
Copyright © u-blox AG.
Document Information
UBX-13004618 - R28 Page 2 of 164
TOBY-L2 and MPCI-L2 series - System Integration Manual
Product name
Type number
Modem version
Application version
PCN reference
Product status
TOBY-L200
TOBY-L200-00S-00
09.71
A01.15
UBX-14044437
Obsolete
TOBY-L200-00S-01
09.71
A01.30
UBX-16026448
Obsolete
TOBY-L200-02S-00
15.90
A01.00
UBX-15029946
Obsolete
TOBY-L200-02S-01
15.90
A01.10
UBX-16031212
End of Life
TOBY-L200-03A-01
16.19
A01.02
UBX-19004188
Initial Production
TOBY-L200-03S-00
15.90
A01.50
UBX-17022983
End of Life
TOBY-L200-03S-01
16.19
A01.02
UBX-19000820
Initial Production
TOBY-L201
TOBY-L201-01S-00
09.93
A01.07
UBX-18012849
End of Life
TOBY-L201-02S-00
(for AT&T): 09.93
(for AT&T): A02.50
UBX-17013932
End of Life
(for VZW): 09.94
(for VZW): A01.02
UBX-17013932
End of Life
TOBY-L201-02S-01
(for AT&T): 20.03
(for AT&T): A01.02
UBX-19000820
Initial Production
(for VZW): 20.03
(for VZW): A01.02
UBX-19000820
Initial Production
TOBY-L210
TOBY-L210-00S-00
09.71
A01.15
UBX-14044437
Obsolete
TOBY-L210-02S-00
15.63
A01.03
UBX-15029946
Obsolete
TOBY-L210-02S-01
15.63
A01.10
UBX-16031212
End of Life
TOBY-L210-03A-00
15.63
A01.60
UBX-18010749
End of Life
TOBY-L210-03A-01
16.19
A01.02
UBX-19012118
Initial Production
TOBY-L210-03S-00
15.63
A01.50
UBX-17022983
End of Life
TOBY-L210-03S-01
16.19
A01.02
UBX-19000820
Initial Production
TOBY-L210-60S-00
09.94
A01.00
UBX-15021694
Obsolete
TOBY-L210-60S-01
09.94
A01.01
UBX-16005471
Obsolete
TOBY-L210-62S-00
16.05
A01.02
UBX-17003573
Initial Production
TOBY-L220
TOBY-L220-02S-00
15.93
A01.00
UBX-16025501
Mass Production
TOBY-L220-62S-00
16.04
A01.00
UBX-17013073
Mass Production
TOBY-L280
TOBY-L280-02S-00
15.63
A01.03
UBX-15029946
Obsolete
TOBY-L280-02S-01
15.63
A01.10
UBX-16031212
End of Life
TOBY-L280-03A-01
16.19
A01.02
UBX-19004188
Initial Production
TOBY-L280-03S-00
15.63
A01.50
UBX-17022983
End of Life
TOBY-L280-03S-01
16.19
A01.02
UBX-19000820
Initial Production
MPCI-L200
MPCI-L200-00S-00
09.71
A01.15
UBX-14044437
Obsolete
MPCI-L200-00S-01
09.71
A01.30
UBX-16026448
Obsolete
MPCI-L200-02S-00
15.90
A01.00
UBX-15029946
Obsolete
MPCI-L200-02S-01
15.90
A01.10
UBX-16031212
End of Life
MPCI-L200-03S-00
15.90
A01.50
UBX-17022983
Mass Production
MPCI-L201
MPCI-L201-01S-00
09.93
A01.07
UBX-18012849
End of Life
MPCI-L201-02S-00
(for AT&T): 09.93
(for AT&T): A02.50
UBX-17013932
End of Life
(for VZW): 09.94
(for VZW): A01.02
UBX-17013932
End of Life
MPCI-L201-02S-01
(for AT&T): 20.03
(for AT&T): A01.02
UBX-19000820
Initial Production
(for VZW): 20.03
(for VZW): A01.02
UBX-19000820
Initial Production
MPCI-L210
MPCI-L210-00S-00
09.71
A01.15
UBX-14044437
Obsolete
MPCI-L210-02S-00
15.63
A01.03
UBX-15029946
Obsolete
MPCI-L210-02S-01
15.63
A01.10
UBX-16031212
End of Life
MPCI-L210-03S-00
15.63
A01.50
UBX-17022983
Mass Production
MPCI-L210-60S-00
09.94
A01.00
UBX-15021694
Obsolete
MPCI-L210-60S-01
09.94
A01.01
UBX-16005471
Mass Production
MPCI-L220
MPCI-L220-02S-00
15.93
A01.00
UBX-16025501
Initial Production
MPCI-L220-62S-00
16.04
A01.00
UBX-17013073
Initial Production
MPCI-L280
MPCI-L280-02S-00
15.63
A01.03
UBX-15029946
Obsolete
MPCI-L280-02S-01
15.63
A01.10
UBX-16031212
End of Life
MPCI-L280-03S-00
15.63
A01.50
UBX-17022983
Mass Production
This document applies to the following products:
UBX-13004618 - R28 Page 3 of 164
TOBY-L2 and MPCI-L2 series - System Integration Manual
Contents
Document Information ................................................................................................................................ 2
Contents .......................................................................................................................................................... 4
1 System description ............................................................................................................................... 8
1.1 Overview ........................................................................................................................................................ 8
1.2 Architecture ................................................................................................................................................ 11
1.2.1 Internal blocks .................................................................................................................................... 12
1.3 Pin-out ......................................................................................................................................................... 13
1.3.1 TOBY-L2 series pin assignment .................................................................................................... 13
1.3.2 MPCI-L2 series pin assignment ...................................................................................................... 17
1.4 Operating modes ....................................................................................................................................... 19
1.5 Supply interfaces ....................................................................................................................................... 21
1.5.1 Module supply input (VCC or 3.3Vaux) .......................................................................................... 21
1.5.2 RTC supply input/output (V_BCKP) .............................................................................................. 28
1.5.3 Generic digital interfaces supply output (V_INT) ....................................................................... 29
1.6 System function interfaces ....................................................................................................................30
1.6.1 Module power-on ..............................................................................................................................30
1.6.2 Module power-off .............................................................................................................................. 32
1.6.3 Module reset ...................................................................................................................................... 34
1.6.4 Module configuration selection by host processor .................................................................... 34
1.7 Antenna interface ..................................................................................................................................... 35
1.7.1 Antenna RF interfaces (ANT1 / ANT2) .......................................................................................... 35
1.7.2 Antenna detection interface (ANT_DET) ..................................................................................... 38
1.8 SIM interface .............................................................................................................................................. 38
1.8.1 SIM interface ..................................................................................................................................... 38
1.8.2 SIM detection interface ................................................................................................................... 38
1.9 Data communication interfaces ............................................................................................................ 39
1.9.1 Universal Serial Bus (USB) .............................................................................................................. 39
1.9.2 Asynchronous serial interface (UART) ......................................................................................... 43
1.9.3 DDC (I2C) interface ............................................................................................................................ 54
1.9.4 Secure Digital Input Output interface (SDIO) ............................................................................. 55
1.10 Audio ............................................................................................................................................................ 55
1.10.1 Digital audio over I2S interface ....................................................................................................... 55
1.11 General Purpose Input/Output ............................................................................................................... 57
1.12 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#) ................................................................ 58
1.13 Reserved pins (RSVD) .............................................................................................................................. 58
1.14 Not connected pins (NC) .......................................................................................................................... 58
1.15 System features ........................................................................................................................................ 59
1.15.1 Network indication ........................................................................................................................... 59
1.15.2 Antenna supervisor .......................................................................................................................... 59
1.15.3 Jamming detection .......................................................................................................................... 59
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1.15.4 IP modes of operation ...................................................................................................................... 60
1.15.5 Dual stack Ipv4/Ipv6 ......................................................................................................................... 60
1.15.6 TCP/IP and UDP/IP ............................................................................................................................ 60
1.15.7 FTP ....................................................................................................................................................... 60
1.15.8 HTTP .................................................................................................................................................... 61
1.15.9 SSL / TLS ............................................................................................................................................ 61
1.15.10 Bearer Independent Protocol .......................................................................................................... 61
1.15.11 Wi-Fi integration ............................................................................................................................... 61
1.15.12 Firmware update Over AT (FOAT) ................................................................................................. 62
1.15.13 Firmware update Over The Air (FOTA) ......................................................................................... 62
1.15.14 Smart temperature management ................................................................................................ 62
1.15.15 SIM Access Profile (SAP) ................................................................................................................. 65
1.15.16 Power saving ...................................................................................................................................... 67
2 Design-in ................................................................................................................................................ 68
2.1 Overview ...................................................................................................................................................... 68
2.2 Supply interfaces ...................................................................................................................................... 69
2.2.1 Module supply (VCC or 3.3Vaux) ................................................................................................... 69
2.2.2 RTC supply output (V_BCKP) ......................................................................................................... 81
2.2.3 Generic digital interfaces supply output (V_INT) ....................................................................... 82
2.3 System functions interfaces .................................................................................................................. 83
2.3.1 Module power-on (PWR_ON) .......................................................................................................... 83
2.3.2 Module reset (RESET_N or PERST#) ............................................................................................ 84
2.3.3 Module configuration selection by host processor .................................................................... 85
2.4 Antenna interface ..................................................................................................................................... 86
2.4.1 Antenna RF interfaces (ANT1 / ANT2) .......................................................................................... 86
2.4.2 Antenna detection interface (ANT_DET) ..................................................................................... 94
2.5 SIM interface .............................................................................................................................................. 96
2.6 Data communication interfaces .......................................................................................................... 103
2.6.1 Universal Serial Bus (USB) ............................................................................................................ 103
2.6.2 Asynchronous serial interface (UART) ....................................................................................... 105
2.6.3 DDC (I2C) interface .......................................................................................................................... 109
2.6.4 Secure Digital Input Output interface (SDIO) ............................................................................ 110
2.7 Audio interface ......................................................................................................................................... 112
2.7.1 Digital audio interface ..................................................................................................................... 112
2.8 General Purpose Input/Output .............................................................................................................. 116
2.9 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#) ............................................................... 117
2.10 Reserved pins (RSVD) ............................................................................................................................. 118
2.11 Module placement ................................................................................................................................... 119
2.12 TOBY-L2 series module footprint and paste mask ......................................................................... 120
2.13 MPCI-L2 series module installation ..................................................................................................... 121
2.14 Thermal guidelines ................................................................................................................................. 122
2.15 ESD guidelines ......................................................................................................................................... 124
2.15.1 ESD immunity test overview ........................................................................................................ 124
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TOBY-L2 and MPCI-L2 series - System Integration Manual
2.15.2 ESD immunity test of TOBY-L2 and MPCI-L2 reference design .......................................... 125
2.15.3 ESD application circuits ................................................................................................................ 125
2.16 Schematic for TOBY-L2 and MPCI-L2 module integration ............................................................ 128
2.16.1 Schematic for TOBY-L2 module “00” product version ........................................................... 128
2.16.2 Schematic for TOBY-L2 module “01” or “60” product versions ............................................. 129
2.16.3 Schematic for TOBY-L2 module “02”, “03” or “62” product versions .................................. 130
2.16.4 Schematic for MPCI-L2 series ...................................................................................................... 131
2.17 Design-in checklist .................................................................................................................................. 132
2.17.1 Schematic checklist ....................................................................................................................... 132
2.17.2 Layout checklist .............................................................................................................................. 133
2.17.3 Antenna checklist ........................................................................................................................... 134
3 Handling and soldering .................................................................................................................... 135
3.1 Packaging, shipping, storage and moisture preconditioning ........................................................ 135
3.2 Handling .................................................................................................................................................... 135
3.3 Soldering ................................................................................................................................................... 136
3.3.1 Soldering paste ............................................................................................................................... 136
3.3.2 Reflow soldering .............................................................................................................................. 136
3.3.3 Optical inspection ........................................................................................................................... 137
3.3.4 Cleaning ............................................................................................................................................ 137
3.3.5 Repeated reflow soldering ............................................................................................................ 138
3.3.6 Wave soldering ................................................................................................................................ 138
3.3.7 Hand soldering ................................................................................................................................ 138
3.3.8 Rework .............................................................................................................................................. 138
3.3.9 Conformal coating .......................................................................................................................... 138
3.3.10 Casting .............................................................................................................................................. 138
3.3.11 Grounding metal covers ................................................................................................................ 139
3.3.12 Use of ultrasonic processes ......................................................................................................... 139
4 Approvals ............................................................................................................................................. 140
4.1 Product certification approval overview ............................................................................................. 140
4.2 US Federal Communications Commission notice ............................................................................. 141
4.2.1 Safety warnings review the structure ......................................................................................... 141
4.2.2 Declaration of Conformity .............................................................................................................. 141
4.2.3 Modifications ................................................................................................................................... 142
4.3 Innovation, Science, Economic Development Canada notice ........................................................ 143
4.3.1 Declaration of Conformity ............................................................................................................. 143
4.3.2 Modifications ................................................................................................................................... 143
4.4 Brazilian Anatel certification ................................................................................................................ 145
4.5 European Conformance CE mark ........................................................................................................ 146
4.6 Australian Regulatory Compliance Mark ........................................................................................... 147
4.7 Taiwanese NCC certification ................................................................................................................ 147
4.8 Japanese Giteki certification ............................................................................................................... 148
5 Product testing .................................................................................................................................. 149
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5.1 u-blox in-series production test ........................................................................................................... 149
5.2 Test parameters for OEM manufacturer ........................................................................................... 150
5.2.1 “Go/No go” tests for integrated devices .................................................................................... 150
5.2.2 RF functional tests ......................................................................................................................... 150
Appendix ...................................................................................................................................................... 152
A Migration between TOBY-L1 and TOBY-L2 ............................................................................... 152
A.1 Overview .................................................................................................................................................... 152
A.2 Pin-out comparison between TOBY-L1 and TOBY-L2 ..................................................................... 154
A.3 Schematic for TOBY-L1 and TOBY-L2 integration ........................................................................... 157
B Glossary ................................................................................................................................................ 158
Related documents .................................................................................................................................. 161
Revision history ......................................................................................................................................... 162
Contact ......................................................................................................................................................... 164
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TOBY-L2 and MPCI-L2 series - System Integration Manual
1 System description
1.1 Overview
TOBY-L2 and MPCI-L2 series comprises LTE/3G/2G multi-mode modules supporting up to six LTE
bands, up to five UMTS/DC-HSPA+ bands and up to four GSM/(E)GPRS bands for voice and/or data
transmission as following:
TOBY-L200, TOBY-L201, MPCI-L200 and MPCI-L201 are designed primarily for operation in
America
TOBY-L210 and MPCI-L210 are designed primarily for operation in Europe, Asia and other
countries
TOBY-L220 and MPCI-L220 are designed primarily for operation in Japan
TOBY-L280 and MPCI-L280 are designed primarily for operation in Asia and Oceania
TOBY-L2 and MPCI-L2 series are designed in two different form-factors suitable for applications as
following:
TOBY-L2 modules are designed in the small TOBY 152-pin Land Grid Array form-factor (35.6 x 24.8
mm), easy to integrate in compact designs and form-factor compatible with the u-blox cellular
module families: this allows customers to take the maximum advantage of their hardware and
software investments, and provides very short time-to-market.
The modules are the perfect choice for consumer fixed-wireless terminals, mobile routers and
gateways, and applications requiring video streaming. They are also optimally suited for industrial
(M2M) applications, such as remote access to video cameras, digital signage, telehealth, and
security and surveillance systems
MPCI-L2 modules are designed in the industry standard PCI Express Full-Mini Card form-factor
(51 x 30 mm) easy to integrate into industrial and consumer applications and also ideal for
manufacturing of small series.
Typical applications are industrial computing, ruggedized terminals, video communications,
wireless routers, alarm panels and surveillance, digital signage and payment systems.
With LTE Category 4 data rates at up to 150 Mb/s (down-link) and 50 Mb/s (up-link), the TOBY-L2 and
MPCI-L2 series modules are ideal for applications requiring the highest data-rates and high-speed
internet access.
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Module
LTE
UMTS
GSM
Interfaces
Audio
Features
Grade
LTE FDD category Bands
HSDPA category HSUPA category Bands
GPRS/EDGE multi
-slot class
Bands
UART USB 2.0 SDIO (Master) DDC (I
2
C)
GPIOs Analog audio Digital audio Network indication Antenna supervisor MIMO 2x2 / Rx Diversity
Embedded TCP/UDP stack Embedded HTTP,FTP FOTA Dual stack IPv4/IPv6 Standard Professional Automotive
TOBY-L200
4
2,4,5
7,17
24
6
1,2,4
5,8
12
Quad
♦ ● ♦ ♦ ♦ ♦ ● ♦ ● ♦ ♦ ♦
● ●
●
TOBY-L201
4
2,4,5
13,17
24 6 2,5
● ● ♦ ♦
● ♦ ● ● ● ● ● ●
TOBY-L210
4
1,3,5
7,8,20
24
6
1,2
5,8
12
Quad
♦
●
■ ■ ■ ■ ● ■ ● ■ ■ ■
● ● ● TOBY-L220 1
4
1,3,5
6,8,19
24
6
1,6
8,19
● ● ● ● ●
▲
● ● ● ● ● ● ● ●
TOBY-L280
4
1,3,5
7,8,28
24
6
1,2
5,8
12
Quad
● ● ● ● ● ● ● ● ● ● ● ●
● ●
●
MPCI-L200
4
2,4,5
7,17
24
6
1,2,4
5,8
12
Quad
● ● ● ♦ ♦ ♦
● ● MPCI-L201
4
2,4,5
13,17
24 6 2,5
● ● ● ● ● ●
● ●
MPCI-L210
4
1,3,5
7,8,20
24
6
1,2
5,8
12
Quad
● ●
●
■ ■ ■
● ●
MPCI-L2201
4
1,3,5
6,8,19
24
6
1,6
8,19
● ● ● ● ● ●
● ● MPCI-L280
4
1,3,5
7,8,28
24
6
1,2
5,8
12
Quad
● ● ● ● ● ●
● ●
● = supported by all product versions
♦ = supported by all product versions except versions “00”,”01”
■ = supported by all product versions except versions “00”,”60”
▲= supported by all product versions except versions “62”
1
2
Table 1 summarizes the TOBY-L2 and MPCI-L2 series main features and interfaces.
Table 1: TOBY-L2 and MPCI-L2 series main features summary
TOBY-L2 modules provide Circuit-Switched-Fall-Back (CSFB)2 audio capability.
Table 2 reports a summary of cellular radio access technologies characteristics and features of the
modules.
TOBY-L220-62S and MPCI-L220-62S product versions do not support UMTS Radio Access Technology
Not supported by “00”, “01”, “60”, TOBY-L201-02S and TOBY-L220-62S product versions.
UBX-13004618 - R28 System description Page 9 of 164
TOBY-L2 and MPCI-L2 series - System Integration Manual
4G LTE
3G UMTS/HSDPA/HSUPA
2G GSM/GPRS/EDGE
3GPP Release 9
Long Term Evolution (LTE)
Evolved UTRA (E-UTRA)
Frequency Division Duplex (FDD)
DL Multi-Input Multi-Output (MIMO) 2x2
3GPP Release 8
Dual-Cell HS Packet Access (DC-HSPA+)
UMTS Terrestrial Radio Access (UTRA)
Frequency Division Duplex (FDD)
DL Rx diversity
3GPP Release 8
Enhanced Data rate GSM Evolution (EDGE)
GSM EGPRS Radio Access (GERA)
Time Division Multiple Access (TDMA)
DL Advanced Rx Performance Phase 1
Band support3:
TOBY-L200 / MPCI-L200:
o Band 17 (700 MHz)
o Band 5 (850 MHz)
o Band 4 (AWS, i.e. 1700 MHz)
o Band 2 (1900 MHz)
o Band 7 (2600 MHz)
TOBY-L201 / MPCI-L201:
o Band 17 (700 MHz)
o Band 13 (750 MHz)
o Band 5 (850 MHz)
o Band 4 (AWS, i.e. 1700 MHz)
o Band 2 (1900 MHz)
TOBY-L210 / MPCI-L210:
o Band 20 (800 MHz)
o Band 5 (850 MHz)
o Band 8 (900 MHz)
o Band 3 (1800 MHz)
o Band 1 (2100 MHz)
o Band 7 (2600 MHz)
TOBY-L220 / MPCI-L220:
o Band 19 (850 MHz)
o Band 6 (850 MHz)
o Band 5 (850 MHz)
o Band 8 (900 MHz)
o Band 3 (1800 MHz)
o Band 1 (2100 MHz)
TOBY-L280 / MPCI-L280:
o Band 28 (750 MHz)
o Band 5 (850 MHz)
o Band 8 (900 MHz)
o Band 3 (1800 MHz)
o Band 1 (2100 MHz)
o Band 7 (2600 MHz)
Band support:
TOBY-L200 / MPCI-L200:
o Band 5 (850 MHz)
o Band 8 (900 MHz)
o Band 4 (AWS, i.e. 1700 MHz)
o Band 2 (1900 MHz)
o Band 1 (2100 MHz)
TOBY-L201 / MPCI-L201:
o Band 5 (850 MHz)
o Band 2 (1900 MHz)
TOBY-L210 / MPCI-L210:
o Band 5 (850 MHz)
o Band 8 (900 MHz)
o Band 2 (1900 MHz)
o Band 1 (2100 MHz)
TOBY-L2204 / MPCI-L2204:
o Band 19 (850 MHz)
o Band 6 (850 MHz)
o Band 8 (900 MHz)
o Band 1 (2100 MHz)
TOBY-L280 / MPCI-L280:
o Band 5 (850 MHz)
o Band 8 (900 MHz)
o Band 2 (1900 MHz)
o Band 1 (2100 MHz)
Band support
TOBY-L200 / MPCI-L200:
o GSM 850 MHz
o E-GSM 900 MHz
o DCS 1800 MHz
o PCS 1900 MHz
TOBY-L210 / MPCI-L210:
o GSM 850 MHz
o E-GSM 900 MHz
o DCS 1800 MHz
o PCS 1900 MHz
TOBY-L280 / MPCI-L280:
o GSM 850 MHz
o E-GSM 900 MHz
o DCS 1800 MHz
o PCS 1900 MHz
LTE Power Class
Class 3 (23 dBm)
for LTE mode
WCDMA/HSDPA/HSUPA Power Class
Class 3 (24 dBm)
for UMTS/HSDPA/HSUPA mode
GSM/GPRS (GMSK) Power Class
Class 4 (33 dBm) in GSM/E-GSM bands
Class 1 (30 dBm) in DCS/PCS bands
EDGE (8-PSK) Power Class
Class E2 (27 dBm) in GSM/E-GSM bands
Class E2 (26 dBm) in DCS/PCS bands
Data rate
LTE category 4:
up to 150 Mb/s DL, 50 Mb/s UL
Data rate
xxxx-L200 / xxxx-L201:
o HSDPA cat.14, up to 21 Mb/s DL5
o HSUPA cat.6, up to 5.6 Mb/s UL
xxxx-L210 / xxxx-L220 / xxxx-L280:
o HSDPA cat.24, up to 42 Mb/s DL
o HSUPA cat.6, up to 5.6 Mb/s UL
Data rate6
GPRS multi-slot class 127, CS1-CS4,
up to 85.6 kb/s DL/UL
EDGE multi-slot class 127, MCS1-MCS9
up to 236.8 kb/s DL/UL
3
4
5
6
7
Table 2: TOBY-L2 and MPCI-L2 series LTE, 3G and 2G characteristics summary
The modules support all E-UTRA channel bandwidths for each operating band according to 3GPP TS 36.521-1 [23]
TOBY-L220-62S and MPCI-L220-62S product versions do not support 3G Radio Access Technology
HSDPA category 24 capable
GPRS/EDGE multi-slot class determines the number of timeslots available for upload and download and thus the speed at
which data can be transmitted and received, with higher classes typically allowing faster data transfer rates.
GPRS/EDGE multi-slot class 12 implies a maximum of 4 slots in Down-Link and 4 slots in Up-Link with 5 slots in total.
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Cellular
Base-band
Processor
Memory
Power Management Unit
26 MHz
32.768 kHz
ANT1
RF
Transceiver
ANT2
V_INT (I/O)
V_BCKP (RTC)
VCC (Supply)
SIM
USB
GPIO
Power On
External Reset
PAs
LNAsFilters
Filter
s
Duplexer
Filters
PAs
LNAsFilter
s
Filter
s
Duplexer
Filters
LNAsFilter
s
Filters
LNAsFiltersFilter
s
Switch
Switch
DDC(I2C)
SDIO
UART
Digital audio (I2S)
ANT_DET
Host Select
ANT1
SIM
USB
W_DISABLE#
TOBY-L2
series
Signal
Conditioning
ANT2
PERST#
LED_WWAN#
U.FL
U.FL
3.3Vaux (Supply)
Boost
Converter
VCC
1.2 Architecture
Figure 1 summarizes the internal architecture of TOBY-L2 series modules.
Figure 1: TOBY-L2 series block diagram
As described in the Figure 2, each MPCI-L2 series module integrates one TOBY-L2 series module:
The MPCI-L200 integrates a TOBY-L200 module
The MPCI-L201 integrates a TOBY-L201 module
The MPCI-L210 integrates a TOBY-L210 module
The MPCI-L220 integrates a TOBY-L220 module
The MPCI-L280 integrates a TOBY-L280 module
The TOBY-L2 module represents the core of the device, providing the related LTE/3G/2G modem and
processing functionalities. Additional signal conditioning circuitry is implemented for PCI Express
Mini Card compliance, and two UF.L connectors are available for easy antenna integration.
Figure 2: MPCI-L2 series block diagram
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TOBY-L2 and MPCI-L2 series - System Integration Manual
1.2.1 Internal blocks
As described in Figure 2, each MPCI-L2 series module integrates one TOBY-L2 series module, which
consists of the following internal sections: RF, baseband and power management.
RF section
The RF section is composed of RF transceiver, PAs, LNAs, crystal oscillator, filters, duplexers and RF
switches.
Tx signal is pre-amplified by RF transceiver, then output to the primary antenna input/output port
(ANT1) of the module via power amplifier (PA), SAW band pass filters band, specific duplexer and
antenna switch.
Dual receiving paths are implemented according to LTE Down-Link MIMO 2 x 2 and 3G Receiver
Diversity radio technologies supported by the modules as LTE category 4 and HSDPA category 24
User Equipments: incoming signals are received through the primary (ANT1) and the secondary
(ANT2) antenna input ports which are connected to the RF transceiver via specific antenna switch,
diplexer, duplexer, LNA, SAW band pass filters.
RF transceiver performs modulation, up-conversion of the baseband I/Q signals for Tx,
down-conversion and demodulation of the dual RF signals for Rx. The RF transceiver contains:
o Automatically gain controlled direct conversion Zero-IF receiver,
o Highly linear RF demodulator / modulator capable GMSK, 8-PSK, QPSK, 16-QAM, 64-QAM,
o Fractional-N Sigma-Delta RF synthesizer,
o VCO.
Power Amplifiers (PA) amplify the Tx signal modulated by the RF transceiver
RF switches connect primary (ANT1) and secondary (ANT2) antenna ports to the suitable Tx / Rx
path
Low Noise Amplifiers (LNA) enhance the received sensitivity
SAW duplexers separate the Tx and Rx signal paths and provide RF filtering
SAW band pass filters enhance the rejection of out-of-band signals
26 MHz crystal oscillator generates the clock reference in active-mode or connected-mode.
Baseband and power management section
The Baseband and Power Management section is composed of the following main elements:
A mixed signal ASIC, which integrates
o Microprocessor for control functions
o DSP core for LTE/3G/2G Layer 1 and digital processing of Rx and Tx signal paths
o Memory interface controller
o Dedicated peripheral blocks for control of the USB, SIM and GPIO digital interfaces
o Analog front end interfaces to RF transceiver ASIC
Memory system, which includes NAND flash and LPDDR
Voltage regulators to derive all the subsystem supply voltages from the module supply input VCC
Voltage sources for external use: V_BCKP and V_INT (not available on MPCI-L2 series modules)
Hardware power on
Hardware reset
Low power idle-mode support
32.768 kHz crystal oscillator to provide the clock reference in the low power idle-mode, which can
be set by enable power saving configuration using the AT+UPSV command.
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Function
Pin name
Pin No
I/O
Description
Remarks
Power
VCC
70,71,72
I
Module supply input
VCC pins are internally connected each other.
VCC supply circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.5.1 for functional description/ requirements
See section 2.2.1 for external circuit design-in.
GND
2, 30, 32,
44, 46, 69,
73, 74, 76,
78, 79, 80,
82, 83, 85,
86, 88-90,
92-152
N/A
Ground
GND pins are internally connected each other.
External ground connection affects the RF and thermal
performance of the device.
See section 1.5.1 for functional description.
See section 2.2.1 for external circuit design-in.
V_BCKP
3
I/O
RTC supply
input/output
V_BCKP = 3.0 V (typical) generated by internal regulator
when valid VCC supply is present.
See section 1.5.2 for functional description.
See section 2.2.2 for external circuit design-in.
V_INT
5 O Generic digital
interfaces supply
output
V_INT = 1.8 V (typical) generated by internal regulator
when the module is switched on.
Test-Point for diagnostic access is recommended.
See section 1.5.3 for functional description.
See section 2.2.3 for external circuit design-in.
System
PWR_ON
20 I Power-on input
Internal active pull-up to the VCC enabled.
See section 1.6.1 for functional description.
See section 2.3.1 for external circuit design-in.
RESET_N
23 I External reset input
Internal active pull-up to the VCC enabled.
Test-Point for diagnostic access is recommended.
See section 1.6.3 for functional description.
See section 2.3.2 for external circuit design-in.
HOST_SELECT0
26 I Selection of module
configuration by the
host processor
Not supported by all the product versions.
See section 1.6.4 for functional description.
See section 2.3.3 for external circuit design-in.
HOST_SELECT1
62 I Selection of module
configuration by the
host processor
Not supported by all the product versions.
See section 1.6.4 for functional description.
See section 2.3.3 for external circuit design-in.
Antennas
ANT1
81
I/O
Primary antenna
Main Tx / Rx antenna interface.
50 nominal characteristic impedance.
Antenna circuit affects RF performance and application
device compliance with required certification schemes.
See section 1.7 for functional description / requirements.
See section 2.4 for external circuit design-in.
ANT2
87 I Secondary antenna
Rx only for MIMO 2x2 and Rx diversity.
50 nominal characteristic impedance.
Antenna circuit affects RF performance and application
device compliance with required certification schemes.
See section 1.7 for functional description / requirements
See section 2.4 for external circuit design-in.
ANT_DET
75 I Antenna detection
Not supported by “00”, “01”, “60” product versions.
See section 1.7.2 for functional description.
See section 2.4.2 for external circuit design-in.
1.3 Pin-out
1.3.1 TOBY-L2 series pin assignment
Table 3 lists the pin-out of the TOBY-L2 series modules, with pins grouped by function.
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Function
Pin name
Pin No
I/O
Description
Remarks
SIM
VSIM
59 O SIM supply output
VSIM = 1.8 V / 3 V output as per connected SIM type.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_IO
57
I/O
SIM data
Data input/output for 1.8 V / 3 V SIM
Internal 4.7 k pull-up to VSIM.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_CLK
56 O SIM clock
3.43 MHz clock output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
SIM_RST
58 O SIM reset
Reset output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
USB
VUSB_DET
4 I USB detect input
Leave unconnected: VUSB_DET functionality is not
supported.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB_D-
27
I/O
USB Data Line D-
USB interface for AT and data communication, FOAT,
FW update by u-blox EasyFlash tool and diagnostic.
90 nominal differential impedance (Z0)
30 nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and series resistors as
required by USB 2.0 specifications [7] are part of the
USB pad driver and need not be provided externally.
If the USB interface is not used by the Application
Processor, Test-Point for diagnostic / FW update
access is recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB_D+
28
I/O
USB Data Line D+
USB interface for AT and data communication, FOAT,
FW update by u-blox EasyFlash tool and diagnostic.
90 nominal differential impedance (Z0)
30 nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and series resistors as
required by the USB 2.0 specifications [7] are part of the
USB pad driver and need not be provided externally.
If the USB interface is not used by the Application
Processor, Test-Point for diagnostic / FW update access
is recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Function
Pin name
Pin No
I/O
Description
Remarks
UART
RXD
17 O UART data output
Not supported by “00” product versions.
1.8 V output, Circuit 104 (RXD) in ITU-T V.24,
for AT and data communication, FOAT, diagnostic.
Test-Point and series 0 recommended for diagnostic.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
TXD
16 I UART data input
Not supported by “00” product versions.
1.8 V input, Circuit 103 (TXD) in ITU-T V.24,
for AT and data communication, FOAT, diagnostic.
Internal active pull-up to V_INT.
Test-Point and series 0 recommended for diagnostic.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
CTS
15 O UART clear to send
output
Not supported by “00” product versions.
1.8 V output, Circuit 106 (CTS) in ITU-T V.24.
Test-Point and series 0 recommended for diagnostic.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
RTS
14 I UART ready to send
input
Not supported by “00” product versions.
1.8 V input, Circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT.
Test-Point and series 0 recommended for diagnostic.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
DSR
10
O /
I/O
UART data set
ready output / GPIO
UART DSR not supported by “00” product versions;
GPIO not supported by “00”, “01”, “60” versions.
1.8 V, Circuit 107 in ITU-T V.24, configurable as GPIO.
Test-Point and series 0 recommended for diagnostic.
See section 1.9.2 and 1.11 for functional description.
See section 2.6.2 and 2.8 for external circuit design-in.
RI
11
O /
I/O
UART ring indicator
output / GPIO
RI not supported by “00” product versions;
GPIO not supported by “00”, “01”, “60” versions.
1.8 V, Circuit 125 in ITU-T V.24, configurable as GPIO.
Test-Point and series 0 recommended for diagnostic.
See section 1.9.2 and 1.11 for functional description.
See section 2.6.2 and 2.8 for external circuit design-in.
DTR
13
I /
I/O
UART data terminal
ready input / GPIO
UART DTR not supported by “00” product versions;
GPIO not supported by “00”, “01”, “60” versions.
1.8 V, Circuit 108/2 in ITU-T V.24, configurable as GPIO.
Internal active pull-up to V_INT when configured as DTR
Test-Point and series 0 recommended for diagnostic.
See section 1.9.2 and 1.11 for functional description.
See section 2.6.2 and 2.8 for external circuit design-in.
DCD
12
O /
I/O
UART data carrier
detect output / GPIO
UART DCD not supported by “00” product versions;
GPIO not supported by “00”, “01”, “60” versions.
1.8 V, Circuit 109 in ITU-T V.24, configurable as GPIO.
Test-Point and series 0 recommended for diagnostic.
See section 1.9.2 and 1.11 for functional description.
See section 2.6.2 and 2.8 for external circuit design-in.
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Function
Pin name
Pin No
I/O
Description
Remarks
DDC
SCL
54 O I2C bus clock line
Not supported by versions ‘00’, ‘01’, ‘60’, TOBY-L201-02S.
1.8 V open drain, to communicate with I2C-slave devices.
External pull-up required.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
SDA
55
I/O
I2C bus data line
Not supported by versions ‘00’, ‘01’, ‘60’, TOBY-L201-02S.
1.8 V open drain, to communicate with I2C-slave devices.
External pull-up required.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
SDIO
SDIO_D0
66
I/O
SDIO serial data [0]
Not supported by “00”, “01”, “60” product versions.
Interface for communication with u-blox Wi-Fi module.
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_D1
68
I/O
SDIO serial data [1]
Not supported by “00”, “01”, “60” product versions.
Interface for communication with u-blox Wi-Fi module.
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_D2
63
I/O
SDIO serial data [2]
Not supported by “00”, “01”, “60” product versions.
Interface for communication with u-blox Wi-Fi module.
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_D3
67
I/O
SDIO serial data [3]
Not supported by “00”, “01”, “60” product versions.
Interface for communication with u-blox Wi-Fi module.
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_CLK
64 O SDIO serial clock
Not supported by “00”, “01”, “60” product versions.
Interface for communication with u-blox Wi-Fi module.
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
SDIO_CMD
65
I/O
SDIO command
Not supported by “00”, “01”, “60” product versions.
Interface for communication with u-blox Wi-Fi module.
See section 1.9.4 for functional description.
See section 2.6.4 for external circuit design-in.
Audio
I2S_TXD
51
O /
I/O
I2S transmit data /
GPIO
I2S not supported by vers.‘00’,‘01’,‘60’,‘L201-02’,‘L220-62’
GPIO not supported by versions ‘00’, ‘01’, ‘60’.
I2S data output, alternatively configurable as GPIO.
See sections 1.10 and 1.11 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
I2S_RXD
53
I /
I/O
I2S receive data /
GPIO
I2S not supported by vers.‘00’,‘01’,‘60’,‘L201-02’,‘L220-62’
GPIO not supported by versions ‘00’, ‘01’, ‘60’.
I2S data input, alternatively configurable as GPIO.
See sections 1.10 and 1.11 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
I2S_CLK
52
I/O /
I/O
I2S clock /
GPIO
I2S not supported by vers.‘00’,‘01’,‘60’,‘L201-02’,‘L220-62’
GPIO not supported by versions ‘00’, ‘01’, ‘60’.
I2S serial clock, alternatively configurable as GPIO.
See sections 1.10 and 1.11 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
I2S_WA
50
I/O /
I/O
I2S word alignment /
GPIO
I2S not supported by vers.‘00’,‘01’,‘60’,‘L201-02’,‘L220-62’
GPIO not supported by versions ‘00’, ‘01’, ‘60’.
I2S word alignment, alternatively configurable as GPIO.
See sections 1.10 and 1.11 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
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Function
Pin name
Pin No
I/O
Description
Remarks
GPIO
GPIO1
21
I/O
GPIO
Not supported by “00”, “01”, “60” product versions,
providing WWAN status indication on GPIO1 pin.
1.8 V GPIO with alternatively configurable functions.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO2
22
I/O
GPIO
Not supported by “00”, “01”, “60” product versions.
1.8 V GPIO with alternatively configurable functions.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO3
24
I/O
GPIO
Not supported by “00”, “01”, “60” product versions.
1.8 V GPIO with alternatively configurable functions.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO4
25
I/O
GPIO
Not supported by “00”, “01”, “60” product versions.
1.8 V GPIO with alternatively configurable functions.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO5
60
I/O
GPIO
Not supported by “00”, “01”, “60” product versions.
1.8 V GPIO with alternatively configurable functions.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
GPIO6
61
I/O
GPIO
Not supported by “00”, “01”, “60” product versions.
1.8 V GPIO with alternatively configurable functions.
See section 1.11 for functional description.
See section 2.8 for external circuit design-in.
Reserved
RSVD
6
N/A
Reserved pin
This pin must be connected to ground.
See section 2.10
RSVD
1, 7-9, 18,
19, 29, 31,
33-43, 45,
47-49, 77,
84, 91
N/A
Reserved pin
Leave unconnected.
See section 2.10
Function
Pin name
Pin No
I/O
Description
Remarks
Power
3.3Vaux
2, 24, 39,
41, 52
I
Module supply input
3.3Vaux pins are internally connected each other.
3.3Vaux supply circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.5.1 for functional description / requirements.
See section 2.2.1 for external circuit design-in.
GND
4, 9, 15, 18,
21, 26, 27,
29, 34, 35,
37, 40, 43,
50
N/A
Ground
GND pins are internally connected each other.
External ground connection affects the RF and thermal
performance of the device.
See section 1.5.1 for functional description.
See section 2.2.1 for external circuit design-in.
Auxiliary
Signals
PERST#
22 I External reset input
Internal 45 k pull-up to 3.3 V supply.
See section 1.6.3 for functional description.
See section 2.3.2 for external circuit design-in.
Table 3: TOBY-L2 series module pin definition, grouped by function
1.3.2 MPCI-L2 series pin assignment
Table 4 lists the pin-out of the MPCI-L2 series modules, with pins grouped by function.
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Function
Pin name
Pin No
I/O
Description
Remarks
Antennas
ANT1
U.FL
I/O
Primary antenna
Main Tx / Rx antenna interface.
50 nominal characteristic impedance.
Antenna circuit affects RF performance and integrating
device compliance with applicable certification schemes.
See section 1.7 for functional description / requirements.
See section 2.4 for external circuit design-in.
ANT2
U.FL
I
Secondary antenna
Rx only for MIMO 2x2 and Rx diversity.
50 nominal characteristic impedance.
Antenna circuit affects RF performance and integrating
device compliance with applicable certification schemes.
See section 1.7 for functional description / requirements
See section 2.4 for external circuit design-in.
SIM
UIM_PWR
8 O SIM supply output
UIM_PWR = 1.8 V / 3 V automatically generated
according to the connected SIM type.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
UIM_DATA
10
I/O
SIM data
Data input/output for 1.8 V / 3 V SIM
Internal 4.7 k pull-up to UIM_PWR.
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
UIM_CLK
12 O SIM clock
3.43 MHz clock output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
UIM_RESET
14 O SIM reset
Reset output for 1.8 V / 3 V SIM
See section 1.8 for functional description.
See section 2.5 for external circuit design-in.
USB
USB_D-
36
I/O
USB Data Line D-
USB interface for AT and data communication, FOAT,
FW update by u-blox EasyFlash tool and diagnostic.
90 nominal differential impedance (Z0)
30 nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and series resistors as
required by the USB 2.0 specifications [7] are part of the
USB pad driver and need not be provided externally.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB_D+
38
I/O
USB Data Line D+
USB interface for AT and data communication, FOAT,
FW update by u-blox EasyFlash tool and diagnostic.
90 nominal differential impedance (Z0)
30 nominal common mode impedance (ZCM)
Pull-up or pull-down resistors and series resistors as
required by the USB 2.0 specifications [7] are part of the
USB pad driver and need not be provided externally.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
Specific
Signals
LED_WWAN#
42 O LED indicator
output
Open drain active low output.
See section 1.12 for functional description.
See section 2.9 for external circuit design-in.
W_DISABLE#
20 I Wireless radio
disable input
Internal 22 k pull-up to 3.3Vaux.
See section 1.12 for functional description.
See section 2.9 for external circuit design-in.
Not
Connected
NC
1, 3, 5-7, 11,
13,16,17,19,
23, 25, 28,
30-33, 4446,47-49,51
N/A
Not connected
Internally not connected.
See section 1.14 for the description.
Table 4: MPCI-L2 series module pin definition, grouped by function
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TOBY-L2 and MPCI-L2 series - System Integration Manual
General Status
Operating Mode
Definition
Power-down
Not-Powered Mode
VCC or 3.3Vaux supply not present or below operating range: module is switched off.
Power-Off Mode
VCC or 3.3Vaux supply within operating range and module is switched off.
Normal Operation
Idle-Mode
Module processor core runs with 32 kHz reference generated by the internal oscillator.
Active-Mode
Module processor core runs with 26 MHz reference generated by the internal oscillator.
Connected-Mode
RF Tx/Rx data connection enabled and processor core runs with 26 MHz reference.
Operating Mode
Description
Transition between operating modes
Not-Powered Mode
Module is switched off.
Application interfaces are not accessible.
When VCC or 3.3Vaux supply is removed, the module
enters not-powered mode.
When in not-powered mode, TOBY-L2 modules cannot be
switched on by PWR_ON, RESET_N or RTC alarm and enter
active-mode after applying VCC supply (see 1.6.1).
When in not-powered mode, MPCI-L2 modules cannot be
switched on by RTC alarm and enter active-mode after
applying 3.3Vaux supply (see 1.6.1).
Power-Off Mode
Module is switched off: normal shutdown by
an appropriate power-off event (see 1.6.2).
Application interfaces are not accessible.
MPCI-L2 modules do not support Power-Off
Mode but halt mode (see 1.6.2 and u-blox AT
Commands Manual [3], AT+CFUN=127
command).
When the module is switched off by an appropriate poweroff event (see 1.6.2), the module enters power-off mode
from active-mode.
When in power-off mode, TOBY-L2 modules can be
switched on by PWR_ON, RESET_N or an RTC alarm.
When in power-off mode, TOBY-L2 modules enter the
not-powered mode after removing VCC supply.
Idle-Mode
Module is switched on with application
interfaces temporarily disabled or
suspended: the module is temporarily not
ready to communicate with an external
device by means of the application
interfaces as configured to reduce the
current consumption.
The module enters the low power idle-mode
whenever possible if power saving is enabled
by AT+UPSV (see u-blox AT Commands
Manual [3]) reducing current consumption
(see 1.5.1.5).
With HW flow control enabled and
AT+UPSV=1 or AT+UPSV=3, the UART CTS
line indicates when the UART is enabled
(see 1.9.2.3, 1.9.2.4).
With HW flow control disabled, the UART
CTS line is fixed to ON state (see 1.9.2.3).
Power saving configuration is not enabled by
default: it can be enabled by the AT+UPSV
command (see the u-blox AT Commands
Manual [3]).
The modules automatically switch from active-mode to low
power idle-mode whenever possible if power saving is
enabled (see sections 1.5.1.5, 1.9.1.4, 1.9.2.4 and u-blox AT
Commands Manual [3], AT+UPSV).
The modules wake up from low power idle-mode to activemode in the following events:
Automatic periodic monitoring of the paging channel for
the paging block reception according to network conditions
(see 1.5.1.5)
The connected USB host forces a remote wakeup of the
module as USB device (see 1.9.1.4)
Automatic periodic enable of the UART interface to
receive / send data, with AT+UPSV=1 (see 1.9.2.4)
Data received over UART, with HW flow control disabled
and power saving enabled (see 1.9.2.4)
RTS input set ON by the host DTE, with HW flow control
disabled and AT+UPSV=2 (see 1.9.2.4)
DTR input set ON by the host DTE, with AT+UPSV=3
(see 1.9.2.4)
The connected SDIO device forces a wakeup of the
module as SDIO host (see 1.9.4)
A preset RTC alarm occurs (see u-blox AT Commands
Manual [3], AT+CALA)
1.4 Operating modes
TOBY-L2 and MPCI-L2 series modules have several operating modes. The operating modes are
defined in Table 5 and described in detail in Table 6, providing general guidelines for operation.
Table 5: TOBY-L2 and MPCI-L2 series modules operating modes definition
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Operating Mode
Description
Transition between operating modes
Active-Mode
Module is switched on with application
interfaces enabled or not suspended: the
module is ready to communicate with an
external device by means of the application
interfaces unless power saving
configuration is enabled by AT+UPSV (see
1.9.1.4, 1.9.2.4 and u-blox AT Commands
Manual [3]).
When the module is switched on by an appropriate
power-on event (see 1.6.1), the module enters active-mode
from power-off mode.
If power saving configuration is enabled by the AT+UPSV
command, the module automatically switches from active
to idle-mode whenever possible and the module wakes up
from idle to active-mode in the events listed above (see
idle-mode to active-mode transition description above).
When a RF Tx/Rx data connection is initiated or when RF
Tx/Rx is required due to a connection previously initiated,
the module switches from active to connected-mode.
Connected-Mode
RF Tx/Rx data connection is in progress.
The module is prepared to accept data
signals from an external device unless
power saving configuration is enabled by
AT+UPSV (see sections 1.9.1.4, 1.9.2.4 and
u-blox AT Commands Manual [3]).
When a data connection is initiated, the module enters
connected-mode from active-mode.
Connected-mode is suspended if Tx/Rx data is not in
progress, due to connected discontinuous reception and
fast dormancy capabilities of the module and according to
network environment settings and scenario. In such case,
the module automatically switches from connected to
active mode and then, if power saving configuration is
enabled by the AT+UPSV command, the module
automatically switches to idle-mode whenever possible.
Vice-versa, the module wakes up from idle to active mode
and then connected mode if RF Tx/Rx is necessary.
When a data connection is terminated, the module returns
to the active-mode.
TOBY-L2 Switch ON:
• Apply VCC
MPCI-L2 Switch ON:
• Apply 3.3Vaux
If power saving is enabled
and there is no activity for
a defined time interval
Any wake up event described
in the module operating
modes summary table above
Incoming/outgoing call or
other dedicated device
network communication
No RF Tx/Rx in progress,
Call terminated,
Communication dropped
TOBY-L2
Switch ON:
• PWR_ON
• RESET_N
• RTC alarm
Not
powered
Power off
ActiveConnected Idle
TOBY-L2
Switch OFF:
• AT+CPWROFF
• RESET_N
MPCI-L2:
• AT+CFUN=127 and
then remove 3.3Vaux
TOBY-L2:
• Remove VCC
Table 6: TOBY-L2 and MPCI-L2 series modules operating modes description
Figure 3 describes the transition between the different operating modes.
Figure 3: TOBY-L2 and MPCI-L2 series modules operating modes transition
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Item
Requirement
Remark
VCC or 3.3Vaux
nominal voltage
Within VCC or 3.3Vaux normal operating range:
See “Supply/Power pins” section in the TOBY-L2
Data Sheet [1] or in the MPCI-L2 Data Sheet [2].
The modules cannot be switched on if the supply
voltage is below the normal operating range minimum
limit.
VCC or 3.3Vaux
voltage during
normal operation
Within VCC or 3.3Vaux extended operating range:
See “Supply/Power pins” section in the TOBY-L2
Data Sheet [1] or in the MPCI-L2 Data Sheet [2].
The modules may switch off if the supply voltage
drops below the extended operating range minimum
limit.
VCC or 3.3Vaux
average current
Support with adequate margin the highest
averaged current consumption value in
connected-mode conditions specified for VCC in
TOBY-L2 Data Sheet [1] or specified for 3.3Vaux in
MPCI-L2 Data Sheet [2].
The maximum average current consumption can be
greater than the specified value according to actual
antenna mismatching, temperature, supply voltage.
Sections 1.5.1.2, 1.5.1.3 and 1.5.1.4 describe current
consumption profiles in 2G, 3G, LTE connected-mode.
VCC or 3.3Vaux
peak current
Support with margin the highest peak current
consumption value in 2G connected-mode
conditions specified for VCC in TOBY-L2 Data
Sheet [1] or specified for 3.3Vaux in MPCI-L2 Data
Sheet [2].
The specified maximum peak of current consumption
occurs during GSM single transmit slot in
850/900 MHz connected-mode, in case of
mismatched antenna.
Section 1.5.1.2 describes 2G Tx peak/pulse current.
VCC or 3.3Vaux
voltage drop during
2G Tx slots
Lower than 400 mV
Supply voltage drops greater than recommended
during 2G TDMA transmission slots directly affect RF
compliance with applicable certification schemes.
Figure 5 shows supply voltage drop during 2G Tx slots
VCC or 3.3Vaux
voltage ripple
during RF Tx
Noise in the supply has to be minimized
High supply voltage ripple values during LTE/3G/2G
RF transmissions in connected-mode directly affect
RF compliance with applicable certification schemes.
Figure 5 describes supply voltage ripple during RF Tx.
VCC or 3.3Vaux
under/over-shoot
at start/end of Tx
slots
Absent or at least minimized
Supply voltage under-shoot or over-shoot at the start
or the end of 2G transmission slots directly affect RF
compliance with applicable certification schemes.
Figure 5 describes supply voltage under/over-shoot
1.5 Supply interfaces
1.5.1 Module supply input (VCC or 3.3Vaux)
TOBY-L2 modules are supplied via the three VCC pins, and MPCI-L2 modules are supplied via the five
3.3Vaux pins. All supply voltages used inside the modules are generated from the VCC or the 3.3Vaux
supply input by integrated voltage regulators, including the V_BCKP RTC supply, the V_INT generic
digital interface supply, and the VSIM or UIM_PWR SIM interface supply.
The current drawn by the TOBY-L2 and MPCI-L2 series modules through the VCC or 3.3Vaux pins can
vary by several orders of magnitude depending on radio access technology, operation mode and state.
It is important that the supply source is able to support both the high peak of current consumption
during 2G transmission at maximum RF power level (as described in the section 1.5.1.2) and the high
average current consumption during 3G and LTE transmission at maximum RF power level (as
described in the sections 1.5.1.3 and 1.5.1.4).
1.5.1.1 VCC or 3.3Vaux supply requirements
Table 7 summarizes the requirements for the VCC or 3.3Vaux modules supply. See section 2.2.1 for
suggestions to properly design a VCC or 3.3Vaux supply circuit compliant with the requirements
listed in Table 7.
⚠ The supply circuit affects the RF compliance of the device integrating TOBY-L2 and MPCI-L2
series modules with applicable required certification schemes as well as antenna circuit design.
Compliance is guaranteed if the requirements summarized in the Table 7 are fulfilled.
Table 7: Summary of VCC or 3.3Vaux modules supply requirements
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Time
[ms]
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
Current [A]
200 mA
60-120 mA
1900 mA
Peak current depends
on TX power and
actual antenna load
GSM frame
4.615 ms
(1 frame = 8 slots)
60-120 mA
10-40 mA
0.0
1.5
1.0
0.5
2.0
2.5
Time [ms]
undershoot
overshoot
ripple
drop
Voltage [mV]
3.8 V
(typ)
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
RX
slot
unused
slot
unused
slot
TX
slot
unused
slot
unused
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
GSM frame
4.615 ms
(1 frame = 8 slots)
1.5.1.2 Current consumption in 2G connected-mode
When a GSM call is established, the VCC or 3.3Vaux module current consumption is determined by
the current consumption profile typical of the GSM transmitting and receiving bursts.
The peak of current consumption during a transmission slot is strictly dependent on the RF
transmitted power, which is regulated by the network (the current base station). The transmitted
power in the transmit slot is also the more relevant factor for determining the average current
consumption.
If the module is transmitting in 2G single-slot mode in the 850 or 900 MHz bands, at the maximum
RF power level (approximately 2 W or 33 dBm in the allocated transmit slot/burst) the current
consumption can reach an high peak (see the “Current consumption” section in the TOBY-L2 Data
Sheet [1] or the MPCI-L2 Data Sheet [2]) for 576.9 µs (width of the transmit slot/burst) with a
periodicity of 4.615 ms (width of 1 frame = 8 slots/burst), so with a 1/8 duty cycle according to GSM
TDMA (Time Division Multiple Access).
If the module is transmitting in 2G single-slot mode in the 1800 or 1900 MHz bands, the current
consumption figures are quite less high than the one in the low bands, due to 3GPP transmitter output
power specifications.
During a GSM call, current consumption is not so significantly high in receiving or in monitor bursts
and is low in the inactive unused bursts.
Figure 4 shows an example of the current consumption profile versus time in 2G single-slot mode.
Figure 4: VCC or 3.3Vaux current consumption profile versus time during a 2G single-slot call (1 TX slot, 1 RX slot)
Figure 5 illustrates VCC or 3.3Vaux voltage profile versus time during a 2G single-slot call, according
to the relative VCC or 3.3Vaux current consumption profile described in Figure 4.
Figure 5: VCC or 3.3Vaux voltage profile versus time during a 2G single-slot call (1 TX slot, 1 RX slot)
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Time [ms]
RX
slot
unused
slot
TX
slot
TX
slot
TX
slot
TX
slot
MON
slot
unused
slot
RX
slot
unused
slot
TX
slot
TX
slot
TX
slot
TX
slot
MON
slot
unused
slot
GSM frame
4.615 ms
(1 frame = 8 slots)
Current [A]
200mA
60-130mA
Peak current depends
on TX power and
actual antenna load
GSM frame
4.615 ms
(1 frame = 8 slots)
1600 mA
0.0
1.5
1.0
0.5
2.0
2.5
When a GPRS connection is established, more than one slot can be used to transmit and/or more than
one slot can be used to receive. The transmitted power depends on network conditions, which set the
peak current consumption, but following the 3GPP specifications the maximum Tx RF power is
reduced if more than one slot is used to transmit, so the maximum peak of current is not as high as
can be in case of a 2G single-slot call.
The multi-slot transmission power can be further reduced by configuring the actual Multi-Slot Power
Reduction profile with the dedicated AT command, AT+UDCONF=40 (see the u-blox AT Commands
Manual [3]). This command is not supported by “00” and “60” product versions.
If the module transmits in GPRS class 12 in the 850 or 900 MHz bands, at the maximum RF power
control level, the current consumption can reach a quite high peak but lower than the one achievable
in 2G single-slot mode. This happens for 2.307 ms (width of the 4 transmit slots/bursts) with a
periodicity of 4.615 ms (width of 1 frame = 8 slots/bursts), so with a 1/2 duty cycle, according to 2G
TDMA.
If the module is in GPRS connected mode in the 1800 or 1900 MHz bands, the current consumption
figures are quite less high than the one in the low bands, due to 3GPP transmitter output power
specifications.
Figure 6 reports the current consumption profiles in GPRS class 12 connected mode, in the 850 or
900 MHz bands, with 4 slots used to transmit and 1 slot used to receive.
Figure 6: VCC or 3.3Vaux current consumption profile during a 2G GPRS/EDGE multi-slot connection (4 TX slots, 1 RX slot)
In case of EDGE connections the VCC current consumption profile is very similar to the GPRS current
profile, so the image shown in Figure 6, representing the current consumption profile in GPRS class
12 connected mode, is valid for the EDGE class 12 connected mode as well.
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Time
[ms]
3G frame
10 ms
(1 frame = 15 slots)
Current [mA]
Current consumption
value depends on TX power
and actual antenna load
170
mA
1 slot
666
µs
850
mA
0
300
200
100
500
400
600
700
1.5.1.3 Current consumption in 3G connected mode
During a 3G connection, the module can transmit and receive continuously due to the Frequency
Division Duplex (FDD) mode of operation with the Wideband Code Division Multiple Access (WCDMA).
The current consumption depends on output RF power, which is always regulated by the network (the
current base station) sending power control commands to the module. These power control
commands are logically divided into a slot of 666 µs, thus the rate of power change can reach a
maximum rate of 1.5 kHz.
There are no high current peaks as in the 2G connection, since transmission and reception are
continuously enabled due to FDD WCDMA implemented in the 3G that differs from the TDMA
implemented in the 2G case.
In the worst scenario, corresponding to a continuous transmission and reception at maximum output
power (approximately 250 mW or 24 dBm), the average current drawn by the module at the VCC pins
is considerable (see the “Current consumption” section in TOBY-L2 Data Sheet [1] or in MPCI-L2 Data
Sheet [2]). At the lowest output RF power (approximately 0.01 µW or –50 dBm), the current drawn by
the internal power amplifier is strongly reduced. The total current drawn by the module at the VCC
pins is due to baseband processing and transceiver activity.
Figure 7 shows an example of current consumption profile of the module in 3G WCDMA/DC-HSPA+
continuous transmission mode.
Figure 7: VCC or 3.3Vaux current consumption profile versus time during a 3G connection (TX and RX continuously enabled)
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Time
[ms]
Current [mA]
Current consumption
value depends on TX power
and actual antenna load
1 Slot
1 Resource Block
(0.5 ms)
1 LTE Radio Frame
(10 ms)
0
300
200
100
500
400
600
700
1.5.1.4 Current consumption in LTE connected-mode
During an LTE connection, the module can transmit and receive continuously due to the Frequency
Division Duplex (FDD) mode of operation used in LTE radio access technology.
The current consumption depends on output RF power, which is always regulated by the network (the
current base station) sending power control commands to the module. These power control
commands are logically divided into a slot of 0.5 ms (time length of one Resource Block), thus the rate
of power change can reach a maximum rate of 2 kHz.
The current consumption profile is similar to that in 3G radio access technology. Unlike the 2G
connection mode, which uses the TDMA mode of operation, there are no high current peaks since
transmission and reception are continuously enabled in FDD.
In the worst scenario, corresponding to a continuous transmission and reception at maximum output
power (approximately 250 mW or 24 dBm), the average current drawn by the module at the VCC pins
is considerable (see the “Current consumption” section in TOBY-L2 Data Sheet [1] or in MPCI-L2 Data
Sheet [2]). At the lowest output RF power (approximately 0.01 µW or –50 dBm), the current drawn by
the internal power amplifier is strongly reduced and the total current drawn by the module at the VCC
pins is due to baseband processing and transceiver activity.
Figure 8 shows an example of the module current consumption profile versus time in LTE connected-
mode. Detailed current consumption values can be found in TOBY-L2 Data Sheet [1] and in MPCI-L2
Data Sheet [2].
Figure 8: VCC or 3.3Vaux current consumption profile versus time during LTE connection (TX and RX continuously enabled)
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TOBY-L2 and MPCI-L2 series - System Integration Manual
~50 ms
IDLE MODE ACTIVE MODE IDLE MODE
Active Mode
Enabled
Idle Mode
Enabled
2G case: 0.44-2.09 s
3G case: 0.61-5.09 s
LTE case: 0.27-2.51 s
IDLE MODE
~50 ms
ACTIVE MODE
Time [s]
Current [mA]
Time [ms]
Current [mA]
RX
Enabled
0
100
0
100
1.5.1.5 Current consumption in cyclic idle/active mode (power saving enabled)
The power saving configuration is by default disabled, but it can be enabled using the AT+UPSV
command (see the u-blox AT Commands Manual [3]). When power saving is enabled, the module
automatically enters the low power idle-mode whenever possible, reducing current consumption.
During low power idle-mode, the module processor runs with 32 kHz reference clock frequency.
When the power saving configuration is enabled and the module is registered or attached to a
network, the module automatically enters the low power idle-mode whenever possible, but it must
periodically monitor the paging channel of the current base station (paging block reception), in
accordance to the 2G/3G/LTE system requirements, even if connected-mode is not enabled by the
application. When the module monitors the paging channel, it wakes up to the active-mode, to enable
the reception of paging block. In between, the module switches to low power idle-mode. This is known
as discontinuous reception (DRX).
The module processor core is activated during the paging block reception, and automatically switches
its reference clock frequency from 32 kHz to the 26 MHz used in active-mode.
The time period between two paging block receptions is defined by the network. This is the paging
period parameter, fixed by the base station through broadcast channel sent to all users on the same
serving cell:
In case of 2G RAT, the paging period can vary from 470.8 ms (DRX = 2, length of 2 x 51 2G frames
= 2 x 51 x 4.615 ms) up to 2118.4 ms (DRX = 9, length of 9 x 51 2G frames = 9 x 51 x 4.615 ms)
In case of 3G RAT, the paging period can vary from 640 ms (DRX = 6, i.e. length of 2
6
3G frames =
64 x 10 ms) up to 5120 ms (DRX = 9, length of 29 3G frames = 512 x 10 ms).
In case of LTE RAT, the paging period can vary from 320 ms (DRX = 5, i.e. length of 2
5
LTE frames
= 32 x 10 ms) up to 2560 ms (DRX = 8, length of 28 LTE frames = 256 x 10 ms).
Figure 9 illustrates a typical example of the module current consumption profile when power saving is
enabled. The module is registered with network, automatically enters the low power idle-mode and
periodically wakes up to active-mode to monitor the paging channel for the paging block reception.
Detailed current consumption values can be found in TOBY-L2 Data Sheet [1] and in MPCI-L2 Data
Sheet [2].
Figure 9: VCC or 3.3Vaux current consumption profile with power saving enabled and module registered with the network:
the module is in idle-mode and periodically wakes up to active-mode to monitor the paging channel for paging reception
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TOBY-L2 and MPCI-L2 series - System Integration Manual
ACTIVE MODE
2G case: 0.44-2.09 s
3G case: 0.61-5.09 s
LTE case: 0.32-2.56 s
Paging period
Time [s]
Current [mA]
Time [ms]
Current [mA]
RX
Enabled
0
100
0
100
1.5.1.6 Current consumption in fixed active-mode (power saving disabled)
When power saving is disabled, the module does not automatically enter the low power idle-mode
whenever possible: the module remains in active-mode. Power saving configuration is by default
disabled. It can also be disabled using the AT+UPSV command (see u-blox AT Commands Manual [3]
for detail usage).
The module processor core is activated during idle-mode, and the 26 MHz reference clock frequency
is used. It would draw more current during the paging period than that in the power saving mode.
Figure 10 illustrates a typical example of the module current consumption profile when power saving
is disabled. In such case, the module is registered with the network and while active-mode is
maintained, the receiver is periodically activated to monitor the paging channel for paging block
reception. Detailed current consumption values can be found in TOBY-L2 Data Sheet [1] and in
MPCI-L2 Data Sheet [2].
Figure 10: VCC or 3.3Vaux current consumption profile with power saving disabled and module registered with the network:
active-mode is always held and the receiver is periodically activated to monitor the paging channel for paging block reception
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Baseband
Processor
70
VCC
71
VCC
72
VCC
3
V_BCKP
Linear
LDO
Power
Management
TOBY-L2 series
32 kHz
RTC
1.5.2 RTC supply input/output (V_BCKP)
☞ The RTC supply V_BCKP pin is not available on MPCI-L2 series modules.
The V_BCKP pin of TOBY-L2 series modules connects the supply for the Real Time Clock (RTC). A
linear LDO regulator integrated in the Power Management Unit internally generates this supply, as
shown in Figure 11, with low current capability (see the TOBY-L2 series Data Sheet [1]). The output of
this regulator is always enabled when the main module voltage supply applied to the VCC pins is within
the valid operating range.
Figure 11: TOBY-L2 series RTC supply (V_BCKP) simplified block diagram
The RTC provides the module time reference (date and time) that is used to set the wake-up interval
during the low power idle-mode periods, and is able to make available the programmable alarm
functions.
The RTC functions are available also in power-down mode when the V_BCKP voltage is within its valid
range (specified in the “Input characteristics of Supply/Power pins” table in TOBY-L2 series Data
Sheet [1]). The RTC can be supplied from an external back-up battery through the V_BCKP, when the
main module voltage supply is not applied to the VCC pins. This lets the time reference (date and time)
run until the V_BCKP voltage is within its valid range, even when the main supply is not provided to
the module.
Consider that the module cannot switch on if a valid voltage is not present on VCC even when the RTC
is supplied through V_BCKP (meaning that VCC is mandatory to switch on the module).
The RTC has very low current consumption, but is highly temperature dependent. For example,
V_BCKP current consumption at the maximum operating temperature can be higher than the typical
value at 25 °C specified in the “Input characteristics of Supply/Power pins” table in the TOBY-L2 series
Data Sheet [1].
If V_BCKP is left unconnected and the module main supply is not applied to the VCC pins, the RTC is
supplied from the bypass capacitor mounted inside the module. However, this capacitor is not able to
provide a long buffering time: within few milliseconds the voltage on V_BCKP will go below the valid
range (1.4 V min). This has no impact on cellular connectivity, as all the module functionalities do not
rely on date and time setting.
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Baseband
Processor
70
VCC
71
VCC
72
VCC
5
V_INT
Switching
Step-Down
Power
Management
TOBY-L2 series
Digital I/O
1.5.3 Generic digital interfaces supply output (V_INT)
☞ The generic digital interfaces supply V_INT pin is not available on MPCI-L2 series modules.
The V_INT output pin of the TOBY-L2 series modules is connected to an internal 1.8 V supply with
current capability specified in the TOBY-L2 series Data Sheet [1]. This supply is internally generated
by a switching step-down regulator integrated in the Power Management Unit and it is internally used
to source the generic digital I/O interfaces of the TOBY-L2 module, as described in Figure 12. The
output of this regulator is enabled when the module is switched on and it is disabled when the module
is switched off.
Figure 12: TOBY-L2 series generic digital interfaces supply output (V_INT) simplified block diagram
The switching regulator operates in Pulse Width Modulation (PWM) mode for greater efficiency at
high output loads and it automatically switches to Pulse Frequency Modulation (PFM) power save
mode for greater efficiency at low output loads. The V_INT output voltage ripple is specified in the
TOBY-L2 series Data Sheet [1].
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TOBY-L2 and MPCI-L2 series - System Integration Manual
Baseband
Processor
20
PWR_ON
TOBY-L2 series
VCC
Power-on
Power
Management
Power-on
50k
1.6 System function interfaces
1.6.1 Module power-on
☞ The PWR_ON input pin is not available on MPCI-L2 series modules.
When the TOBY-L2 and MPCI-L2 series modules are in the not-powered mode (switched off, i.e. the
VCC or 3.3Vaux module supply is not applied), they can be switched on as following:
Rising edge on the VCC or 3.3Vaux supply input to a valid voltage for module supply, starting from
a voltage value lower than 0.5 V, so that the module switches on applying a proper VCC or 3.3Vaux
supply within the normal operating range.
Alternately, the RESET_N or PERST# pin can be held to the low level during the VCC or 3.3Vaux
rising edge, so that the module switches on releasing the RESET_N or PERST# pin when the VCC
or 3.3Vaux module supply voltage stabilizes at its proper nominal value within the normal
operating range.
The status of the PWR_ON input pin of TOBY-L2 modules while applying the VCC module supply is
not relevant: during this phase the PWR_ON pin can be set high or low by the external circuit.
When the TOBY-L2 modules are in the power-off mode (i.e. switched off with valid VCC module supply
applied), they can be switched on as following:
Low level on the PWR_ON pin, which is normally set high by an internal pull-up, for a valid time
period.
Low level on the RESET_N pin, which is normally set high by an internal pull-up, for a valid time
period.
RTC alarm, i.e. pre-programmed alarm by AT+CALA command (see u-blox AT Commands
Manual [3]).
As described in Figure 13, the TOBY-L2 series PWR_ON input is equipped with an internal active
pull-up resistor to the VCC module supply: the PWR_ON input voltage thresholds are different from
the other generic digital interfaces. Detailed electrical characteristics are described in TOBY-L2 series
Data Sheet [1].
Figure 13: TOBY-L2 series PWR_ON input description
UBX-13004618 - R28 System description Page 30 of 164
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