Ublox TOBY-L1 series, MPCI-L1 series System Integration Manual

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TOBY-L1 and MPCI-L1 series

LTE modules

System Integration Manual

Abstract

This document describes the features and the system integration TOBY-L1 and MPCI-L1 series LTE cellular modules.

These modules are a complete and cost efficient 4G solution offering 100 Mb/s download, 50 Mb/s upload, and covering the compact TOBY form factor or in the industry standard Mini Card (MPCI) form factor.

TOBY-L1 series

MPCI-L1 series

-blox.com

-13001482 - R04

TOBY-L1 and MPCI-L1 series - System Integration Manual

Document Information

Title TOBY-L1 and MPCI-L1 series

Subtitle LTE modules

Document type System Integration Manual

Document number UBX-13001482

Revision, date R04 15-Oct-2014

Document status Advance Information

Document status explanation

Objective Specification Document contains target values. Revised and supplementary data will be published later.

Advance Information Document contains data based on early testing. Revised and supplementary data will be published later.

Early Production Information Document contains data from product verification. Revised and supplementary data may be published later.

Production Information Document contains the final product specification.

This document applies to the following products:

Product name Type number Firmware version PCN / IN

TOBY-L100 TOBY-L100-00S-00 G0.V.00.00.15R UBX-14002653 MPCI-L100 MPCI-L100-00S-00 G0.V.01.00.02 UBX-14041173

u-blox reserves all rights to this document and the information contained herein. Products, names, logos and designs described herein may in whole or in part be subject to intellectual property rights. Reproduction, use, modification or disclosure to third parties of this document or any part thereof without the express permission of u-blox is strictly prohibited. The information contained herein is provided “as is” and u-blox assumes no liability for the use of the information. No warranty, either express or implied, is given, including but not limited, with respect to the accuracy, correctness, reliability and fitness for a particular purpose of the information. This document may be revised by u-blox at any time. For most recent documents, visit www.u-blox.com.

u-blox

is a registered trademark of u-blox Holding AG in the EU and other countries. Microsoft and Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PCI, PCI Express, PCIe, and PCI-SIG are trademarks or registered trademarks of PCI-SIG. All other registered trademarks or trademarks mentioned in this document are property of their respective owners.

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Advance Information

TOBY-L1 and MPCI-L1 series - System Integration Manual

Preface

u-blox Technical Documentation

As part of our commitment to customer support, u-blox maintains an extensive volume of technical documentation for our products. In addition to our product-specific technical data sheets, the following manuals are available to assist u-blox customers in product design and development.

• AT Commands Manual: This document provides the description of the AT commands supported by

u-blox cellular modules.

• System Integration Manual: This document describes u-blox cellular modules from the hardware and the

software point of view. It provides hardware design guidelines for the optimal integration of the cellular module in the application device and it provides information on how to set up production and final product tests on application devices integrating the cellular module.

• Application Notes: These documents provide guidelines and information on specific hardware and/or

software topics on u-blox cellular modules. See Related documents for a list of application notes related to your cellular module.

How to use this Manual

The TOBY-L1 and MPCI-L1 series System Integration Manual provides the necessary information to successfully design and configure the u-blox cellular modules.

This manual has a modular structure. It is not necessary to read it from the beginning to the end. The following symbols are used to highlight important information within the manual:

An index finger points out key information pertaining to module integration and performance.

A warning symbol indicates actions that could negatively impact or damage the module.

Questions

If you have any questions about u-blox cellular Integration:

• Read this manual carefully.

• Contact our information service on the homepage

http://www.u-blox.com

Technical Support

Worldwide Web

Our website (www.u-blox.com) is a rich pool of information. Product information and technical documents can be accessed 24h a day.

By E-mail

Contact the closest Technical Support office by email. Use our service pool email addresses rather than any personal email address of our staff. This makes sure that your request is processed as soon as possible. You will find the contact details at the end of the document.

Helpful Information when Contacting Technical Support

When contacting Technical Support, have the following information ready:

• Module type (example: TOBY-L100) and firmware version

• Module configuration

• Clear description of your question or the problem

• A short description of the application

• Your complete contact details

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Preface ................................................................................................................................ 3

Contents .............................................................................................................................. 4

1 System description ....................................................................................................... 7

1.1 Overview .............................................................................................................................................. 7

1.2 Architecture .......................................................................................................................................... 9

1.2.1 Internal blocks ............................................................................................................................. 10

1.3 Pin-out ............................................................................................................................................... 11

1.3.1 TOBY-L1 series pin assignment .................................................................................................... 11

1.3.2 MPCI-L1 series pin assignment .................................................................................................... 13

1.4 Operating modes ................................................................................................................................ 15

1.5 Supply interfaces ................................................................................................................................ 17

1.5.1 Module supply input (VCC or 3.3aux) .......................................................................................... 17

1.5.2 RTC supply output (V_BCKP) ....................................................................................................... 21

1.5.3 Generic digital interfaces supply output (V_INT) ........................................................................... 21

1.6 System function interfaces .................................................................................................................. 22

1.6.1 Module power-on ....................................................................................................................... 22

1.6.2 Module power-off ....................................................................................................................... 25

1.6.3 Module reset ............................................................................................................................... 27

1.7 Antenna interface ............................................................................................................................... 29

1.7.1 Antenna RF interfaces (ANT1 / ANT2) .......................................................................................... 29

1.8 SIM interface ...................................................................................................................................... 32

1.8.1 SIM card interface ....................................................................................................................... 32

1.9 Data communication interfaces .......................................................................................................... 32

1.9.1 Universal Serial Bus (USB) ............................................................................................................ 32

1.10 General Purpose Input/Output (GPIO) ............................................................................................. 33

1.11 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#) .................................................................. 34

1.12 Reserved pins (RSVD) ...................................................................................................................... 34

1.13 Not connected pins (NC) ................................................................................................................. 34

1.14 System features............................................................................................................................... 35

1.14.1 Network indication ...................................................................................................................... 35

1.14.2 Power saving ............................................................................................................................... 35

2 Design-in ..................................................................................................................... 36

2.1 Overview ............................................................................................................................................ 36

2.2 Supply interfaces ................................................................................................................................ 37

2.2.1 Module supply (VCC or 3.3aux) ................................................................................................... 37

2.2.2 RTC supply output (V_BCKP) ....................................................................................................... 45

2.2.3 Digital I/O interfaces supply output (V_INT) .................................................................................. 45

2.3 System functions interfaces ................................................................................................................ 46

2.3.1 Module power-on (PWR_ON) ...................................................................................................... 46

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2.3.2 Module reset (RESET_N and PERST#) ........................................................................................... 47

2.4 Antenna interface ............................................................................................................................... 49

2.4.1 Antenna RF interfaces (ANT1 / ANT2) .......................................................................................... 49

2.5 SIM interface ...................................................................................................................................... 55

2.5.1 Guidelines for SIM circuit design.................................................................................................. 55

2.5.2 Guidelines for SIM layout design ................................................................................................. 58

2.6 Data communication interfaces .......................................................................................................... 59

2.6.1 Universal Serial Bus (USB) ............................................................................................................ 59

2.7 General Purpose Input/Output (GPIO) ................................................................................................. 61

2.8 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#) ...................................................................... 62

2.9 Reserved pins (RSVD) .......................................................................................................................... 64

2.10 Module placement .......................................................................................................................... 64

2.11 TOBY-L1 series module footprint and paste mask ........................................................................... 65

2.12 MPCI-L1 series module installation .................................................................................................. 66

2.13 Thermal guidelines .......................................................................................................................... 68

2.14 ESD guidelines ................................................................................................................................ 69

2.14.1 ESD immunity test overview ........................................................................................................ 69

2.14.2 ESD immunity test of TOBY-L1 and MPCI-L1 series reference designs .......................................... 69

2.14.3 ESD application circuits ................................................................................................................ 70

2.15 Schematic for TOBY-L1 and MPCI-L1 series module integration ...................................................... 72

2.16 Design-in checklist .......................................................................................................................... 74

2.16.1 Schematic checklist ..................................................................................................................... 74

2.16.2 Layout checklist ........................................................................................................................... 74

2.16.3 Antenna checklist ........................................................................................................................ 75

3 Handling and soldering ............................................................................................. 76

3.1 Packaging, shipping, storage and moisture preconditioning ............................................................... 76

3.2 Handling ............................................................................................................................................. 76

3.3 Soldering ............................................................................................................................................ 77

3.3.1 Soldering paste............................................................................................................................ 77

3.3.2 Reflow soldering ......................................................................................................................... 77

3.3.3 Optical inspection ........................................................................................................................ 78

3.3.4 Cleaning ...................................................................................................................................... 78

3.3.5 Repeated reflow soldering ........................................................................................................... 78

3.3.6 Wave soldering............................................................................................................................ 79

3.3.7 Hand soldering ............................................................................................................................ 79

3.3.8 Rework ........................................................................................................................................ 79

3.3.9 Conformal coating ...................................................................................................................... 79

3.3.10 Casting ........................................................................................................................................ 79

3.3.11 Grounding metal covers .............................................................................................................. 79

3.3.12 Use of ultrasonic processes .......................................................................................................... 79

4 Approvals .................................................................................................................... 80

4.1 Product certification approval overview ............................................................................................... 80

4.2 Federal Communications Commission and Industry Canada notice ..................................................... 81

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4.2.1 Declaration of Conformity – United States only ........................................................................... 81

4.2.2 Modifications .............................................................................................................................. 81

5 Product Testing........................................................................................................... 83

5.1 u-blox in-series production test ........................................................................................................... 83

5.2 Test parameters for OEM manufacturer .............................................................................................. 84

5.2.1 “Go/No go” tests for integrated devices ...................................................................................... 84

5.2.2 RF functional tests ....................................................................................................................... 84

5.2.3 Connecting to Wireless Communication Test Set ......................................................................... 86

Appendix .......................................................................................................................... 87

A Glossary ...................................................................................................................... 87

Related documents........................................................................................................... 89

Revision history ................................................................................................................ 89

Contact .............................................................................................................................. 90

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LTE category LTE bands UMTS bands GSM bands GNSS receiver CellLocate™ UART USB 2.0 USB HSIC RMII SDIO GPIO Audio MIMO 2x2 CSFB VoLTE Embedded TCP/UDP stack Embedded HTTP, FTP, SSL FOTA

1 System description

1.1 Overview

The TOBY-L1 and MPCI-L1 series comprises 4G LTE-only modules supporting two LTE bands for data communication:

• TOBY-L1 and MPCI-L1 series modules are designed for operation on the LTE Verizon network in North

America (LTE bands 4, 13), and meets the requirements of Verizon network certification for LTE only devices.

LTE-only modules offer cost advantages compared to multi-mode (LTE/3G/2G) modules and are optimized for applications using only LTE networks. Additionally, the TOBY-L1 and MPCI-L1 series modules are designed in two different form-factors suitable for applications as following:

• TOBY-L1 modules are designed in the small TOBY 152-pin Land Grid Array form-factor (35.6 x 24.8 mm),

easy to integrate in compact designs and form-factor compatible with the u-blox cellular module families. This allows customers to take the maximum advantage of their hardware and software investments, and provides very short time-to-market.

• MPCI-L1 modules are designed in the industry standard PCI Express Full-Mini Card form-factor (51 x 30 mm),

easy to integrate into industrial and consumer applications and also ideal for manufacturing small series.

The modules are dedicated for data transfer, supporting a high-speed USB 2.0 interface. With LTE Category 3 data rates of 100 Mb/s (downlink) and 50 Mb/s (uplink), they are ideal for applications requiring the highest data rates and high-speed internet access. TOBY-L1 and MPCI-L1 series modules are the perfect choice for consumer fixed-wireless terminals, mobile routers and gateways, and applications requiring video streaming. They are also optimally suited for industrial (M2M) applications, such as remote access to video cameras, digital signage, telehealth, security, and surveillance systems.

TOBY-L1 and MPCI-L1 series main features and interface are summarized in Table 1.

Module

TOBY-L100 Verizon 3 4, 13 • 6 •

MCPI-L100 Verizon 3 4, 13 • •

Table 1: TOBY-L1 and MPCI-L1 series main features summary

Region /

Operator

LTE UMTS GSM GNSS Interfaces Audio Features

GPIOs are not supported by the TOBY-L1 modules’ initial FW release. Check FW release schedule.

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Table 2 reports a summary of LTE characteristics of the TOBY-L1 and MPCI-L1 series module.

4G LTE Characteristics

3GPP Release 9 - Long Term Evolution (LTE) Evolved Universal Terrestrial Radio Access (E-UTRA) Frequency Division Duplex (FDD) Multi-Input Multi-Output (MIMO) 2 x 2 antenna support

Band support:

• Band 4: 1710 - 1755 MHz (Tx), 2110 - 2155 MHz (Rx)

• Band 13: 777 - 787 MHz (Tx), 746 - 756 MHz (Rx)

Channel bandwidth:

• Band 4: 5 MHz, 10 MHz, 15 MHz, 20 MHz

• Band 13: 10 MHz

Power class:

• Class 3 (+23 dBm)

Data rate:

• LTE category 3: up to 50 Mb/s Up-Link, 100 Mb/s Down-Link

Short Message Service (SMS):

• SMS via embedded IMS (IP Multimedia Subsystem)

Table 2: TOBY-L1 and MPCI-L1 series LTE characteristics summary

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1.2 Architecture

Cellular

Base-band

Processor

Memory

Power Management Unit

26 MHz

32.768 kHz

ANT1

Transceiver

ANT2

V_INT (I/O)

V_BCKP

VCC (Supply)

SIM

USB

GPIO *

Power On

External Reset

LNA Filter

Filter

Duplexer

Filter

LNA Filter

Filter

Duplexer

Filter

LNA FilterFilter

Switch

ANT1

SIM

USB

LED_WWAN#

TOBY-L1

series

Signal

Conditioning

ANT

W_DISABLE

PERST#

U.FL

3.3Vaux (Supply)

Boost

Converter

VCC

TOBY-L1 and MPCI-L1 series - System Integration Manual

Figure 1: TOBY-L100 block diagram

* = GPIOs are not supported by initial FW release.

Figure 2: MPCI-L100 block diagram

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1.2.1 Internal blocks

As described in Figure 2, each MPCI-L100 module integrates one TOBY-L100 module, which consists of the following internal sections: RF, baseband and power management.

RF section

The RF section is composed of RF transceiver, PAs, LNAs, crystal oscillator, filters, duplexers and RF switches. Tx signal is pre-amplified by RF transceiver, then output to the primary antenna input/output port (ANT1) of the

module via power amplifier (PA), SAW band pass filters band, specific duplexer and antenna switch. Dual receiving paths are implemented according to Down-Link MIMO 2 x 2 radio technology supported by the

modules as mandatory feature for LTE category 3 User Equipment designed to operate on Verizon LTE network: incoming signals are received through the primary (ANT1) and secondary (ANT2) antenna input ports which are connected to the RF transceiver via specific antenna switch, diplexer, duplexer, LNA, SAW band pass filters.

• RF transceiver performs modulation, up-conversion of the baseband I/Q signals for Tx, down-conversion and

demodulation of the dual RF signals for Rx. The RF transceiver contains:

Automatically gain controlled direct conversion Zero-IF receiver, Highly linear RF demodulator / modulator capable QPSK/16QAM/64QAM, Fractional-N Sigma-Delta RF synthesizer, VCO.

• Power Amplifiers (PA) amplify the Tx signal modulated by the RF transceiver

• RF switches connect primary (ANT1) and secondary (ANT2) antenna ports to the suitable Tx / Rx path

• Low Noise Amplifiers (LNA) enhance the received sensitivity

• SAW duplexers separate the Tx and Rx signal paths and provide RF filtering

• SAW band pass filters enhance the rejection of out-of-band signals

• 26 MHz crystal oscillator generates the clock reference in active-mode or connected-mode.

Baseband and Power Management section

The Baseband and Power Management section is composed of the following main elements:

• A mixed signal ASIC, which integrates

Microprocessor for control functions, DSP core for LTE Layer 1 and digital processing of Rx and Tx signal paths,

Memory interface controller,

Dedicated peripheral blocks for control of the USB, SIM and GPIO digital interfaces, Analog front end interfaces to RF transceiver ASIC.

• Memory system, which includes NAND flash and LPDDR.

• Voltage regulators to derive all the subsystem supply voltages from the module supply input VCC

• Voltage sources for external use: V_BCKP and V_INT

• Hardware power on

• Hardware reset

• Low power idle-mode support

• 32.768 kHz crystal oscillator to provide the clock reference in the low power idle-mode, which can be set by

enable power saving configuration using the AT+UPSV command.

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46, 69, 73, 74, 76, 78, 79, 80, 82, 83, 85, 86,

1.3 Pin-out

1.3.1 TOBY-L1 series pin assignment

Table 3 lists the pin-out of the TOBY-L100 module, with pins grouped by function.

Function Pin Name Pin No I/O Description Remarks

Power VCC 70,71,72 I Module supply input VCC pins are internally connected each other.

VCC supply circuit affects the RF performance and

compliance of the device integrating the module with applicable required certification schemes. See section 1.5.1 for functional description and requirements for the VCC module supply. See section 2.2.1 for external circuit design-in.

GND 2, 30, 32, 44,

88-90, 92-152

V_BCKP 3 O RTC supply output V_BCKP = 2.5 V (typical) generated by internal regulator

V_INT 5 O Generic Digital

System PWR_ON 20 I Power-on input High impedance input: input voltage level has to be

RESET_N 23 I External reset input

RF ANT1 81 I/O Primary antenna Main Tx / Rx antenna interface.

ANT2 87 I Secondary antenna Rx only for the DL MIMO 2x2 configuration.

N/A Ground GND pins are internally connected each other.

External ground connection affects the RF and thermal performance of the device. See section 1.5.1 for functional description. See section 2.2.1 for external circuit design-in.

when valid VCC supply is present. See section 1.5.2 for functional description. See section 2.2.2 for external circuit design-in.

Interfaces supply output

V_INT = 1.8 V (typical) generated by internal regulator when the module is switched on. See section 1.5.3 for functional description. See section 2.2.3 for external circuit design-in.

properly fixed, e.g. adding an external pull-up resistor to the V_BCKP output pin See section 1.6.1 for functional description. See section 2.3.1 for external circuit design-in.

Internal 10 kΩ pull-up to V_BCKP. See section 1.6.3 for functional description. See section 2.3.2 for external circuit design-in.

50 Ω nominal characteristic impedance. Antenna circuit affects the RF performance and compliance of the device integrating the module with applicable required certification schemes. See section 1.7 for functional description and requirements for the antenna RF interface. See section 2.4 for external circuit design-in.

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19, 26,

43,

68, 75, 77,

Function Pin Name Pin No I/O Description Remarks

SIM VSIM 59 O SIM supply output VSIM = 1.8 V / 3 V automatically generated according to

the connected SIM type. See section 1.8 for functional description. See section 2.5 for external circuit design-in.

SIM_IO 57 I/O SIM data Data input/output for 1.8 V / 3 V SIM

Internal 4.7 kΩ pull-up to VSIM. See section 1.8 for functional description. See section 2.5 for external circuit design-in.

SIM_CLK 56 O SIM clock 5 MHz clock output for 1.8 V / 3 V SIM

See section 1.8 for functional description. See section 2.5 for external circuit design-in.

SIM_RST 58 O SIM reset Reset output for 1.8 V / 3 V SIM

See section 1.8 for functional description. See section 2.5 for external circuit design-in.

USB USB_D- 27 I/O USB Data Line D- USB interface for AT commands, Data communication,

FOAT, FW update by u-blox tool and diagnostic. 90 Ω nominal differential impedance (Z 30 Ω nominal common mode impedance (Z

)

Pull-up or pull-down resistors and external series resistors as required by the USB 2.0 specifications [4] are part of the USB pad driver and need not be provided externally. See section 1.9.1 for functional description. See section 2.6.1 for external circuit design-in.

USB_D+ 28 I/O USB Data Line D+ USB interface for AT commands, Data communication,

FOAT, FW update by u-blox tool and diagnostic. 90 Ω nominal differential impedance (Z 30 Ω nominal common mode impedance (Z

)

GPIO GPIO1 21 I/O GPIO 1.8 V GPIO by default configured as pad disabled.

See section 1.10 for functional description. See section 2.7 for external circuit design-in.

GPIO2 22 I/O GPIO 1.8 V GPIO by default configured as pad disabled.

See section 1.10 for functional description. See section 2.7 for external circuit design-in.

GPIO3 24 I/O GPIO 1.8 V GPIO by default configured as pad disabled.

See section 1.10 for functional description. See section 2.7 for external circuit design-in.

GPIO4 25 I/O GPIO 1.8 V GPIO by default configured as pad disabled.

See section 1.10 for functional description. See section 2.7 for external circuit design-in.

GPIO5 60 I/O GPIO 1.8 V GPIO by default configured as pad disabled.

See section 1.10 for functional description. See section 2.7 for external circuit design-in.

GPIO6 61 I/O GPIO 1.8 V GPIO by default configured as pad disabled.

See section 1.10 for functional description. See section 2.7 for external circuit design-in.

Reserved RSVD 1, 4, 6-

29, 31, 33-

N/A RESERVED pin Leave unconnected.

See section 2.9

45, 47-55, 6284, 91

Table 3: TOBY-L100 module pin definition, grouped by function

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1.3.2 MPCI-L1 series pin assignment

Table 4 lists the pin-out of the MPCI-L100 module, with pins grouped by function.

Function Pin Name Pin No I/O Description Remarks

Power 3.3Vaux 2, 24, 39,

GND 4, 9, 15, 18,

Auxiliary Signals

Antennas ANT1 U.FL I/O Primary antenna Main Tx / Rx antenna interface.

ANT2 U.FL I Secondary antenna Rx only for DL MIMO 2x2 configuration.

SIM UIM_PWR 8 O SIM supply output UIM_PWR = 1.8 V / 3 V automatically generated

UIM_DATA 10 I/O SIM data Data input/output for 1.8 V / 3 V SIM

UIM_CLK 12 O SIM clock 5 MHz clock output for 1.8 V / 3 V SIM

UIM_RESET 14 O SIM reset Reset output for 1.8 V / 3 V SIM

PERST# 22 I External reset input

41, 52

21, 26, 27, 29, 34, 35, 37, 40, 43, 50

I Module supply input 3.3Vaux pins are internally connected each other.

3.3Vaux supply circuit affects the RF performance and compliance of the device integrating the module with applicable required certification schemes. See section 1.5.1 for functional description and requirements for the 3.3Vaux module supply.

See section 2.2.1 for external circuit design-in.

N/A Ground GND pins are internally connected each other.

External ground connection affects the RF and thermal performance of the device. See section 1.5.1 for functional description. See section 2.2.1 for external circuit design-in.

Internal 10 kΩ pull-up to 2.5 V supply. See section 1.6.3 for functional description. See section 2.3.2 for external circuit design-in.

50 Ω nominal characteristic impedance. Antenna circuit affects the RF performance and compliance of the device integrating the module with applicable required certification schemes. See section 1.7 for functional description / requirements. See section 2.4 for external circuit design-in.

50 Ω nominal characteristic impedance. Antenna circuit affects the RF performance and

compliance of the device integrating the module with applicable required certification schemes. See section 1.7 for functional description / requirements See section 2.4 for external circuit design-in.

according to the connected SIM type. See section 1.8 for functional description. See section 2.5 for external circuit design-in.

Internal 4.7 kΩ pull-up to UIM_PWR. See section 1.8 for functional description. See section 2.5 for external circuit design-in.

See section 1.8 for functional description. See section 2.5 for external circuit design-in.

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5 6, 7, 11,

13, 16, 17, 19,

Function Pin Name Pin No I/O Description Remarks

USB USB_D- 36 I/O USB Data Line D- USB interface for AT commands, Data communication,

FOAT, FW update by u-blox tool and diagnostic. 90 Ω nominal differential impedance (Z 30 Ω nominal common mode impedance (Z

)

USB_D+ 38 I/O USB Data Line D+ USB interface for AT commands, Data communication,

FOAT, FW update by u-blox tool and diagnostic. 90 Ω nominal differential impedance (Z 30 Ω nominal common mode impedance (Z

)

Specific Signals

LED_WWAN# 42 O LED indicator output Open drain active low output.

See section 1.11 for functional description. See section 2.8 for external circuit design-in.

W_DISABLE# 20 I Cellular radio disable

input

Internal 22 kΩ pull-up to 3.3Vaux. See section 1.11 for functional description. See section 2.8 for external circuit design-in.

Not Connected

NC 1,3,

N/A Not connected Internally not connected.

See section 1.13 for the description.

23, 25, 28, 30-33, 44-46, 47-49, 51

Table 4: MPCI-L100 module pin definition, grouped by function

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1.4 Operating modes

The TOBY-L1 and MPCI-L1 series modules have several operating modes. The operating modes are defined in Table 5 and described in details in Table 6, providing general guidelines for operation.

General Status Operating Mode Definition

Power-down Not-Powered Mode VCC or 3.3Vaux supply not present or below operating range: module is switched off. Power-Off Mode VCC or 3.3Vaux supply within operating range and module is switched off. Normal Operation Idle-Mode Module processor core runs with 32 kHz reference generated by the internal oscillator. Active-Mode Module processor core runs with 26 MHz reference generated by the internal oscillator. Connected-Mode RF Tx/Rx data connection enabled and processor core runs with 26 MHz reference.

Table 5: Module operating modes definition

Operating Mode Description Transition between operating modes

Not-Powered Mode Module is switched off.

Application interfaces are not accessible.

Power-Off Mode Module is switched off: normal shutdown by an

appropriate power-off event (refer to 1.6.2). Application interfaces are not accessible. MPCI-L1 modules do not support Power-Off Mode.

Idle-Mode Application interfaces are disabled: the module does

not accept data signals from an external device connected to the module.

The module automatically enters idle-mode whenever possible if power saving is enabled by AT+UPSV (see TOBY-L1 / MPCI-L1 series AT Commands Manual [3]) reducing current consumption (see 1.5.1.3).

Power saving configuration is not enabled by default: it can be enabled by AT+UPSV (see the TOBY-L1 / MPCI-L1 series AT Commands Manual [3]).

Active-Mode The module is ready to accept data signals from an

external device unless power saving configuration is enabled by AT+UPSV (refer to the section 1.9.1.3 and the TOBY-L1 / MPC I-L1 series AT C ommands Manual [3]).

When VCC or 3.3Vaux supply is removed, the TOBY-L1 / MPCI-L1 series modules enter not-powered mode.

When in not-powered mode, the TOBY-L1 modules cannot be switched on by a low level on PWR_ON input and enter power-off mode after applying VCC supply.

When in not-powered mode, the MPCI-L1 modules enter active mode after applying 3.3Vaux supply.

When the TOBY-L1 modules are switched off by an appropriate power-off event (refer to 1.6.2), the modules enter power-off mode from active-mode.

When in power-off mode, the TOBY-L1 modules can be switched on by a low level on PWR_ON, input (refer to

1.6.1): module switches from power-off to active-mode. When VCC supply is removed, the TOBY-L1 series module

switches from power-off mode to not-powered mode.

The TOBY-L1 and MPCI-L1 modules automatically switch from active-mode to idle-mode whenever possible if power saving is enabled (see 1.5.1.3, 1.9.1.3 and TOBY-L1 / MPCI-L1 series AT Commands Manual [3], AT+UPSV).

The module wakes up from idle-mode to active-mode in these events:

• Automatic periodic monitoring of the paging channel

for the paging block reception according to network conditions (see 1.5.1.3)

• The connected USB host forces a remote wakeup of

the module as USB device (see 1.9.1.3)

When the TOBY-L1 modules are switched on by an appropriate power-on event (refer to 2.3.1), the modules enter active-mode from power-off mode.

MPCI-L1 modules enter active mode from not-powered mode, after applying 3.3Vaux supply.

If power saving configuration is enabled by AT+UPSV, the module automatically switches from active to idle-mode whenever possible and it wakes up from idle to activemode in the events listed above (refer to idle to active transition description).

When a RF Tx/Rx data connection is initiated, the module switches from active-mode to connected-mode.

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MPCI-L1 Switch ON:

• Apply 3.3Vaux

If power saving is enabled and there is no activity for a defined time interval

Any wake up event described in the module operating modes summary table above

Incoming/outgoing call or other dedicated device network

communication

No RF Tx/Rx in progress, Call terminated, Communication dropped

Remove VCC

TOBY-L100 Switch ON:

• PWR_ON

Not

powered

Power off

ActiveConnected Idle

TOBY-L100 Switch OFF:

• AT+CPWROFF

• RESET_N

MPCI-L1 Switch OFF:

• Remove 3.3Vaux

Apply

VCC

Operating Mode Description Transition between operating modes

Connected-Mode RF Tx/Rx data connection is in progress.

The module is prepared to accept data signals from an external device unless power saving configuration is enabled by AT+UPSV (see TOBY-L1 / MPC I-L1 series AT Commands Manual [3]).

Table 6: TOBY-L1 and MPCI-L1 series modules operating modes description

When a data connection is initiated, the TOBY-L1 and MPCI-L1 modules enter connected-mode from idle-mode.

If power saving configuration is enabled by the AT+UPSV command, the module automatically switches from connected to idle-mode whenever possible and the module wakes up from idle to connected mode in case of necessary RF data Transmission/Reception.

When a data connection is terminated, the module returns to the idle-mode.

Figure 3 describes the TOBY-L1 and MPCI-L1 series modules’ transitions between the different operating modes.

Figure 3: TOBY-L1 and MPCI-L1 series modules operating modes transitions

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Data Sheet [2].

The maximum average current consumption can be

1.5 Supply interfaces

1.5.1 Module supply input (VCC or 3.3aux)

TOBY-L1 series modules must be supplied via the three VCC pins, and MPCI-L1 modules are supplied via the five

3.3Vaux pins. All supply voltages used inside the modules are generated from the VCC or the 3.3aux supply input by integrated voltage regulators, including V_BCKP supply, V_INT digital interface supply and VSIM or UIM_PWR SIM interface supply.

The current drawn by the TOBY-L1 and MPCI-L1 series modules through the VCC or 3.3Vaux pins can vary by several orders of magnitude depending on operation mode and state. It can change from the high current consumption during LTE transmission at maximum RF power level in connected-mode (as described in the chapter 1.5.1.2), to the low current consumption during low power idle-mode with the power saving configuration enabled (as described in the chapter 1.5.1.3).

1.5.1.1 VCC or 3.3Vaux supply requirements

Table 7 summarizes the requirements for the VCC or 3.3Vaux modules supply. Refer to chapter 2.2.1 for all the suggestions to properly design a VCC or 3.3Vaux supply circuit compliant to the requirements listed in Table 7.

The supply circuit affects the RF compliance of the device integrating TOBY-L1 and MPCI-L1

series modules with applicable required certification schemes as well as antenna circuit design. Compliance is guaranteed if the requirements summarized in the Table 7 are fulfilled.

Item Requirement Remark

VCC or 3.3Vaux

nominal voltage

VCC or 3.3Vaux current

VCC or 3.3Vaux voltage ripple during RF transmission

Table 7: Summary of VCC and 3.3Vaux supply requirements

Within VCC or 3.3Vaux normal operating range: Refer to “Supply/Power pins” section in the TOBY-L1

series Data Sheet [1] or in the MPCI-L1 series Data Sheet [2].

Support with adequate margin the highest averaged current consumption value in connected mode conditions specified for VCC in TOBY-L1 series Data Sheet [1]

Noise in the supply has to be minimized.

or specified for 3.3Vaux in MPC I-L1 series

The module cannot be switched on if the supply voltage value is below the minimum limit of the operating range.

greater than the specified value according to the actual antenna mismatching, temperature, and supply voltage. Section 1.5.1.2 describes the connected-mode current.

High supply voltage ripple values during LTE transmission in connected-mode directly affect the RF compliance with applicable certification schemes.

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Time

[ms]

Current [mA]

300

200

100

500

400

600

700

Current consumption

depends on TX power

and actual antenna load

1 Slot

1 Resource Block

(0.5 ms)

1 LTE Radio Frame

(10 ms)

800

900

1.5.1.2 VCC and 3.3Vaux current consumption in connected-mode

During a LTE connection, the module can transmit and receive continuously due to LTE radio access technology. The current consumption is strictly dependent on the transmitted RF output power, which is always regulated by

network commands. These power control commands are logically divided into a slot of 0.5 ms (time length of one Resource Block), thus the rate of power change can reach a maximum rate of 2 kHz.

Figure 4 shows an example of the module current consumption profile versus time in LTE connected-mode. Detailed VCC or 3.3Vaux current consumption values can be found in the TOBY-L1 series Data Sheet [1] or in the MPCI-L1 series Data Sheet [2].

Figure 4: An example VCC / 3.3Vaux current consumption profile versus time during LTE connection

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~50 ms

IDLE MODE ACTIVE MODE IDLE MODE

Active Mode

Enabled

Idle Mode

Enabled

~0.27-2.51 s

IDLE MODE

~50 ms

ACTIVE MODE

Time [s]

Current [mA]

Time [ms]

Current [mA]

Enabled

200

100

300

200

100

300

1.5.1.3 VCC and 3.3Vaux current consumption in cyclic idle/active mode (power saving enabled)

The power saving configuration is by default disabled, but it can be enabled using the AT+UPSV command (refer to TOBY-L1 series AT Commands Manual [3]). When power saving is enabled, the module automatically enters the low power idle-mode whenever possible, reducing current consumption.

During low power idle-mode, the module processor runs with 32 kHz reference clock frequency. When the power saving configuration is enabled and the module is registered or attached to a network with

connected-mode not enabled, the module automatically enters the low power idle-mode whenever possible, but it must periodically monitor the paging channel of the current base station (paging block reception), in accordance to LTE system requirements. When the module monitors the paging channel, it wakes up to the active-mode, to enable the reception of paging block. In between, the module switches to low power idle-mode. This is known as LTE discontinuous reception (DRX).

The module processor core is activated during the paging block reception, and automatically switches its reference clock frequency from 32 kHz to the 26 MHz used in active-mode.

The time period between two paging block receptions is defined by the network. This is the paging period parameter, fixed by the base station through broadcast channel sent to all users on the same serving cell.

The time interval between two paging block receptions can be from 320 ms (DRX = 5, length of 2 = 32 x 10 ms = 320 ms) up to 2560 ms (DRX = 8, length of 2

radio frames = 256 x 10 ms = 2560 ms).

radio frames

Figure 5 illustrates a typical example of the module current consumption profile when power saving is enabled. The module is registered with network, automatically enters the low power idle-mode and periodically wakes up to active-mode to monitor the paging channel for the paging block reception. Detailed current consumption values can be found in TOBY-L1 series Data Sheet [1] or in MPCI-L1 series Data Sheet

[2].

Figure 5: An example VCC / 3.3Vaux current consumption profile versus time with power saving enabled and module registered with the network: the module is in idle-mode and periodically wakes up to active-mode to monitor the paging channel

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ACTIVE MODE

0.32-2.56 s

Paging period

Time [s]

Current [mA]

Time [ms]

Current [mA]

Enabled

200

100

300

200

100

300

1.5.1.4 VCC and 3.3Vaux current consumption in fixed active-mode (power saving disabled)

When power saving is disabled, the module does not automatically enter the low power idle-mode whenever possible: the module remains in active-mode. Power saving configuration is by default disabled. It can also be disabled using the AT+UPSV command (refer to TOBY-L1 series AT Commands Manual [3] for detail usage).

The module processor core is activated during idle-mode, and the 26 MHz reference clock frequency is used. It would draw more current during the paging period than that in the power saving mode.

Figure 6 illustrates a typical example of the module current consumption profile when power saving is disabled. In such case, the module is registered with the network and while active-mode is maintained, the receiver is periodically activated to monitor the paging channel for paging block reception.

Figure 6: An example VCC / 3.3Vaux current consumption profile versus time with power saving disabled and module registered with the network: active-mode is always held and the receiver is periodically activated to monitor the paging channel

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Baseband

Processor

VCC

V_BCKP

Linear

LDO

Power

Management

TOBY-L1 series

32 kHz

RTC

Baseband

Processor

VCC

V_INT

Switching

Step-Down

Power

Management

TOBY-L1 series

Digital I/O

1.5.2 RTC supply output (V_BCKP)

V_BCKP output pin is not accessible on MPCI-L1 series modules.

The V_BCKP output pin of the TOBY-L1 series module is connected to an internal 2.5 V supply with low current capability (refer to TOBY-L1 series Data Sheet [1]). This supply is internally generated by a linear LDO regulator integrated in the Power Management Unit, as shown in Figure 7. The output of this regulator is always enabled when the main module voltage supply applied to the VCC pins is within the valid operating range.

Figure 7: TOBY-L1 modules’ RTC supply output (V_BCKP) simplified block diagram

1.5.3 Generic digital interfaces supply output (V_INT)

V_INT output pin is not accessible on MPCI-L1 series modules.

The V_INT output pin of the TOBY-L1 series module is connected to an internal 1.8 V supply with current capability (refer to TOBY-L1 series Data Sheet [1]). This supply is internally generated by a switching step-down regulator integrated in the Power Management Unit and it is internally used to source the digital I/O interfaces of the TOBY-L1 series module, as described in Figure 8. The output of this regulator is enabled when the module is switched on and it is disabled when the module is switched off.

Figure 8: TOBY-L1 modules’ generic interfaces supply output (V_INT) simplified block diagram

The switching regulator operates in Pulse Width Modulation (PWM) mode for greater efficiency at high output loads and it automatically switches to Pulse Frequency Modulation (PFM) power save mode for greater efficiency at low output loads.

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Baseband Processor

PWR_ON

TOBY

-L1 series

Power-on

Power

Management

Power-on

1.6 System function interfaces

1.6.1 Module power-on

The PWR_ON input pin is not accessible on MPCI-L1 modules.

TOBY-L1 series modules can be switched on in one of these ways:

• When the module is in not-powered mode (i.e. switched off with VCC supply not applied), it can be

switched on by applying the VCC supply with the PWR_ON input pin forced to the low level before the start of the VCC supply rising edge and then held low for at least 5 seconds after that the VCC supply has reached the valid operating range.

• When the module is in power-off mode (i.e. switched off with valid VCC supply applied), it can be switched

on forcing a low level on the PWR_ON pin, normally high with external pull-up, for at least 5 seconds.

As described in Figure 9, there is no internal pull-up resistor on the PWR_ON pin of TOBY-L1 modules. The pin has high input impedance and is weakly pulled to the high level by the internal circuit. Therefore the external circuit must be able to hold the high logic level stable, e.g. providing an external pull-up resistor (for further design-in guidelines refer to chapter 2.3.1). The PWR_ON input voltage thresholds are different from the other generic digital interfaces. Detailed electrical characteristics are described in TOBY-L1 series Data Sheet [1].

Figure 9: TOBY-L1 series PWR_ON input description

MPCI-L1 series modules, when in not-powered mode (i.e. switched off with the 3.3Vaux supply not applied), can be switched on in one of these ways:

• Rising edge on the 3.3Vaux supply input to a valid voltage for module supply, so that the module switches

on applying a proper 3.3Vaux supply within the normal operating range

• Alternately, PERST# pin can be held to the low level during the 3.3Vaux rising edge, so that the module

switches on releasing the PERST# pin when 3.3Vaux module supply voltage stabilizes at its proper nominal value within the normal operating range.

For more pin information and electrical characteristics, refer to the TOBY-L1 series Data Sheet [1] and the

MPCI-L1 Data Sheet [2].

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VCC

V_BCKP

RESET_N

PWR_ON

V_INT

Internal Reset

System State

Digital Pins State Operational

OFF

Tristate

Internal Reset

Internal Reset → Operational

Sta rt-up

event

Sta rt of interface

configuration

PWR_ON

can be se t high

0 ms

~6 ms

5 s

~5 ms

~20 s

All interfaces

are configured

Figure 10 shows TOBY-L1 module power-on sequence from power-off mode, describing the following phases:

• The PWR_ON input is set low, representing the start-up event.

• All the module digital pins are held in tri-state until all the internal LDO voltage regulators are turned on.

• The internal reset signal is held low: the baseband core and all the digital pins are held in reset state.

• When the internal reset signal is released, the configuration of the module interfaces starts: any digital pin is

set in a proper sequence from the reset state to the default operational configured state. The duration of this pins’ configuration phase differs within generic digital interfaces and the USB interface due to specific host / device enumeration timings.

• The PWR_ON input can be released to the high logical level after at least 5 seconds.

• The module is fully ready to operate after all interfaces are configured.

Figure 10: TOBY-L1 power-on sequence description

The Internal Reset signal is not available on a module pin, but the application can monitor the V_INT pin

to sense start of the TOBY-L1 series module power-on sequence.

Before switching on the generic digital interface supply source (V_INT) of the module, no voltage driven

by an external application should be applied to any generic digital interface of the module.

Before a TOBY-L1 series module is fully ready to operate, the host application processor should not send

any AT command over the AT communication interface (USB) of the module.

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3.3Vaux

PERST#

Internal Reset

System State

Digital Pins State Operational

OFF

Tristate

Internal Reset

Internal Reset → Operational

Sta rt-up

event

Sta rt of interface

configuration

0 ms

~6 ms

~5 ms

~20 s

All interfa ces

are configured

Figure 11 shows MPCI-L1 modules power-on sequence from not-powered mode, describing these phases:

• The external supply is applied to 3.3Vaux module supply inputs, representing the start-up event.

• PERST# pins rise suddenly to high logic level due to internal pull-ups

• All the module digital pins are held in tri-state until all the internal LDO voltage regulators are turned on.

• The internal reset signal is held low: the baseband core and all the digital pins are held in reset state.

• When the internal reset signal is released, the configuration of the module interfaces starts: any digital pin is

• The module is fully ready to operate after all interfaces are configured.

Figure 11: MPCI-L1 series power-on sequence description

The Internal Reset signal is not available on a module pin, but the host application can monitor the USB

interface to sense the start of the MPCI-L1 series module power-on sequence: the module, as USB device, informs the host of the attach event via a reply on its status change pipe for proper bus enumeration process according to Universal Serial Bus Revision 2.0 specification [4].

Before a MPCI-L1 series module is fully ready to operate, the host application processor should not send

any AT command over the AT communication interface (USB) of the module.

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1.6.2 Module power-off

TOBY-L1 modules can be properly switched off by:

• AT+CPWROFF command (see TOBY-L1 / MPCI-L1 series AT Commands Manual [3]). The current parameter

settings are saved in the module’s non-volatile memory and a proper network detach is performed.

The MPCI-L1 series modules do not switch off by the AT+CPWROFF command as the TOBY-L1 modules,

but the AT+CPWROFF command causes a reset (reboot) of the module due to the MPCI-L1 module’s internal configuration: the AT+CPWROFF command performs the storage of the actual parameter settings in the non-volatile memory of MPCI-L1 modules and it performs a network detach, with a subsequent reset (reboot) of the module.

An abrupt under-voltage shutdown occurs on TOBY-L1 and MPCI-L1 series modules when the VCC or 3.3Vaux module supply is removed. If this occurs, it is not possible to perform the storage of the current parameter settings in the module’s non-volatile memory or to perform the proper network detach.

It is highly recommended to avoid an abrupt removal of the VCC supply during TOBY-L1 modules normal

operations: the power off procedure must be started by the AT+CPWROFF command, waiting the command response for a proper time period, and then a proper VCC supply has to be held at least until the end of the internal power off sequence, which occurs when the generic digital interfaces supply output (V_INT) is switched off by the module.

It is highly recommended to avoid an abrupt removal of the 3.3Vaux supply during MPCI-L1 modules

normal operations: the power off procedure must be started by setting the MPCI-L1 module to the minimum functionality by the AT+CFUN=0 command, waiting the command response for a proper time period, and then the 3.3Vaux supply can be removed.

An abrupt hardware shutdown occurs on TOBY-L1 series modules when a low level is applied on the RESET_N pin for at least 1 second. In this case, the current parameter settings are not saved in the module’s non-volatile memory and a proper network detach is not performed.

It is highly recommended to avoid an abrupt hardware shutdown of the module by forcing a low level on

the RESET_N input pin during module normal operation: the RESET_N line should be set low only if reset or shutdown via AT commands fails.

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VCC

V_BCKP

PWR_ON

RESET_N

V_INT

Internal Reset

System State

BB Pads Sta te Operational

OFF

Tristate / Floating

Operational → Tristate

AT+CPWROFF

sent to the module

replied by the module

VCC

can be removed

3.3Vaux

PERST#

Internal Reset

System State

BB Pads Sta te

OFF

Tristate / Floating

Operational

AT+CFUN=0

sent to the module

replied by the module

3.3Vaux

can be removed

Figure 12 describes the TOBY-L1 power-off sequence by means of AT+CPWROFF with the following phases:

• When the +CPWROFF AT command is sent, the module starts the switch-off routine.

• The module replies OK on the AT interface: the switch-off routine is in progress.

• At the end of the switch-off routine, all the digital pins are tri-stated and all the internal voltage regulators

are turned off, including the generic digital interfaces supply (V_INT), except the RTC supply (V_BCKP).

• Then, the module remains in power-off mode as long as a switch on event does not occur (applying a

proper low level to PWR_ON pin), and enters not-powered mode if the supply is removed from VCC pins.

Figure 12: TOBY-L1 series power-off sequence description

The Internal Reset signal is not available on a module pin, but the application can monitor the V_INT pin

to sense the end of the power-off sequence.

Figure 13 describes the MPCI-L1 power-off procedure with the following phases:

• When the AT+CFUN=0 command is sent, the module starts the minimum functionality setting routine.

• The module replies OK on the AT interface: the module is set in the minimum functionality mode.

• Then, the module remains in the minimum functionality mode and enters not-powered mode if the supply is

removed from the 3.3Vaux pins.

Figure 13: MPCI-L1 series power-off procedure description

The duration of each phase in the TOBY-L1 and MPCI-L1 series modules’ switch-off routines can largely

vary depending on the application / network settings and the concurrent module activities.

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Baseband Processor

RESET_N

TOBY-L1 series

Reset

10k

Baseband Processor

PERST#

MPCI-L1 series

Reset

10k

2.5V

1.6.3 Module reset

TOBY-L1 and MPCI-L1 series modules can be properly reset (rebooted) by:

• AT+CFUN command (see the TOBY-L1/ MPCI-L1 series AT Commands Manual [3]).

MPCI-L1 series modules can be additionally properly reset (rebooted) by:

• AT+CPWROFF command (see TOBY-L1/ MPCI-L1 series AT Commands Manual [3]): the behavior differs

than TOBY-L1 series, as MPCI-L1 modules will reboot rather than remain switched off due to MPCI-L1 modules’ internal configuration.

Implementing the procedures listed above, a “software” reset of the module is executed. During the process, the current parameter settings are saved in the module’s non-volatile memory and a proper network detach is performed.

An abrupt hardware shutdown occurs on TOBY-L1 modules when a low level is applied on the RESET_N input pin for at least 1 second. Then, a low level has to be applied on the PWR_ON input pin for at least 5 seconds to force a reboot of the module. Implementing this procedure, the current parameter settings are not saved in the module’s non-volatile memory and a proper network detach is not performed.

An abrupt hardware reset (reboot) occurs on MPCI-L1 modules when a low level is applied on the PERST# input pin for at least 1 second. Implementing this procedure, the current parameter settings are not saved in the module’s non-volatile memory and a proper network detach is not performed.

It is highly recommended to avoid an abrupt hardware shutdown / reset of the module by forcing a low

level on the RESET_N or PERST# input during modules normal operation: the RESET_N or PERST# line should be set low only if reset or shutdown via AT commands fails.

The electrical characteristics of RESET_N and PREST# input pins are different from the other digital interfaces. As described in Figure 14, both RESET_N and PERST# lines are pulled high to the internal 2.5 V rail (V_BCKP). Therefore an external pull-up is not required. For the detailed electrical characteristics refer to TOBY-L1 series Data Sheet [1] or MPCI-L1 series Data Sheet [2].

Figure 14: TOBY-L1 and MPCI-L1 series reset input (RESET_N / PERST#) description

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VCC

V_BCKP

RESET_N

PWR_ON

V_INT

Internal Reset

System State

BB Pads Sta te Operational

Operational → Tristate

OFF

Internal Reset

Internal Reset → Operational

Tristate

Operational

Sta rt

-up

event

Sta rt of interfa ce

configuration

PWR_ON

can be released

All inte rfac es

are configured

RESET_N

set low

RESET_N

can be released

5 s

1 s

3.3Vaux

PERST#

Internal Reset

System State

BB Pads Sta te Operational

Operational → Tristate

OFF

Internal Reset

Internal Reset → Operational

Tristate

Operational

Sta rt of interfa ce

configuration

All inte rfac es

are configured

PERST#

set low

PERST#

can be released

1 s

Figure 15 describes the hardware reset (reboot) sequence of TOBY-L1 modules, with the following main phases:

• RESET_N pin set low for at least 1 second, causing module hardware shutdown.

• PWR_ON pin set low for at least 5 seconds, causing module switch-on (reboot) as described in Figure 10.

Figure 15: TOBY-L1 hardware reset (reboot) sequence description

Figure 16 describes the hardware reset (reboot) sequence of MPCI-L1 modules, with the following main phases:

• PERST# pin set low for at least 1 second, causing module hardware reset (reboot).

Figure 16: MPCI-L1 hardware reset (reboot) sequence description

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Base Station

Tx-1

Antenna

Tx-2

Antenna

TOBY-L1 series

MPCI

-L1 series

ANT1

Rx-1

Antenna

ANT2

Rx-2

Antenna

Data Stream 1

Data Stream 2

1.7 Antenna interface

1.7.1 Antenna RF interfaces (ANT1 / ANT2)

TOBY-L1 and MPCI-L1 series modules provide two RF interfaces for connecting the external antennas:

• The ANT1 port represents the primary RF input/output for transmission and reception of the LTE RF signals.

The ANT1 pin of TOBY-L1 has a nominal characteristic impedance of 50 Ω and must be connected to the external primary Tx / Rx antenna through a 50 Ω transmission line to allow proper RF transmission and reception.

The ANT1 Hirose U.FL-R-SMT coaxial connector receptacle of MPCI-L1 series modules have a nominal characteristic impedance of 50 Ω and must be connected to the primary Tx / Rx antenna through a mated RF plug with a 50 Ω coaxial cable assembly to allow proper RF transmission and reception.

• The ANT2 port represents the secondary RF input for the reception of the LTE RF signals for the Down-Link

MIMO 2 x 2 radio technology supported by the TOBY-L1 and MPCI-L1 series modules as mandatory feature for LTE category 3 User Equipment (up to 100 Mb/s Down-Link data rate) designed to operate on the Verizon Wireless LTE 3GPP Band 4 and Band 13 network.

The ANT2 pin has a nominal characteristic impedance of 50 Ω and must be connected to the external secondary Rx antenna through a 50 Ω transmission line to allow proper RF reception.

The ANT2 Hirose U.FL-R-SMT coaxial connector receptacle of MPCI-L1 series modules have a nominal characteristic impedance of 50 Ω and must be connected to the secondary Rx antenna through a mated RF plug with a 50 Ω coaxial cable assembly to allow proper RF reception.

The Multiple Input Multiple Output (MIMO) radio technology is an essential component of LTE radio systems based on the use of multiple antennas at both the transmitter and receiver sides to improve communication performance and achieve highest possible bit rate. A MIMO m x n system consists of m transmit and n receive antennas, where the data to be transmitted is divided into m independent data streams. Note that the terms Input and Output refer to the radio channel carrying the signal, not to the devices having antennas, so that in the Down-Link MIMO 2 x 2 system supported by TOBY-L1 and MPCI-L1 series modules:

• The data stream is divided into 2 independent streams by the Tx-antennas of the base station

• The modules, at the receiver side, receive both data streams by 2 Rx-antennas (ANT1 / ANT2)

Figure 17: Description of the Down-Link MIMO 2 x 2 radio technology supported by TOBY-L1 and MPCI-L1 series modules

TOBY-L1 and MPCI-L1 series modules support the LTE MIMO 2 x 2 radio technology in the Down-Link path only (from the base station to the module): the ANT1 pin is the only one RF interface that is used by the module to transmit the LTE RF signal in the Up-Link path (from the module to the base station).

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1.7.1.1 Antenna RF interfaces requirements

Table 8, Table 9 and Table 10 summarize the requirements for the antennas RF interfaces (ANT1 / ANT2). Refer to section 2.4.1 for suggestions to properly design antennas circuits compliant to these requirements.

The antennas circuits affect the RF compliance of the device integrating TOBY-L1 and MPCI-L1

series modules with applicable required certification schemes. Compliance is guaranteed if the antenna RF interfaces (ANT1 / ANT2) requirements summarized in Table 8, Table 9 and Table 10 are fulfilled.

Item Requirements Remarks

Impedance

Frequency Range

Return Loss S11 < -10 dB (VSWR < 2:1) recommended

Efficiency > -1.5 dB ( > 70% ) recommended

Maximum Gain < 6.57 dBi for LTE Band 4

Input Power > 24 dBm ( > 250 mW ) The antenna connected to the ANT1 pin / connector

Table 8: Summary of primary Tx/Rx antenna RF interface (ANT1) requirements

50 Ω nominal characteristic impedance

• 746…756 MHz (Rx), 777…787 MHz (Tx)

• 1710...1755 MHz (Tx), 2110...2155 MHz (Rx)

< -6 dB (VSWR < 3:1) acceptable

> -3.0 dB ( > 50% ) acceptable

< 10.70 dBi for LTE Band 13

The impedance of the antenna RF connection must match the 50 Ω impedance of the ANT1 pin / connector.

The required frequency range of the antenna connected to ANT1 pin / connector depends on the operating bands of the TOBY-L1 / MPCI-L1 module and the Mobile Network.

The Return loss or the S amount of reflected power, measuring how well the primary antenna RF connection matches the 50 Ω characteristic impedance of the ANT1 pin / connector. The impedance of the antenna termination must match as much as possible the 50 Ω nominal impedance of the ANT1 pin / connector over the operating frequency range, reducing as much as possible the amount of reflected power.

The radiation efficiency is the ratio of the radiated power to the power delivered to antenna input: the efficiency is a measure of how well an antenna receives or transmits. The radiation efficiency of the antenna connected to the ANT1 pin / connector needs to be enough high over the operating frequency range to comply with the Over-TheAir (OTA) radiated performance requirements, as Total Radiated Power (TRP) and Total Isotropic Sensitivity (TIS), specified by applicable related certification schemes.

The power gain of an antenna is the radiation efficiency multiplied by the directivity: the gain describes how much power is transmitted in the direction of peak radiation to that of an isotropic source.

The maximum gain of the antenna connected to ANT1 pin / connector must not exceed the herein specified value to comply with regulatory agencies radiation exposure limits.

For additional info refer to the chapter 4.2.1.

must support with adequate margin the maximum power transmitted by the modules.

, as the VSWR, refers to the

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Item Requirements Remarks

Impedance

Frequency Range

50 Ω nominal characteristic impedance

• 746…756 MHz (Rx)

• 2110...2155 MHz (Rx)

Return Loss S11 < -10 dB (VSWR < 2:1) recommended

< -6 dB (VSWR < 3:1) acceptable

Efficiency > -1.5 dB ( > 70% ) recommended

> -3.0 dB ( > 50% ) acceptable

Table 9: Summary of secondary Rx antenna RF interface (ANT2) requirements

The impedance of the antenna RF connection must match the 50 Ω impedance of the ANT2 pin / connector.

The required frequency range of the antennas connected to ANT2 pin / connector depends on the operating bands of the TOBY-L1 / MPCI-L1 module and the Mobile Network.

The Return loss or the S amount of reflected power, measuring how well the secondary antenna RF connection matches the 50 Ω characteristic impedance of the ANT2 pin / connector. The impedance of the antenna termination must match as much as possible the 50 Ω nominal impedance of the ANT2 pin / connector over the operating frequency range, reducing as much as possible the amount of reflected power.

The radiation efficiency is the ratio of the radiated power to the power delivered to antenna input: the efficiency is a measure of how well an antenna receives or transmits. The radiation efficiency of the antenna connected to the ANT2 pin / connector needs to be enough high over the operating frequency range to comply with the Over-TheAir (OTA) radiated performance requirements, as the TIS, specified by applicable related certification schemes.

, as the VSWR, refers to the

Item Requirements Remarks

Efficiency imbalance < 0.5 dB recommended

< 1.0 dB acceptable

The radiation efficiency imbalance is the ratio of the primary (ANT1) antenna efficiency to the secondary (ANT2) antenna efficiency: the efficiency imbalance is a measure of how much better an antenna receives or transmits compared to the other antenna. The radiation efficiency of the secondary antenna needs to be roughly the same of the radiation efficiency of the primary antenna for good RF performance.

Envelope Correlation Coefficient

< 0.4 recommended < 0.5 acceptable

The Envelope Correlation Coefficient (ECC) between the primary (ANT1) and the secondary (ANT2) antenna is an indicator of 3D radiation pattern similarity between the two antennas: low ECC results from antenna patterns with radiation lobes in different directions. The ECC between primary and secondary antenna needs to be enough low to comply with radiated performance requirements specified by related certification schemes.

Isolation > 15 dB recommended

> 10 dB acceptable

The antenna to antenna isolation is the loss between the primary (ANT1) and the secondary (ANT2) antenna: high isolation results from low coupled antennas. The isolation between primary and secondary antenna needs to be high for good RF performance.

Table 10: Summary of primary (ANT1) and secondary (ANT2) antennas relationship requirements

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Configuration 0

Interface 0 Communications – Vendor Specific

Interface 1 CDC-Data

EndPoint Transfer: Interrupt

EndPoint Transfer: Bulk

Interface 2 Communications – AT commands

EndPoint Transfer: Interrupt

Interface 3 CDC-Data

EndPoint Transfer: Bulk

Configuration 1

Interface 0 Communications – CDC Ethernet

Interface 1 CDC-Data

EndPoint Transfer: Interrupt

EndPoint Transfer: Bulk

Interface 2 Communications – AT commands

EndPoint Transfer: Interrupt

Interface 3 CDC-Data

EndPoint Transfer: Bulk

1.8 SIM interface

1.8.1 SIM card interface

TOBY-L1 and MPCI-L1 series modules provide high-speed SIM/ME interface including automatic detection and configuration of the voltage required by the connected SIM card or chip.

Both 1.8 V and 3 V SIM types are supported. Activation and deactivation with automatic voltage switch from

1.8 V to 3 V are implemented, according to ISO-IEC 7816-3 specifications. The VSIM or UIM_PWR supply

output pin provides internal short circuit protection to limit start-up current and protect the device in short circuit situations.

The SIM driver supports the PPS (Protocol and Parameter Selection) procedure for baud-rate selection, according to the values determined by the SIM Card.

1.9 Data communication interfaces

The TOBY-L1 and MPCI-L1 series modules provide the following serial communication interfaces for concurrent communication via the AT command interface and Traffic Data:

• One high-speed USB 2.0 compliant interface

1.9.1 Universal Serial Bus (USB)

TOBY-L1 and MPCI-L1 series modules include a high-speed USB 2.0 compliant interface with maximum throughput of 480 Mb/s between the module and a host processor: USB_D+ / USB_D- pins carry the USB serial data and signaling. The module itself acts as a USB device and can be connected to any USB host such as a Personal Computer or an embedded application microprocessor.

Figure 18 describes the USB end-points that TOBY-L1 and MPCI-L1 series modules support. 2 USB configurations are available for application. However, only one configuration can be enabled at a time.

A host should determine which configuration shall be used based on its operating system (OS). Typically, the configuration 0 is used for Windows host and configuration 1 is used for Linux host.

Figure 18: TOBY-L1 and MPCI-L1 series USB End-Points description

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1.9.1.1 USB interface in Windows

The TOBY-L1 and MPCI-L1 USB drivers (INF files) support Windows Vista / 7 / 8 systems. The USB driver should be installed properly by following the step-by-step instruction in EVK-L10 Getting Started [11].

After the USB driver is installed, 2 USB CDC (Communications Device Class) will be enumerated in system devices assuring multiple functionalities to the USB physical interface:

• USB1: Remote NDIS based Internet Sharing Device ( Ethernet connection )

• USB2: Gadget Serial ( AT Commands )

The module firmware can be upgraded over the USB interface using the u-blox tool (for more details refer to Firmware Update Application Note [10]).

1.9.1.2 USB interface in Linux

TOBY-L1 and MPCI-L1 series modules do not require the installation of a specific driver for Linux-based operating systems with a Linux kernel version 2.6.35 or later. The standard Linux USB drivers will support the USB interface.

For example, in Fedora, the following device will be listed when the module is connected:

• eth1 ( Ethernet connection )

• /dev/ttyACM0 ( AT commands )

The full USB capabilities as configured for TOBY-L1 and MPCI-L1 series modules can be reported by running ‘lsusb –v’ or equivalent command, available in the host operating system when the module is connected.

1.9.1.3 USB and power saving

If power saving is enabled by AT command (AT+UPSV=1), the TOBY-L1 or MPCI-L1 series module automatically enters the USB suspended state when the device has observed no bus traffic for a specified period (refer to the Universal Serial Bus Revision 2.0 specification [4]). In suspended state, the module maintains any internal status as USB device, including its address and configuration. In addition, the module enters the suspended state when the hub port it is attached to is disabled. This is referred to as USB selective suspend. The module exits suspend mode when there is bus activity.

TOBY-L1 and MPCI-L1 series modules are capable of USB remote wake-up signaling: i.e. it may request the host to exit suspend mode or selective suspend by using electrical signaling to indicate remote wake-up. This notifies the host that it should resume from its suspended mode, if necessary, and service the external event. Remote wake-up is accomplished using electrical signaling described in Universal Serial Bus Revision 2.0 specification [4].

For the module current consumption description with power saving enabled and USB suspended, or with power saving disabled and USB not suspended, refer to chapters 1.5.1.3, 1.5.1.4.

1.10 General Purpose Input/Output (GPIO)

GPIOs for TOBY-L1 series modules are not supported by initial firmware release, except for the Network

Status Indication function over the GPIO1 pin only (for detail, refer to 1.14.1). Check FW release schedule.

GPIOs are not accessible on MPCI-L1 series modules.

TOBY-L1 series modules provide 6 pins that can be configured as general purpose input/output (GPIO). For more details refer to the TOBY-L1 / MPCI-L1 series AT Commands Manual [3], +UGPIOC AT command.

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1.11 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)

Mini PCI Express specific signals (W_DISABLE#, LED_WWAN#) are not available on TOBY-L1 series

modules.

MPCI-L1 series modules include the W_DISABLE# active-low input signal to disable the radio operations as specified by the PCI Express Mini Card Electromechanical Specification [15].

MPCI-L1 series modules include the LED_WWAN# active-low open drain output to provide the Wireless Wide Area Network status indication as specified by the PCI Express Mini Card Electromechanical Specification [15]. For details of the indicator protocol used please see Section 1.14.1.

For more electrical characteristics details refer to the MPCI-L1 series Data Sheet [2].

1.12 Reserved pins (RSVD)

Pins reserved for future use, marked as RSVD, are not accessible on MPCI-L1 series modules.

TOBY-L1 modules have pins reserved for future use (RSVD), to be left unconnected on the application board.

1.13 Not connected pins (NC)

Pins internally not connected, marked as NC, are not available on TOBY-L1 series modules.

MPCI-L1 series modules have pins internally not connected, marked as NC: they can be left unconnected or they can be connected on the application board according to any application requirement, given that none function is provided by the modules over these pins.

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1.14 System features

1.14.1 Network indication

Network status indication over GPIO1 is not available on MPCI-L1 series modules. However, MPCI-L1

features the LED_WWAN# active-low open drain output to provide the cellular status indication as specified by the PCI Express Mini Card Electromechanical Specification [15], the indicator protocol implemented is described below.

Network Indication feature is disabled by default, but it can be enabled with AT+UGPIOC command. When the feature is enabled, GPIO1 (pin 21) can be used as LED outputs to show the network status as described below:

• No service (not registered on a network): On for 250 ms. Repeats every 5 seconds.

• In service (registered on LTE network): Continuously On

• Tx/Rx data transmission: Blinks in 100 ms cycles, for a minimum of 5 cycles. It will blink continuously if the

device continuously receives data.

• Roaming: Blinks twice at 250 ms cycles, then continuously on.

Note: Only GPIO1 (pin 21) can be used with AT+UGPIOC command. For the details, please refer to TOBY-L1 / MPCI-L1 series AT Commands Manual [2].

1.14.2 Power saving

The power saving configuration is by default disabled, but it can be enabled using the AT+UPSV command (for the complete description of the AT+UPSV command, refer to the TOBY-L1 / MPCI-L1 series AT Commands Manual [3]).

When power saving is enabled, the module automatically enters the low power idle-mode whenever possible, reducing current consumption (refer to chapter 1.5.1.3, TOBY-L1 series Data Sheet [1], and MPCI-L1 series Data Sheet [2]).

During the low power idle-mode, the module is not ready to communicate with an external device by means of the USB interface, since it is configured to reduce power consumption. The module wakes up from the low power idle-mode to the active-mode in these events:

• Automatic periodic monitoring of the paging channel for the reception of the paging block sent by the base

station according to network conditions (refer to chapter 1.5.1.3)

• The connected USB host forces a remote wakeup of the module as USB device (refer to chapter 1.9.1.3)

For the definition and the description of TOBY-L1 and MPCI-L1 series operating modes, including the events forcing transitions between the different operating modes, refer to the chapter 1.4.

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2 Design-in

2.1 Overview

For an optimal integration of TOBY-L1 and MPCI-L1 series modules in the final application board, follow the design guidelines stated in this chapter.

Every application circuit must be properly designed to guarantee the correct functionality of the related interface, however a number of points require high attention during the design of the application device.

The following list provides a rank of importance in the application design, starting from the highest relevance:

1. Module antenna connection: ANT1 and ANT2 ports. Antenna circuit directly affects the RF compliance of the device integrating TOBY-L1 and MPCI-L1 series

modules with applicable certification schemes. Very carefully follow the suggestions provided in chapter 2.4 for schematic and layout design.

2. Module supply: VCC or 3.3Vaux, and GND pins. The supply circuit affects the RF compliance of the device integrating TOBY-L1 and MPCI-L1 series modules

with applicable required certification schemes as well as antenna circuit design. Very carefully follow the suggestions provided in the chapter 2.2.1 for schematic and layout design.

3. USB interface: USB_D+, USB_D- pins. Accurate design is required to guarantee USB 2.0 high-speed interface functionality. Carefully follow the

suggestions provided in the chapter 2.6.1 for schematic and layout design.

4. SIM interface: VSIM, SIM_CLK, SIM_IO, SIM_RST or UIM_PWR, UIM_DATA, UIM_CLK, UIM_RESET pins. Accurate design is required to guarantee SIM card functionality reducing the risk of RF coupling. Carefully

follow the suggestions provided in the chapter 2.5 for schematic and layout design.

5. System functions: RESET_N or PERST#, PWR_ON pins. Accurate design is required to guarantee that the voltage level is well defined during operation. Carefully

follow the suggestions provided in the chapter 2.3 for schematic and layout design.

6. Other supplies: the V_BCKP supply output, and the V_INT digital interfaces supply output. Accurate design is required to guarantee proper functionality. Follow the suggestions provided in the

chapters 2.2.2 and 2.2.3 for schematic and layout design.

7. Other pins: GPIOs, Mini PCIe specific signals and Reserved pins. Accurate design is required to guarantee proper functionality. Follow the suggestions provided in sections

2.7, 2.8 and 2.9 for schematic and layout design.

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Main Supply

Available?

Battery

Li-Ion 3.7 V

Linear LDO

Regulator

Main Supply

Voltage

>5 V?

Switching

Step-Down

Regulator

No, portable device

No, less than 5 V

Yes, greater than 5 V

Yes, always available

2.2 Supply interfaces

2.2.1 Module supply (VCC or 3.3aux)

2.2.1.1 General guidelines for VCC supply circuit selection and design

VCC or 3.3Vaux pins are internally connected. Application design shall connect all the available pads to the

external supply to minimize the power loss due to series resistance. GND pins are internally connected. Application design shall connect all the available pads to solid ground on the

application board, since a good (low impedance) connection to external ground can minimize power loss and improve RF and thermal performance.

TOBY-L1 and MPCI-L1 series modules must be sourced through the VCC or the 3.3Vaux pins with a proper DC power supply that should meet the prerequisites to comply with the VCC or 3.3aux requirements summarized in Table 7.

The proper DC power supply can be selected according to the application requirements (see Figure 19) between the different possible supply sources types, which most common ones are the following:

• Switching regulator

• Low Drop-Out (LDO) linear regulator

• Rechargeable Lithium-ion (Li-Ion) or Lithium-ion polymer (Li-Pol) battery

• Primary (disposable) battery

Figure 19: VCC / 3.3Vaux supply concept selection

The DC/DC switching step-down regulator is the typical choice when the available primary supply source has a nominal voltage much higher (e.g. greater than 5 V) than the modules VCC or 3.3aux operating supply voltage. The use of switching step-down provides the best power efficiency for the overall application and minimizes current drawn from the main supply source. See sections 2.2.1.2, 2.2.1.6, 2.2.1.8, 2.2.1.9 for specific design-in.

The use of an LDO linear regulator becomes convenient for a primary supply with a relatively low voltage (e.g. less or equal than 5 V). In this case the typical 90% efficiency of the switching regulator diminishes the benefit of voltage step-down and no true advantage is gained in input current savings. On the opposite side, linear regulators are not recommended for high voltage step-down as they dissipate a considerable amount of energy in thermal power. See sections 2.2.1.3, 2.2.1.6, 2.2.1.8, 2.2.1.9 for specific design-in.

If TOBY-L1 series modules are deployed in a mobile unit where no permanent primary supply source is available, then a battery will be required to provide VCC. A standard 3-cell Li-Ion or Li-Pol battery pack directly connected to VCC is the usual choice for battery-powered devices. During charging, batteries with Ni-MH chemistry

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typically reach a maximum voltage that is above the maximum rating for VCC, and should therefore be avoided. See sections 2.2.1.4, 2.2.1.6, 2.2.1.7, 2.2.1.8, 2.2.1.9 for specific design-in.

Keep in mind that the use of batteries requires the implementation of a suitable charger circuit (not included in TOBY-L1 series modules). The charger circuit should be designed in order to prevent over-voltage on VCC beyond the upper limit of the absolute maximum rating. See section 2.2.1.7 for specific design-in.

The use of primary (not rechargeable) battery or super-capacitors is in general uncommon, but appropriate parts can be selected given that the most parts available are seldom capable of delivering the maximum current specified in TOBY-L1 series Data Sheet [1] during the RF transmission in connected-mode. Carefully evaluate the usage of super-capacitors as supply source since aging and temperature conditions significantly affect the actual capacitor characteristics. See sections 2.2.1.5, 2.2.1.6, 2.2.1.8, 2.2.1.9 for specific design-in.

Rechargeable 3-cell Li-Ion or Li-Pol and Ni-MH chemistry batteries reach a maximum voltage that is above the maximum rating for the 3.3Vaux supply of MPCI-L1 series modules, and should therefore be avoided. The use of rechargeable, not-rechargeable battery or super-capacitors is very uncommon for Mini PCI Express applications, so that these supply sources types are not considered for MPCI-L1 series modules.

The usage of more than one DC supply at the same time should be carefully evaluated: depending on the supply source characteristics, different DC supply systems can result as mutually exclusive.

The following sections highlight some design aspects for each of the supplies listed above providing application circuit design-in compliant with the module VCC and 3.3Vaux requirements summarized in Table 7.

2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator

The use of a switching regulator is suggested when the difference from the available supply rail to the VCC or

3.3Vaux value is high, since switching regulators provide good efficiency transforming a 12 V or greater voltage

supply to a suggested ~4.1 V value for the VCC supply or a suggested ~3.44 V value for the 3.3Vaux supply. The characteristics of the switching regulator connected to VCC or 3.3Vaux pins should meet the following

prerequisites to comply with the module VCC or 3.3Vaux requirements summarized in Table 7:

• Power capability: the switching regulator with its output circuit must be capable of providing a voltage

value to the VCC or 3.3Vaux pins within the specified operating range, and must be capable of withstanding and delivering the maximum current specified in TOBY-L1 series Data Sheet [1] or MPCI-L1 series Data Sheet [2] when in connected-mode.

• Low output ripple: the switching regulator together with its output circuit must be capable of providing a

clean (low noise) VCC or 3.3Vaux voltage profile.

• High switching frequency: for best performance and for smaller applications it is recommended to select a

switching frequency ≥ 600 kHz (since L-C output filter is typically smaller for high switching frequency). The use of a switching regulator with a variable switching frequency or with a switching frequency lower than 600 kHz must be carefully evaluated, since this can produce noise in the VCC or 3.3Vaux voltage profile and therefore negatively impact LTE modulation spectrum performance. An additional L-C low-pass filter between the switching regulator output to VCC or 3.3Vaux supply pins can mitigate the ripple on VCC, but adds extra voltage drop due to resistive losses on series inductors.

• PWM mode operation: it is preferable to select regulators with Pulse Width Modulation (PWM) mode.

While in connected-mode, the Pulse Frequency Modulation (PFM) mode and PFM/PWM modes transitions must be avoided to reduce the noise on the VCC or 3.3Vaux voltage profile. Switching regulators can be used that are able to switch between low ripple PWM mode and high ripple PFM mode, provided that the mode transition occurs when the module changes status from the idle/active-modes to connected-mode (where the current consumption increases to a value greater than 200 mA). It is permissible to use a regulator that switches from the PWM mode to the burst or PFM mode at an appropriate current threshold (e.g. 100 mA).

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12V

C2C1

VIN

RUN

SYNC

BOOST

GND

C7 C8

TOBY-L1

series

VCC

GND

12V

C2C1

VIN

RUN

SYNC

BOOST

GND

C7 C8

MPCI-L1 series

3.3Vaux

GND

3.3Vaux

Figure 20 and the components listed in Table 11 show an example of a high reliability power supply circuit, where the module VCC or 3.3Vaux is supplied by a step-down switching regulator capable of delivering maximum current with low output ripple and with fixed switching frequency in PWM mode operation greater than 1 MHz.

It is suggested to configure the switching regulator to generate a voltage supply value slightly below the maximum limit of the module VCC or 3.3Vaux normal operating range (e.g. ~4.1 V for VCC and ~3.44 V for the 3.3Vaux, as in the circuit described in Figure 20 and Table 11). This reduces the power on the linear regulator and improves the thermal design of the circuit.

Figure 20: Suggested schematic design for the VCC and 3.3Vaux voltage supply application circuit using a step-down regulator

Reference Description Part Number - Manufacturer

C1 10 µF Capacitor Ceramic X7R 5750 15% 50 V C5750X7R1H106MB - TDK C2 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 - Murata C3 680 pF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71H681KA01 - Murata C4 22 pF Capacitor Ceramic C0G 0402 5% 25 V GRM1555C1H220JZ01 - Murata C5 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 - Murata C6 470 nF Capacitor Ceramic X7R 0603 10% 25 V GRM188R71E474KA12 - Murata C7 22 µF Capacitor Ceramic X5R 1210 10% 25 V GRM32ER61E226KE15 - Murata C8

D1 Schottky Diode 40 V 3 A MBRA340T3G - ON Semiconductor L1 10 µH Inductor 744066100 30% 3.6 A 744066100 - Wurth Electronics R1

U1 Step-Down Regulator MSOP10 3.5 A 2.4 MHz LT3972IMSE#PBF - Linear Technology

Table 11: Suggested components for the VCC / 3.3Vaux supply application circuit using a step-down regulator

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330 µF Capacitor Tantalum D_SIZE 6.3 V 45 mΩ

470 kΩ Resistor 0402 5% 0.1 W

15 kΩ Resistor 0402 5% 0.1 W

22 kΩ Resistor 0402 5% 0.1 W

430 kΩ Resistor 0402 5% 0.063 W

100 kΩ Resistor 0402 5% 0.1 W

T520D337M006ATE045 - KEMET

2322-705-87474-L - Yageo

2322-705-87153-L - Yageo

2322-705-87223-L - Yageo

RC0402JR-07430KL - Yageo

2322-705-70104-L - Yageo

TOBY-L1 and MPCI-L1 series - System Integration Manual

IN OUT

ADJ

GND

C2R2

SHDN

TOBY-L1 series

VCC

GND

IN OUT

ADJ

GND

C2R4

SHDN

MPCI-L1 series

GND

3.3Vaux

2.2.1.3 Guidelines for VCC or 3.3Vaux supply circuit design using a Low Drop-Out linear regulator

The use of a linear regulator is suggested when the difference from the available supply rail and the VCC or

3.3Vaux value is relatively low. The linear regulators provide high efficiency when transforming a 5 VDC supply

to a voltage value within the module VCC or 3.3Vaux normal operating range. The characteristics of the Low Drop-Out (LDO) linear regulator connected to VCC or 3.3aux pins should meet

the following prerequisites to comply with the module VCC or 3.3Vaux requirements summarized in Table 7:

• Power capabilities: the LDO linear regulator with its output circuit must be capable of providing a voltage

• Power dissipation: the power handling capability of the LDO linear regulator must be checked to limit its

junction temperature to the maximum rated operating range (i.e. check the voltage drop from the max input voltage to the minimum output voltage to evaluate the power dissipation of the regulator).

Figure 21 and the components listed in Table 12 show an example of VCC or 3.3Vaux module supply circuit using an LDO linear regulator capable of delivering the required current, with proper power handling capability.

It is recommended to configure the LDO linear regulator to generate a voltage supply value slightly below the maximum limit of the module VCC or 3.3Vaux normal operating range (e.g. ~4.1 V for VCC and ~3.44 V for the 3.3Vaux, as in the circuit described in Figure 21 and Table 12). This reduces the power on the linear regulator and improves the thermal design of the circuit.

Figure 21: Suggested schematic design for the VCC voltage supply application circuit using an LDO linear regulator

Reference Description Part Number - Manufacturer

C1, C2 10 µF Capacitor Ceramic X5R 0603 20% 6.3 V GRM188R60J106ME47 - Murata C3

U1 LDO Linear Regulator ADJ 3.0 A LT1764AEQ#PBF - Linear Technology

Table 12: Suggested components for VCC / 3.3Vaux supply application circuit using an LDO linear regulator

330 µF Capacitor Tantalum D_SIZE 6.3 V 45 mΩ

47 kΩ Resistor 0402 5% 0.1 W

9.1 kΩ Resistor 0402 5% 0.1 W

3.9 kΩ Resistor 0402 5% 0.1 W

3.3 kΩ Resistor 0402 5% 0.1 W

1.8 kΩ Resistor 0402 5% 0.1 W

T520D337M006ATE045 - KEMET

RC0402JR-0747KL - Yageo Phycomp

RC0402JR-079K1L - Yageo Phycomp

RC0402JR-073K9L - Yageo Phycomp

RC0402JR-073K3L - Yageo Phycomp

RC0402JR-071K8L - Yageo Phycomp

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2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery

Rechargeable Li-Ion or Li-Pol batteries connected to the VCC pins on TOBY-L1 should meet the following prerequisites to comply with the module’s VCC requirements summarized in Table 7:

• Maximum pulse and DC discharge current: the rechargeable Li-Ion battery with its output circuit must be

capable of extensively delivering the maximum current pulses to the VCC pins specified in TOBY-L1 series Data Sheet [1]. The maximum discharge current is not always reported in battery data sheets, but the maximum DC discharge current is typically almost equal to the battery capacity in Amp-hours divided by 1 hour.

• DC series resistance: the rechargeable Li-Ion battery with its output circuit must be capable of avoiding a

VCC voltage drop below the operating range specified in TOBY-L1 series Data Sheet [1] during transmit.

2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery

The characteristics of a primary (non-rechargeable) battery connected to the VCC pins on TOBY-L1 should meet the following prerequisites to comply with the module’s VCC requirements summarized in Table 7:

• Maximum pulse and DC discharge current: the non-rechargeable battery with its output circuit must be

• DC series resistance: the non-rechargeable battery with its output circuit must be capable of avoiding a

VCC voltage drop below the operating range specified in TOBY-L1 series Data Sheet [1] during transmit.

2.2.1.6 Additional guidelines for VCC supply circuit design

To reduce voltage drops, use a low impedance power source. The resistance of the power supply lines (connected to the VCC / 3.3Vaux and GND pins of the module) on the application board and battery pack should also be considered and minimized: cabling and routing must be as short as possible to minimize power losses.

Three pins are allocated to VCC supply and five pins to 3.3Vaux supply. Another twenty pins are designated for GND connection. Even if all the VCC / 3.3Vaux pins and all the GND pins are internally connected within the module, it is recommended to properly connect all of them to supply the module to minimize series resistance losses.

To reduce voltage ripple and noise, which should improve RF performance especially if the application device integrates an internal antenna, place the following bypass capacitors near the VCC / 3.3Vaux pins:

• 68 pF capacitor with Self-Resonant Frequency in the 800/900 MHz range (e.g. Murata GRM1555C1H680J)

to filter EMI in the LTE band 13

• 15 pF capacitor with Self-Resonant Frequency in 1800/1900 MHz range (e.g. Murata GRM1555C1E150J)

to filter EMI in the LTE band 4

• 10 nF capacitor (e.g. Murata GRM155R71C103K) to filter digital logic noise from clocks and data sources

• 100 nF capacitor (e.g. Murata GRM155R61C104K) to filter digital logic noise from clocks and data sources

A bypass capacitor with large capacitance and low ESR (e.g. KEMET T520D337M006ATE045, 330 µF, 45 mΩ) can be used to avoid VCC or 3.3Vaux spikes, but it is not strictly required.

The necessity of each part depends on the specific design, but it is recommended to provide all the VCC

and 3.3Vaux bypass capacitors described in Figure 22 and Table 13 if the application device integrates an internal antenna.

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GND

C3 C4

TOBY-L1 series

VCC

3V8

GND

C3 C4

MPCI-L1 series

3V3

3.3Vaux

Figure 22: Suggested schematic for the VCC / 3.3Vaux bypass capacitors to reduce ripple / noise on supply voltage profile

Reference Description Part Number - Manufacturer

C1 68 pF Capacitor Ceramic C0G 0402 5% 50 V GRM1555C1H680JA01 - Murata C2 15 pF Capacitor Ceramic C0G 0402 5% 50 V GRM1555C1H150JA01 - Murata C3 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 - Murata C4 100 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C104KA01 - Murata

Table 13: Suggested components to reduce ripple / noise on VCC / 3.3Vaux

2.2.1.7 Guidelines for external battery charging circuit

TOBY-L1 series modules do not have an on-board charging circuit. Figure 23 provides an example of a battery charger design, suitable for applications that are battery powered with a Li-Ion (or Li-Polymer) cell.

In the application circuit, a rechargeable Li-Ion (or Li-Polymer) battery cell, that features proper pulse and DC discharge current capabilities and proper DC series resistance, is directly connected to the VCC supply input of TOBY-L1 series module. Battery charging is completely managed by the STMicroelectronics L6924U Battery Charger IC that, from a USB power source (5.0 V typ.), charges as a linear charger the battery, in three phases:

• Pre-charge constant current (active when the battery is deeply discharged): the battery is charged with a

• Fast-charge constant current: the battery is charged with the maximum current, configured by the value

• Constant voltage: when the battery voltage reaches the regulated output voltage (4.2 V), the L6924U

Using a battery pack with an internal NTC resistor, the L6924U can monitor the battery temperature to protect the battery from operating under unsafe thermal conditions.

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ESD sensitivity rating of the VCC / 3.3Vaux supply pins is 1 kV (HBM according to JESD22-A114). Higher

protection level can be required if the line is externally accessible on the application board, e.g. if accessible battery connector is directly connected to supply pins. Higher protection level can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to accessible point.

low current, set to 10% of the fast-charge current

of an external resistor to a value suitable for USB power source (~500 mA)

starts to reduce the current until the charge termination is done. The charging process ends when the charging current reaches the value configured by an external resistor to ~15 mA or when the charging timer reaches the value configured by an external capacitor to ~9800 s

TOBY-L1 and MPCI-L1 series - System Integration Manual

C5 C8

GND

C7C6 C9

TOBY-L1 series

VCC

USB

Supply

USB

END

PRG

INSNS

MODE

ISEL

C2C1

5V0

GND

OUT

OSNS

REF

Li-Ion/Li -Pol Battery Pack

Li-Ion/Li -Polymer Battery Charger IC

Alternatively the L6924U, providing input voltage range up to 12 V, can charge from an AC wall adapter. When a current-limited adapter is used, it can operate in quasi-pulse mode, reducing power dissipation.

Figure 23: Li-Ion (or Li-Polymer) battery charging application circuit

Reference Description Part Number - Manufacturer

Li-Ion (or Li-Polymer) battery pack with 470 Ω NTC C1, C4 1 µF Capacitor Ceramic X7R 0603 10% 16 V GRM188R71C105KA12 - Murata C2, C6 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 - Murata C3 1 nF Capacitor Ceramic X7R 0402 10% 50 V GRM155R71H102KA01 - Murata C5

330 µF Capacitor Tantalum D_SIZE 6.3 V 45 mΩ C7 100 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R61A104KA01 - Murata C8 56 pF Capacitor Ceramic C0G 0402 5% 25 V GRM1555C1E560JA01 - Murata C9 15 pF Capacitor Ceramic C0G 0402 5% 25 V GRM1555C1E150JA01 - Murata D1, D2 Low Capacitance ESD Protection CG0402MLE-18G - Bourns R1, R2

24 kΩ Resistor 0402 5% 0.1 W

3.3 kΩ Resistor 0402 5% 0.1 W

1.0 kΩ Resistor 0402 5% 0.1 W

U1 Single Cell Li-Ion (or Li-Polymer) Battery Charger IC L6924U - STMicroelectronics

Table 14: Suggested components for Li-Ion (or Li-Polymer) battery charging application circuit

Various manufacturer

T520D337M006ATE045 - KEMET

RC0402JR-0724KL - Yageo Phycomp

RC0402JR-073K3L - Yageo Phycomp

RC0402JR-071K0L - Yageo Phycomp

2.2.1.8 Guidelines for VCC or 3.3Vaux supply layout design

A good connection to the module’s VCC or 3.3Vaux pins from the DC supply source is required for correct RF performance. Guidelines are summarized in the following list:

• All the available VCC / 3.3Vaux pins must be connected to the DC source

• VCC / 3.3Vaux connection must be as wide as possible and as short as possible

• Any series component with Equivalent Series Resistance (ESR) greater than few milliohms must be avoided

• VCC / 3.3Vaux connection must be routed through a PCB area separated from sensitive analog signals and

sensitive functional units: it is good practice to interpose at least one layer of PCB ground between VCC /

3.3Vaux track and other signal routing

• Coupling between VCC / 3.3Vaux and digital lines, especially USB must be avoided

• The tank bypass capacitor with low ESR for current spikes smoothing described in section 2.2.1.6 should be

placed close to the VCC / 3.3Vaux pins. If the main DC source is a switching DC-DC converter, place the large capacitor close to the DC-DC output and minimize the VCC / 3.3Vaux track length. Otherwise consider using separate capacitors for DC-DC converter and TOBY-L1 / MPCI-L1 series module tank capacitor

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• The bypass capacitors in the pF range described in Figure 22 and Table 13 should be placed as close as

possible to the VCC / 3.3Vaux pins. This is highly recommended if the application device integrates an internal antenna

• Since VCC / 3.3Vaux is directly connected to RF Power Amplifiers, voltage ripple at high frequency may

result in unwanted spurious modulation of transmitter RF signal. This is more likely to happen with switching DC-DC converters, in which case it is better to select the highest operating frequency for the switcher and add a large L-C filter before connecting to the TOBY-L1 or MPCI-L1 module.

• If VCC / 3.3Vaux is protected by transient voltage suppressor to ensure that the voltage maximum ratings

are not exceeded, place the protecting device along the path from the DC source towards the module, preferably closer to the DC source (otherwise protection functionality may be compromised)

2.2.1.9 Guidelines for grounding layout design

Good connection of the module GND pins with application board solid ground layer is required for correct RF performance. It significantly reduces EMC issues and provides a thermal heat sink for the module.

• Connect each GND pin with application board solid GND layer. It is strongly recommended that each GND

pad surrounding VCC / 3.3Vaux pins have one or more dedicated via down to the application board solid ground layer

• The VCC / 3.3Vaux supply current flows back to main DC source through GND as ground current: provide

adequate return path with suitable uninterrupted ground plane to main DC source

• If the application board is a multilayer PCB, then it is required to connect together each GND area with

complete via stack down to main board ground layer

• It is recommended to implement one layer of the application board as ground plane as wide as possible

• Good grounding of GND pads also ensures thermal heat sink. This is critical during connection, when the

real network commands the module to transmit at maximum power: proper grounding helps prevent module overheating.

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2.2.2 RTC supply output (V_BCKP)

The RTC supply V_BCKP pin is not accessible on MPCI-L1 series modules.

2.2.2.1 Guidelines for V_BCKP circuit design TOBY-L1 series modules provide the V_BCKP 2.5 V supply output, which can be mainly used to:

• Pull-up the PWR_ON signal (see section 2.3.1 for more details)

V_BCKP supply output pin provides internal short circuit protection to limit start-up current and protect the

device in short circuit situations. No additional external short circuit protection is required.

Do not apply loads which might exceed the limit for maximum available current from V_BCKP supply

(refer to TOBY-L1 series Data Sheet [1]) as this can cause malfunctions in internal circuitry.

V_BCKP can only be used as an output: do not connect any external supply source on V_BCKP. ESD sensitivity rating of the V_BCKP supply pin is 1 kV (Human Body Model according to JESD22-A114).

Higher protection level could be required if the line is externally accessible and it can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to the accessible point.

2.2.2.2 Guidelines for V_BCKP layout design V_BCKP supply requires careful layout: avoid injecting noise on this voltage domain as it may affect the stability

of the internal circuitry.

2.2.3 Digital I/O interfaces supply output (V_INT)

The generic digital interfaces supply V_INT pin is not accessible on MPCI-L1 series modules.

2.2.3.1 Guidelines for V_INT circuit design TOBY-L1 series modules provide the V_INT digital interfaces 1.8 V supply output, which can be mainly used to:

• Supply voltage translators to connect 1.8 V digital interfaces of the module to a 3.0 V device

• Indicate when the module is switched on

V_INT supply output pin provides internal short circuit protection to limit start-up current and protect the device in short circuit situations. No additional external short circuit protection is required.

Do not apply loads which might exceed the limit for maximum available current from V_INT supply (refer

to TOBY-L1 series Data Sheet [1]) as this can cause malfunctions in internal circuitry.

Since the V_INT supply is generated by an internal switching step-down regulator, it is not recommended

to supply sensitive analog circuitry without adequate filtering for digital noise.

V_INT can only be used as an output: do not connect any external supply source on V_INT. ESD sensitivity rating of the V_INT supply pin is 1 kV (Human Body Model according to JESD22-A114).

It is recommended to provide direct access to the V_INT pin on the application board by means of an

accessible test point directly connected to the V_INT pin.

2.2.3.2 Guidelines for V_INT layout design V_INT supply output is generated by an integrated switching step-down converter. Because of this, it can be a

source of noise: avoid coupling with sensitive signals.

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TOBY-L1 series

Rext

V_BCKP

PWR_ON

Power-on

push button

ESD

Open Drain Output

Application

Processor

TOBY-L1 series

Rext

V_BCKP

PWR_ON

2.3 System functions interfaces

2.3.1 Module power-on (PWR_ON)

The PWR_ON input pin is not accessible on MPCI-L1 series modules.

2.3.1.1 Guidelines for PWR_ON circuit design

Pull-up resistor (e.g. 100 kΩ) biased by the V_BCKP supply pin of the module should be implemented as described in Figure 24 and Table 15. If connecting the PWR_ON input to a push button, the pin will be externally accessible on the application device. According to EMC/ESD requirements of the application, an additional ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) should be implemented at close to accessible point on the line connected to this pin.

The PWR_ON pin has high input impedance and is weakly pulled to the high level on the module. Avoid

keeping it floating in a noisy environment. To hold the high logic level stable, the PWR_ON pin must be connected to a pull-up resistor (e.g. 100 kΩ) biased by the V_BCKP supply pin of the module.

ESD sensitivity rating of the PWR_ON pin is 1 kV (Human Body Model according to JESD22-A114). Higher

protection level can be required if the line is externally accessible on the application board, e.g. if an accessible push button is directly connected to PWR_ON pin. Higher protection level can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to accessible point.

Using an open drain output from a host to connect the PWR_ON input to an application processor in couple with an external pull-up resistor (e.g. 100 kΩ) biased by the V_BCKP supply pin of the module, as described in Figure 24 and Table 15.

A compatible push-pull output of an application processor can also be used. In this case the pull-up can be provided to pull the PWR_ON level high when the application processor is switched off. If the high-level voltage of the push-pull output pin of the application processor is greater than the voltage of the V_BCKP pin (refer to TOBY-L1 series Data Sheet [1]), the V_BCKP supply cannot be used to bias the pull-up resistor. The supply rail of the application processor or the module VCC supply could be used. Using a push-pull output of the external device, take care to fix the proper level in all the possible scenarios to avoid an inappropriate module switch-on.

Figure 24: PWR_ON application circuits using a push button and an open drain output of an application processor

Reference Description Remarks

Rext

ESD CT0402S14AHSG - EPCOS Varistor array for ESD protection

Table 15: Example of pull-up resistor and ESD protection for the PWR_ON application circuit

100 kΩ Resistor 0402 5% 0.1 W

External pull-up resistor

It is recommended to provide direct access to the PWR_ON pin on the application board by means of an

accessible test point directly connected to the PWR_ON pin.

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TOBY-L1 series

V_BCKP

RESET_N

Power-on

push button

ESD

Open Drain Output

Application

Processor

TOBY-L1 series

V_BCKP

RESET_N

10 kΩ

MPCI-L1 series

PERST#

Power-on

push button

ESD

Open Drain Output

Application

Processor

MPCI-L1 series

PERST#

10 kΩ 10 kΩ

2.5V

2.3.1.2 Guidelines for PWR_ON layout design

The power-on circuit (PWR_ON) requires careful layout, since it is the sensitive input available to switch on the TOBY-L1 series modules, once a valid VCC supply is provided beforehand. For the PWR_ON pin, ensure the voltage level is well defined during operation and no transient noise is coupled on this line, otherwise the module might detect an undesirable spurious power-on request.

2.3.2 Module reset (RESET_N and PERST#)

2.3.2.1 Guidelines for RESET_N and PERST# circuit design

As described in Figure 14, the TOBY-L1 and MPCI-L1 series modules have an internal pull-up resistor on the reset input line: an external pull-up is not required on the application board.

Connecting the RESET_N or PERST# input to a push button that shorts the RESET_N or PERST# pin to ground would make the pin externally accessible on the application device. According to EMC/ESD requirements of the application, it is required to provide an additional ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) on the line connected to this pin, close to accessible point, as described in Figure 25 and Table 16.

ESD sensitivity rating of the RESET_N and PERST# pin is 1 kV (Human Body Model according to JESD22-

A114). Higher protection level can be required if the line is externally accessible on the application board, e.g. if an accessible push button is directly connected to RESET_N or PERST# pin. Higher protection level can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to accessible point.

Connecting the RESET_N or PERST# input to an external device (e.g. application processor), an open drain output can be directly connected without any external pull-up, as described in Figure 25 and Table 16. The internal pull-up resistor provided by the module pulls the line to the high logic level when the RESET_N or PERST# pin is not forced low by the application processor. A compatible push-pull output of an application processor can be used too.

Figure 25: RESET_N and PERST# application circuits using a push button and an open drain output of an application processor

Reference Description Remarks

ESD Varistor for ESD protection CT0402S14AHSG – EPCOS

Table 16: Example of ESD protection component for the RESET_N application circuit

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If the external reset function is not required by the customer application, the RESET_N input pin can be

left unconnected to external components, but it is recommended providing direct access on the application board by means of an accessible test point directly connected to the RESET_N pin.

2.3.2.2 Guidelines for RESET_N and PERST# layout design

The RESET_N and PERST# circuits requires careful layout due to the pin function: ensure that the voltage level is well defined during operation and no transient noise is coupled on this line, otherwise the module might detect a spurious reset request. It is recommended to keep the connection line to RESET_N and PERST# as short as possible.

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2.4 Antenna interface

TOBY-L1 and MPCI-L1 series modules provide two RF interfaces for connecting the external antennas:

• The ANT1 port represents the primary RF input/output for transmission and reception of the LTE RF signals.

• The ANT2 port represents the secondary RF input for the reception of the LTE RF signals for MIMO 2 x 2.

Both the ANT1 and the ANT2 port have a nominal characteristic impedance of 50 Ω and must be connected to the related antenna through a 50 Ω transmission line to allow proper transmission / reception of RF signals.

Two antennas (one connected to ANT1 port and one connected to ANT2 port) must be used to support

the Down-Link MIMO 2 x 2 radio technology. This is a mandatory feature for LTE category 3 User Equipments (up to 100 Mb/s Down-Link data rate) designed to operate on Verizon Wireless LTE 3GPP Band 4 / 13 network.

2.4.1 Antenna RF interfaces (ANT1 / ANT2)

2.4.1.1 General guidelines for antenna selection and design

The LTE antenna is the most critical component to be evaluated. Designers must take care of the antennas from all perspective at the very start of the design phase when the physical dimensions of the application board are under analysis/decision, since the RF compliance of the device integrating TOBY-L1 and MPCI-L1 series module with all the applicable required certification schemes depends on antennas radiating performance.

LTE antennas are typically available in the types of linear monopole or PCB antennas such as patches or ceramic SMT elements.

• External antennas (e.g. linear monopole)

o External antennas basically do not imply physical restriction to the design of the PCB where the

TOBY-L1 and MPCI-L1 series module is mounted.

o The radiation performance mainly depends on the antennas. It is required to select antennas with

optimal radiating performance in the operating bands.

o RF cables should be carefully selected with minimum insertion losses. Additional insertion loss will

be introduced by low quality or long cable. Large insertion loss reduces radiation performance.

o A high quality 50 Ω RF connector provides proper PCB-to-RF-cable transition. It is recommended to

strictly follow the layout guidelines provided by the connector manufacturer.

• Integrated antennas (e.g. patch-like antennas):

o Internal integrated antennas imply physical restriction to the design of the PCB:

Integrated antenna excites RF currents on its counterpoise, typically the PCB ground plane of the device that becomes part of the antenna: its dimension defines the minimum frequency that can be radiated. Therefore, the ground plane can be reduced down to a minimum size that should be similar to the quarter of the wavelength of the minimum frequency that has to be radiated, given that the orientation of the ground plane related to the antenna element must be considered.

The isolation between the primary and the secondary antennas has to be as high as possible and the correlation between the 3D radiation patterns of the two antennas has to be as low as possible. In general, a separation of at least a quarter wavelength between the two antennas is required to achieve a good isolation and low pattern correlation.

As numerical example, the physical restriction to the PCB design can be considered as following:

Frequency = 750 MHz  Wavelength = 40 cm  Minimum GND plane size = 10 cm

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Min.

250 µm

Min. 400 µm

GND

ANT1

GND clearance

on very close buried layer

below ANT1 pad

GND clearance

on top layer

around ANT1 pad

Min.

250 µm

Min. 400 µm

GND

ANT2

GND clearance

on very close buried layer

below ANT2 pad

GND clearance

on top layer

around ANT2 pad

o Radiation performance depends on the whole PCB and antenna system design, including product

mechanical design and usage. Antennas should be selected with optimal radiating performance in the operating bands according to the mechanical specifications of the PCB and the whole product.

o It is recommended to select a pair of custom antennas designed by an antennas’ manufacturer if

the required ground plane dimensions are very small (e.g. less than 6.5 cm long and 4 cm wide). The antenna design process should begin at the start of the whole product design process

o It is highly recommended to strictly follow the detailed and specific guidelines provided by the

antenna manufacturer regarding correct installation and deployment of the antenna system, including PCB layout and matching circuitry

o Further to the custom PCB and product restrictions, antennas may require a tuning to comply with

all the applicable required certification schemes. It is recommended to consult the antenna manufacturer for the design-in guidelines for antenna matching related to the custom application

In both of cases, selecting external or internal antennas, these recommendations should be observed:

• Select antennas providing optimal return loss (or V.S.W.R.) figure over all the operating frequencies.

• Select antennas providing optimal efficiency figure over all the operating frequencies.

• Select antennas providing similar efficiency for both the primary (ANT1) and the secondary (ANT2) antenna.

• Select antennas providing appropriate gain figure (i.e. combined antenna directivity and efficiency figure) so

that the electromagnetic field radiation intensity do not exceed the regulatory limits specified in some countries (e.g. by FCC in the United States, as reported in the chapter 4.2.1).

• Select antennas capable to provide low Envelope Correlation Coefficient between the primary (ANT1) and

the secondary (ANT2) antenna: the 3D antenna radiation patterns should have lobes in different directions.

2.4.1.2 Guidelines for antenna RF interface design

Guidelines for TOBY-L1 series ANT1 / ANT2 pins RF connection design

Proper transition between ANT1 / ANT2 pads and the application board PCB must be provided, implementing the following design-in guidelines for the layout of the application PCB close to the ANT1 / ANT2 pads:

• On a multilayer board, the whole layer stack below the RF connection should be free of digital lines

• Increase GND keep-out (i.e. clearance, a void area) around the ANT1 / ANT2 pads, on the top layer of the

• Add GND keep-out (i.e. clearance, a void area) on the buried metal layer below the ANT1 / ANT2 pads if

Figure 26: GND keep-out area on top layer around ANT1 / ANT2 pads and on very close buried layer below ANT1 / ANT2 pads

application PCB, to at least 250 µm up to adjacent pads metal definition and up to 400 µm on the area below the module, to reduce parasitic capacitance to ground, as described in the left picture in Figure 26

the top-layer to buried layer dielectric thickness is below 200 µm, to reduce parasitic capacitance to ground, as described in the right picture in Figure 26

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Lighthorse Technologies, Inc

IPX ultra micro-miniature RF connector

MPCI-L1 series

Baseboard

Stripline/Microstrip

Internal Antenna

Baseboard

Application

Chassis

Connector to External Antenna

MPCI-L1 series

Latch for

Mini PCIe

Latch for Mini PCIe

Guidelines for MPCI-L1 series ANT1 / ANT2 receptacles RF connection design

The Hirose U.FL-R-SMT RF receptacles implemented on the MPCI-L1 series modules for ANT1 / ANT2 ports require a suitable mated RF plug from the same connector series. Due to its wide usage in the industry, several manufacturers offer compatible equivalents.

Table 17 lists some RF connector plugs that fit MPCI-L1 series modules RF connector receptacles, based on the declaration of the respective manufacturers. Only the Hirose has been qualified for the MPCI-L1 series modules; contact other producers to verify compatibility.

Manufacturer Series Remarks

Hirose U.FL® Ultra Small Surface Mount Coaxial Connector Recommended I-PEX MHF® Micro Coaxial Connector Tyco UMCC® Ultra-Miniature Coax Connector Amphenol RF AMC® Amphenol Micro Coaxial

Table 17: MPCI-L1 series U.FL compatible plug connector

Typically the RF plug is available as a cable assembly: several kinds are available and the user should select the cable assembly best suited to the application. The key characteristics are:

• RF plug type: select U.FL or equivalent

• Nominal impedance: 50 Ω

• Cable thickness: typically from 0.8 mm to 1.37 mm. Select thicker cables to minimize insertion loss

• Cable length: standard length is typically 100 mm or 200 mm, custom lengths may be available on request.

Select shorter cables to minimize insertion loss

• RF connector on the other side of the cable: for example another U.FL (for board-to-board connection) or

SMA (for panel mounting)

For applications requiring an internal integrated SMT antenna, it is suggested to use a U-FL-to-U.FL cable to provide RF path from the MPCI-L1 series module to PCB strip line or micro strip connected to antenna pads as shown in Figure 27. It is very important to ensure the PCB-to-RF-cable transition, strip line and antenna pads is designed such that the characteristic impedance is 50 Ω: refer to the following subsections for specific guidelines regarding RF transmission line design and RF termination design.

If an external antenna is required, consider that the connector is typically rated for a limited number of insertion cycles. In addition, the RF coaxial cable may be relatively fragile compared to other types of cables. To increase application ruggedness, connect U.FL to a more robust connector (e.g. SMA or MMCX) fixed on panel or on flange as shown in Figure 27.

Figure 27: Example of RF connections, U.FL-to-U.FL cable for internal antenna and U.FL-to-SMA for external antenna

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35 um

270 um

760 um

L1 Copper

L3 Copper

L2 Copper

L4 Copper

-4 dielectric

FR-4 dielectric

380 um 500 um500 um

35 um

1510 um

L2 Copper

L1 Copper

FR-4 dielectric

1200 um 400 um400 um

Guidelines for RF transmission line design

Any RF transmission line, such as the ones from the ANT1 and ANT2 pads up to the related antenna connector or up to the related internal antenna pad, must be designed so that the characteristic impedance is as close as possible to 50 Ω.

RF transmission lines can be designed as a micro strip (consists of a conducting strip separated from a ground plane by a dielectric material) or a strip line (consists of a flat strip of metal which is sandwiched between two parallel ground planes within a dielectric material). The micro strip, implemented as a coplanar waveguide, is the most common configuration for printed circuit board.

Figure 28 and Figure 29 provide two examples of proper 50 Ω coplanar waveguide designs. The first example of RF transmission line can be implemented in case of 4-layer PCB stack-up herein described, and the second example of RF transmission line can be implemented in case of 2-layer PCB stack-up herein described.

Figure 28: Example of 50 Ω coplanar waveguide transmission line design for the described 4-layer board layup

Figure 29: Example of 50 Ω coplanar waveguide transmission line design for the described 2-layer board layup

If the two examples do not match the application PCB stack-up the 50 Ω characteristic impedance calculation can be made using the HFSS commercial finite element method solver for electromagnetic structures from Ansys Corporation, or using freeware tools like AppCAD from Agilent ( Wave Research (

www.mwoffice.com), taking care of the approximation formulas used by the tools for the

www.agilent.com) or TXLine from Applied

impedance computation.

To achieve a 50 Ω characteristic impedance, the width of the transmission line must be chosen depending on:

• the thickness of the transmission line itself (e.g. 35 µm in the example of Figure 28 and Figure 29)

• the thickness of the dielectric material between the top layer (where the transmission line is routed) and the

inner closer layer implementing the ground plane (e.g. 270 µm in Figure 28, 1510 µm in Figure 29)

• the dielectric constant of the dielectric material (e.g. dielectric constant of the FR-4 dielectric material in

Figure 28 and Figure 29)

• the gap from the transmission line to the adjacent ground plane on the same layer of the transmission line

(e.g. 500 µm in Figure 28, 400 µm in Figure 29)

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SMA Connector

Primary Antenna

SMA Connector

Secondary Antenna

TOBY-L1 series

If the distance between the transmission line and the adjacent GND area (on the same layer) does not exceed 5 times the track width of the micro strip, use the “Coplanar Waveguide” model for the 50 Ω calculation.

Additionally to the 50 Ω impedance, the following guidelines are recommended for transmission lines design:

• Minimize the transmission lines length: the insertion loss should be minimized as much as possible, in the

order of a few tenths of a dB

• Add GND keep-out (i.e. clearance, a void area) on buried metal layers below any pad of component present

on the RF transmission lines, if top-layer to buried layer dielectric thickness is below 200 µm, to reduce parasitic capacitance to ground

• The transmission lines width and spacing to GND must be uniform and routed as smoothly as possible: avoid

abrupt changes of width and spacing to GND

• Add GND stitching vias around transmission lines, as described in Figure 30

• Ensure solid metal connection of the adjacent metal layer on the PCB stack-up to main ground layer,

providing enough vias on the adjacent metal layer, as described in Figure 30

• Route RF transmission lines far from any noise source (as switching supplies and digital lines) and from any

sensitive circuit (as USB)

• Avoid stubs on the transmission lines

• Avoid signal routing in parallel to transmission lines or crossing the transmission lines on buried metal layer

• Do not route microstrip lines below discrete component or other mechanics placed on top layer

An example of proper RF circuit design is reported in the Figure 30. In this case, the ANT1 and ANT2 pins are directly connected to SMA connectors by means of proper 50 Ω transmission lines, designed with proper layout.

Figure 30: Suggested circuit and layout for antenna RF circuits on application board

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Guidelines for RF termination design

RF terminations must provide a characteristic impedance of 50 Ω as well as the RF transmission lines up to the RF terminations themselves, to match the characteristic impedance of the ANT1 / ANT2 ports of the modules.

However, real antennas are not perfect 50 Ω loads across all the supported frequencies. Therefore, to reduce as much as possible performance degradation due to antennas mismatch, RF terminations must provide optimal return loss (or V.S.W.R.) figure over all the operating frequency bands, as summarized in Table 8 and Table 9.

If external antennas are used, the antenna connectors represent the RF termination on the PCB:

• Use suitable 50 Ω connectors providing proper PCB-to-RF-cable transition

• Strictly follow the connector manufacturer’s recommended layout, for example:

o SMA Pin-Through-Hole connectors require GND keep-out (i.e. clearance, a void area) on all the

layers around the central pin up to annular pads of the four GND posts, as shown in Figure 30

o UFL surface mounted connectors require no conductive traces (i.e. clearance, a void area) in the

area below the connector between the GND land pads.

• Cut out the GND layer under RF connectors and close to buried vias, to remove stray capacitance and thus

keep the RF line 50 Ω, e.g. the active pad of UFL connectors needs to have a GND keep-out (i.e. clearance, a void area) at least on first inner layer to reduce parasitic capacitance to ground.

If integrated antennas are used, the RF terminations are represented by the integrated antennas themselves. The following guidelines should be followed.

• Use antennas designed by an antenna manufacturer, providing the best possible return loss (or V.S.W.R.).

• Provide a ground plane large enough according to the related integrated antenna requirements. The ground

plane of the application PCB can be reduced down to a minimum size that must be similar to one quarter of wavelength of the minimum frequency that has to be radiated. As numerical example,

Frequency = 750 MHz  Wavelength = 40 cm  Minimum GND plane size = 10 cm

• It is highly recommended to strictly follow the detailed and specific guidelines provided by the antenna

manufacturer regarding correct installation and deployment of the antenna system, including PCB layout and matching circuitry.

• Further to the custom PCB and product restrictions, antennas may require a tuning to comply with all the

applicable required certification schemes. It is recommended to consult the antenna manufacturer for the design-in guidelines for the antenna matching related to the custom application

Additionally, these recommendations regarding the antenna system placement must be followed:

• Do not include antennas within closed metal case.

• Do not place the antennas in close vicinity to end user, since the emitted radiation in human tissue is limited

by regulatory requirements.

• Place the antennas far from sensitive analog systems or employ countermeasures to reduce electromagnetic

compatibility issues.

• Take care of interaction between co-located RF systems, since the LTE transmitted power may interact or

disturb the performance of companion systems.

• Place the two LTE antennas to provide low Envelope Correlation Coefficient (ECC) between primary (ANT1)

and secondary (ANT2) antenna: the antenna 3D radiation patterns should have lobes in different directions. The ECC between primary and secondary antenna needs to be enough low to comply with the radiated performance requirements specified by related certification schemes, as indicated in Table 10

• Place the two LTE antennas to provide enough high isolation (refer to Table 10) between primary (ANT1)

and secondary (ANT2) antenna. The isolation depends on the distance between antennas (separation of at least a quarter wavelength required for good isolation), antenna type (using antennas with different polarization improves isolation), antenna 3D radiation patterns (uncorrelated patterns improve isolation).

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2.5 SIM interface

2.5.1 Guidelines for SIM circuit design

Guidelines for SIM cards, SIM connectors and SIM chips selection

The ISO/IEC 7816, the ETSI TS 102 221 and the ETSI TS 102 671 specifications define the physical, electrical and functional characteristics of Universal Integrated Circuit Cards (UICC), which contains the Subscriber Identification Module (SIM) integrated circuit that securely stores all the information needed to identify and authenticate subscribers over the LTE network.

Removable UICC / SIM card contacts mapping is defined by ISO/IEC 7816 and ETSI TS 102 221 as follows:

• Contact C1 = VCC (Supply)  It must be connected to VSIM or UIM_PWR

• Contact C2 = RST (Reset)  It must be connected to SIM_RST or UIM_RESET

• Contact C3 = CLK (Clock)  It must be connected to SIM_CLK or UIM_CLK

• Contact C4 = AUX1 (Auxiliary contact)  It must be left not connected

• Contact C5 = GND (Ground)  It must be connected to GND

• Contact C6 = VPP (Programming supply)  It must be connected to VSIM or UIM_PWR

• Contact C7 = I/O (Data input/output)  It must be connected to SIM_IO or UIM_DATA

• Contact C8 = AUX2 (Auxiliary contact)  It must be left not connected

A removable SIM card can have 6 contacts (C1, C2, C3, C5, C6, C7) or 8 contacts, providing also the auxiliary contacts C4 and C8. Only the 6 contacts C1, C2, C3, C5, C6, C7 are required and must be connected to the SIM interface of the module as described above.

Removable SIM card are suitable for applications where the SIM changing is required during the product lifetime.

A SIM card holder can have 6 or 8 positions if a mechanical card presence detector is not provided, or it can have 6+2 or 8+2 positions if two additional pins related to the normally-open mechanical switch integrated in the SIM connector for the mechanical card presence detection are provided. Select a SIM connector providing 6+2 or 8+2 positions if the optional SIM detection feature is required by the custom application, otherwise a connector without integrated mechanical presence switch can be selected.

Solderable UICC / SIM chip contacts mapping (M2M UICC Form Factor) is defined by ETSI TS 102 671 as:

• Package Pin 8 = UICC Contact C1 = VCC  It must be connected to VSIM or PWR

• Package Pin 7 = UICC Contact C2 = RST  It must be connected to SIM_RST or UIM_RESET

• Package Pin 6 = UICC Contact C3 = CLK  It must be connected to SIM_CLK or UIM_CLK

• Package Pin 5 = UICC Contact C4 = AUX1  It must be left not connected

• Package Pin 1 = UICC Contact C5 = GND  It must be connected to GND

• Package Pin 2 = UICC Contact C6 = VPP  It must be connected to VSIM or UIM_PWR

• Package Pin 3 = UICC Contact C7 = I/O  It must be connected to SIM_IO or UIM_DATA

• Package Pin 4 = UICC Contact C8 = AUX2  It must be left not connected

A solderable SIM chip has 8 contacts and can provide also the auxiliary contacts C4 and C8, but only the 6 contacts C1, C2, C3, C5, C6, C7 are required and must be connected to the SIM interface of the module as described above.

Solderable SIM chips are suitable for M2M applications where it is not required to change the SIM once installed.

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TOBY-L1 series

VSIM

SIM_IO

SIM_CLK

SIM_RST

SIM CARD

HOLDER

C5C6C

C1C2C

SIM Card

Bottom View

(contacts side)

VPP (C6)

VCC (C1)

IO (C7)

CLK (C3)

RST (C2)

GND (C5)

C2 C3 C5

D2 D3 D4

C 8

C 4

MPCI-L1 series

UIM_PWR

UIM_DATA

UIM_CLK

UIM_RESET

SIM CARD

HOLDER

C5C6C

C1C2C

SIM Card

Bottom View

(contacts side)

VPP (C6)

VCC (C1)

IO (C7)

CLK (C3)

RST (C2)

GND (C5)

C2 C3 C5

D1 D2 D3 D4

C 8

C 4

Guidelines for single SIM card connection without detection

A removable SIM card placed in a SIM card holder must be connected the SIM card interface of TOBY-L1 and MPCI-L1 series modules as described in Figure 31, where the optional SIM detection feature is not implemented.

Follow these guidelines connecting the module to a SIM connector without SIM presence detection:

• Connect the UICC / SIM contacts C1 (VCC) and C6 (VPP) to the VSIM / UIM_PWR pin of the module

• Connect the UICC / SIM contact C7 (I/O) to the SIM_IO / UIM_DATA pin of the module

• Connect the UICC / SIM contact C3 (CLK) to the SIM_CLK / UIM_CLK pin of the module

• Connect the UICC / SIM contact C2 (RST) to the SIM_RST / UIM_RESET pin of the module

• Connect the UICC / SIM contact C5 (GND) to ground

• Provide a 100 nF bypass capacitor (e.g. Murata GRM155R71C104K) at the SIM supply line, close to the

related pad of the SIM connector, to prevent digital noise

• Provide a bypass capacitor of about 22 pF to 47 pF (e.g. Murata GRM1555C1H470J) on each SIM line, very

close to each related pad of the SIM connector, to prevent RF coupling especially in case the RF antenna is placed closer than 10 - 30 cm from the SIM card holder

• Provide a very low capacitance (i.e. less than 10 pF) ESD protection (e.g. Tyco PESD0402-140) on each

externally accessible SIM line, close to each related pad of the SIM connector. ESD sensitivity rating of the SIM interface pins is 1 kV (HBM). So that, according to EMC/ESD requirements of the custom application, higher protection level can be required if the lines are externally accessible on the application device.

• Limit capacitance and series resistance on each SIM signal to match the SIM requirements (27.7 ns is the

maximum allowed rise time on clock line, 1.0 µs is the maximum allowed rise time on data and reset lines)

Figure 31: Application circuit for the connection to a single removable SIM card, with SIM detection not implemented

Reference Description Part Number - Manufacturer

C1, C2, C3, C4 47 pF Capacitor Ceramic C0G 0402 5% 50 V GRM1555C1H470JA01 - Murata C5 100 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C104KA01 - Murata D1, D2, D3, D4 Very Low Capacitance ESD Protection PESD0402-140 - Tyco Electronics J1 SIM Card Holder

Table 18: Example of components for the connection to a single removable SIM card, with SIM detection not implemented

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Various Manufacturers,

6 positions, without card presence switch

C707 10M006 136 2 - Amphenol

TOBY-L1 and MPCI-L1 series - System Integration Manual

TOBY-L1 series

VSIM

SIM_IO

SIM_CLK

SIM_RST

SIM CHIP

SIM Chip

Bottom View

(contacts side)

VPP (C6)

VCC (C1)

IO (C7)

CLK (C3)

RST (C2)

GND (C5)

C2 C3 C5

C1 C5

C2 C6

C3 C7

C4 C8

MPCI-L1 series

UIM_PWR

UIM_DATA

UIM_CLK

UIM_RESET

SIM CHIP

SIM Chip

Bottom View

(contacts side)

VPP (C6)

VCC (C1)

IO (C7)

CLK (C3)

RST (C2)

GND (C5)

C2 C3 C5

C1 C5

C2 C6

C4 C8

Guidelines for single SIM chip connection

A solderable SIM chip (M2M UICC Form Factor) must be connected the SIM card interface of TOBY-L1 and MPCI-L1 series modules as described in Figure 32.

Follow these guidelines connecting the module to a solderable SIM chip without SIM presence detection:

• Connect the UICC / SIM contacts C1 (VCC) and C6 (VPP) to the VSIM / UIM_PWR pin of the module

• Connect the UICC / SIM contact C7 (I/O) to the SIM_IO / UIM_DATA pin of the module

• Connect the UICC / SIM contact C3 (CLK) to the SIM_CLK / UIM_CLK pin of the module

• Connect the UICC / SIM contact C2 (RST) to the SIM_RST / UIM_RST pin of the module

• Connect the UICC / SIM contact C5 (GND) to ground

• Provide a 100 nF bypass capacitor (e.g. Murata GRM155R71C104K) at the SIM supply line close to the

related pad of the SIM chip, to prevent digital noise.

• Provide a bypass capacitor of about 22 pF to 47 pF (e.g. Murata GRM1555C1H470J) on each SIM line, to

prevent RF coupling especially in case the RF antenna is placed closer than 10 - 30 cm from the SIM lines.

• Limit capacitance and series resistance on each SIM signal to match the SIM requirements (27.7 ns is the

maximum allowed rise time on clock line, 1.0 µs is the maximum allowed rise time on data and reset lines).

Figure 32: Application circuit for the connection to a single solderable SIM chip, with SIM detection not implemented

Reference Description Part Number - Manufacturer

C1, C2, C3, C4 47 pF Capacitor Ceramic C0G 0402 5% 50 V GRM1555C1H470JA01 - Murata C5 100 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C104KA01 - Murata U1 SIM chip (M2M UICC Form Factor) Various Manufacturers

Table 19: Example of components for the connection to a single solderable SIM chip, with SIM detection not implemented

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2.5.2 Guidelines for SIM layout design

The layout of the SIM card interface lines (VSIM / UIM_PWR, SIM_CLK / UIM_CLK, SIM_IO / UIM_DATA, SIM_RST / UIM_RESET) may be critical if the SIM card is placed far away from the TOBY-L1 and MPCI-L1 series

modules or in close proximity to the RF antenna: these two cases should be avoided or at least mitigated as described below.

In the first case, the long connection can cause the radiation of some harmonics of the digital data frequency as any other digital interface. It is recommended to keep the traces short and avoid coupling with RF line or sensitive analog inputs.

In the second case, the same harmonics can be picked up and create self-interference that can reduce the sensitivity of LTE receiver channels whose carrier frequency is coincidental with harmonic frequencies. It is strongly recommended to place the RF bypass capacitors suggested in Figure 31 near the SIM connector.

In addition, since the SIM card is typically accessed by the end user, it can be subjected to ESD discharges. Add adequate ESD protection as suggested to protect module SIM pins near the SIM connector.

Limit capacitance and series resistance on each SIM signal to match the SIM specifications. The connections should always be kept as short as possible.

Avoid coupling with any sensitive analog circuit, since the SIM signals can cause the radiation of some harmonics of the digital data frequency.

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TOBY-L1 series

D+

D-

GND

USB_D+

USB_D-

GND

USB DEVICE

CONNECTOR

D1 D2

VBUS

TOBY-L1 series

D+

D-

GND

USB_D+

USB_D-

GND

USB HOST

PROCESSOR

MPCI-L1 series

D+

D-

GND

USB_D+

USB_D-

GND

USB DEVICE

CONNECTOR

VBUS

MPCI-L1

series

D+

D-

GND

USB_D+

USB_D-

GND

USB HOST

PROCESSOR

2.6 Data communication interfaces

2.6.1 Universal Serial Bus (USB)

2.6.1.1 Guidelines for USB circuit design

The USB_D+ and USB_D- lines carry the USB serial data and signaling. The lines are used in single ended mode for full speed signaling handshake, as well as in differential mode for high speed signaling and data transfer.

USB pull-up or pull-down resistors on USB_D+ and USB_D- as required by the Universal Serial Bus Revision 2.0 specification [4] are part of the USB pad driver and do not need to be externally provided.

External series resistors on USB_D+ and USB_D- as required by Universal Serial Bus Revision 2.0 specification [4] are also integrated and do not need to be externally provided.

Typical USB connection circuits are illustrated in Figure 33.

The USB interface pins ESD sensitivity rating is 1 kV (Human Body Model according to JESD22-A114F).

Higher protection level could be required if the lines are externally accessible on the application board. Higher protection level can be achieved by mounting a very low capacitance (i.e. less or equal to 1 pF) ESD protection (e.g. Tyco Electronics PESD0402-140 ESD protection device) on the lines connected to these pins, close to accessible points.

The USB_D+ and USB_D- pins of the modules can be directly connected to the USB host application processor without additional ESD protections if they aren’t externally accessible or according to EMC/ESD requirements.

Figure 33: USB Interface application circuit

Reference Description Part Number - Manufacturer

D1, D2 Very Low Capacitance ESD Protection PESD0402-140 - Tyco Electronics

Table 20: Component for USB application circuit

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35 µm

270 µm

760 µm

L1 Copper

L3 Copper

L2 Copper

L4 Copper

FR-4 dielectric

350

µm 400

µm400 µm350 µm400 µm

35 µm

1510 µm

L2 Copper

L1 Copper

FR-4 dielectric

740 µm 410 µm410 µm740 µm410 µm

2.6.1.2 Guidelines for USB layout design

The USB_D+ / USB_D- lines require accurate layout design to achieve reliable signaling at the high speed data rate (up to 480 Mb/s) supported by the USB serial interface.

The characteristic impedance of the USB_D+ / USB_D- lines is specified by the Universal Serial Bus Revision 2.0 specification [4]. The most important parameter is the differential characteristic impedance applicable for the odd-mode electromagnetic field, which should be as close as possible to 90 Ω differential. Signal integrity may be degraded if PCB layout is not optimal, especially when the USB signaling lines are very long.

Use the following general routing guidelines to minimize signal quality problems:

• Route USB_D+ / USB_D- lines as a differential pair

• Route USB_D+ / USB_D- lines as short as possible

• Ensure the differential characteristic impedance (Z

• Ensure the common mode characteristic impedance (Z

) is as close as possible to 90 Ω

) is as close as possible to 30 Ω

• Consider design rules for USB_D+ / USB_D- similar to RF transmission lines, being them coupled differential

micro-strip or buried stripline: avoid any stubs, abrupt change of layout, and route on clear PCB area

Figure 34 and Figure 35 provide two examples of coplanar waveguide designs with differential characteristic impedance close to 90 Ω and common mode characteristic impedance close to 30 Ω. The first transmission line can be implemented in case of 4-layer PCB stack-up herein described, the second transmission line can be implemented in case of 2-layer PCB stack-up herein described.

Figure 34: Example of USB line design, with Z0 close to 90 Ω and ZCM close to 30 Ω, for the described 4-layer board layup

Figure 35: Example of USB line design, with Z0 close to 90 Ω and ZCM close to 30 Ω, for the described 2-layer board layup

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TOBY

-L1 series

4V0

Network Indicator

GPIO1

DL1

2.7 General Purpose Input/Output (GPIO)

GPIOs for TOBY-L1 series modules are not supported by initial firmware release, except for the Network

Status Indication function over the GPIO1 pin only (for detail, refer to 1.14.1); these pins should be not driven by any external device. Check firmware release schedule.

GPIOs are not accessible for MPCI-L1 series modules.

2.7.1.1 Guidelines for GPIO circuit design

The following application circuits are suggested as general guideline for the usage of the GPIO pins available with the TOBY-L1 series modules, according to the related custom function.

• Network status indication:

The pin configured to provide the “Network status indication” function, the GPIO1, can be connected on the application board to an input pin of an application processor or can drive a LED by a transistor with integrated resistors to indicate network status.

Figure 36 describes an application circuit for a typical usage of the GPIOs off the TOBY-L1 series modules:

• Network indication function provided by the GPIO1 pin

Figure 36: GPIO application circuit

Reference Description Part Number - Manufacturer

DL1 LED Red SMT 0603 LTST-C190KRKT - Lite-on Technology Corporation T1 NPN BJT Transistor BC847 - Infineon

Table 21: Components for GPIO application circuit

10 kΩ Resistor 0402 5% 0.1 W

47 kΩ Resistor 0402 5% 0.1 W

820 Ω Resistor 0402 5% 0.1 W

Various manufacturers

Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 kΩ resistor on the

board in series to the GPIO.

ESD sensitivity rating of the GPIO pins is 1 kV (Human Body Model according to JESD22-A114).

Higher protection level could be required if the lines are externally accessible and it can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to accessible points.

Before a TOBY-L1 series module is fully ready to operate, no voltage drives from a host should apply to

any GPIO of the module.

If the GPIO pins are not used, they can be left unconnected on the application board.

2.7.1.1 Guidelines for GPIO layout design

The general purpose input/output pins are generally not critical for layout.

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MPCI-L1 series

3.3Vaux

W_DISABLE#

Power-on

push button

ESD

Open Drain Output

Application

Processor

MPCI-L1 series

3.3Vaux

W_DISABLE#

22kΩ

22KΩ

2.8 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)

Mini PCI Express specific signals: W_DISABLE# and LED_WWAN# are not available on TOBY-L1.

2.8.1.1 Guidelines for W_DISABLE# circuit design

As described in Figure 37, the MPCI-L1 series modules W_DISABLE# wireless disable input is equipped with an internal pull-up to the 3.3Vaux supply: an external pull-up resistor is not required and should not be provided.

If connecting the W_DISABLE# input to a push button, the pin will be externally accessible on the application device. According to EMC/ESD requirements of the application, an additional ESD protection device should be provided close to accessible point, as described in Figure 37, and Table 22.

ESD sensitivity rating of the W_DISABLE# pin is 1 kV (HBM according to JESD22-A114). Higher protection

level can be required if the line is externally accessible on the application board, e.g. if an accessible push button is directly connected to the W_DISABLE# pin, and it can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor) close to accessible point.

An open drain output is suitable to drive the W_DISABLE# input from an application processor as it is equipped with an internal pull-up to the 3.3Vaux supply as described in Figure 37.

A compatible push-pull output of an application processor can also be used. In any case, take care to set the proper level in all the possible scenarios to avoid an inappropriate disabling of the radio operations.

Figure 37: W_DISABLE# application circuit using a push button and an open drain output of an application processor

Reference Description Remarks

ESD Varistor for ESD protection CT0402S14AHSG - EPCOS

Table 22: Example of ESD protection component for the W_DISABLE# application circuit

If the W_DISABLE# functionality is not required by the application, the pin can be left unconnected.

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Open

Drain

Output

3V3

LED_WWAN#

MPCI-L1 series

2.8.1.2 Guidelines for LED_WWAN# circuit design

As described in Figure 38 and Table 23, the MPCI-L1 series modules LED_WWAN# active-low open drain output can be directly connected to a system-mounted LED to provide the Wireless Wide Area Network status indication as specified by the PCI Express Mini Card Electromechanical Specification [15].

Figure 38: LED_WWAN# application circuit

Reference Description Remarks

DL LED Green SMT 0603 LTST-C190KGKT - Lite-on Technology Corporation R

470 Ω Resistor 0402 5% 0.1 W

Various manufacturers

Table 23: Example of components for the LED_WWAN# application circuit

ESD sensitivity rating of the LED_WWAN# pin is 1 kV (Human Body Model according to JESD22-A114).

Higher protection level could be required if the line is externally accessible and it can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor) close to accessible point.

If the LED_WWAN# functionality is not required by the application, the pin can be left unconnected.

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TOBY-L1 series

RSVD

Test point

RSVD

Test point

2.9 Reserved pins (RSVD)

Pins reserved for future use, marked as RSVD, are not available on MPCI-L1 series.

TOBY-L1 series modules have pins reserved for future use. All the RSVD pins are to be left unconnected on the application board.

It is recommended to provide direct access to the RSVD pins 16, 17 and 49 on the application board by

means of an accessible test point directly connected to the related pin.

Figure 39: Application circuit for the reserved pins (RSVD)

2.10 Module placement

An optimized placement allows a minimum length RF line and closer path from DC source for VCC / 3.3aux. Make sure that the module, RF and analog parts / circuits are clearly separated from any possible source of

radiated energy, including digital circuits that can radiate some digital frequency harmonics, which can produce Electro-Magnetic Interference affecting module, RF and analog parts / circuits’ performance or implement proper countermeasures to avoid any possible Electro-Magnetic Compatibility issue.

Make sure that the module, RF and analog parts / circuits, high speed digital circuits are clearly separated from any sensitive part / circuit which may be affected by Electro-Magnetic Interference or employ countermeasures to avoid any possible Electro-Magnetic Compatibility issue.

Provide enough clearance between the module and any external part.

The heat dissipation during transmission at maximum power can raise the temperature of the module and

its environment, as the application board locations near and below the TOBY-L1 and MPCI-L1 series modules: avoid placing temperature sensitive devices close to the module.

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G H J1D F2

K M1 M1 M2

M1 M1 M3

Module placement outline

35.6 mm H

0.80 mm M2

5.20 mm

24.8 mm I1

1.50 mm M3

4.50 mm

2.40 mm I2

1.80 mm N

2.10 mm

2.25 mm J

0.30 mm O

1.10 mm

1.45 mm K

3.15 mm P1

1.10 mm

1.30 mm L

7.15 mm P2

1.25 mm

1.10 mm M1

1.80 mm P3

2.85 mm

2.11 TOBY-L1 series module footprint and paste mask

Figure 40 and Table 24 describe the suggested footprint (i.e. copper mask) layout for TOBY-L1 series modules. The proposed land pattern layout slightly reflects the modules’ pads layout, with most of the lateral pads designed wider on the application board (1.8 x 0.8 mm) than on the module (1.5 x 0.8 mm).

Figure 40: TOBY-L1 module suggest footprint (application board top view)

Parameter Value Parameter Value Parameter Value

Table 24: TOBY-L1 module suggest footprint dimensions

The Non Solder Mask Defined (NSMD) pad type is recommended over the Solder Mask Defined (SMD) pad type, implementing the solder mask opening 50 µm larger per side than the corresponding copper pad.

The suggested paste mask layout for TOBY-L1 series modules slightly reflects the copper mask layout described in Figure 40 and Table 24, as different stencil apertures layout for any specific pad is recommended:

• Blue marked pads: Paste layout reduced circumferentially about 0.025 mm to Copper layout

• Green marked pads: Paste layout enlarged circumferentially about 0.025 mm to Copper layout

• Purple marked pads: Paste layout one to one to Copper layout

The recommended solder paste thickness is 150 µm, according to application production process requirements.

These are recommendations only and not specifications. The exact mask geometries, distances and stencil

thicknesses must be adapted to the specific production processes (e.g. soldering etc.) of the customer.

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3.7 mm

Side View

Pin 1 Pin 51

ANT1ANT2

Top View

Hole GND HoleGND

30 mm

Pin 52 Pin 2

Bottom View

Hole

GND HoleGND

50.95 mm

2.12 MPCI-L1 series module installation

MPCI-L1 series modules are fully compliant to the 52-pin PCI Express Full-Mini Card Type F2 form factor, with top-side and bottom-side keep-out areas, with 50.95 mm nominal length, 30 mm nominal width and all the other dimensions as defined by the PCI Express Mini Card Electromechanical Specification [15] except for the card thickness (which nominal value is 3.7 mm), as described in Figure 41.

Figure 41: MPCI-L1 series mechanical description (Top, Side and Bottom views)

MPCI-L1 series modules are fully compliant to the 52-pin PCI Express Full-Mini card edge type system connector as defined by the PCI Express Mini Card Electromechanical Specification [15]. Table 25 describes some examples of 52-pin mating system connectors for the MPCI-L1 series PCI Express Full-Mini card modules.

Manufacturer Part Number Description

JAE Electronics MM60 series 52-circuit, 0.8 mm pitch, PCI Express Mini card edge female connector Molex 67910 series 52-circuit, 0.8 mm pitch, PCI Express Mini card edge female connector TE Connectivity / AMP 2041119 series 52-circuit, 0.8 mm pitch, PCI Express Mini card edge female connector FCI 10123824 series 52-circuit, 0.8 mm pitch, PCI Express Mini card edge female connector

Table 25: MPCI-L1 series PCI Express Full-Mini card compatible connector

It’s recommended to use the two mounting holes described in Figure 41 fixing (grounding) the MPCI-L1

modules to the main ground of the application board with suitable screws and fasteners.

Follow the recommendations provided by the connector manufacturer and the guidelines available in the

PCI Express Mini Card Electromechanical Specification [15] for the development of the footprint (i.e. the copper mask) PCB layout for the mating edge system connector. The exact geometries, distances and stencil thicknesses should be adapted to the specific production processes (e.g. soldering etc.).

Follow the recommendations provided by the connector manufacturer to properly insert and remove the

MPCI-L1 series modules.

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Correct

Wrong

Extraction Jig

RF Cable Assembly

U.FL Receptacle

MPCI-L1 series modules are equipped with two Hirose U.FL-R-SMT RF receptacles for ANT1 / ANT2 ports, which require a suitable mated RF plug from the same connector series as the examples listed in Table 17.

To mate the connectors, the mating axes of both connectors must be aligned. The "click" will confirm the fully mated connection. Do not attempt to insert on an extreme angle: insert the RF plug connectors vertically into the ANT1 / ANT2 RF receptacles of the modules, as described in Figure 42.

Figure 42: Precautions during RF connector mating

To unplug the RF cable assembly it is encouraged to use a suitable extraction tool for the RF connector, such as the Hirose U.FL-LP-N or the Hirose U.FL-LP(V)-N extraction jig, according to the RF cable assembly type used. Hook the end portion of the extraction jig onto the connector cover and pull off vertically in the direction of the connector mating axis, as described in Figure 43.

Figure 43: Precautions during RF connector extraction

Any attempt to unplug the RF connectors by pulling on the cable assembly without using a suitable extraction tool may result in damage and affect the RF performance.

Do not forcefully twist, deform, or apply any excessive pull force to the RF cables or damage the RF connectors, otherwise the RF performance may be reduced.

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2.13 Thermal guidelines

Modules’ operating temperature range is specified in TOBY-L1 Data Sheet [1] and MPC I-L1 Data Sheet

[2].

The most critical condition concerning module thermal performance is the uplink transmission at maximum power (data upload in connected-mode), when the baseband processor runs at full speed, radio circuits are all active and the RF power amplifier is driven to higher output RF power.

During transmission at maximum RF power the TOBY-L1 and MPCI-L1 series modules generate thermal power that can exceed 3 W: this is an indicative value since the exact generated power strictly depends on operating condition such as the number of allocated TX Resource Blocks, transmitting frequency band, etc. The generated thermal power must be adequately dissipated through the thermal and mechanical design of the application.

The spreading of the Module-to-Ambient thermal resistance (R condition. The overall temperature distribution is influenced by the configuration of the active components during the specific mode of operation and their different thermal resistance toward the case interface.

th,M-A) depends on the module operating

The Module-to-Ambient thermal resistance value and the related increase of module temperature will be

different for other mechanical deployments of the module, e.g. PCB with different dimensions and characteristics, mechanical shells enclosure, or forced air flow.

The increase of thermal dissipation, i.e. the Module-to-Ambient thermal resistance reduction, will decrease the temperature for internal circuitry of the modules for a given operating ambient temperature. This improves the device long-term reliability for applications operating at high ambient temperature.

A few hardware techniques may be used to reduce the Module-to-Ambient thermal resistance in the application:

• Connect each GND pin with solid ground layer of the application board and connect each ground area of

the multilayer application board with complete thermal via stacked down to main ground layer.

• Use the two mounting holes described in Figure 41 to fix (ground) the MPCI-L1 modules to the main ground

of the application board with suitable screws and fasteners.

• Provide a ground plane as wide as possible on the application board.

• Optimize antenna return loss, to optimize overall electrical performance of the module including a decrease

of module thermal power.

• Optimize the thermal design of any high-power components included in the application, such as linear

regulators and amplifiers, to optimize overall temperature distribution in the application device.

• Select the material, the thickness and the surface of the box (i.e. the mechanical enclosure of the application

device that integrates the module) so that it provides good thermal dissipation.

• Force ventilation air-flow within mechanical enclosure.

• Provide a heat sink component attached to the module top side, with electrically insulated / high thermal

conductivity adhesive, or on the backside of the application board, below the cellular module.

• Follow the thermal guidelines for integrating wireless wide area network mini card add-in cards, such as the

MPCI-L1 series modules, as outlined in the PCI Express Mini Card Electromechanical Specification [15].

For example, the Module-to-Ambient thermal resistance (R and the installation of a robust aluminum heat-sink on the back of the application board. The effect of lower

th,M-A can be observed from the module temperature variation.

th,M-A) is strongly reduced with forced air ventilation

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In addition to taking hardware design measures, the increase of module temperature can be moderated by the software implementation of the application:

• Enable module connected-mode for a given time period, and then disable it for a time period enough long

to properly mitigate temperature increase.

2.14 ESD guidelines

2.14.1 ESD immunity test overview

The immunity of devices integrating TOBY-L1 and MPCI-L1 series modules to Electro-Static Discharge (ESD) is part of the Electro-Magnetic Compatibility (EMC) conformity which is required for products bearing the CE marking, compliant with the R&TTE Directive (99/5/EC), the EMC Directive (89/336/EEC) and the Low Voltage Directive (73/23/EEC) issued by the Commission of the European Community.

Compliance with these directives implies conformity to the following European Norms for device ESD immunity: ESD testing standard CENELEC EN 61000-4-2 [6] and the radio equipment standards ETSI EN 301 489-1 [7], ETSI EN 301 489-7 [8], ETSI EN 301 489-24 [9], which requirements are summarized in Table 26.

The ESD immunity test is performed at the enclosure port, defined by ETSI EN 301 489-1 [7] as the physical boundary through which the electromagnetic field radiates. If the device implements an integral antenna, the enclosure port is seen as all insulating and conductive surfaces housing the device. If the device implements a removable antenna, the antenna port can be separated from the enclosure port. The antenna port includes the antenna element and its interconnecting cable surfaces.

The applicability of ESD immunity test to the whole device depends on the device classification as defined by ETSI EN 301 489-1 [7]. Applicability of ESD immunity test to the related device ports or the related interconnecting cables to auxiliary equipment, depends on device accessible interfaces and manufacturer requirements, as defined by ETSI EN 301 489-1 [7].

Contact discharges are performed at conductive surfaces, while air discharges are performed at insulating surfaces. Indirect contact discharges are performed on the measurement setup horizontal and vertical coupling planes as defined in CENELEC EN 61000-4-2 [6].

For the definition of integral antenna, removable antenna, antenna port, device classification refer to the

ETSI EN 301 489-1 [7]. For the contact and air discharges definitions refer to CENELEC EN 61000-4-2 [6].

Application Category Immunity Level

All exposed surfaces of the radio equipment and ancillary equipment in a representative configuration

Contact Discharge 4 kV

Air Discharge 8 kV

Table 26: Electro-Magnetic Compatibility ESD immunity requirements as defined by CENELEC EN 61000-4-2, ETSI EN 301 489-1, ETSI EN 301 489-7, ETSI EN 301 489-24

2.14.2 ESD immunity test of TOBY-L1 and MPCI-L1 series reference designs

Although Electro-Magnetic Compatibility (EMC) certification is required for customized devices integrating TOBY-L1 and MPCI-L1 series modules for R&TTED and European Conformance CE mark, EMC certification (including ESD immunity) has been successfully performed on TOBY-L1 and MPCI-L1 series modules reference design according to CENELEC EN 61000-4-2 [6], ETSI EN 301 489-1 [7], ETSI EN 301 489-7 [8], ETSI EN 301 489- 24 [9] European Norms.

The EMC / ESD approved u-blox reference designs consist of a TOBY-L1 and MPCI-L1 series module installed onto a motherboard which provides supply interface, SIM card and communication port. External antennas are connected to SMA connectors provided on the motherboard for the LTE antennas.

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blox reference design because it

The test is applicable only to equipment providing

blox reference design

The test is applicable only to equipment providing

blox reference design because it

The test is applicable only to equipment providing

Since external antennas are used, the antenna port can be separated from the enclosure port. The reference design is not enclosed in a box so that the enclosure port is not identified with physical surfaces. Therefore, some test cases cannot be applied. Only the antenna port is identified as accessible for direct ESD exposure.

u-blox TOBY-L1 and MPCI-L1 series reference design implement all the ESD precautions described in

section 2.14.3.

Table 27 reports the u-blox TOBY-L1 and MPCI-L1 series reference designs ESD immunity test results, according to test requirements stated in the CENELEC EN 61000-4-2 [6], ETSI EN 301 489-1 [7], ETSI EN 301 489-7 [8] and ETSI EN 301 489-24 [9].

Category Application Immunity Level Remarks

Contact Discharge to coupling planes (indirect contact discharge)

Contact Discharges to conducted surfaces (direct contact discharge)

Enclosure +4 kV / -4 kV

Enclosure port Not Applicable Test not applicable to u-blox reference design because it

does not provide enclosure surface. The test is applicable only to equipment providing conductive enclosure surface.

Antenna port +4 kV / -4 kV Test applicable to u-

provides antenna with conductive & insulating surfaces.

antenna with conductive surface.

Air Discharge at insulating surfaces

Table 27: Enclosure ESD immunity level of u-blox TOBY-L1 and MPCI-L1 series modules reference designs

Enclosure port Not Applicable Test not applicable to the u-

because it does not provide an enclosure surface.

insulating enclosure surface.

Antenna port +8 kV / -8 kV Test applicable to u-

provides antenna with conductive & insulating surfaces.

antenna with insulating surface.

2.14.3 ESD application circuits

The application circuits described in this section are recommended and should be implemented in the device integrating TOBY-L1 and MPCI-L1 series modules, according to the application board classification (see ETSI EN 301 489-1 [7]), to satisfy the requirements for ESD immunity test summarized in Table 26.

Antenna interface

The ANT1 and ANT2 pins of TOBY-L1 and MPCI-L1 series modules provide ESD immunity up to ±4 kV for direct Contact Discharge and up to ±8 kV for Air Discharge: no further precaution to ESD immunity test is needed, as implemented in the EMC / ESD approved reference design of TOBY-L1 and MPCI-L1 series modules.

The antenna interface application circuit implemented in the EMC / ESD approved reference designs of TOBY-L1 series modules is described in Figure 30.

RESET_N pin

The following precautions are suggested for the RESET_N and PERST# line of TOBY-L1 and MPCI-L1 series modules, depending on the application board handling, to satisfy ESD immunity test requirements:

• It is recommended to keep the connection line to RESET_N and PERST# as short as possible

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Maximum ESD sensitivity rating of the RESET_N and PERST# pin is 1 kV (Human Body Model according to JESD22-A114). Higher protection level could be required if the RESET_N or PERST# pin is externally accessible on the application board. The following precautions are suggested to achieve higher protection level:

• A general purpose ESD protection device (e.g. EPCOS CA05P4S14THSG varistor array or EPCOS

CT0402S14AHSG varistor) should be mounted on the RESET_N or PERST# line, close to accessible point

The RESET_N or PERST# application circuit implemented in the EMC / ESD approved reference designs of TOBYL1 and MPCI-L1 series modules is described in Figure 25 and Table 16 (section 2.3.2).

SIM interface The following precautions are suggested for TOBY-L1 and MPCI-L1 series modules SIM interface (VSIM /

UIM_PWR, SIM_RST / UIM_RESET, SIM_IO / UIM_DATA, SIM_CLK / UIM_CLK pins), depending on the

application board handling, to satisfy ESD immunity test requirements:

• A bypass capacitor of about 22 pF to 47 pF (e.g. Murata GRM1555C1H470J) must be mounted on the lines

connected to VSIM / UIM_PWR, SIM_RST / UIM_RESET, SIM_IO / UIM_DATA and SIM_CLK / UIM_CLK pins to assure SIM interface functionality when an electrostatic discharge is applied to the application board enclosure

• It is suggested to use as short as possible connection lines at SIM pins

Maximum ESD sensitivity rating of SIM interface pins is 1 kV (Human Body Model according to JESD22-A114). Higher protection level could be required if SIM interface pins are externally accessible on the application board. The following precautions are suggested to achieve higher protection level:

• A low capacitance (i.e. less than 10 pF) ESD protection device (e.g. Tyco Electronics PESD0402-140) should

be mounted on each SIM interface line, close to accessible points (i.e. close to the SIM card holder)

The SIM interface application circuit implemented in the EMC / ESD approved reference designs of TOBY-L1 and MPCI-L1 series modules is described in Figure 31 and Table 18 (section 2.5).

Other pins and interfaces

All the module pins that are externally accessible on the device integrating a TOBY-L1 or MPCI-L1 series module should be included in the ESD immunity test since they are considered to be a port as defined in ETSI EN 301 489-1 [7]. Depending on applicability, to satisfy ESD immunity test requirements according to ESD category level, all the module pins that are externally accessible should be protected up to ±4 kV for direct Contact Discharge and up to ±8 kV for Air Discharge applied to the enclosure surface.

The maximum ESD sensitivity rating of all the other pins of the module is 1 kV (Human Body Model according to JESD22-A114). Higher protection level could be required if the related pin is externally accessible on the application board. The following precautions are suggested to achieve higher protection level:

• USB interface: a very low capacitance (i.e. less or equal to 1 pF) ESD protection device (e.g. Tyco Electronics

PESD0402-140 ESD protection device) should be mounted on the USB_D+ and USB_D- lines, close to the accessible points (i.e. close to the USB connector)

• Other pins: a general purpose ESD protection device (e.g. EPCOS CA05P4S14THSG varistor array or EPCOS

CT0402S14AHSG varistor) should be mounted on the related line, close to accessible point

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4V0

GND

100nF

10nF 15pF

TOBY-L1 series

71 VCC

72 VCC

70 VCC

3 V_BCKP

23 RESET_N

Application

Processor

Open

Drain

Output

20 PWR_ON

100kΩ

Open

Drain

Output

GND GND

USB 2.0 Host

D-

D+

27 USB_D-

28 USB_D+

68pF

47pF

SIM Card

Connector

CCVCC (C1)

CCVPP (C6)

CCIO (C7)

CCCLK (C3)

CCRST (C2)

GND (C5)

47pF 47pF 100nF

59VSIM

57SIM_IO

56SIM_CLK

58SIM_RST

47pF

5V_INT

ESD ESD ESD ESD

ANT1

87ANT2

Primary

Antenna

Secondary

Antenna

21 GPIO1

4V0

Network Indicator

61 GPIO6

60 GPIO5

25 GPIO4

24 GPIO3

22 GPIO2

RSVD

2.15 Schematic for TOBY-L1 and MPCI-L1 series module integration

Figure 44 is an example of a schematic diagram where a TOBY-L1 series module is integrated into an application board, using all the available interfaces and functions of the module.

Figure 44: Example of schematic diagram to integrate TOBY-L1 series module in an application board, using all the interfaces

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3V3

GND

100nF

10nF

15pF

MPCI-L1 series

Application

Processor

Open

Drain

Output

PERST #

GND GND

USB 2.0 Host

D-

D+

27 USB_D-

28 USB_D+

68pF

Primary

Antenna

Secondary

Antenna

42 LED_WWAN#

20 W_DISA BLE #

Open

Drain

Output

24 3.3Vaux

39 3.3Vaux

2 3.3Vaux

41 3.3Vaux

52 3.3Vaux

3V3

47pF

SIM Card

Connector

CCVCC (C1)

CCVPP (C6)

CCIO (C7)

CCCLK (C3)

CCRST (C2)

GND (C5)

47pF47pF100nF

8 UIM_PWR

10 UIM_DATA

UIM_CLK

14 UIM_RESET

47pF

ESDESDESDESD

Figure 45 is an example of a schematic diagram where a MPCI-L1 series module is integrated into an application board, using all the available interfaces and functions of the module.

Figure 45: Example of schematic diagram to integrate a MPCI-L1 series module in an application board, using all the interfaces

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2.16 Design-in checklist

This section provides a design-in checklist.

2.16.1 Schematic checklist

The following are the most important points for a simple schematic check:

 DC supply must provide a nominal voltage at VCC / 3.3aux pin within the operating range limits.  DC supply must be capable of support with adequate margin the highest averaged current consumption

value in connected-mode conditions specified in TOBY-L1 series Data Sheet [1] and MPCI-L1 series Data Sheet [2].

 VCC / 3.3aux supply should be clean, with very low ripple/noise: provide the suggested bypass

capacitors, in particular if the application device integrates an internal antenna.

 For TOBY-L1 series modules, do not leave PWR_ON floating: fix properly the level, e.g. adding a proper

pull-up resistor to V_BCKP.

 For TOBY-L1 series modules, do not apply loads which might exceed the limit for maximum available

current from V_INT supply.

 Check that voltage level of any connected pin does not exceed the related operating range.  Check USB_D+ / USB_D- signal lines as well as very low capacitance ESD protections if accessible.  Capacitance and series resistance must be limited on each SIM signal to match the SIM specifications.  Insert the suggested capacitors on each SIM signal and low capacitance ESD protections if accessible.  For TOBY-L1 series modules, provide accessible test points directly connected to the following pins:

V_INT, PWR_ON, RESET_N and to RSVD pins 16, 17, 49 for diagnostic purpose.

 Provide proper precautions for ESD immunity as required on the application board.  All unused pins can be left unconnected except the PWR_ON pin (its level must be properly fixed, e.g.

adding a 100 kΩ pull-up to V_BCKP).

2.16.2 Layout checklist

The following are the most important points for a simple layout check:

 Check 50 Ω nominal characteristic impedance of the RF transmission line connected to the ANT1 and

the ANT2 pads (antenna RF interfaces).

 Ensure no coupling occurs between the RF interface and noisy or sensitive signals (primarily USB signals,

digital input/output signals, SIM signals, high-speed digital lines such as address and data lines).

 VCC / 3.3Vaux line should be wide and short. VCC regulator should be as close as possible to the

module.

 Route VCC / 3.3Vaux supply line away from sensitive analog signals.  Ensure proper grounding.  Optimize placement for minimum length of RF line and closer path from DC source for VCC / 3.3Vaux.  Keep routing short and minimize parasitic capacitance on the SIM lines to preserve signal integrity.  USB_D+ / USB_D- traces should meet the characteristic impedance requirement (90 Ω differential and

30 Ω common mode) and should not be routed close to any RF traces.

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2.16.3 Antenna checklist

 Two antennas (one connected to ANT1 pin / connector and one connected to ANT2 pin / connector)

must be used to support the Down-Link MIMO 2 x 2 radio technology as mandatory feature for LTE category 3 User Equipments (up to 100 Mb/s DL data rate) designed to operate on Verizon Wireless LTE 3GPP Band 4 / 13 network.

 Antenna termination should provide 50 Ω characteristic impedance with VSWR at least less than 3:1

(recommended 2:1) on operating bands in deployment geographical area.

 Follow the recommendations of the antenna producer for correct antenna installation and deployment

(PCB layout and matching circuitry).

 Follow the additional guidelines for products marked with the FCC logo (United States only) reported in

chapter 4.2.1

 Ensure high and similar efficiency for both the primary (ANT1) and the secondary (ANT2) antenna.  Ensure high isolation between the primary (ANT1) and the secondary (ANT2) antenna.  Ensure low Envelope Correlation Coefficient between the primary (ANT1) and the secondary (ANT2)

antenna: the 3D antenna radiation patterns should have radiation lobes in different directions.

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3 Handling and soldering

No natural rubbers, no hygroscopic materials or materials containing asbestos are employed.

3.1 Packaging, shipping, storage and moisture preconditioning

For information pertaining to reels, tapes or trays, Moisture Sensitivity levels (MSD), shipment and storage, as well as drying for preconditioning refer to the TOBY-L1 series Data Sheet [1] or the MPCI-L1 series Data Sheet [2] and the u-blox Package Information Guide [13].

3.2 Handling

The TOBY-L1 and MPCI-L1 series modules are Electro-Static Discharge (ESD) sensitive devices.

Ensure ESD precautions are implemented during handling of the module.

Electrostatic discharge (ESD) is the sudden and momentary electric current that flows between two objects at different electrical potentials caused by direct contact or induced by an electrostatic field. The term is usually used in the electronics and other industries to describe momentary unwanted currents that may cause damage to electronic equipment.

The ESD sensitivity for each pin of TOBY-L1 and MPCI-L1 series modules (as Human Body Model according to JESD22-A114F) is specified in the TOBY-L1 series Data Sheet [1] or the MPCI-L1 series Data Sheet [2].

ESD prevention is based on establishing an Electrostatic Protective Area (EPA). The EPA can be a small working station or a large manufacturing area. The main principle of an EPA is that there are no highly charging materials near ESD sensitive electronics, all conductive materials are grounded, workers are grounded, and charge build-up on ESD sensitive electronics is prevented. International standards are used to define typical EPA and can be obtained for example from International Electrotechnical Commission (IEC) or American National Standards Institute (ANSI).

In addition to standard ESD safety practices, the following measures should be taken into account whenever handling the TOBY-L1 and MPCI-L1 series modules:

• Unless there is a galvanic coupling between the local GND (i.e. the work table) and the PCB GND, then the

first point of contact when handling the PCB must always be between the local GND and PCB GND.

• Before mounting an antenna patch, connect ground of the device.

• When handling the module, do not come into contact with any charged capacitors and be careful when

contacting materials that can develop charges (e.g. patch antenna, coax cable, soldering iron,…).

• To prevent electrostatic discharge through the RF pin, do not touch any exposed antenna area. If there is any

risk that such exposed antenna area is touched in non ESD protected work area, implement proper ESD protection measures in the design.

• When soldering the module and patch antennas to the RF pin, make sure to use an ESD safe soldering iron.

For more robust designs, employ additional ESD protection measures on the application device integrating the TOBY-L1 and MPCI-L1 series modules, as described in section 2.14.3.

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3.3 Soldering

3.3.1 Soldering paste

"No Clean" soldering paste is strongly recommended for TOBY-L1 series modules, as it does not require cleaning after the soldering process has taken place. The paste listed in the example below meets these criteria.

Soldering Paste: OM338 SAC405 / Nr.143714 (Cookson Electronics) Alloy specification: 95.5% Sn / 3.9% Ag / 0.6% Cu (95.5% Tin / 3.9% Silver / 0.6% Copper)

95.5% Sn / 4.0% Ag / 0.5% Cu (95.5% Tin / 4.0% Silver / 0.5% Copper) Melting Temperature: 217 °C Stencil Thickness: 150 µm for base boards The final choice of the soldering paste depends on the approved manufacturing procedures. The paste-mask geometry for applying soldering paste should meet the recommendations in section 2.11

The quality of the solder joints on the connectors (’half vias’) should meet the appropriate IPC

specification.

3.3.2 Reflow soldering

A convection type-soldering oven is strongly recommended for TOBY-L1 series modules over the infrared

type radiation oven. Convection heated ovens allow precise control of the temperature and all parts will be heated up evenly, regardless of material properties, thickness of components and surface color.

Consider the "IPC-7530 Guidelines for temperature profiling for mass soldering (reflow and wave) processes, published 2001".

Reflow profiles are to be selected according to the following recommendations.

Failure to observe these recommendations can result in severe damage to the device!

Preheat phase

Initial heating of component leads and balls. Residual humidity will be dried out. Note that this preheat phase will not replace prior baking procedures.

• Temperature rise rate: max 3 °C/s If the temperature rise is too rapid in the preheat phase it may cause

excessive slumping.

• Time: 60 – 120 s If the preheat is insufficient, rather large solder balls tend to be

generated. Conversely, if performed excessively, fine balls and large balls will be generated in clusters.

• End Temperature: 150 - 200 °C If the temperature is too low, non-melting tends to be caused in

areas containing large heat capacity.

Heating/ reflow phase

The temperature rises above the liquidus temperature of 217 °C. Avoid a sudden rise in temperature as the slump of the paste could become worse.

• Limit time above 217 °C liquidus temperature: 40 - 60 s

• Peak reflow temperature: 245 °C

Cooling phase

A controlled cooling avoids negative metallurgical effects (solder becomes more brittle) of the solder and possible mechanical tensions in the products. Controlled cooling helps to achieve bright solder fillets with a good shape and low contact angle.

• Temperature fall rate: max 4 °C/s

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Preheat Heating Cooling

[°C] Peak Temp. 245°C [°C] 250 250

Liquidus Te mpe rature

217 217 200 200

40 - 60 s

End Temp.

ma x 4° C/s

150 - 200°C

150 150

ma x 3° C/s

60 - 120 s

100 Typical Leadfree 100

Soldering Profile

50 50

Elapsed time [s]

To avoid falling off, modules should be placed on the topside of the motherboard during soldering.

The soldering temperature profile chosen at the factory depends on additional external factors like choice of soldering paste, size, thickness and properties of the base board, etc.

Exceeding the maximum soldering temperature and the maximum liquidus time limit in the

recommended soldering profile may permanently damage the module.

Figure 46: Recommended soldering profile

TOBY-L1 series modules must not be soldered with a damp heat process.

3.3.3 Optical inspection

After soldering the TOBY-L1 series modules, inspect the modules optically to verify that the module is properly aligned and centered.

3.3.4 Cleaning

Cleaning the soldered modules is not recommended. Residues underneath the modules cannot be easily removed with a washing process.

• Cleaning with water will lead to capillary effects where water is absorbed in the gap between the baseboard

and the module. The combination of residues of soldering flux and encapsulated water leads to short circuits or resistor-like interconnections between neighboring pads. Water will also damage the sticker and the inkjet printed text.

• Cleaning with alcohol or other organic solvents can result in soldering flux residues flooding into the two

housings, areas that are not accessible for post-wash inspections. The solvent will also damage the sticker and the ink-jet printed text.

• Ultrasonic cleaning will permanently damage the module, in particular the quartz oscillators.

For best results use a "no clean" soldering paste and eliminate the cleaning step after the soldering.

3.3.5 Repeated reflow soldering

Only a single reflow soldering process is encouraged for boards with a module populated on it.

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3.3.6 Wave soldering

Boards with combined through-hole technology (THT) components and surface-mount technology (SMT) devices require wave soldering to solder the THT components. Only a single wave soldering process is encouraged for boards populated with the modules.

3.3.7 Hand soldering

Hand soldering is not recommended.

3.3.8 Rework

Rework is not recommended.

Never attempt a rework on the module itself, e.g. replacing individual components. Such actions

immediately terminate the warranty.

3.3.9 Conformal coating

Certain applications employ a conformal coating of the PCB using HumiSeal® or other related coating products. These materials affect the HF properties of the TOBY-L1 and MPCI-L1 series modules and it is important to

prevent them from flowing into the module. The RF shields do not provide 100% protection for the module from coating liquids with low viscosity; therefore

care is required in applying the coating.

Conformal Coating of the module will void the warranty.

3.3.10 Casting

If casting is required, use viscose or another type of silicon pottant. The OEM is strongly advised to qualify such processes in combination with the TOBY-L1 and MPCI-L1 series modules before implementing this in the production.

Casting will void the warranty.

3.3.11 Grounding metal covers

Attempts to improve grounding by soldering ground cables, wick or other forms of metal strips directly onto the EMI covers is done at the customer's own risk. The numerous ground pins should be sufficient to provide optimum immunity to interferences and noise.

u-blox gives no warranty for damages to the TOBY-L1 and MPCI-L1 series modules caused by soldering

metal cables or any other forms of metal strips directly onto the EMI covers.

3.3.12 Use of ultrasonic processes

TOBY-L1 and MPCI-L1 series modules contain components which are sensitive to Ultrasonic Waves. Use of any Ultrasonic Processes (cleaning, welding etc.) may cause damage to the module.

u-blox gives no warranty against damages to the TOBY-L1 and MPCI-L1 series modules caused by any

Ultrasonic Processes.

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4 Approvals

For the complete list of all the certification schemes approvals of TOBY-L1 and MPCI-L1 series modules

and the corresponding declarations of conformity, refer to the u-blox web-site (http://www.u-blox.com).

4.1 Product certification approval overview

Product certification approval is the process of certifying that a product has passed all tests and criteria required by specifications, typically called “certification schemes” that can be divided into three distinct categories:

• Regulatory certification

o Country specific approval required by local government in most regions and countries, such as:

 CE (Conformité Européenne) marking for European Union  FCC (Federal Communications Commission) approval for United States

• Industry certification

o Telecom industry specific approval verifying the interoperability between devices and networks:

 GCF (Global Certification Forum), partnership between European device manufacturers and

network operators to ensure and verify global interoperability between devices and networks

 PTCRB (PCS Type Certification Review Board), created by United States network operators to

ensure and verify interoperability between devices and North America networks

• Operator certification

o Operator specific approval required by some mobile network operator, such as:

 Verizon network operator in United States

Even if TOBY-L1 and MPCI-L1 series modules are approved under all major certification schemes, the application device that integrates TOBY-L1 and MPCI-L1 series modules must be approved under all the certification schemes required by the specific application device to be deployed in the market.

The required certification scheme approvals and related testing specifications differ depending on the country or the region where the device that integrates TOBY-L1 and MPCI-L1 series modules must be deployed, on the related vertical market of the device, on type, features and functionalities of the whole application device, and on the network operators where the device must operate.

The certification of the application device that integrates a TOBY-L1 or MPCI-L1 series module and the

compliance of the application device with all the applicable certification schemes, directives and standards are the sole responsibility of the application device manufacturer.

TOBY-L1 and MPCI-L1 series modules are certified according to all capabilities and options stated in the Protocol Implementation Conformance Statement document (PICS) of the module. The PICS, according to 3GPP TS

36.521-2 [5] options of a device.

and 3GPP TS 36.523-2 [12], is a statement of the implemented and supported capabilities and

The PICS document of the application device integrating a TOBY-L1 or MPCI-L1 series module must be

updated from the module PICS statement if any feature stated as supported by the module in its PICS document is not implemented or disabled in the application device, as for the following cases:

o if the automatic network attach is disabled by AT+COPS command

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4.2 Federal Communications Commission and Industry Canada notice

Federal Communications Commission (FCC) ID:

• R5Q-TOBYL100

Industry Canada (IC) Certification Number:

• 8595B-TOBYL100

The MPCI-L1 module integrates the TOBY-L1 module and therefore the two modules share the

same FCC ID and IC Number.

4.2.1 Declaration of Conformity – United States only

This device complies with Part 27 of the FCC rules. Operation is subject to the following two conditions:

• this device may not cause harmful interference.

• this device must accept any interference received, including interference that may cause undesired

operation.

Radiofrequency radiation exposure Information: this equipment complies with FCC radiation

exposure limits prescribed for an uncontrolled environment for fixed and mobile use conditions. This equipment should be installed and operated with a minimum distance of 20 cm between the radiator and the body of the user or nearby persons. This transmitter must not be colocated or operating in conjunction with any other antenna or transmitter except as authorized in the certification of the product.

The gain of the system antenna(s) used for the TOBY-L1 and MPCI-L1 series modules (i.e. the

combined transmission line, connector, cable losses and radiating element gain) must not exceed 10.7 dBi (for LTE band 13) and 6.57 dBi (for LTE band 4) for mobile and fixed or mobile operating configurations.

4.2.2 Modifications

The FCC requires the user to be notified that any changes or modifications made to this device that are not expressly approved by u-blox could void the user's authority to operate the equipment.

Manufacturers of mobile or fixed devices incorporating TOBY-L1 or MPCI-L1 series modules are

authorized to use the FCC Grants and Industry Canada Certificates of TOBY-L1 and MPCI-L1 series modules for their own final products according to the conditions referenced in the certificates.

The FCC Label shall in the above case be visible from the outside, or the host device shall bear a

second label stating:

"Contains FCC ID: R5Q-TOBYL100" resp.

The IC Label shall in the above case be visible from the outside, or the host device shall bear a

second label stating:

"Contains IC: 8595B-TOBYL100" resp.

Canada, Industry Canada (IC) Notices

This Class B digital apparatus complies with Canadian ICES-003 and RSS-139. Operation is subject to the following two conditions:

o this device may not cause interference o this device must accept any interference, including interference that may cause undesired

operation of the device

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Radio Frequency (RF) Exposure Information The radiated output power of the u-blox Cellular Module is below the Industry Canada (IC)

radio frequency exposure limits. The u-blox Cellular Module should be used in such a manner such that the potential for human contact during normal operation is minimized.

This device has been evaluated and shown compliant with the IC RF Exposure limits under mobile exposure conditions (antennas are greater than 20cm from a person's body).

This device has been certified for use in Canada. Status of the listing in the Industry Canada’s REL (Radio Equipment List) can be found at the following web address: http://www.ic.gc.ca/app/sitt/reltel/srch/nwRdSrch.do?lang=eng

Additional Canadian information on RF exposure also can be found at the following web address: http://www.ic.gc.ca/eic/site/smt-gst.nsf/eng/sf08792.html

IMPORTANT: Manufacturers of portable applications incorporating the TOBY-L1 or MPCI-L1

series modules are required to have their final product certified and apply for their own FCC Grant and Industry Canada Certificate related to the specific portable device. This is mandatory to meet the SAR requirements for portable devices.

Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.

Canada, avis d'Industrie Canada (IC)

Cet appareil numérique de classe B est conforme aux normes canadiennes ICES-003 et RSS-139. Son fonctionnement est soumis aux deux conditions suivantes:

o cet appareil ne doit pas causer d'interférence o cet appareil doit accepter toute interférence, notamment les interférences qui peuvent

affecter son fonctionnement Informations concernant l'exposition aux fréquences radio (RF) La puissance de sortie émise par l’appareil de sans fil u-blox Cellular Module est inférieure à la

limite d'exposition aux fréquences radio d'Industrie Canada (IC). Utilisez l’appareil de sans fil u-blox Cellular Module de façon à minimiser les contacts humains lors du fonctionnement normal.

Ce périphérique a été évalué et démontré conforme aux limites d'exposition aux fréquences radio (RF) d'IC lorsqu'il est installé dans des produits hôtes particuliers qui fonctionnent dans des conditions d'exposition à des appareils mobiles (les antennes se situent à plus de 20 centimètres du corps d'une personne).

Ce périphérique est homologué pour l'utilisation au Canada. Pour consulter l'entrée correspondant à l’appareil dans la liste d'équipement radio (REL - Radio Equipment List) d'Industrie Canada rendez-vous sur:

http://www.ic.gc.ca/app/sitt/reltel/srch/nwRdSrch.do?lang=fra Pour des informations supplémentaires concernant l'exposition aux RF au Canada rendez-vous

http://www.ic.gc.ca/eic/site/smt-gst.nsf/eng/sf08792.html

sur:

IMPORTANT: les fabricants d'applications portables contenant les modules TOBY-L1 ou MPCI-L1

modules doivent faire certifier leur produit final et déposer directement leur candidature pour une certification FCC ainsi que pour un certificat Industrie Canada délivré par l'organisme chargé de ce type d'appareil portable. Ceci est obligatoire afin d'être en accord avec les exigences SAR pour les appareils portables.

Tout changement ou modification non expressément approuvé par la partie responsable de la certification peut annuler le droit d'utiliser l'équipement.

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5 Product Testing

5.1 u-blox in-series production test

u-blox focuses on high quality for its products. All units produced are fully tested automatically in production line. Stringent quality control process has been implemented in the production line. Defective units are analyzed in detail to improve the production quality.

This is achieved with automatic test equipment (ATE) in production line, which logs all production and measurement data. A detailed test report for each unit can be generated from the system. Figure 47 illustrates typical production automatic test equipment (ATE) in production line.

The following typical tests are among the production tests.

• Digital self-test (firmware download, Flash firmware verification, IMEI programming)

• Measurement of voltages and currents

• Adjustment of ADC measurement interfaces

• Functional tests (USB interface communication, SIM card communication)

• Digital tests (GPIOs)

• Measurement and calibration of RF characteristics in all supported bands (such as receiver S/N verification,

frequency tuning of reference clock, calibration of transmitter and receiver power levels, etc.)

• Verification of RF characteristics after calibration (i.e. modulation accuracy, power levels, spectrum, etc. are

checked to ensure they are all within tolerances when calibration parameters are applied)

Figure 47: Automatic test equipment for module tests

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5.2 Test parameters for OEM manufacturer

Because of the testing done by u-blox (with 100% coverage), an OEM manufacturer does not need to repeat firmware tests or measurements of the module RF performance or tests over analog and digital interfaces in their production test.

However, an OEM manufacturer should focus on:

• Module assembly on the device; it should be verified that:

o Soldering and handling process did not damage the module components. o All module pins are well soldered on device board. o There are no short circuits between pins.

• Component assembly on the device; it should be verified that:

o Communication with host controller can be established. o The interfaces between module and device are working. o Overall RF performance test of the device including antenna

Dedicated tests can be implemented to check the device. For example, the measurement of module current consumption when set in a specified status can detect a short circuit if compared with a “Golden Device” result.

In addition, module AT commands can be used to perform functional tests (communication with host controller, check SIM card interface, GPIOs, etc.) and to perform RF performance tests. Please refer to the following two sections on this.

5.2.1 “Go/No go” tests for integrated devices

A ‘Go/No go’ test is typically to compare the signal quality with a “Golden Device” in a location with excellent network coverage and known signal quality. This test should be performed after data connection has been established. AT+CSQ is the typical AT command used to check signal quality in term of RSSI. Refer to TOBY-L1 / MPCI-L1 series AT Commands Manual [3] for detail usage of the AT command.

These kinds of test may be useful as a ‘go/no go’ test but not for RF performance measurements.

This test is suitable to check the functionality of communication with host controller, SIM card as well as power supply. It is also a means to verify if components at antenna interface are well soldered.

5.2.2 RF functional tests

Overall RF functional test of the device including antenna can be performed with basic instruments such as a spectrum analyzer (or an RF power meter) and a signal generator with the assistance of AT+UTEST command over AT command user interface.

The AT+UTEST command provides a simple interface to set the module to Rx or Tx test modes ignoring LTE signaling protocol. The command can set the module into:

• transmitting mode in a specified channel and power level in all supported modulation schemes and bands

• receiving mode in a specified channel to returns the measured power level in all supported bands

Refer to the TOBY-L1 / MPCI-L1 series AT Commands Manual [3] and to the End user test Application

Note [14], for AT+UTEST command syntax description and detail guide of usage.

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Application Board

TOBY-L1 series MPCI-L1 series

ANT1

Application

Processor

Commands

Wireless

Antenna

Spectrum

Analyzer

Power

Meter

Wideband

Antenna

Application Board

TOBY-L1 series MPCI-L1 series

ANT1

Application

Processor

Commands

Wireless

Antennas

Signal

Generator

OUT

Wideband

Antenna

ANT2

This feature allows the measurement of the transmitter and receiver power levels to check component assembly related to the module antenna interface and to check other device interfaces from which depends the RF performance.

To avoid module damage during transmitter test, a proper antenna according to module

specifications or a 50

Ω termination must be connected to ANT1 pin.

To avoid module damage during receiver test the maximum power level received at ANT1 and

ANT2 pins must meet module specifications.

The AT+UTEST command sets the module to emit RF power ignoring LTE signaling protocol. This emission

can generate interference that can be prohibited by law in some countries. The use of this feature is intended for testing purpose in controlled environments by qualified user and must not be used during the normal module operation. Follow instructions suggested in u-blox documentation. u-blox assumes no responsibilities for the inappropriate use of this feature.

Figure 48 illustrates a typical test setup for such RF functional test.

Figure 48: Setup with spectrum analyzer or power meter and signal generator for radiated measurements

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5.2.3 Connecting to Wireless Communication Test Set

Wireless Communication Test Sets as Base Station simulators can be helpful with the ability to make protocol, functional, throughput and RF measurements. To connect a TOBY-L1 or MPCI-L1 series modules to such a test set that can support the module’s signaling and RF specifications, the commands listed in Table 28 are required over the AT command user interface. Figure 49 demonstrates how the AT-commands sequence would appear, when they are issued through a supported terminal.

Refer to the TOBY-L1 / MPCI-L1 series AT Commands Manual [3] for further details on the AT-Commands

described in Table 28.

Step AT Command Syntax Response Description

1 AT%SETCFG="vzw_mode","0" OK Disable the IMS client. 2 AT%SETCFG="enable_test_mode","0" OK Disable test mode for conformance testing. By

3 AT%SETACFG=service.ECM.Enabled,true OK Enable the embedded connection manager. 4 AT%SETACFG=ecm.Mode.AutoConnectMode,true OK Enable “Auto Connect”. 5 AT%SETACFG=ecm.Mode.VzwImsTestMode,True OK Remove all the APNs in the PDP table and replace

6 AT%SETCFG="USIM_SIMULATOR","1" OK Enable USIM Simulator embedded in the module. 7 ATZ OK Saves the changes made in above steps into the

Table 28: Configuring TOBY-L1 and MPCI-L1 series modules to connect with a Wireless Communication Test Set

default it is disabled. This step is to ensure this mode is turned off.

it with a generic vzwinternet apn. This will permit end to end data connectivity.

NVRAM profile and resets the module.

Figure 49: Configuring TOBY-L1 and MPCI-L1 series module on a terminal to connect with a Wireless Communication Test Set

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Appendix

A Glossary

3GPP 3rd Generation Partnership Project

ADC Analog to Digital Converter

AP Application Processor

ASIC Application-Specific Integrated Circuit

AT AT Command Interpreter Software Subsystem, or attention

CSFB Circuit Switched Fall-Back

DC Direct Current

DCE Data Communication Equipment

DDC Display Data Channel interface

DL Down-link (Reception)

DRX Discontinuous Reception

DSP Digital Signal Processing

DTE Data Terminal Equipment

EMC Electro-magnetic Compatibility

EMI Electro-magnetic Interference

ESD Electro-static Discharge

ESR Equivalent Series Resistance

E-UTRA Evolved Universal Terrestrial Radio Access

FDD Frequency Division Duplex

FEM Front End Module

FOAT Firmware Over AT commands

FTP File Transfer Protocol

FW Firmware

QPSK / 16-QAM Quadrature Phase Shift Keying / 16-state Quadrature Amplitude Modulation

GND Ground

GNSS Global Navigation Satellite System

GPIO General Purpose Input Output

GPRS General Packet Radio Service

GPS Global Positioning System

HSIC High Speed Inter Chip

HTTP HyperText Transfer Protocol

HW Hardware

I/Q In phase and Quadrature

C Inter-Integrated Circuit interface

S Inter IC Sound interface

IP Internet Protocol

LCC Leadless Chip Carrier

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LDO Low-Dropout

LGA Land Grid Array

LNA Low Noise Amplifier

LPDDR Low Power Double Data Rate synchronous dynamic RAM memory

LTE Long Term Evolution

M2M Machine-to-Machine

N/A Not Applicable

N.A. Not Available

OTA Over The Air

PA Power Amplifier

PCM Pulse Code Modulation

PCN / IN Product Change Notification / Information Note

PCS Personal Communications Service

PFM Pulse Frequency Modulation

PMU Power Management Unit

PWM Pulse Width Modulation

RF Radio Frequency

RMII Reduced Media Independent Interface

RTC Real Time Clock

SAW Surface Acoustic Wave

SDIO Secure Digital Input Output

SIM Subscriber Identification Module

SMS Short Message Service

SMTP Simple Mail Transfer Protocol

SPI Serial Peripheral Interface

SRF Self Resonant Frequency

SSL Secure Socket Layer

TBD To Be Defined

TCP Transmission Control Protocol

TDD Time Division Duplex

TIS Total Isotropic Sensitivity

TP Test-Point

TRP Total Radiated Power

UART Universal Asynchronous Receiver-Transmitter

UDP User Datagram Protocol

UICC Universal Integrated Circuit Card

UL Up-link (Transmission)

UMTS Universal Mobile Telecommunications System

USB Universal Serial Bus

VCO Voltage Controlled Oscillator

VoLTE Voice over LTE

VSWR Voltage Standing Wave Ratio

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Revision history

Revision Date Name Status / Comments

R01 25-Oct-2013 rcam / jidu / sses Initial release

R02 21-Nov-2013 jidu / sses Updates to section 1.9 and other minor revisions

R03 10-Jul-2014 sses / clee Added MPCI-L1 System Integration details.

Added section 5.2.3 “Connecting to Wireless Communication Test Set” and other minor revisions; Updated driver support for Windows OS

R04 15-Oct-2014 pafe Document status changed to Advance Information

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Contact

For complete contact information visit us at www.u-blox.com

u-blox Offices

North, Central and South America

u-blox America, Inc.

Phone: +1 703 483 3180 E-mail: info_us@u-blox.com

Regional Office West Coast: Phone: +1 408 573 3640

E-mail: info_us@u-blox.com

Technical Support:

Phone: +1 703 483 3185 E-mail: support_us@u-blox.com

Headquarters Europe, Middle East, Africa

u-blox AG

Phone: +41 44 722 74 44 E-mail: info@u-blox.com Support: support@u-blox.com

Asia, Australia, Pacific

u-blox Singapore Pte. Ltd.

Phone: +65 6734 3811 E-mail: info_ap@u-blox.com Support: support_ap@u-blox.com

Regional Office Australia:

Phone: +61 2 8448 2016 E-mail: info_anz@u-blox.com Support: support_ap@u-blox.com

Regional Office China (Beijing):

Phone: +86 10 68 133 545 E-mail: info_cn@u-blox.com Support: support_cn@u-blox.com

Regional Office China (Shenzhen):

Phone: +86 755 8627 1083 E-mail: info_cn@u-blox.com Support: support_cn@u-blox.com

Regional Office India:

Phone: +91 959 1302 450 E-mail: info_in@u-blox.com Support: support_in@u-blox.com

Regional Office Japan:

Phone: +81 3 5775 3850 E-mail: info_jp@u-blox.com Support: support_jp@u-blox.com

Regional Office Korea:

Phone: +82 2 542 0861 E-mail: info_kr@u-blox.com Support: support_kr@u-blox.com

Regional Office Taiwan:

Phone: +886 2 2657 1090 E-mail: info_tw@u-blox.com Support: support_tw@u-blox.com

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Ublox TOBY-L1 series, MPCI-L1 series System Integration Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Preface

Contents

1 System description

1.1 Overview

1.2 Architecture

1.2.1 Internal blocks

RF section

Baseband and Power Management section

1.3 Pin-out

1.3.1 TOBY-L1 series pin assignment

1.3.2 MPCI-L1 series pin assignment

1.4 Operating modes

1.5 Supply interfaces

1.5.1 Module supply input (VCC or 3.3aux)

1.5.1.1 VCC or 3.3Vaux supply requirements

1.5.1.2 VCC and 3.3Vaux current consumption in connected-mode

1.5.1.3 VCC and 3.3Vaux current consumption in cyclic idle/active mode (power saving enabled)

1.5.1.4 VCC and 3.3Vaux current consumption in fixed active-mode (power saving disabled)

1.5.2 RTC supply output (V_BCKP)

1.5.3 Generic digital interfaces supply output (V_INT)

1.6 System function interfaces

1.6.1 Module power-on

1.6.2 Module power-off

1.6.3 Module reset

1.7 Antenna interface

1.7.1 Antenna RF interfaces (ANT1 / ANT2)

1.7.1.1 Antenna RF interfaces requirements

1.8 SIM interface

1.8.1 SIM card interface

1.9 Data communication interfaces

1.9.1 Universal Serial Bus (USB)

1.9.1.1 USB interface in Windows

1.9.1.2 USB interface in Linux

1.9.1.3 USB and power saving

1.10 General Purpose Input/Output (GPIO)

1.11 Mini PCIe specific signals (W_DISABLE#, LED_WWAN#)

1.12 Reserved pins (RSVD)

1.13 Not connected pins (NC)

1.14 System features

1.14.1 Network indication

1.14.2 Power saving

2 Design-in

2.1 Overview

2.2 Supply interfaces

2.2.1 Module supply (VCC or 3.3aux)

2.2.1.1 General guidelines for VCC supply circuit selection and design

2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator

2.2.1.3 Guidelines for VCC or 3.3Vaux supply circuit design using a Low Drop-Out linear regulator

2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable Li-Ion or Li-Pol battery

2.2.1.5 Guidelines for VCC supply circuit design using a primary (disposable) battery

2.2.1.6 Additional guidelines for VCC supply circuit design

2.2.1.7 Guidelines for external battery charging circuit

2.2.1.8 Guidelines for VCC or 3.3Vaux supply layout design

2.2.1.9 Guidelines for grounding layout design

2.2.2 RTC supply output (V_BCKP)

2.2.2.1 Guidelines for V_BCKP circuit design TOBY-L1 series modules provide the V_BCKP 2.5 V supply output, which can be mainly used to:

2.2.2.2 Guidelines for V_BCKP layout design V_BCKP supply requires careful layout: avoid injecting noise on this voltage domain as it may affect the stability

2.2.3 Digital I/O interfaces supply output (V_INT)

2.2.3.1 Guidelines for V_INT circuit design TOBY-L1 series modules provide the V_INT digital interfaces 1.8 V supply output, which can be mainly used to:

2.2.3.2 Guidelines for V_INT layout design V_INT supply output is generated by an integrated switching step-down converter. Because of this, it can be a

2.3 System functions interfaces

2.3.1 Module power-on (PWR_ON)

2.3.1.1 Guidelines for PWR_ON circuit design

2.3.1.2 Guidelines for PWR_ON layout design

2.3.2 Module reset (RESET_N and PERST#)

2.3.2.1 Guidelines for RESET_N and PERST# circuit design

2.3.2.2 Guidelines for RESET_N and PERST# layout design

2.4 Antenna interface

2.4.1 Antenna RF interfaces (ANT1 / ANT2)

2.4.1.1 General guidelines for antenna selection and design

2.4.1.2 Guidelines for antenna RF interface design

Guidelines for TOBY-L1 series ANT1 / ANT2 pins RF connection design

Guidelines for MPCI-L1 series ANT1 / ANT2 receptacles RF connection design

Guidelines for RF transmission line design

Guidelines for RF termination design

2.5 SIM interface