accelerate
Error! No text of specified style in
document.FW75 and C200
CDMA 1xRTT
Wireless Modules
System Integration Manual
locate, communicate,
Abstract
This document describes the features and the
integration of u-blox LISA-C200 and FW75 CDMA2000
1xRTT wireless modules.
These modules are complete and c ost efficient CDMA
solutions offering 153 kb/s data speed dual-band
800/1900 MHz data transmission technology in compact
form factors.
www.u-blox.com
Document Information
Error! No text of specified style in document. - System Integration Manual
Title
style in document. FW75 and C200
Error! No text of specified
Subtitle
Document type System Integration Manual
Document number CDMA-2X-11004-P1
Document status Objective Specification
Document status information
Objective
Specification
Advance
Information
Preliminary
Released This document contains the final product specification.
This document applies to the following products:
Name Type number Firmware version PCN / IN
LISA-C200 LISA-C200-00S n.a.
LISA-C200 LISA-C200-20S n.a.
FW75-C200 FW-C200-00S n.a.
FW75-C200 FW-C200-20S n.a.
CDMA 1xRTT
Wireless Modules
This document contains target values. Revised and supplementary data will be
published later.
This document contains data based on early testing. Revised and
supplementary data will be published later.
This document contains data from product verification. Revised and
supplementary data may be published later.
CDMA-2X-11004-P1
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This document and the use of any information contained therein, is subject to the acceptance of the u-blox terms and
conditions. They can be downloaded from www.u-blox.com.
u-blox makes no warranties based on the accuracy or completeness of the contents of this document and reserves the
right to make changes to specifications and product descriptions at any time without notice.
u-blox reserves all rig h ts to this document and the inform ation contained herein. Re production, use or disclosure to th ird
parties without express permission is strictly prohibited. Copyright © 2012, u-blox AG.
®
is a registered trademark of u-blox Holding AG in the EU and other countries.
u-blox
CDMA-2X-11004-P1 Objective Specification Page 3
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Preface
u-blox Technical Documentation
As part of our commitment to customer support, u-blox maintains an extensive volume of technical
documentation for our products. In addition to our product-specific technical data sheets, the
following manuals are available to assist u-blox customers in product design and development.
AT Commands Manual: This document provides the description of the supported AT commands by
the
Error! No text of specified style in document. module to verify all implemented functionalities.
System Integration Manual: This Manual provides hardware design instructions and information on
how to set up production and final product tests.
Application Note: document provides gene ral design instructions and information that applies to all
u-blox Wireless modules. See Section Related documents for a list of Application Notes related
to your Wireless Module.
How to use this Manual
The Error! No text of specified style in document. System Integration Manual provides the necessary
information to successfully design in and configure thes e u- blox wireless m odules.
This manual has a modular structure. It is not necessary to read it from the beginning to the end.
The following symbols are used to highlight important information within the manual:
An index finger points out key information pertaining to module integration and
performance.
A warning symbol indicates actions that could negatively impact or damage the module.
Questions
If you have any questions about u-blox Wireless Integration, please:
Read this manual carefully.
Contact our information service on the homepage
Read the questions and answers on our FAQ database on the homepage http://www.u-blox.com
http://www.u-blox.com
Technical Support
Worldwide Web
Our website (www.u-blox.com) is a rich pool of information. Product information, technical
documents and helpful FAQ can be accessed 24h a day.
By E-mail
Contact the nearest of the Technical Support offices by email. Use our servi ce pool email addresses
rather than any personal email address of our staff. This makes sure that your request is processed
as soon as possible. You will find the contact details at the end of the document.
Helpful Information when Contacting Technical Support
When contacting Technical Support please have the following information ready:
Module type (e.g. LISA-C200) and firmware version
Module configuration
Clear description of your question or the problem
CDMA-2X-11004-P1 Objective Specification Preface
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A short description of the application
Your complete contact details
CDMA-2X-11004-P1 Objective Specification Preface
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Contents
Preface ........................................ ......................................... ...................................... ........ 4
Contents ............................................... ............................................ ........................... ....... 6
1 System description ...................................................................................................... 8
1.1 Overview ................................................................................................................................................ 8
5.1 Architecture ........................................................................................................................................ 13
5.1.1 Functional blocks ........................................................................................................................ 13
5.2 Pin description ..................................................................................................................................... 14
5.3 Power management ......................................................................................................................... 17
5.3.1 Power supply circuit overview .................................................................................................. 17
5.3.2 Module supply (VCC) ................................................................................................................. 18
40.1.1 Current consumption profiles .................................................................................................... 36
40.2 System functions ............................................................................................................................. 37
40.2.1 Module power on ....................................................................................................................... 37
40.2.2 Module power off ....................................................................................................................... 39
40.2.3 Module reset ................................................................................................................................ 39
40.3 RF connection ................................................................................................................................. 39
40.4 Serial communication .................................................................................................................... 40
40.4.1 Serial interfaces configurati on .................................................................................................. 40
40.4.2 Asynchronous serial interface (UART) ...................................................................................... 41
40.4.3 USB interface ................................................................................................................................ 44
49.1.1 MUX Protocol (3GPP 27.010) ..................................................................................................... 48
49.2 Reserved pins (RSVD) ..................................................................................................................... 48
49.3 Schematic for LISA-C200 and FW75-C200 modules integration ............................................. 49
49.4 Approvals ......................................................................................................................................... 52
50 Design-In .................................... ................................ ................................ ................ 53
50.1 Design-in checklist .......................................................................................................................... 53
50.1.1 Schematic checklist ................................................................................................................... 53
50.1.2 Antenna checklist ....................................................................................................................... 55
50.2 Connectors (FW75) ......................................................................................................................... 56
50.2.1 FW75-C200 modem connector ................................................................................................ 56
50.2.2 FW75-C200 Board to Board host connector ........................................................................... 56
62.1.1 FW75-C200 RF antenna connector .......................................................................................... 58
74.1 Design Guidelines ........................................................................................................................... 61
74.1.1 Layout guidelines per pin function ........................................................................................... 61
74.2 Antenna guidelines ........................................................................................................................ 62
74.2.1 Antenna termination .................................................................................................................. 63
74.2.2 Antenna radiation ...................................................................................................................... 64
74.3 ESD immunity test precautions ..................................................................................................... 65
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74.3.1 General precautions .................................................................................................................. 66
89.1.1 Antenna interface precautions ................................................................................................ 72
89.1.2 Module interfaces precautions ................................................................................................ 72
90 Features description ........................................................................................... .... ... 73
90.1 Firmware (upgrade) Over The Air (FOTA ..................................................................................... 73
90.2 TCP/IP ................................................................................................................................................ 73
90.2.1 Multiple PDP contexts and sockets .......................................................................................... 73
90.3 HTTP ................................................................................................................................................... 73
Appendix .......................................................................................................................... 74
A Glossary ...................................................................................................................... 74
Related documents ......................................................................................................... 76
Revision history ................................................................................................................ 76
Contact ............................................................................................................................. 79
CDMA-2X-11004-P1 Objective Specification Contents
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1 System description
1.1 Overview
u-blox C200 wireless modules integrate a complete CDMA 1xRTT 153 kb/s packet data modem into
a single module solution. These modems are certifi ed to operate on US CDMA carriers. In addition
they can operate on carriers requiring SIM data card interface.
Comment [RC1]: We should review the
description. Today its called “CSIM”
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2 3G CDMA 2000 1xRTT Characteristics
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2 3G CDMA 2000 1xRTT Characteristics
3 CDMA Terrestrial Radi o Access Frequency Division Duplex
(FDD) operating mode
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2 3G CDMA 2000 1xRTT Characteristics
4 Dual-band support:
Band Class 0 – US Cellular
Band Class 1 – US PCS
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2 3G CDMA 2000 1xRTT Characteristics
5 CDMA Packet Switched data up to 153 kb/s DL/UL
Table 1: 3G CDMA 2000 1xRTT characteristics
These modems are US CDMA cer ti fi ed to s up p or t 1 xRTT data speeds on US CDMA carriers Sprint and
Verizon.
It is strictly a data modem for embedded solutions. Data communication is through 2 data
interfaces; 5 wires UART and Full Speed USB. The interfaces are intended to suppor t a vast quantity
of AT commands that will enable easy adoption to existing host application processors.
Power on is initiated by HW logic and Power down by HW logic and SW control.
LISA-C200 antenna interface is provided through a 50 ohm pad while F W75-C200 uses the popul ar
“U.FL” RF connector.
Other key components are the extensive SW AT commands meeting the needs of :
Carrier AT commands
Industry standard AT command both 3GPP and 3GPP2
u-blox AT Commands
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5.1 Architecture
Digit al and
analog voice (* * )
UART
USB
GPIOs (* * )
Po w er On
HW shutdown (*)
HW Reset (* * )
ANT
Vcc (Sup ply)
V_INT (I/O)
Diplexer
3G P A
RF
Transceiver
3G P A
SAW
LNA
LNA
P ower Management Unit
Filt er
19.2 MHz
32.768 kHz
Memory
Wireless
Base-band
Processor
(*): FW75
(**): LISA-C200
Figure 1: Block diagram
5.1.1 Functional blocks
Error! No text of specified style in document. modules consist of the following internal functional
blocks: RF front-end, RF transceiver, Baseband section and Power Management Unit.
RF Front-End
The Antenna connector is directly connected to the Diplexer which separates the 800 and 1900
MHZ bands. Each 800 & 1900 MHz RF chain are connected to their respective transceiver paths via
duplexers as shown in prior block diagram.
Each duplexer provides the f iltering and Rx/Tx pa th separation before conn ecting to the LNA and
RF PA devices.
A separate shield compartment houses the 800 MHZ and 1900 MHZ RF power amplifiers. This
compartment provides high Tx signal isolation, preventing de-sensing of the Rx frontend circuitry.
RF Transceiver
The transceiver includes the following key components:
Dual-band 800 & 1900 MHz CDMA transceiver, excluding the RF Power Amplifiers, duplexers and
diplexer.
19.2 MHz Crystal Oscillator
While operating, the RF transceiver performs direct up-conversion and down-conversion of the
baseband I/Q signals, with the RF voltage controlled gain amplifier being used to set the uplink TX
CDMA-2X-11004-P1 Objective Specification System description
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power. In the downlink path, the internal LNA enhances the RX sensitivity. An internal automatic
gain control amplifier optimizes the signal levels before delivering to the analog I/Q to baseband
for further digital processing.
In all the modes, Tx & Rx RF synthesizers are an on-chip voltage controlled oscillator are used to
generate the local oscillator signal.
The frequency reference to RF synthesizers are provided by an free running 19.2 MHz XO. The Rx
path locks and tracks to the base station carrier. An learning algorithm is implemented to capture
the temperature characteristic of the xtal, comparing the XO and carrier frequencies, while
measuring the thermistor in close proximity to the crystal oscillator. A lookup table is saved over
temperature and time. The known frequency difference of the free running crystal oscillator is
corrected in the baseband processor enabling quick acquisition.
Baseband section and power management unit
Another shielding section includes all the digital circuitry and the power supplies, basically the
following functional blocks:
Wireless baseband processor, a mixed signal ASIC which integrates:
Microprocessor for controller functions, CDMA upper layer software
ARM9 coprocessor and HW accelerator for CDMA Layer 1 control software and routines
Dedicated HW for peripherals control, as UART, USB, etc
Memory system in a Multi-Chip Package (MCP) integrating two devices:
NOR flash non-volatile memory
DDR SRAM volatile memory
Power Management Unit (PMU), used to derive all the system supply voltages from the module
supply VCC
5.2 Pin description
Table 2 provides a summary of the module pin names and descriptions.
For the exact specification including pin numbering and additional information see the LISA-
C200 Data Sheet [1] or the FW75-C200 Data Sheet [2].
Name Module
VCC All VCC V_INT FW75
LISA-C200
PWR_ON All POS I Power-on input PWR_ON pin has Internal pull-up resistor.
GPIO1..10 LISA-C200 GDI I/O GPIO GPIO6..10 Reserved.
RESET_N LISA-C200 ERS I External reset input RESET_N pin has Internal pull-up resistor.
HW_SHUTDOWN FW75 ERS I External Shutdown input
ANT All ANT - I/O RF antenna
CDMA-2X-11004-P1 Objective Specification System description
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Power
domain
-
-
I/O Description Remarks
Battery Input
O
Digital I/O Interfaces
supply output
Digital I/O Interfaces
O
supply output
Module supply input
V_INT = 2.85V (typical) generated by the
module when it is switched-on and the
RESET_N (external reset input pin) is not
forced to the low lev el.
V_INT = 1.8V (typical) generated by the
module when it is switched-on and the
RESET_N (external reset input pin) is not
forced to the low lev el.
HW_SHUTDOWN pin has Internal pull-up
resistor.
Error! No text of specified style in document. - System Integration Manual
Name Module
STATUS
RI All GDI O UART ring indicator Circuit 125 (RI) in ITU-T V.24.
CTS All GDI O UART clear to send Circuit 106 (CTS) in ITU-T V.24.
RTS All GDI I UART ready to send Circuit 105 (RTS) in ITU-T V.24.
RXD
TXD
VUSB_DET All USB I USB detect input Input for VBUS (5 V typical) USB supply sense.
USB_D- All USB I/O USB Data Line D-
USB_D+ All USB I/O USB Data Line D+
MIC_N LISA-C200 AUDIO I
MIC_P LISA-C200 AUDIO I
SPK_P LISA-C200 AUDIO O
SPK_N LISA-C200 AUDIO O Differential analog
PCM_SYNC LISA-C200 GDI O Digital Sync Digital Audio Sync pulse.
PCM_DO LISA-C200 GDI O Data Output Digital Audio Output.
PCM_CLK LISA-C200 GDI O Clock Output Digital Audio Clock Output.
PCM_DI LISA-C200 GDI I Data Input Digital Audio Input.
SCL LISA-C200 DDC O I2C bus clock line Fixed open drain. No internal pull-up.
FW75C200
All GDI O UART received data Circuit 104 (RxD) in ITU-T V.24.
All
Power
domain
GDI O LED Indicator
GDI I UART transmitted data Circuit 103 (TxD) in ITU-T V.24.
I/O Description Remarks
Indicated by buffered External LED :
Off – Not Powered
On – Powered, associated, and
authenticated but not transmitting or
receiving.
Slow Blink but not associated or
authenticated; searching.
Intermittent Blink - Activity proportional to
transmitting/receiving speed. For voice
applications, turning off and on the
intermittent blink based on the ring
pulse cycle can indicate a ring event.
Value at internal reset: T/PU.
Use to wake up host processor. The output
signal is active low.
Internal active pull-up to 1.8v .
Internal passive pull-up to 2.85v
Internal active pull-up to 1.8v .
Internal passive pull-up to 2.85v
Internal active pull-up to 1.8v .
Internal passive pull-up to 2.85v
Internal active pull-up to 1.8v .
Internal passive pull-up to 2.85v
90 nominal differentia l impedance
Pull-up or pull-down resistors and external
series resistors as required by the USB 2.0
high-speed specification [9] are part of the
USB pad driver and need not be provided
externally.
90 nominal differentia l impedance
Pull-up or pull-down resistors and external
series resistors as required by the USB 2.0
high-speed specification [9] are part of the
USB pad driver and need not be provided
externally.
Differential analog
audio input (negative)
Differential analog
audio input (positive)
Differential analog
audio output (positive)
audio output (neg a t ive)
Differential analog microphone input
Internal DC blocking 0.1uF capa citor.
Differential analog microphone input
Internal DC blocking 0.1uF capa citor.
Differential anal og audio output shared for
all path modes: earpiece, headset and
loudspeaker mode.
Differential anal og audio output shared for
all path modes: earpiece, headset and
loudspeaker mode.
Value at internal reset: T.
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Name Module
SDA LISA-C200 DDC I/O I
SIM_CLK All SIM O SIM/UIM clock Value at internal reset: L.
SIM_IO All SIM I/O SIM/UIM data
SIM_RST All SIM O SIM/UIM reset Value at internal reset: L.
VSIM A LL - O SIM/UIM supply output 1.80 V typical or 2.90 V typical generated by
SIM_GND
RSVD All RSVD - RESERVED pin Unless otherwise specified, leave
GND All GND - Ground
Table 2: Pin description summary
FW75C200
Power
domain
SIM/UIM O
I/O Description Remarks
2
C bus data line Fixed open drain. No internal pull-up.
UIM GROUND
Value at internal reset: T.
Internal 4.7 k pull-up resistor to VSIM.
Value at internal reset: L/PD.
the module according to the SIM ca r d type.
unconnected.
All GND pads must be connected to
ground.
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5.3 Power management
5.3.1 Power supply circuit overview
Error! No text of specified style in document. modules feature a power management concept
optimized for the most effi cient use of s upplied po wer. This is achi eved by hard ware design utilizin g
a power efficient circuit topology (Figure 2), and by power management software controlling the
module’s power saving mode.
VCC
VCC
VCC
V_INT
42 µF
2 x 3G Power Amplifier(s)
R F Transceiver
Li n ear
LDO
Sw itching
St e p - D o w n
Sw itching
St e p - D o w n
Li n ear
LDO
Li n ear
LDO
Li n ear
LDO
Power Management Unit
Li n ear
LDO
u-blox C200
Memory
NOR Fl ash
DDR SRAM
EBU
I/O
CORE
Analog
SI M
RTC
Baseband Processor
VSIM
4.7 µF 2.2 µF
Figure 2: Power management simplified block diagram
Pins with supply function are reported in Table 3.
CDMA-2X-11004-P1 Objective Specification System description
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Error! No text of specified style in document. modules must be supplied via the VCC pins. There is
only one main power supply input, available on the three
1
or five2 VCC pins that must be all
connected to the external power supply
The VCC pins are directly connected to the RF power amplifiers and to the integrated Power
Management Unit (PMU) within the module: all supply voltages needed by the module are
generated from the VCC supply by integrated voltage regulators.
When a 1.8 V or a 3 V SIM card type is connected, Error! No text of specified style in document.
modules automa tically supply the S IM card via the VSIM pin. Activation and deactivation of the
SIM interface with automa tic voltage s witch from 1.8 to 3 V is impl emented, in acc ordance to the
ISO-IEC 7816-3 specifications.
The 2.8 voltage domain used internally also available on the V_INT pin, to allow more economical
and efficient integration of the Error! No text of specified style in document. modules in the final
application.
The integrated Power Management Uni t al so p rov ides the c ontrol s tate m achin e for s ystem s tart up
and system shut down control.
5.3.2 Module supply (VCC)
Error! No text of specified style in document. modules must be supplied through the VCC pins by a
DC power supply. Voltages must be stable: during operation, the current drawn from VCC can vary
by some orders of magnitude.
Name Description Remarks
VCC Module power supply input
GND Ground GND pins are internally connected but a good (low
Table 3: Module supply pins
VCC pins are internally connected, but all the
available pads or pins must be connected to the
external supply in order to minimize the power loss due
to series resistance.
Clean and stable supply is required: low ripple and
low voltage drop must be guar an t eed.
Voltage provided must always be above the
minimum limit of the operating range.
impedance) external ground can improve RF
performance: all availabl e pads or pins must be
connected to grou nd.
Higher ESD protection level can be required if VCC is externally accessible on the
application board. Higher protection level can be achieved by mounting an ESD protection
(e.g. EPCOS CA05P4S14THSG varistor array) on the line connected to this pin.
The voltage provided to the VCC pins must be within the normal operating range limits as
specified in the LISA-C200 Data Sheet [1] or FW75-C200 Data Sheet [2]. Complete
functionality of the module is only guaranteed within the specified minimum and maximum
VCC voltage operating range.
Ensure that the input voltage at the VCC pins never drops below the minimum limit of the
operating range when the module is switched on.
Operation above the operating range maximum limit is not recommended and extended exposure
beyond it may affect device reliability.
1
LISA-C200.
2
FW75-C200.
CDMA-2X-11004-P1 Objective Specification System description
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Stress beyond the VCC absolute maximum ratings can cause permanent damage to the module: if
necessary, voltage spikes beyond VCC absolute maximum ratings must be restricted to
values within the specified limits by using appropriate protection.
When designing the power supply for the application, pay specific attention to power losses
and transients. The DC power supply must be able to provide a voltage profile to the VCC
pins with the following characteristics:
Voltage drop during transmission must be lower than 250 mV
Any degradation in power supply performance (due to losses, noise or transients) will
directly affect the RF performance of the module since the single external DC power source
indirectly supplies all the digital and analog interfaces, and also directly supplies the RF
power amplifier (PA).
5.3.2.1 VCC application circuits
Error! No text of specified style in document. modules must be supplied through the VCC pins by
one (and only one) proper DC power supply that must be one of the following:
Switching regulator
Low Drop-Out (LDO) linear regulator
Rechargeable Li-Ion battery
Primary (disposable) battery
Main Supply
Available?
No, portable device
Yes, alwa ys avai lable
Bat t er y
Li-Ion 3. 7 V
Main Supply
Volt age
>5 V?
Figure 3: VCC supply concept selection
No , less t ha n 5 V
Yes, greater than 5 V
Lin ear LDO
Reg u l a t o r
Swit ching
Step-Down
Reg u l a t o r
The switching step-down regulator is the typical choice when the available primary supply source
has a nominal voltage much higher (e.g. greater than 5 V) than the Error! No text of specified style
in document. modules operating supply voltage. The use of switching step-down provides the best
power efficiency for the overall application and minimizes current drawn from the main supply
source.
The use of an LDO linear regulator becomes convenient for a primary supply with a relatively low
voltage (e.g. less than 5 V). In this case the typical 90% efficiency of the switching regulator will
diminish the benefit of voltage step-down and no true advantage will be gained in input current
savings. On the opposite side, linear regulators are not recommended for high v oltage step-down
as they will dissipate a considerable amount of energy in thermal power.
If Error! No text of specified style in document. modules are deployed in a mobile unit where no
permanent primary supply source is available, then a battery will be required to provide VCC. A
standard 3-cell Lithium-Ion battery pack directly connected to VCC is the usual choice for batterypowered devices. During charging, batteries with Ni-MH chemistry typically reach a maximum
voltage that is above the maximum rating for VCC, and should therefore be avoided.
CDMA-2X-11004-P1 Objective Specification System description
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The use of primary (not rechargeable) battery is uncommon, since the most cells available are
seldom capable of delivering the peak current due to high internal resi stance.
Keep in mind that the use of batteries require s the i mplemen tation of a s uitabl e charger ci rcuit (not
included in Error! No text of specified style in document. modules). The charger ci rcuit should be
designed in order to prevent over-voltage on VCC beyond the upper limit of the absolute
maximum rating.
The following sections highlight some design aspects for each of the supplies listed above.
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Switching regulator
The character istics of the switchin g regulator connected to VCC pins should meet the following
requirements:
Power capability: the switching re gulator with its output c ircuit m ust be ca pable of providi ng a
voltage value to the VCC pins within the specified operating range and must be capable of
delivering greater than 1.2 Amps for safe design margin
Low output ripple: the switchin g regulator together wi th its output circuit mus t be capable of
providing a clean (low noise) VCC voltage p rofile
High switching frequency: for best performance and for smaller applications select a switching
frequency 600 kHz (since L-C output filter is typically smaller for high switching frequency). The
use of a switching regulator with a variable switching frequency or with a switching frequency
lower than 600 kHz must be carefully evaluated since this can produce noise in the VCC
voltage profile. An additional L-C low-pass filter between the switching regulator output to VCC
supply pins can mitigate the ripple on VCC, but adds extra voltage drop due to resistiv e losses
on series inductors
PWM mode operation: select preferably regulators with Pulse Width Modulation (PWM) mode.
While in active mode Pulse Frequency Modul ation (PFM) mode and PFM/ PWM mode transi tions
must be avoided to reduce the noise on the VCC voltage profile. Switching regulators able to
switch between low ripple PWM mode and high efficiency burst or PFM mode can be used,
provided the mode transition from idle mode (current consumption approximately 2 mA) to
active mode (current consumption approximately 100 mA): it is permissible to use a regulator
that switches from the PWM mode to the burst or PFM mode at an appropriate current
threshold (e.g. 60 mA)
Output voltage slope: ( not necessary for CDMA solution, ok to delete-RJC) the use of the soft
start function provided by some voltage regulator must be carefully evaluated, since the
voltage at the VCC pins must ramp from 2.5 V to 3.2 V within 1 ms to allow a proper switch-on of
the module
Figure 4 and the components listed in Table 4 show an example of a high reliability power supply
circuit, where the module VCC is supplied by a step-down switching regulator capable of
delivering 2.5 A current pulses with low output ripple and with fixed switching frequency in PWM
mode operation greater than 1 MHz. The use of a switching regulator is suggested when the
difference from the available supply rail to the VCC value is high: sw itching regula tors provide good
efficiency transforming a 12 V supply to the typical 3.8 V value of the VCC supply.
12V
u-blox C 2 00
4
VIN
5
R1
C1
R3
R2
C3C2
C5
C4
RUN
9
VC
10
RT
7
PG
6
SY N C
C6
U1
GND
BOOST
11
BD
C712
3
SW
8
FB
L1
D1
R4
R5
L2
C8 C9
VCC
GND
Figure 4: Suggested schematic design for the VCC voltage supply application circuit using a step-down reg u lator
CDMA-2X-11004-P1 Objective Specification System description
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6 Reference 7 Description 8 Part Number – Manufacturer
CDMA-2X-11004-P1 Objective Specification System description
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Error! No text of specified style in document. - System Integration Manual
6 Reference 7 Description 8 Part Number – Manufacturer
9 C1 10 47 µF Capacitor Aluminum 0810 50 V MAL215371479E3 – Vishay
C2 10 µF Capacitor Ceramic X7R 5750 15% 50 V C5750X7R1H106MB – TDK
C3 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 – Murata
C4 680 pF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71H681KA01 – Murata
C5 22 pF Capacitor Ceramic COG 0402 5% 25 V GRM1555C1H220JZ01 – Murata
C6 10 nF Capacitor Ceramic X7R 0402 10% 16 V GRM155R71C103KA01 – Murata
C7 470 nF Capacitor Ceramic X7R 0603 10% 25 V GRM188R71E474KA12 – Murata
C8 22 µF Capacitor Ceramic X5R 1210 10% 25 V GRM32ER61E226KE15 – Murata
C37
D1 Schottky Diode 40 V 3 A MBRA340T3G - ON Semiconductor
L1 10 µH Inductor 744066100 30% 3.6 A 744066100 - Wurth Electronics
L2 1 µH Inductor 7445601 20% 8.6 A 7445601 - Wurth Electronics
R1
R2
R3
R4
R5
U1 Step Down Regulator MSOP10 3.5 A 2.4 MHz LT3972IMSE#PBF - Linear Technology
Table 4: Suggested components for the VCC voltage supply application circuit using a step-down regulator
330 µF Capacitor Tantalum D_SIZE 6.3 V 45 m
470 k Resistor 0402 5% 0.1 W
15 k Resistor 0402 5% 0.1 W
22 k Resistor 0402 5% 0.1 W
390 k Resistor 0402 1% 0.063 W
100 k Resistor 0402 5% 0.1 W
T520D337M006ATE045 - KEMET
2322-705-87474-L - Yageo
2322-705-87153-L - Yageo
2322-705-87223-L - Yageo
RC0402FR-07390KL - Yageo
2322-705-70104-L - Yageo
Low Drop-Out (LDO) linear regulator
The characteristics of the LDO linear regulator connected to the VCC pins should meet the
following requirements:
Power capabilities: the LDO linear regulator with its output circuit must be capable of providing
a proper voltage value to the VCC pins and of delivering 1.2 A
Power dissipation: the power handling capability of the LDO linear regulator must be checked
to limit its junction temperature to th e maximum rated op erating range (i.e. check the v oltage
drop from the max input voltage to the min output voltage to evaluate the power dissipation of
the regulator)
Output voltage slope: ( not necessary for CDMA solution, ok to delete-RJC) the use of the soft
start function provided by some voltage regulators must be carefully evaluated, since the
voltage at the VCC pins must ramp from 2.5 V to 3.2 V within 1 ms to allow a proper switch-on of
the module
Figure 5 and the components listed in Table 5 show an example of a power supply circuit, where
the VCC module supply is provided by an LDO linear regulator capable of delivering 1.2 Amps, with
proper power handling capability. The use of a linear regulator is suggested when the difference
from the available supply rail and the VCC value is low: linear regulators prov ide high efficiency
when transforming a 5 V supply to the 3.6 V typical value of the VCC supply.
CDMA-2X-11004-P1 Objective Specification System description
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u-blox C200
5V
GND
4
U1
5
ADJ
3
C2R2
R3
VCC
GND
C1 R1
2
IN OUT
1
SHDN
Figure 5: Suggested schematic design for the VCC voltage supply application circuit using an LDO linear regulator
CDMA-2X-11004-P1 Objective Specification System description
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