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LARA-R2 series

Size-optimized LTE Cat 1 modules in single and multimode configurations

Data sheet

Abstract

Technical data sheet describing the LARA-R2 series multi-mode cellular modules. The modules are a cost efficient and performance optimized LTE Cat 1 / 3G / 2G multi-mode solution covering up to four LTE bands, up to two UMTS/HSPA bands and up to two GSM/EGPRS bands in the very small and compact LARA form factor.

LARA-R2 series - Data sheet

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Document information

Title

LARA-R2 series

Subtitle

Size-optimized LTE Cat 1 modules in single and multi-mode configurations

Document type

Data sheet

Document number

UBX-16005783

Revision and date

R27

30-Mar-2021

Disclosure restriction

C1-Public

Product status

Corresponding content status

Functional sample

Draft

For functional testing. Revised and supplementary data will be published later.

In development / Prototype

Objective specification

Target values. Revised and supplementary data will be published later.

Engineering sample

Advance information

Data based on early testing. Revised and supplementary data will be published later.

Initial production

Early production information

Data from product verification. Revised and supplementary data may be published later.

Mass production / End of life

Production information

Document contains the final product specification.

LARA-R2 series - Data sheet

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This document applies to the following products:

Product name

Type number

Modem version

Application version

PCN reference

Product status

LARA-R202

LARA-R202-02B-00

30.42

A01.00

UBX-17057959

Obsolete

LARA-R202-02B-01

30.42

A01.01

UBX-18018067

Obsolete

LARA-R202-02B-02

30.42

A01.02

UBX-18057549

Obsolete

LARA-R202-02B-03

30.44

A01.02

UBX-19011731

Mass production

LARA-R202-82B-00

30.53

A01.03

UBX-19043497

Mass production

LARA-R202-03B-00

30.55

A01.00

UBX-20027523

Mass production

LARA-R203

LARA-R203-02B-00

30.39

A01.00

UBX-17048311

Obsolete

LARA-R203-02B-01

30.39

A01.02

UBX-18018067

Obsolete

LARA-R203-02B-02

30.39

A01.03

UBX-18057549

Obsolete

LARA-R203-02B-03

30.41

A01.03

UBX-19011731

Mass production

LARA-R203-02B-34

30.54

A01.00

UBX-19056532

Mass production

LARA-R203-03B-00

30.55

A01.00

UBX-20027523

Mass production

LARA-R204

LARA-R204-02B-00

31.34

A01.00

UBX-17012269

Obsolete

LARA-R204-02B-02

31.40

A01.00

UBX-18046834

Mass production

LARA-R211

LARA-R211-02B-00

30.31

A01.00

UBX-17012270

Obsolete

LARA-R211-02B-01

30.49

A01.01

UBX-17054295

Obsolete

LARA-R211-02B-02

30.49

A01.02

UBX-18057549

End of life

LARA-R211-02B-03

30.49

A01.05

UBX-20012865

Mass production

LARA-R220

LARA-R220-62B-00

30.44

A01.03

UBX-17061668

Obsolete

LARA-R220-62B-01

30.44

A01.04

UBX-18050698

Obsolete

LARA-R220-62B-02

30.44

A01.05

UBX-18057549

Obsolete

LARA-R220-62B-03

30.44

A01.07

UBX-19029271

Mass production

LARA-R280

LARA-R280-02B-00

30.43

A01.01

UBX-17063950

Obsolete

LARA-R280-02B-01

30.43

A01.02

UBX-18018067

Obsolete

LARA-R280-02B-02

30.43

A01.03

UBX-18052020

Obsolete

LARA-R280-02B-03

30.43

A01.04

UBX-18057549

End of life

LARA-R280-02B-04

30.43

A01.06

UBX-19029271

Mass production

LARA-R281

LARA-R281-02B-00

30.49

A01.06

UBX-20035136

Mass production

u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this document. Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only permitted with the express written permission of u-blox. The information contained herein is provided “as is” and u-blox assumes no liability for its use. No warranty, either express or implied, is given, including but not limited to, with respect to the accuracy, correctness, reliability and fitness for a particular purpose of the information. This document may be revised by u-blox at any time without notice. For the most recent documents, visit www.u-blox.com. Copyright © u-blox AG.

LARA-R2 series - Data sheet

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Document information ................................................................................................................................ 2

Contents .......................................................................................................................................................... 4

1 Functional description ......................................................................................................................... 6

1.1 Overview ........................................................................................................................................................ 6

1.2 Product features ......................................................................................................................................... 7

1.3 Block diagram .............................................................................................................................................. 8

1.4 Product description .................................................................................................................................... 8

1.5 AT command support ..............................................................................................................................10

1.6 Supported features ..................................................................................................................................10

2 Interfaces .............................................................................................................................................. 12

2.1 Power management .................................................................................................................................12

2.1.1 Module supply input (VCC) .............................................................................................................12

2.1.2 RTC supply input / output (V_BCKP) ............................................................................................12

2.1.3 Generic digital interfaces supply output (V_INT) .......................................................................12

2.2 Antenna interfaces ...................................................................................................................................12

2.2.1 Antenna RF interfaces .....................................................................................................................12

2.2.2 Antenna detection ............................................................................................................................12

2.3 System functions ......................................................................................................................................13

2.3.1 Module power-on ..............................................................................................................................13

2.3.2 Module power-off ..............................................................................................................................13

2.3.3 Module reset ......................................................................................................................................14

2.3.4 Module / host configuration selection ..........................................................................................14

2.4 SIM ...............................................................................................................................................................14

2.4.1 SIM interface .....................................................................................................................................14

2.4.2 SIM detection ....................................................................................................................................14

2.5 Serial communication ..............................................................................................................................15

2.5.1 Main UART interface ........................................................................................................................15

2.5.2 Auxiliary UART interface .................................................................................................................16

2.5.3 USB interface .....................................................................................................................................17

2.5.4 HSIC interface ...................................................................................................................................18

2.5.5 DDC (I2C) interface ...........................................................................................................................18

2.5.6 SDIO interface ...................................................................................................................................18

2.6 Audio ............................................................................................................................................................18

2.7 Clock output ...............................................................................................................................................19

2.8 GPIO .............................................................................................................................................................19

3 Pin definition ........................................................................................................................................ 20

3.1 Pin assignment ..........................................................................................................................................20

4 Electrical specifications ................................................................................................................... 25

4.1 Absolute maximum rating.......................................................................................................................25

4.1.1 Maximum ESD ...................................................................................................................................25

4.2 Operating conditions ................................................................................................................................26

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4.2.1 Operating temperature range ........................................................................................................26

4.2.2 Supply/power pins ............................................................................................................................26

4.2.3 Current consumption .......................................................................................................................27

4.2.4 LTE RF characteristics ....................................................................................................................28

4.2.5 3G RF characteristics ......................................................................................................................30

4.2.6 2G RF characteristics ......................................................................................................................30

4.2.7 ANT_DET pin ......................................................................................................................................31

4.2.8 PWR_ON pin .......................................................................................................................................31

4.2.9 RESET_N pin ......................................................................................................................................31

4.2.10 SIM pins ..............................................................................................................................................31

4.2.11 USB pins .............................................................................................................................................32

4.2.12 HSIC pins ............................................................................................................................................32

4.2.13 DDC (I2C) pins ....................................................................................................................................32

4.2.14 Generic Digital Interfaces pins .......................................................................................................33

4.3 Parameters for ATEX applications ........................................................................................................35

5 Mechanical specifications ............................................................................................................... 36

6 Qualification and approvals............................................................................................................. 37

6.1 Reliability tests ..........................................................................................................................................37

6.2 Approvals ....................................................................................................................................................37

7 Product handling & soldering .......................................................................................................... 38

7.1 Packaging ...................................................................................................................................................38

7.1.1 Reels ....................................................................................................................................................38

7.1.2 Tapes ...................................................................................................................................................39

7.2 Moisture sensitivity levels .......................................................................................................................40

7.3 Reflow soldering ........................................................................................................................................40

7.4 ESD precautions ........................................................................................................................................40

8 Default settings .................................................................................................................................. 41

9 Labeling and ordering information ............................................................................................... 42

9.1 Product labeling .........................................................................................................................................42

9.2 Explanation of codes ................................................................................................................................43

9.3 Ordering information ................................................................................................................................44

Appendix ....................................................................................................................................................... 45

A Glossary ................................................................................................................................................. 45

Related documentation ........................................................................................................................... 46

Revision history .......................................................................................................................................... 47

Contact .......................................................................................................................................................... 48

LARA-R2 series - Data sheet

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1 Functional description

1.1 Overview

The LARA-R2 series comprises LTE Cat 1 / 3G / 2G multi-mode modules in the very small LARA LGA form-factor (26.0 x 24.0 mm, 100-pin) that are easy to integrate in compact designs.

LARA-R2 series modules support multi-band LTE-FDD Cat 1 radio access technology with seven regional variants. Each variant is designed for specific regional market requirements to allow development of cost efficient yet feature-rich products. The variants with 2G or 3G fallback provide connectivity in cases where LTE coverage is not yet available. This allows seamless operation during technology transition.

LARA modules are form-factor compatible with u-blox SARA, LISA and TOBY cellular module families: this facilitates easy migration from u-blox GSM/GPRS, CDMA, UMTS/HSPA, and other LTE modules, maximizes the investments of customers, simplifies logistics, and enables very short time-to-market.

The modules are ideal for applications that are transitioning to LTE from 2G and 3G, due to the long term availability and scalability of LTE networks.

With a range of interface options and an integrated IP stack, the modules are designed to support a wide range of data-centric applications. The unique combination of performance and flexibility make these modules ideally suited for medium speed M2M applications, such as smart energy gateways, remote access video cameras, digital signage, telehealth and telematics.

LARA-R2 series modules include product versions supporting Voice over LTE (VoLTE) and voice over 3G or 2G (CSFB) for applications that require voice, such as security and surveillance systems.

Thanks to the u-blox's CellLocate® technology, LARA-R2 series modules offer cost-effective location estimation based on information from surrounding cellular base stations. A positioning solution with CellLocate® and a u-blox GNSS module provides redundancy and accuracy that can be beneficial for numerous applications.

The temperature range of –40 °C to +85 °C guarantees operation in harsh environments and in very compact designs.

LARA-R2 modules are manufactured in ISO/TS 16949 certified sites, with the highest production standards and the highest quality and reliability. Each module is fully tested and inspected during production. Modules are qualified according to ISO 16750 – for systems installed in vehicles.

USB drivers and RIL software for Android are free of charge.

LARA-R2 series - Data sheet

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1.2 Product features

Model

Region

Radio access

technology

Positioning

Interfaces

Audio

Features

Grade

LTE bands

UMTS bands GSM bands GNSS via modem AssistNow Software CellLocate® UART

USB 2.0 HISC * SDIO * DDC (I

2C)

GPIOs Analog audio Digital audio Network indication VoLTE Antenna supervisor

Embedded TCP/UDP stack Embedded HTTP,FTP,TSL

1.2

FW update via

serial

FOTA client Rx Diversity Dual stack IPv4 / IPv6 Standard Professional Automotive

LARA-R202

North

America

2,4

5,12

850

1900

● ● ●

22 1 1 1 1 9

● ● ●3 ● ● ● ● ● ●

● ●

LARA-R203

North

America

2,4,12

● ● ●

22 1 1 1 1 9

● ● ●3 ● ● ● ● ● ●

● ●

LARA-R204

North

America

4,13 1 1 1 1 1 9

●

● ● ● ● ● ● ● ●

LARA-R211

EMEA

3,7,20

900

1800

●4

25 1 1 1 1 9

● ● ● ● ● ● ● ● ●

● ●

LARA-R220

Japan

1,19

● ● ●

1 1 1 1 1 9

●

● ● ● ● ● ● ● ●

LARA-R280

APAC

3,8,28

2100

● ● ●

1 1 1 1 1 9

● ● ■ ● ● ● ● ● ●

● ●

LARA-R281

EMEA

1,3,8

20,28

2100

● ● ●

1 1 1 1 1 9

● ● ■ ● ● ● ● ● ●

● ●

● = Available in any firmware

■ = CSFB only

* = HW ready

Table 1: LARA-R2 series main features summary

LTE band 12 is a superset including band 17: LTE band 12 is supported along with Multi-Frequency Band Indicator (MFBI)

Second UART not supported by LARA-R202-02B, LARA-R202-82B, or LARA-R203-02B product versions

AT&T certified with VoLTE

External GNSS control via modem, AssistNow Software and CellLocate® are not supported by LARA-R211-02B-00

Second UART is not supported by LARA-R211-02B-00, LARA-R211-02B-01, or LARA-R211-02B-02 product versions

LARA-R2 series - Data sheet

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1.3 Block diagram

Cellular

Base-band

processor

Memory

Power Management Unit

26 MHz

32.768 kHz

ANT1

transceiver

ANT2

V_INT (I/O)

V_BCKP (RTC)

VCC (Supply)

SIM

USB

HSIC

Power On

External Reset

PAs

LNAsFilters

Filter

Duplexer

Filters

PAs

LNAsFilter

Filter

Duplexer

Filters

LNAsFilter

Filters

LNAsFiltersFilter

Switch

DDC (I2C)

SDIO

UART

ANT_DET

Host Select

GPIO

Digital audio (I2S)

Figure 1: LARA-R2 series block diagram

☞ The "02B", "62B", "82B", and "03B" product versions of u-blox LARA-R2 series modules (meaning

the LARA-R202-02B, LARA-R202-82B, LARA-R202-03B, the LARA-R203-02B, LARA-R203-03B, the LARA-R204-02B, the LARA-R211-02B, the LARA-R220-62B, the LARA-R280-02B, and the LARA-R281-02B) do not support the following interfaces, which can be left unconnected and should not be driven by external devices:

o HSIC interface o SDIO interface o HOST_SELECT pin

1.4 Product description

LARA-R2 series modules provide LTE Cat 1 radio access technology, some variants with 2G or 3G multi-mode fallback.

• LARA-R202 is designed mainly for operation in America (on LTE and 3G networks)

• LARA-R203 is designed mainly for operation in America (on LTE networks)

• LARA-R204 is designed mainly for operation in America (on Verizon LTE network)

• LARA-R211 is designed mainly for operation in EMEA on LTE and 2G networks

• LARA-R220 is designed mainly for operation in Japan (on NTT DoCoMo LTE network)

• LARA-R280 is designed mainly for operation in APAC on LTE and 3G networks

• LARA-R281 is designed mainly for operation in EMEA on LTE and 3G networks

LARA-R2 series - Data sheet

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4G LTE

3G UMTS/HSDPA/HSUPA

2G GSM/GPRS/EDGE

3GPP Release 9 Long Term Evolution (LTE) Evolved UTRA (E-UTRA) Frequency Division Duplex (FDD) DL Rx diversity

3GPP Release 9 High Speed Packet Access (HSPA) UMTS Terrestrial Radio Access (UTRA) Frequency Division Duplex (FDD) DL Rx Diversity

3GPP Release 9 Enhanced Data rate GSM Evolution (EDGE) GSM EGPRS Radio Access (GERA) Time Division Multiple Access (TDMA) DL Advanced Rx Performance Phase 1

Band support6:

• LARA-R202:

• Band 12 (700 MHz)

• Band 5 (850 MHz)

• Band 4 (1700 MHz)

• Band 2 (1900 MHz)

Band support:

• LARA-R202:

• Band 5 (850 MHz)

• Band 2 (1900 MHz)

Band support:

• LARA-R203:

• Band 12 (700 MHz)

• Band 4 (1700 MHz)

• Band 2 (1900 MHz)

• LARA-R204:

• Band 13 (700 MHz)

• Band 4 (1700 MHz)

• LARA-R211:

• Band 20 (800 MHz)

• Band 3 (1800 MHz)

• Band 7 (2600 MHz)

• LARA-R211:

• E-GSM 900 MHz

• DCS 1800 MHz

• LARA-R220:

• Band 19 (850 MHz)

• Band 1 (2100 MHz)

• LARA-R280:

• Band 28 (700 MHz)

• Band 8 (900 MHz)

• Band 3 (1800 MHz)

• LARA-R280:

• Band 1 (2100 MHz)

• LARA-R281:

• Band 28 (700 MHz)

• Band 20 (800 MHz)

• Band 8 (900 MHz)

• Band 3 (1800 MHz)

• Band 1 (2100 MHz)

• LARA-R281:

• Band 1 (2100 MHz)

LTE Power Class

• Power Class 3 (23 dBm)

UMTS/HSDPA/HSUPA Power Class

• Class 3 (24 dBm)

GSM/GPRS (GMSK) Power Class

• Power Class 4 (33 dBm) for E-GSM band

• Power Class 1 (30 dBm) for DCS band

EDGE (8-PSK) Power Class

• Power Class E2 (27 dBm) for E-GSM band

• Power Class E2 (26 dBm) for DCS band

Data rate

• LTE category 1:

up to 10.3 Mbit/s DL, up to 5.2 Mbit/s UL

Data rate

• HSDPA category 8:

up to 7.2 Mbit/s DL

• HSUPA category 6:

up to 5.76 Mbit/s UL

Data rate8

• GPRS multi-slot class 33

, CS1-CS4,

up to 107 kbit/s DL, up to 85.6 kbit/s UL

• EDGE multi-slot class 33

, MCS1-MCS9,

up to 296 kbit/s DL, up to 236.8 kbit/s UL

Table 2: LARA-R2 series LTE, 3G and 2G characteristics

LARA-R2 modules provide Voice over LTE (VoLTE)10 as well as Circuit-Switched-Fall-Back (CSFB)11 audio capability.

LARA-R2 modules support all E-UTRA channel bandwidths for each operating band according to 3GPP TS 36.521-1 [11]

LTE band 12 is a superset including band 17: LTE band 12 is supported along with Multi-Frequency Band Indicator feature

GPRS/EDGE multislot class determines the number of timeslots available for upload and download and thus the speed at

which data can be transmitted and received, with higher classes typically allowing faster data transfer rates.

GPRS/EDGE multislot class 33 implies a maximum of 5 slots in DL (reception), 4 slots in UL (transmission) with 6 slots in total.

Not supported by LARA-R204-02B, LARA-R220-62B, LARA-R280-02B and LARA-R281-02B modules product versions.

Not supported by LARA-R203-02B, LARA-R203-03B, LARA-R204-02B and LARA-R220-62B modules product versions.

LARA-R2 series - Data sheet

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1.5 AT command support

The LARA-R2 series modules support AT commands according to 3GPP standards TS 27.007 [7], TS 27.005 [8] and the u-blox AT command extension.

☞ For the complete list of all supported AT commands and their syntax, see the u-blox AT commands

manual [1].

RIL (Radio Interface Layer) software for Android and Embedded Windows is available for LARA-R2 series modules free of charge; see the Android RIL source code application note [3] for the supported software deliveries and more information.

1.6 Supported features

Table 3 lists some of the main features supported by LARA-R2 series. For more details, see LARA-R2

series system integration manual [2] and u-blox AT commands manual [1].

Feature

Description

Network indication

GPIO configured to indicate the network status: registered home network, registered roaming, voice or data call enabled, no service. The feature can be enabled through the +UGPIOC AT command.

Antenna detection

The ANT_DET pin provides antenna presence detection capability, evaluating the resistance from ANT1 and ANT2 pins to GND by means of an external antenna detection circuit implemented on the application board. The antenna detection feature can be enabled through the +UANTR AT command.

Embedded TCP and UDP stack

Embedded TCP/IP and UDP/IP stack including direct link mode for TCP and UDP sockets. Sockets can be set in Direct Link mode to establish a transparent end to end communication with an already connected TCP or UDP socket via serial interface.

FTP, FTPS

File Transfer Protocol as well as Secure File Transfer Protocol (SSL encryption of FTP control channel) functionalities are supported by means of AT commands.

HTTP, HTTPS

Hyper-Text Transfer Protocol and Secure Hyper-Text Transfer Protocol (SSL encryption) functions are supported via AT commands. HEAD, GET, POST, DELETE and PUT operations are available.

Embedded TLS 1.2

With the support of X.509 certificates, Embedded TLS 1.2 provides server and client authentication, data encryption, data signature and enables TCP/IP applications like HTTPS and FTPS to communicate over a secured and trusted connection.

The feature can be configured and enabled by +USECMNG and +USECPRF AT commands.

DNS

Support for DNS functionality.

IPv4/Ipv6 dual-stack

Can move between Ipv4 and dual stack network infrastructures. Ipv4 and Ipv6 addresses can be used.

PPP

Ipv4/Ipv6 packets relaying through the cellular protocol stack performed on a Point-to-Point Protocol connection established with the external application via a serial interface (UART, MUX, or CDC-ACM). Transitions between Online command mode (OLCM) and PPP mode are supported.

BIP

Bearer Independent Protocol for Over-the-Air SIM provisioning. The data transfer to/from the SIM uses either an already active PDP context or a new PDP context established with the APN provided by the SIM card.

Multiple PDP contexts

Up to 8 PDP contexts can be activated, and multi secondary PDP contexts be associated to a primary PDP context.

VoLTE12 and CSFB13 audio capability

Voice over LTE (VoLTE) feature allows voice service over LTE bearer, via embedded IP Multimedia Subsystem (IMS).

Circuit Switched Fall-Back (CSFB) feature allows voice service over circuit switched infrastructure (3G or 2G).

Firmware update Over AT commands (FOAT)

Firmware module update over AT command interfaces. The feature can be enabled and configured through the +UFWUPD AT command.

Firmware update Over The Air (FOTA)

Embedded FOTA client to enable the Firmware module update over the cellular air interface. The feature can be enabled and configured through the +UFWINSTALL AT command.

Not supported by LARA-R204-02B, LARA-R220-62B, LARA-R280-02B and LARA-R281-02B modules product version.

Not supported by LARA-R203-02B, LARA-R203-03B, LARA-R204-02B, and LARA-R220-62B modules product version.

LARA-R2 series - Data sheet

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Feature

Description

LTE / 3G Rx Diversity

Improved cellular link quality and reliability on all operating bands, by means of 2 receiving antenna inputs.

GNSS via modem14

Full access to u-blox positioning chips and modules is available through a dedicated DDC (I2C) interface. This means that from any host processor, a single serial port can control the cellular module and the u-blox M8 positioning chip or module. For more details, see the GNSS implementation application note [4].

Embedded AssistNow Software14

Embedded AssistNow Online and AssistNow Offline clients are available to provide better GNSS performance and faster Time-to-First-Fix. An AT command can enable / disable the clients.

CellLocate

®14

Enables the estimation of device position based on the parameters of the mobile network cells visible to the specific device based on the CellLocate® database:

• Normal scan: only the parameters of the visible home network cells are sent CellLocate® is available via a set of AT commands for CellLocate® service configuration and position request.

Hybrid Positioning14

The current module position is provided by a u-blox positioning chip or module or the estimated position from CellLocate® depending on which method provides the best and fastest solution according to the user configuration. Hybrid positioning is available via a set of AT commands that allow the configuration and the position request.

Wi-Fi via modem15

Full access to Wi-Fi modules is available through a dedicated SDIO interface. This means that from any host processor a single serial port can control the cellular module and the short range communication module.

DTMF decoder16

During a voice call, the Dual-Tone Multi-Frequency detector analyses the RX speech (coming from remote party). The detected DTMF symbols can be output via the related URC.

The feature can be enabled and configured through the +UDTMFCFG +UDTMFD AT command.

In-Band Modem15

In-Band modem solution for eCall and ERA-GLONASS emergency call applications over cellular networks implemented according to the 3GPP TS 26.267 specification [10]. When activated, the in-vehicle eCall / ERA-GLONASS system (IVS) creates an emergency call carrying both voice and data (including vehicle position data) directly to the nearest Public Safety Answering Point (PSAP) to determine whether rescue services should be dispatched to the known position.

Smart Temperature Supervisor

Constant monitoring of the module board temperature:

• Warning notification when the temperature approaches an upper or lower predefined threshold

• Shutdown notified and forced when the temperature value is outside the specified range (shutdown

suspended in case of an emergency call in progress)

This feature can be enabled and configured via the +USTS AT command.

☞ The sensor measures the board temperature, which can differ from ambient temperature.

Power saving

The power saving configuration is disabled by default, but it can be enabled and configured using the +UPSV AT command. When the power saving is enabled, the module automatically enters the low power idle-mode whenever possible, reducing current consumption.

During idle-mode, the module processor core runs with the RTC 32 kHz reference clock, which is generated by the internal 32 kHz oscillator.

Fast Dormancy

The Fast Dormancy feature, defined in 3GPP Rel.8, allows reduction of current consumption and network utilization during periods of data inactivity. It can be activated and configured by +UFDAC and +UDCONF=61 AT commands.

LTE cDRX

Both the Long DRX Cycle and the Short DRX cycle are supported for LTE Connected Discontinuous Reception, allowing reduction of current consumption and LTE network utilization during periods of data inactivity.

ODIS17

OMA-DM IMEI Sync (ODIS) is an AT&T functionality required at the cellular module level and used to identify the end device operating inside the network.

Table 3: Some of the main features supported by LARA-R2 series modules

☞ u-blox is extremely mindful of user privacy. When a position is sent to the CellLocate

server, u-blox

is unable to track the SIM used or the specific device.

Not supported by LARA-R204-02B, LARA-R211-02B-00 product versions.

Not supported by "02B", "62B", "82B", and "03B" product versions.

Not supported by LARA-R202-82B, LARA-R204-02B, and LARA-R220-62B modules product version.

Not supported by "03B" product version and LARA-R203-02B-34

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2 Interfaces

2.1 Power management

2.1.1 Module supply input (VCC)

LARA-R2 series modules must be supplied through the three VCC pins by a DC power supply. Voltage must be stable, because during operation the current drawn from VCC can vary by some order of magnitude, especially due to the surging consumption profile of the GSM system (described in the LARA-R2 series system integration manual [2]). It is important that the system power supply circuit is able to support peak power.

LARA-R211 modules provide separate supply inputs over the three VCC pins:

• VCC pins #52 and #53 represent the supply input for the internal RF power amplifier, demanding

most of the total current drawn of the module when RF transmission is enabled during a voice/data call

• VCC pin #51 represents the supply input for the internal baseband Power Management Unit and

the internal transceiver, demanding a minor part of the total current drawn of the module when RF transmission is enabled during a voice/data call

2.1.2 RTC supply input / output (V_BCKP)

When VCC voltage is within the valid operating range, the internal Power Management Unit (PMU) supplies the Real Time Clock (RTC) and the same supply voltage is available on the V_BCKP pin. If the VCC voltage is under the minimum operating limit (e.g. during not powered mode), the V_BCKP pin can externally supply the RTC.

2.1.3 Generic digital interfaces supply output (V_INT)

LARA-R2 series modules provide a 1.8 V supply rail output on the V_INT pin, which is internally generated when the module is switched on. The same voltage domain is used internally to supply the generic digital interfaces of the modules. The V_INT supply output can be used in place of an external discrete regulator.

2.2 Antenna interfaces

2.2.1 Antenna RF interfaces

The modules have two RF pins with a characteristic impedance of 50 . The primary antenna pin (ANT1) supports both Tx and Rx, providing the main antenna interface, while the secondary antenna pin (ANT2) supports Rx only for the LTE / 3G Rx diversity configuration.

2.2.2 Antenna detection

The ANT_DET pin is an Analog to Digital Converter (ADC) input with a current source provided by LARA-R2 modules to sense the antenna(s) presence (as an optional feature). It evaluates the resistance from ANT1 and ANT2 pins to GND by means of an external antenna detection circuit implemented on the application board. For more details, see the LARA-R2 series system integration manual [2] and the u-blox AT commands manual [1].

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2.3 System functions

2.3.1 Module power-on

LARA-R2 series modules can be switched on in one of the following ways:

• Rising edge on the VCC input to a valid voltage for module supply, i.e. applying module supply: the

modules switch on if the VCC supply is applied, starting from a voltage value of less than 2.1 V, with a rise time from 2.3 V to 2.8 V of less than 4 ms, reaching a proper nominal voltage value within VCC operating range.

Alternately, for example if the fast rise time on VCC rising edge cannot be guaranteed by the application, the LARA-R2 series module can be switched on from not-powered mode as follows:

• RESET_N input pin is held low by the external application during the VCC rising edge, so that the

module will switch on when the external application releases the RESET_N input pin from the low logic level, after the VCC supply voltage stabilizes at its proper nominal value within the operating range

• PWR_ON input pin is held low by the external application during the VCC rising edge, so that the

module will switch on when the external application releases the PWR_ON input pin from the low logic level, after the VCC supply voltage stabilizes at its proper nominal value within the operating range

When the LARA-R2 series modules are in the power-off mode (i.e. properly switched off as described in section 2.3.2, with valid VCC module supply applied), they can be switched on as following:

• Low pulse on the PWR_ON pin, which is normally set high by an internal pull-up, for a valid time

period (see section 4.2.8). The PWR_ON line should be driven by open drain, open collector or contact switch.

• Rising edge on the RESET_N pin, i.e. releasing the pin from the low level, normally set high by an

internal pull-up. The RESET_N line should be driven by open drain, open collector or contact switch.

• RTC alarm, i.e. pre-programmed scheduled time by +CALA AT command.

2.3.2 Module power-off

LARA-R2 series can be properly switched off, saving current parameter settings in the module’s nonvolatile memory and performing a proper network detach, by:

• AT+CPWROFF command (see the u-blox AT commands manual [1]).

• Low pulse on the PWR_ON pin, which is normally set high by an internal pull-up, for a valid time

period (see section 4.2.8). The PWR_ON line should be driven by open drain, open collector or contact switch.

An abrupt under-voltage shutdown occurs on LARA-R2 series modules when the VCC supply is removed. If this occurs, it is not possible to store the current parameter settings in the module’s nonvolatile memory or to perform the proper network detach.

An abrupt shutdown occurs on LARA-R2 series modules when a low level is applied on the RESET_N pin, which is normally set high by an internal pull-up. If this occurs, it is not possible to store the current parameter settings in the module’s non-volatile memory and to perform the proper network detach.

An over-temperature or an under-temperature shutdown occurs on LARA-R2 modules when the temperature measured within the cellular module reaches the dangerous area, if the optional Smart Temperature Supervisor feature is enabled and configured by the dedicated AT command. For more details, see the LARA-R2 series system integration manual [2] and the u-blox AT commands manual [1], +USTS AT command.

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2.3.3 Module reset

LARA-R2 series modules can be reset (rebooted) by:

• AT+CFUN command (see the u-blox AT commands manual [1]). This causes an “internal” or

“software” reset of the module. The current parameter settings are saved in the module’s non-

volatile memory and a proper network detach is performed.

An abrupt “external” or “hardware” reset occurs when a low level is applied to the RESET_N pin, which is normally set high by an internal pull-up, for a valid time period (see the section 4.2.9). This causes

an “external” or “hardware” reset of the entire module, including the integrated power management

unit, except for the RTC internal block: the V_INT generic digital interfaces supply is switched off and all the digital pins are tri-stated, but the V_BCKP supply and the RTC block are enabled. The current parameter settings are not saved in the module’s non-volatile memory and a proper network detach is not performed. The RESET_N line should be driven by open drain, open collector or contact switch.

2.3.4 Module / host configuration selection

☞ The functionality of the HOST_SELECT pin is not supported by any current product versions.

The modules include one pin (HOST_SELECT) to select the module / host application processor configuration: the pin is available to select, enable, connect, disconnect and subsequently reconnect the HSIC interface.

2.4 SIM

2.4.1 SIM interface

A SIM card interface is provided on the VSIM, SIM_IO, SIM_CLK, SIM_RST pins: the high-speed SIM/ME interface is implemented as well as the automatic detection of the required SIM supporting voltage.

Both 1.8 V and 3 V SIM types are supported (1.8 V and 3 V ME). Activation and deactivation with automatic voltage switch from 1.8 V to 3 V is implemented, according to ISO-IEC 7816-3 specifications. The SIM driver supports the PPS procedure for baud-rate selection, according to the values proposed by the SIM card/chip.

2.4.2 SIM detection

LARA-R2 series modules provide the SIM detection function over the GPIO5 pin to sense the SIM card physical presence (as an optional feature) when the pin of the module is properly connected to the mechanical switch of the SIM car holder. For more details, see the LARA-R2 series system integration manual [2].

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2.5 Serial communication

LARA-R2 series modules provide the following serial communication interfaces:

• Main UART interface: serial interface available for the communication with a host application

processor (AT commands, data, FW update by means of FOAT), for FW update by means of the u-blox EasyFlash tool and for diagnostic.

• Auxiliary UART interface: serial interface available for AT commands communication with a host

application processor, and for diagnostic.

• USB interface: Universal Serial Bus 2.0 compliant interface available for the communication with

a host application processor (AT commands, data communication, FW update by means of the FOAT feature), for FW update by means of the u-blox EasyFlash tool and for diagnostic.

• HSIC interface: High-Speed Inter-Chip USB compliant interface available for the communication

with a host application processor (AT commands, data communication, FW update by means of the FOAT feature), for FW update by means of the u-blox EasyFlash tool and for diagnostic.

• DDC interface: I2C bus compatible interface available for the communication with u-blox GNSS

positioning chips/modules and with external I2C devices as an audio codec.

• SDIO interface: Secure Digital Input Output interface available for the communication with

compatible u-blox short range radio communication Wi-Fi modules.

2.5.1 Main UART interface

LARA-R2 series modules include a 9-wire unbalanced main primary Universal Asynchronous Receiver/ Transmitter serial interface (UART) for communication with an external application host processor (AT commands, data communication, FW update by means of the FOAT feature), for FW update by means of the u-blox EasyFlash tool and for diagnostic.

UART features are:

• Complete serial port with RS-232 functionality conforming to ITU-T V.24 recommendation [14],

with CMOS compatible levels (0 V for low data bit / ON state, 1.8 V for high data bit / OFF state)

• Data lines (RXD output, TXD input), hardware flow control lines (CTS output, RTS input), modem

status and control lines (DTR input, DSR output, DCD output, RI output) are provided

• Hardware flow control (default value), software flow control, or none flow control are supported

• Power saving indication available on the hardware flow control output (CTS line): the line is driven

to the OFF state when the module is not prepared to accept data by the UART interface

• Power saving control over the RTS input or the DSR input can be enabled via AT+UPSV command

(see the u-blox AT commands manual [1] and LARA-R2 series system integration manual [2])

• The following baud rates are supported: 9’600, 19’200, 38’400, 57’600, 115’200 (default baud rate

when autobauding is disabled), 230’400, 460’800, 921’600, 3’000’000, 3’250’000, 6’000’000 and 6’500’000 bit/s

• One-shot autobauding is supported and it is enabled by default: automatic baud rate detection is

performed only once, at module start up. After the detection, the module works at the fixed baud rate (the detected one) and the baud rate can only be changed via AT command (see the u-blox AT commands manual [1], +IPR).

• The following frame formats are supported: 8N2, 8N1 (default format when automatic frame

recognition is disabled), 8E1, 8O1, 7E1 and 7O1.

• One-shot automatic frame recognition is supported and it is enabled by default in conjunction with

automatic baud rate detection (autobauding): the detection is performed only once, at module start up. After the detection, the module works at the detected frame format and it can only be changed via AT command (see u-blox AT commands manual [1], +ICF).

The main primary UART serial interface can be conveniently configured through AT commands: see the u-blox AT commands manual [1] (+IPR, +ICF, +IFC, &K, \Q, +UPSV, +USIO AT commands) and LARA-R2 series system integration manual [2].

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2.5.1.1 Multiplexer protocol

LARA-R2 series modules include multiplexer functionality as per 3GPP TS 27.010 [9] on the main primary UART physical link. This is a data link protocol which uses HDLC-like framing and operates between the module (DCE) and the application processor (DTE), allowing a number of simultaneous sessions over the physical link (main primary UART): the user can concurrently use AT interface on one MUX channel and data communication on another MUX channel.

The following virtual channels are available (see the Mux implementation application note [5]):

• Channel 0: Multiplexer control

• Channel 1 – 5: AT commands / data connection

• Channel 6: GNSS data tunneling

☞ GNSS data tunneling is not supported by LARA-R204-02B, LARA-R211-02B-00 product versions.

2.5.2 Auxiliary UART interface

☞ The auxiliary UART interface is not supported by the "02B", "62B" and "82B" product versions of

the LARA-R202, LARA-R203, LARA-R204, LARA-R220, LARA-R280, and LARA-R281 modules, and by the "02B-00", "02B-01" and "02B-02" product versions of LARA-R211 modules.

LARA-R2 series modules include a 3-wire unbalanced auxiliary secondary Universal Asynchronous Receiver/Transmitter serial interface (AUX UART) for AT commands communication with an external application host processor, and for diagnostic (CSD or PSD are not supported).

The auxiliary secondary UART interface is disabled by default, and it can be enabled by dedicated AT command (see the u-blox AT commands manual [1], +USIO) as alternative function of the DDC (I2C) interface’ pins, in mutually exclusive way with the DDC (I2C) interface.

AUX UART features are:

• 3-wire serial port with RS-232 functionality conforming to ITU-T V.24 recommendation [14], with

CMOS compatible signal levels (0 V for low data bit / ON state, 1.8 V for high data bit / OFF state)

• Data lines (SCL pin as AUX UART data output, SDA pin as AUX UART data input)

• Software flow control, or none flow control (default value) are supported

• The following baud rates are supported: 9’600, 19’200, 38’400, 57’600, 115’200 (default baud rate

when autobauding is disabled), 230’400, 460’800, 921’600, 3’000’000, 3’250’000, 6’000’000 and 6’500’000 bit/s

• One-shot autobauding is supported and it is enabled by default: automatic baud rate detection is

• The following frame formats are supported: 8N2, 8N1 (default format when automatic frame

recognition is disabled), 8E1, 8O1, 7E1 and 7O1.

• One-shot automatic frame recognition is supported and it is enabled by default in conjunction with

• The Data Terminal Ready physical line is not available, but the logical Data Terminal Ready line is

always to ON state

The multiplexer protocol is not supported over the auxiliary secondary UART physical link.

The auxiliary secondary UART serial interface can be conveniently configured through AT commands: see the u-blox AT commands manual [1] (+IPR, +ICF, +IFC, &K, \Q, +UPSV, +USIO AT commands) and LARA-R2 series system integration manual [2].

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2.5.3 USB interface

LARA-R2 series modules include a USB High-Speed 2.0 compliant interface with a maximum 480 Mbit/s data rate according to the Universal Serial Bus specification revision 2.0 [15]. The module itself acts as a USB device and can be connected to any compatible USB host.

The USB interface is available for communication with a host application processor (AT commands, data communication, FW update by means of the FOAT feature), for FW update by means of the u-blox EasyFlash tool and for diagnostics.

The USB_D+ / USB_D- lines carry the USB data and signaling. The USB interface is automatically enabled by an external valid USB VBUS supply voltage (5.0 V typical) applied on the VUSB_DET pin.

The USB interface of LARA-R2 series modules makes several USB functions available with various capabilities and purposes, such as:

• CDC-ACM for AT commands and data communication

• CDC-ACM for GNSS tunneling

• CDC-ACM for SAP (SIM Access Profile)

• CDC-ACM for Diagnostic log

• CDC-NCM for Ethernet-over-USB

☞ CDC-ACM for GNSS tunneling is not supported by the LARA-R204-02B and LARA-R211-02B-00

product versions.

☞ CDC-ACM for SAP and CDC-NCM for Ethernet-over-USB are not supported by any current product

versions.

The USB interface provides the following set of USB functions:

• 6 CDC-ACM modem COM ports enumerated as follows:

o USB1: AT and data o USB2: AT and data o USB3: AT and data o USB4: GNSS tunneling o USB5: SAP (SIM Access Profile) o USB6: diagnostic log

The user can concurrently use the AT command interface on one CDC, and Packet-Switched / CircuitSwitched Data communication on another CDC.

For more details regarding USB capabilities, see the LARA-R2 series system integration manual [2].

USB drivers are available for the following Windows and Windows Embedded operating system platforms:

• Windows 7

• Windows 8

• Windows 8.1

• Windows 10

• Windows Embedded CE 6.0

• Windows Embedded Compact 7

• Windows Embedded Compact 2013

• Windows 10 IoT

LARA-R2 series modules are compatible with the standard Linux/Android USB kernel drivers.

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2.5.4 HSIC interface

☞ The HSIC interface is not supported by current product versions, except for diagnostic purposes.

LARA-R2 series modules include a USB High-Speed Inter-Chip compliant interface with a maximum 480 Mbit/s data rate as per the High-Speed Inter-Chip USB Electrical Specification Version 1.0 [16] and USB specification revision 2.0 [15]. The module itself acts as a device and can be connected to any compatible host.

The HSIC interface is available for communication with a host application processor (AT commands, data communication, FW update by means of the FOAT feature), for FW update by means of the u-blox EasyFlash tool and for diagnostics.

The HSIC interface consists of a bi-directional DDR data line (HSIC_DATA) for transmitting and receiving data synchronously with the bi-directional strobe line (HSIC_STRB).

The modules also include the HOST_SELECT pin to select the module / host application processor configuration: the pin is available to select, enable, connect, disconnect and subsequently reconnect the HSIC interface.

2.5.5 DDC (I2C) interface

☞ Dedicated AT commands for the communication with u-blox GNSS receivers over DDC (I2C) are

not supported by LARA-R204-02B and LARA-R211-02B-00 product versions.

LARA-R2 series modules include an I2C-bus compatible DDC interface (SDA, SCL)18 available to communicate with a u-blox GNSS receiver and with external I2C devices as an audio codec: LARA-R2 module acts as an I2C host which can communicate with I2C local devices in accordance with the I2C bus specifications [17].

For more details regarding DDC (I2C) interface usage and the integration with a u-blox GNSS receiver, see the LARA-R2 series system integration manual [2], GNSS implementation application note [4], and the I2C and GNSS AT commands description in the u-blox AT commands manual [1].

2.5.6 SDIO interface

☞ The SDIO interface is not supported by "02B", "62B", "82B", and "03B" product versions.

LARA-R2 series modules include a 4-bit Secure Digital Input Output interface (SDIO_D0, SDIO_D1, SDIO_D2, SDIO_D3, SDIO_CLK, SDIO_CMD) designed to communicate with external compatible u-blox short range radio communication Wi-Fi modules.

2.6 Audio

☞ Audio is not supported by LARA-R204-02B, LARA-R220-62B product versions.

LARA-R2 series modules support Voice over LTE (VoLTE) as well as Circuit-Switched Fall-Back (CSFB) from LTE to 3G or 2G radio bearer for providing audio services.

LARA-R2 series modules include a 4-wire I2S digital audio interface (I2S_TXD, I2S_RXD, I2S_CLK, I2S_WA) that can be configured by AT command in PCM mode (short synchronization signal) or in normal I2S mode (long synchronization signal) to transfer digital audio data to/from an external device as an audio codec.

SDA and SCL pins can be alternatively configured, in a mutually exclusive way, as auxiliary UART interface (AUX UART) on LARA-R2 series modules, except the "02B", "62B" and "82B" versions of the LARA-R202, LARA-R203, LARA-R204, LARA-R220, LARA-R280 and LARA-R281 modules, and the "02B-00", "02B-01" and "02B-02" versions of LARA-R211 modules.

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For more details regarding internal audio processing system capabilities, I2S digital audio interface possible configurations, usage and guideline for the integration with an external digital audio device as an audio codec, see the LARA-R2 series system integration manual [2] and the audio sections in the u-blox AT commands manual [1].

2.7 Clock output

LARA-R2 series modules provide digital clock output functionality on the GPIO6 pin, which can be configured to provide a 13 MHz or 26 MHz square wave. This is mainly designed to feed the clock input

of an external audio codec, as the clock output can be configured in “Audio dependent” mode

(generating the square wave only when the audio path is active), or in “Continuous” mode.

For more details, see the u-blox AT commands manual [1], +UMCLK AT command.

2.8 GPIO

LARA-R2 series modules include 9 pins (GPIO1-GPIO5, I2S_TXD, I2S_RXD, I2S_CLK, I2S_WA) that can be configured as general purpose input/output or to provide custom functions as summarized in the Table 4 (for further details, see the LARA-R2 series system integration manual [2] and the GPIO section in the u-blox AT commands manual [1]).

Function

Description

Default GPIO

Configurable GPIOs

Network status indication

Network status: registered home network, registered roaming, data transmission, no service

GPIO1-GPIO4

GNSS supply enable 19

Enable/disable the supply of u-blox GNSS receiver connected to the cellular module

GPIO2

GPIO1-GPIO4

GNSS data ready 19

Sense when u-blox GNSS receiver connected to the module is ready for sending data by the DDC (I2C)

GPIO3

GNSS RTC sharing 20

RTC synchronization signal to the u-blox GNSS receiver connected to the cellular module

GPIO4 SIM card detection

External SIM card physical presence detection

GPIO5

SIM card hot insertion/removal

Enable / disable SIM interface upon detection of external SIM card physical insertion / removal

GPIO5

I2S digital audio interface

I2S_RXD, I2S_TXD, I2S_CLK, I2S_WA

Wi-Fi control 20

Control of an external Wi-Fi chip or module

General purpose input

Input to sense high or low digital level

All

General purpose output

Output to set the high or the low digital level

GPIO4

All

Pin disabled

Tri-state with an internal active pull-down enabled

GPIO1

All

Table 4: GPIO custom functions configuration

Not supported by LARA-R204-02B and LARA-R211-02B-00 product versions: GPIO2 and GPIO3 pins are by default disabled

Not supported by "02B", "62B", "82B", and "03B" product versions

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3 Pin definition

3.1 Pin assignment

64 63 61 60 58 57 55 54

65 66 67 68 69 70

71 72 73 74 75 76

77 78

79 80

81 82

83 84

85 86 87 88 89 90

91 92 93 94 95 96

CTS

RTS

DCD

V_INT

V_BCKP

GND

GPIO6

RESET_N

GPIO1

PWR_ON

RXD

TXD

23 25 26 28 29 31 3224 27 30

5962 56

GND

DSR

DTR

GND

VUSB_DET

GND

USB_D-

USB_D+

RSVD

GND

GPIO2

GPIO3

SDA

SCL

GPIO4

GND

VCC

RSVD

I2S_TXD

I2S_CLK

SIM_CLK

SIM_IO

VSIM

GPIO5

VCC

SIM_RST

I2S_RXD

I2S_WA

GND

ANT_DET

ANT2

ANT1

LARA-R2

Top View

Pin 65-96: GND

99 100

97 98

RSVD

HSIC_STRB

HSIC_DATA

HOST_SELECT

SDIO_D2

SDIO_CMD

SDIO_D0

SDIO_D1

SDIO_D3

SDIO_CLK

Figure 2: LARA-R2 series pin assignment (top view)

Name

Power domain

I/O

Description

Remarks

GND - N/A

Ground

All the GND pins must be connected to ground

V_BCKP

I/O

Real Time Clock supply input/output

V_BCKP = 1.8 V (typical) generated by the module to supply the RTC when VCC voltage is within valid operating range.

See section 4.2.2 for detailed electrical specs.

GND - N/A

Ground

All the GND pins must be connected to ground

V_INT

Generic Digital Interfaces supply output

V_INT = 1.8 V (typical) generated by the module when it is switched-on and with the RESET_N pin is not forced low.

See section 4.2.2 for detailed electrical specs.

GND - N/A

Ground

All the GND pins must be connected to ground

DSR

GDI O UART data set ready

Circuit 107 (DSR) in ITU-T V.24. Output driver class A. PU/PD class a. Value at internal reset: T/PU. See section 4.2.14 for detailed electrical specs.

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Name

Power domain

I/O

Description

Remarks

GDI O UART ring indicator

Circuit 125 (RI) in ITU-T V.24. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

DCD

GDI O UART data carrier detect

Circuit 109 (DCD) in ITU-T V.24. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

DTR

GDI I UART data terminal ready

Circuit 108/2 (DTR) in ITU-T V. 24. Internal active pull-up to V_INT enabled. PU/PD class a. Value at internal reset: T/PU. See section 4.2.14 for detailed electrical specs.

RTS

GDI I UART ready to send

Circuit 105 (RTS) in ITU-T V.24. Internal active pull-up to V_INT enabled. PU/PD class a. Value at internal reset: T/PU. See section 4.2.14 for detailed electrical specs.

CTS

GDI O UART clear to send

Circuit 106 (CTS) in ITU-T V.24. Output driver class A. PU/PD class a. Value at internal reset: T/PU. See section 4.2.14 for detailed electrical specs.

TXD

GDI I UART data input

Circuit 103 (TxD) in ITU-T V.24. Internal active pull-up to V_INT enabled. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

RXD

GDI O UART data output

Circuit 104 (RxD) in ITU-T V.24. Output driver class A. PU/PD class a. Value at internal reset: T/PU. See section 4.2.14 for detailed electrical specs.

GND - N/A

Ground

All the GND pins must be connected to ground

PWR_ON

POS I Power-on input

Internal 10 k pull-up resistor to V_BCKP. See section 4.2.8 for detailed electrical specs.

GPIO1

GDI

I/O

GPIO

GPIO configurable as described in section 2.8. Output driver class A. PU/PD class b. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

VUSB_DET

VBUS

VBUS USB detect input

VBUS (5 V typical) USB supply generated by the host must be connected to this input pin to enable the USB interface. See section 4.2.11 for detailed electrical specs.

RESET_N

ERS I External reset input

Internal 10 k pull-up resistor to V_BCKP. See section 4.2.9 for detailed electrical specs.

GPIO6

GDI O Clock output

Configurable clock output (see section 2.7). Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

GND - N/A

Ground

All the GND pins must be connected to ground

HOST_SELECT

GDI

I/O

Selection of module / host processor configuration

Not supported by ‘02B’, ‘62B’, ‘82B’, ‘03B’ product versions. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

GND - N/A

Ground

All the GND pins must be connected to ground

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Name

Power domain

I/O

Description

Remarks

GPIO2

GDI

I/O

GPIO

GPIO configurable as described in section 2.8. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

GPIO3

GDI

I/O

GPIO

GPIO configurable as described in section 2.8. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

GPIO4

GDI

I/O

GPIO

GPIO configurable as described in section 2.8. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

SDA

DDC

I/O

I2C bus data line

Fixed open drain. See section 4.2.13 for detailed electrical specs.

GDI I AUX UART data input21

Circuit 103 (TxD) in ITU-T V.24. Internal active pull-up to V_INT enabled. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

SCL

DDC O I2C bus clock line

Fixed open drain. See section 4.2.13 for detailed electrical specs.

GDI O AUX UART data output21

Circuit 104 (RxD) in ITU-T V.24. Output driver class A. PU/PD class a. Value at internal reset: T/PU. See section 4.2.14 for detailed electrical specs.

USB_D-

USB

I/O

USB Data Line D-

90  nominal differential characteristic impedance. Pull-up, pull-down and series resistors as required by the

USB 2.0 specifications [15] are part of the USB pin driver, and need not be provided externally. See section 4.2.11 for detailed electrical specs.

USB_D+

USB

I/O

USB Data Line D+

90  nominal differential characteristic impedance. Pull-up, pull-down and series resistors as required by the

USB 2.0 specifications [15] are part of the USB pin driver, and need not be provided externally. See section 4.2.11 for detailed electrical specs.

GND - N/A

Ground

All the GND pins must be connected to ground

RSVD

N/A

RESERVED pin

Leave unconnected.

GND - N/A

Ground

All the GND pins must be connected to ground

RSVD

N/A

RESERVED pin

This pin has special function: it must be connected to GND to allow module to work properly.

I2S_WA

GDI

I/O / I/O

I2S word alignment / GPIO

Configurable as I2S word alignment, or as GPIO (see 2.8). I2S not supported by LARA-R204-02B, LARA-R220-62B. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

I2S_TXD

GDI

O / I/O

I2S transmit data / GPIO

Configurable as I2S transmit data out, or as GPIO (see 2.8). I2S not supported by LARA-R204-02B, LARA-R220-62B. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

The auxiliary UART interface is not supported by the ‘02B’, ‘62B’ and ‘82B’ versions of LARA-R202, LARA-R203, LARA-R204, LARA-R220, LARA-R280, and LARA-R281 modules, and by ‘02B-00’, ‘02B-01’ and ‘02B-02’ versions of LARA-R211 modules.

LARA-R2 series - Data sheet

UBX-16005783 - R27 Pin definition Page 23 of 48 C1-Public

Name

Power domain

I/O

Description

Remarks

I2S_CLK

GDI

I/O / I/O

I2S clock / GPIO

Configurable as I2S clock, or as GPIO (see 2.8). I2S not supported by LARA-R204-02B, LARA-R220-62B. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

I2S_RXD

GDI

I / I/O

I2S receive data / GPIO

Configurable as I2S receive data input, or as GPIO (see 2.8). I2S not supported by LARA-R204-02B, LARA-R220-62B. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

SIM_CLK

SIM O SIM clock

See section 4.2.9 for detailed electrical specs.

SIM_IO

SIM

I/O

SIM data

Internal 4.7 k pull-up resistor to VSIM. See section 4.2.9 for detailed electrical specs.

SIM_RST

SIM O SIM reset

See section 4.2.9 for detailed electrical specs.

VSIM

- O SIM supply output

VSIM = 1.80 V typical or 2.90 V typical generated by the module according to the external SIM card/chip type. See section 4.2.2 for detailed electrical specs.

GPIO5

GDI

I/O

GPIO

Configurable for SIM card detection, or as GPIO (see 2.8). Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

GND - N/A

Ground

All the GND pins must be connected to ground

SDIO_D2

GDI

I/O

SDIO serial data [2]

SDIO not supported by ‘02B’, ‘62B’, ‘82B’, ‘03B’ versions. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

SDIO_CLK

GDI O SDIO serial clock

SDIO not supported by ‘02B’, ‘62B’, ‘82B’, ‘03B’ versions. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

SDIO_CMD

GDI

I/O

SDIO command

SDIO not supported by ‘02B’, ‘62B’, ‘82B’, ‘03B’ versions. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

SDIO_D0

GDI

I/O

SDIO serial data [0]

SDIO not supported by ‘02B’, ‘62B’, ‘82B’, ‘03B’ versions. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

SDIO_D3

GDI

I/O

SDIO serial data [3]

SDIO not supported by ‘02B’, ‘62B’, ‘82B’, ‘03B’ versions. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

SDIO_D1

GDI

I/O

SDIO serial data [1]

SDIO not supported by ‘02B’, ‘62B’, ‘82B’, ‘03B’ versions. Output driver class A. PU/PD class a. Value at internal reset: T/PD. See section 4.2.14 for detailed electrical specs.

GND - N/A

Ground

All the GND pins must be connected to ground

VCC - I

Module supply input

Supply for BB part on LARA-R211 modules. Supply for BB part and RF PA on other LARA-R2 modules. All VCC pins must be connected to external supply. See sections 4.2.2 and 4.2.3 for detailed specs.

LARA-R2 series - Data sheet

UBX-16005783 - R27 Pin definition Page 24 of 48 C1-Public

Name

Power domain

I/O

Description

Remarks

VCC - I

Module supply input

Supply for RF PA on LARA-R211 modules. Supply for BB part and RF PA on other LARA-R2 modules. All VCC pins must be connected to external supply. See sections 4.2.2 and 4.2.3 for detailed specs.

VCC - I

Module supply input

Supply for RF PA on LARA-R211 modules. Supply for BB part and RF PA on other LARA-R2 modules. All VCC pins must be connected to external supply. See sections 4.2.2 and 4.2.3 for detailed specs.

GND - N/A

Ground

All the GND pins must be connected to ground

GND - N/A

Ground

All the GND pins must be connected to ground

ANT1

ANT

I/O

Primary antenna

50  nominal characteristic impedance. Main Tx / Rx antenna interface. See section 4.2.4 / 4.2.6 for details.

GND

N/A

Ground

All GND pins must be connected to ground.

GND

N/A

Ground

All GND pins must be connected to ground.

ANT_DET

ADC

Antenna detection

Antenna presence detection function. See section 4.2.7 for detailed electrical specs.

GND

N/A

Ground

All GND pins must be connected to ground.

GND

N/A

Ground

All GND pins must be connected to ground.

ANT2

ANT I Secondary antenna

50  nominal characteristic impedance. Rx only for Down-Link Rx diversity. See section 4.2.4 for details.

GND - N/A

Ground

All the GND pins must be connected to ground

GND - N/A

Ground

All the GND pins must be connected to ground

65-96

GND - N/A

Ground

All the GND pins must be connected to ground

RSVD

N/A

RESERVED pin

Leave unconnected.

RSVD

N/A

RESERVED pin

Leave unconnected.

HSIC_DATA

HSIC

I/O

HSIC USB data line

HSIC not supported by ‘02B’, ‘62B’, ‘82B’, ‘03B’ versions. 50  nominal characteristic impedance. See section 4.2.12 for detailed electrical specs.

100

HSIC_STRB

HSIC

I/O

HSIC USB strobe line

HSIC not supported by ‘02B’, ‘62B’, ‘82B’, ‘03B’ versions. 50  nominal characteristic impedance. See section 4.2.12 for detailed electrical specs.

Table 5: LARA-R2 series pin-out

☞ For more information about the pin-out, see the LARA-R2 series system integration manual [2]. ☞ See appendix A for an explanation of the abbreviations and terms used.

LARA-R2 series - Data sheet

UBX-16005783 - R27 Electrical specifications Page 25 of 48 C1-Public

4 Electrical specifications

⚠ Stressing the device above one or more of the ratings listed in the Absolute Maximum Rating

section may cause permanent damage. These are stress ratings only. Operating the module at these or at any conditions other than those specified in the Operating Conditions sections (section

4.2) of the specification should be avoided. Exposure to Absolute Maximum Rating conditions for

extended periods may affect device reliability.

☞ Operating condition ranges define limits within which the functionality of the device is guaranteed. ☞ Where application information is given, it is advisory only and does not form part of the

specification.

4.1 Absolute maximum rating

☞ Limit values given below are in accordance with the Absolute Maximum Rating System (IEC 134).

Symbol

Description

Condition

Min.

Max.

Unit

VCC

Module supply voltage

Input DC voltage at VCC pin

–0.30

5.00 V V_BCKP

RTC supply voltage

Input DC voltage at V_BCKP pin

–0.15

2.00 V VUSB_DET

USB detection pin

Input DC voltage at VUSB_DET pin

–0.15

5.50 V USB

USB D+/D- pins

Input DC voltage at USB_D+ and USB_D- pins

–1.00

5.50 V GDI

Generic digital interfaces

Input DC voltage at Generic digital interfaces pins

–0.30

3.60 V HSIC

HSIC interface

Input DC voltage at HSIC interface pins

–0.30

3.60 V DDC

DDC interface

Input DC voltage at DDC interface pins

–0.30

3.60 V SIM

SIM interface

Input DC voltage at SIM interface pins

–0.30

3.60

ERS

External reset signal

Input DC voltage at RESET_N pin

–0.30

2.10

POS

Power-on input

Input DC voltage at PWR_ON pin

–0.30

2.10 V Tstg

Storage Temperature

–40

+85

°C

Table 6: Absolute maximum ratings

⚠ The product is not protected against overvoltage or reversed voltages. If necessary, voltage spikes

exceeding the power supply voltage specification, given in the table above, must be limited to values within the specified boundaries by using appropriate protection devices.

4.1.1 Maximum ESD

Parameter

Module

Min

Max

Unit

Remarks

ESD sensitivity for all pins except ANT1 / ANT2 pins

All 1000

Human Body Model according to J ESD22-A114 ESD sensitivity for ANT1 / ANT2 pins

All 1000

Human Body Model according to JESD22-A114

ESD immunity for ANT1 pin

All 4000

Contact Discharge according to IEC 61000-4-2

8000

Air Discharge according to IEC 61000-4-2

ESD immunity for ANT2 pin

All except LARA-R204

4000

Contact Discharge according to IEC 61000-4-2

8000

Air Discharge according to IEC 61000-4-2

LARA-R204

1000

Contact Discharge according to IEC 61000-4-2

2000

Air Discharge according to IEC 61000-4-2

Table 7: Maximum ESD ratings

⚠ u-blox cellular modules are Electrostatic Sensitive Devices and require special precautions when

handling. See section 7.4 for ESD handling instructions.

LARA-R2 series - Data sheet

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4.2 Operating conditions

☞ Unless otherwise indicated, all operating condition specifications are at an ambient temperature

of +25 °C.

⚠ Operation beyond the operating conditions is not recommended and extended exposure beyond

them may affect device reliability.

4.2.1 Operating temperature range

Parameter

Min.

Typical

Max.

Unit

Remarks

Normal operating temperature

–20

+25

+65

°C

Normal operating temperature range (fully functional and meet 3GPP / ETSI specifications)

Extended operating temperature

–40 +85

°C

Extended operating temperature range (RF performance may be affected outside normal

operating range, though module is fully functional)

Table 8: Environmental conditions

4.2.2 Supply/power pins

Symbol

Parameter

Min.

Typical

Max.

Unit

VCC

Module supply normal operating input voltage 22

3.30

3.80

4.40 V

Module supply extended operating input voltage 23

3.00

3.80

4.50 V

Module supply extended operating input voltage 24

2.80

3.80

4.50

V_BCKP

Real Time Clock supply input voltage

1.00

1.80

1.90

I_BCKP

Real Time Clock supply average current consumption, at V_BCKP = 1.8 V

2.00 5 µA

Table 9: Input characteristics of the Supply/Power pins

Symbol

Parameter

Min.

Typical

Max.

Unit

VSIM

SIM supply output voltage, with external 1.8 V SIM

1.80 V

SIM supply output voltage, with external 3.0 V SIM

2.90 V

V_BCKP

Real Time Clock supply output voltage

1.80 V

I_BCKP

Real Time Clock supply output current capability

V_INT

Generic Digital Interfaces supply output voltage

1.80 V

V_INT_RIPPLE

Generic Digital Interfaces supply output voltage ripple with power saving disabled (AT+UPSV=0)

mVpp

Generic Digital Interfaces supply output voltage ripple with power saving enabled (AT+UPSV=1 / 2 / 3)

mVpp I_INT

Generic Digital Interfaces supply output current capability

Table 10: Output characteristics of the Supply/Power pins

RF performance may be affected when the input voltage at VCC is outside the herein stated normal operating range limits,

though the module is still fully functional when the input voltage at VCC is inside the extended operating range limits.

Range defined for the VCC pin #51 (supply input for internal baseband Power Management Unit and transceiver) of

LARA-R211 modules, and for all the VCC pins of the other LARA-R2 series modules, and. Input voltage at the related VCC

pins must be above the herein stated extended operating range minimum limit to switch on the LARA-R2 series modules.

The LARA-R2 series modules may switch off when the input voltage at the related VCC pins drops below the herein stated

extended operating range minimum limit.

Range defined for the VCC pins #52 and #53 (supply input for the internal power amplifier) of LARA-R211 modules.

LARA-R2 series - Data sheet

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4.2.3 Current consumption

Mode

Condition

Tx power

Min

Typ25

Max26

Unit

Idle-Mode (Power Saving enabled by AT+UPSV, module in low power idle-mode, equivalent to airplane mode)

Averaged value over a 100-ms period, USB not connected

0.9 mA

Averaged value over a 100-ms period, USB connected and suspended

1.1 mA

Cyclic Idle/Active-Mode (Power Saving enabled by AT+UPSV, Module registered with network)

Averaged value over a 10-minute period, USB not connected

1.4 mA

Averaged value over a 10-minute period, USB connected and suspended

1.6 mA

Active-Mode (Power Saving disabled by AT+UPSV, Module registered with network)

Averaged value over a 10-minute period, USB not connected

11.1 mA

Averaged value over a 10-minute period, USB connected and not suspended

29.5 mA

2G Connected Mode (Tx / Rx call enabled)

Pulse value during a 1-slot GMSK Tx burst, 900 MHz band

Maximum

1.9

2.5

Averaged value over a 10-second period, 2G GMSK call, 1 Tx + 1 Rx slot, 900 MHz

Minimum

Maximum

275 mA

Averaged value over a 10-second period, 2G GMSK call, 1 Tx + 1 Rx slot, 1800 MHz

Minimum

Maximum

215 mA

3G Connected Mode (Tx / Rx call enabled)

Averaged value over a 10-second period

Minimum

115 mA

0 dBm

125 mA

12 dBm

170 mA

18 dBm

265 mA

Maximum

490 mA

LTE Connected Mode (Tx / Rx call enabled)

Averaged value over a 10-second period

Minimum

185 mA

0 dBm

200 mA

12 dBm

245 mA

18 dBm

365 mA

Maximum

540 mA

Table 11: LARA-R2 series modules VCC current consumption

Parameter

Min

Typ

Max

Unit

Current consumption through the VCC pin #51 of LARA-R211 modules (supply input for internal baseband Power Management Unit and the internal transceiver)

300

Table 12: LARA-R211 modules VCC pin #51 current consumption

Typical values with a matched antenna

Maximum values with a mismatched antenna

LARA-R2 series - Data sheet

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4.2.4 LTE RF characteristics

The LTE bands supported by each LARA-R2 series module are defined in Table 2, while the following

Table 13 describes the Transmitting and Receiving frequencies for each LTE band according to 3GPP

TS 36.521-1 [11].

Parameter

Min.

Max.

Unit

Remarks

Frequency range Band 12 (700 MHz)27

Uplink

699

716

MHz

Module transmits

Downlink

729

746

MHz

Module receives

Frequency range Band 13 (700 MHz)

Uplink

777

787

MHz

Module transmits

Downlink

746

756

MHz

Module receives

Frequency range Band 28 (700 MHz)

Uplink

703

748

MHz

Module transmits

Downlink

758

803

MHz

Module receives

Frequency range Band 20 (800 MHz)

Uplink

832

862

MHz

Module transmits

Downlink

791

821

MHz

Module receives

Frequency range Band 19 (850 MHz)

Uplink

830

845

MHz

Module transmits

Downlink

875

890

MHz

Module receives

Frequency range Band 5 (850 MHz)

Uplink

824

849

MHz

Module transmits

Downlink

869

894

MHz

Module receives

Frequency range Band 8 (900 MHz)

Uplink

880

915

MHz

Module transmits

Downlink

925

960

MHz

Module receives

Frequency range Band 4 (1700 MHz)

Uplink

1710

1755

MHz

Module transmits

Downlink

2110

2155

MHz

Module receives

Frequency range Band 3 (1800 MHz)

Uplink

1710

1785

MHz

Module transmits

Downlink

1805

1880

MHz

Module receives

Frequency range Band 2 (1900 MHz)

Uplink

1850

1910

MHz

Module transmits

Downlink

1930

1990

MHz

Module receives

Frequency range Band 1 (2100 MHz)

Uplink

1920

1980

MHz

Module transmits

Downlink

2110

2170

MHz

Module receives

Frequency range Band 7 (2600 MHz)

Uplink

2500

2570

MHz

Module transmits

Downlink

2620

2690

MHz

Module receives

Table 13: LTE operating RF frequency bands

LARA-R2 series modules include a UE Power Class 3 LTE transmitter (see Table 2), with output power and characteristics according to 3GPP TS 36.521-1 [11].

LARA-R2 series modules LTE receiver characteristics are compliant to 3GPP TS 36.521-1 [11], with LTE conducted receiver sensitivity performance described in Table 14.

Parameter

Min.

Typical

Max.

Unit

Remarks

Receiver input sensitivity Band 12 (700 MHz)

–111.0

dBm

Channel bandwidth = 1.4 MHz

–108.0

dBm

Channel bandwidth = 3 MHz

–105.5

dBm

Channel bandwidth = 5 MHz

–102.5

dBm

Channel bandwidth = 10 MHz

Receiver input sensitivity Band 13 (700 MHz)

–105.0

dBm

Channel bandwidth = 5 MHz

–102.0

dBm

Channel bandwidth = 10 MHz

Receiver input sensitivity Band 28 (700 MHz)

–107.0

dBm

Channel bandwidth = 3 MHz

–105.5

dBm

Channel bandwidth = 5 MHz

–102.5

dBm

Channel bandwidth = 10 MHz

LTE band 12 is a superset that includes band 17: LTE band 12 is supported with Multi-Frequency Band Indicator (MFBI) feature

LARA-R2 series - Data sheet

UBX-16005783 - R27 Electrical specifications Page 29 of 48 C1-Public

Parameter

Min.

Typical

Max.

Unit

Remarks

–100.5

dBm

Channel bandwidth = 15 MHz

–99.5

dBm

Channel bandwidth = 20 MHz

Receiver input sensitivity Band 20 (800 MHz)

–105.0

dBm

Channel bandwidth = 5 MHz

–102.0

dBm

Channel bandwidth = 10 MHz

–100.0

dBm

Channel bandwidth = 15 MHz

–98.5

dBm

Channel bandwidth = 20 MHz

Receiver input sensitivity Band 19 (850 MHz)

–105.0

dBm

Channel bandwidth = 5 MHz

–102.5

dBm

Channel bandwidth = 10 MHz

–100.5

dBm

Channel bandwidth = 15 MHz

Receiver input sensitivity Band 5 (850 MHz)

–110.0

dBm

Channel bandwidth = 1.4 MHz

–107.5

dBm

Channel bandwidth = 3 MHz

–105.0

dBm

Channel bandwidth = 5 MHz

–102.5

dBm

Channel bandwidth = 10 MHz

Receiver input sensitivity Band 8 (900 MHz)

–111.0

dBm

Channel bandwidth = 1.4 MHz

–108.0

dBm

Channel bandwidth = 3 MHz

–105.0

dBm

Channel bandwidth = 5 MHz

–102.5

dBm

Channel bandwidth = 10 MHz

Receiver input sensitivity Band 4 (1700 MHz)

–111.5

dBm

Channel bandwidth = 1.4 MHz

–108.0

dBm

Channel bandwidth = 3 MHz

–105.5

dBm

Channel bandwidth = 5 MHz

–103.0

dBm

Channel bandwidth = 10 MHz

–101.0

dBm

Channel bandwidth = 15 MHz

–100.0

dBm

Channel bandwidth = 20 MHz

Receiver input sensitivity Band 3 (1800 MHz)

–111.0

dBm

Channel bandwidth = 1.4 MHz

–108.0

dBm

Channel bandwidth = 3 MHz

–105.0

dBm

Channel bandwidth = 5 MHz

–103.0

dBm

Channel bandwidth = 10 MHz

–101.0

dBm

Channel bandwidth = 15 MHz

–100.0

dBm

Channel bandwidth = 20 MHz

Receiver input sensitivity Band 2 (1900 MHz)

–110.0

dBm

Channel bandwidth = 1.4 MHz

–107.0

dBm

Channel bandwidth = 3 MHz

–104.5

dBm

Channel bandwidth = 5 MHz

–102.0

dBm

Channel bandwidth = 10 MHz

–100.0

dBm

Channel bandwidth = 15 MHz

–99.0

dBm

Channel bandwidth = 20 MHz

Receiver input sensitivity Band 1 (2100 MHz)

–104.0

dBm

Channel bandwidth = 5 MHz

–101.0

dBm

Channel bandwidth = 10 MHz

–99.0

dBm

Channel bandwidth = 15 MHz

–98.0

dBm

Channel bandwidth = 20 MHz

Receiver input sensitivity Band 7 (2600 MHz)

–104.0

dBm

Channel bandwidth = 5 MHz

–101.0

dBm

Channel bandwidth = 10 MHz

–99.5

dBm

Channel bandwidth = 15 MHz

–98.5

dBm

Channel bandwidth = 20 MHz

Condition: 50  source, throughput > 95%, dual receiver, QPSK modulation, other settings as per 3GPP TS 36.521-1 [11]

Table 14: LTE receiver sensitivity performance

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4.2.5 3G RF characteristics

The 3G bands supported by LARA-R2 series modules are defined in Table 2, while Table 15 describes the Transmitting and Receiving frequencies for each 3G band according to 3GPP TS 34.121-1 [12].

Parameter

Min.

Max.

Unit

Remarks

Frequency range Band 5 (850 MHz)

Uplink

824

849

MHz

Module transmits

Downlink

869

894

MHz

Module receives

Frequency range Band 2 (1900 MHz)

Uplink

1850

1910

MHz

Module transmits

Downlink

1930

1990

MHz

Module receives

Frequency range Band 1 (2100 MHz)

Uplink

1920

1980

MHz

Module transmits

Downlink

2110

2170

MHz

Module receives

Table 15: 3G operating RF frequency bands

LARA-R2 series modules include a UE Power Class 3 3G transmitter (see Table 2), with output power and characteristics according to 3GPP TS 34.121-1 [12].

LARA-R2 series modules 3G receiver characteristics are compliant to 3GPP TS 34.121-1 [12], with 3G conducted receiver sensitivity performance described in Table 16.

Parameter

Min.

Typical

Max.

Unit

Remarks

Receiver input sensitivity Band 5 (850 MHz)

–115.0

dBm

Downlink RF level for RMC @ BER < 0.1%

Receiver input sensitivity Band 2 (1900 MHz)

–114.0

dBm

Downlink RF level for RMC @ BER < 0.1%

Receiver input sensitivity Band 1 (2100 MHz)

–114.0

dBm

Downlink RF level for RMC @ BER < 0.1% Condition: 50  source, dual receiver, other settings as per 3GPP TS 34.121-1 [12]

Table 16: 3G receiver sensitivity performance

4.2.6 2G RF characteristics

The 2G bands supported by LARA-R2 series modules are defined in Table 2, while Table 17 describes the Transmitting and Receiving frequencies for each 2G band according to 3GPP TS 51.010-1 [13].

Parameter

Min.

Max.

Unit

Remarks

Frequency range E-GSM 900

Uplink

880

915

MHz

Module transmits

Downlink

925

960

MHz

Module receives

Frequency range DCS 1800

Uplink

1710

1785

MHz

Module transmits

Downlink

1805

1880

MHz

Module receives

Table 17: 2G operating RF frequency bands

LARA-R2 series modules include a GMSK Power Class 4 transmitter for E-GSM 900 band, GMSK Power Class 1 transmitter for the DCS 1800 band, 8-PSK Power Class E2 transmitter for all 2G bands (see Table 2), with output power and characteristics according to 3GPP TS 51.010-1 [13].

LARA-R2 series modules 2G receiver characteristics are compliant to 3GPP TS 51.010-1 [13], with conducted receiver sensitivity performance described in Table 18.

Parameter

Min.

Typical

Max.

Unit

Remarks

Receiver input sensitivity E-GSM 900

–110.0

dBm

Downlink RF level @ BER Class II < 2.4%

Receiver input sensitivity DCS 1800

–109.0

dBm

Downlink RF level @ BER Class II < 2.4% Condition: 50  source, other settings as per 3GPP TS 51.010-1 [13]

Table 18: 2G receiver sensitivity performance

LARA-R2 series - Data sheet

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4.2.7 ANT_DET pin

Pin Name

Parameter

Min.

Typical

Max.

Unit

Remarks

ANT_DET

Output DC current pulse value

µA

Triggered by the +UANTR AT command

Output DC current pulse time length

330 µs

Triggered by the +UANTR AT command

Table 19: ANT_DET pin characteristics

4.2.8 PWR_ON pin

Pin Name

Parameter

Min.

Typical

Max.

Unit

Remarks

PWR_ON

Internal supply for Power-On Input Signal

1.80 V

RTC supply (V_BCKP) Low-level input

–0.30

0.54 V High-level input

1.26 2.10 V

Pull-up resistance

k

Internal active pull-up to V_BCKP

Low-level input current

–180

µA

Low pulse time

µs

Low pulse time to switch on the module

Low pulse time

1 s Low pulse time to switch off the module

Table 20: PWR_ON pin characteristics

4.2.9 RESET_N pin

Pin Name

Parameter

Min.

Typical

Max.

Unit

Remarks

RESET_N

Internal supply for External Reset Input Signal

1.80 V

RTC supply (V_BCKP) Low-level input

–0.30

0.54 V

High-level input

1.26 2.10 V

Pull-up resistance

k

Internal active pull-up to V_BCKP

Low-level input current

–180

µA Low pulse time

Low pulse time to reset the module

Table 21: RESET_N pin characteristics

4.2.10 SIM pins

The SIM pins are a dedicated interface to the external SIM card/chip. The electrical characteristics fulfill the regulatory specification requirements. The values in Table 22 are for information only.

Parameter

Min.

Typical

Max.

Unit

Remarks

Low-level input

0.00 0.35 V VSIM = 1.80 V

0.00 0.57 V VSIM = 2.90 V

High-level input

1.29 3.30 V VSIM = 1.80 V

2.07 3.30 V VSIM = 2.90 V

Low-level output

0.00

0.35 V VSIM = 1.80 V, Max value at IOL = +1.0 mA

0.00

0.35 V VSIM = 2.90 V, Max value at IOL = +1.0 mA

High-level output

1.26

1.80 V

VSIM = 1.80 V, Min value at IOH = –1.0 mA

2.03

2.90 V

VSIM = 2.90 V, Min value at IOH = –1.0 mA

Input / Output leakage current

0.7

µA

0.2V < VIN < 3.3V

Clock frequency on SIM_CLK

3.25 MHz

Internal pull-up resistor on SIM_IO

4.7

k

Internal pull-up to VSIM supply

Table 22: SIM pins characteristics

LARA-R2 series - Data sheet

UBX-16005783 - R27 Electrical specifications Page 32 of 48 C1-Public

4.2.11 USB pins

USB data lines (USB_D+ / USB_D–) are compliant with the USB 2.0 high-speed specification. See the Universal Serial Bus specification revision 2.0 [15] for detailed electrical characteristics. The values in

Table 23 related to USB 2.0 high-speed physical layer specifications are for information only.

Parameter

Min.

Typical

Max.

Unit

Remarks

VUSB_DET pin, High-level input

1.50

5.00

5.25 V

VUSB_DET pin, Low-level input

–0.15

0.00

0.40 V

VUSB_DET pin, input current sink

25 µA

High-speed squelch detection threshold (input differential signal amplitude)

100 150

High speed disconnect detection threshold (input differential signal amplitude)

525 625

High-speed data signaling input common mode voltage range

–50 500

mV High-speed idle output level

–10 10

mV High-speed data signaling output high level

360 440

mV High-speed data signaling output low level

–10 10

mV Chirp J level (output differential voltage)

700 1100

mV Chirp K level (output differential voltage)

–900

–500

Table 23: USB pins characteristics

4.2.12 HSIC pins

The HSIC USB lines (HSIC_DATA / HSIC_STRB) are compliant with the High-Speed Inter-Chip USB specification. See the High-Speed Inter-Chip USB Electrical Specification version 1.0 [16] and the USB specification revision 2.0 [15] for detailed electrical characteristics. The values in Table 24 related to the High-Speed Inter-Chip USB electrical specifications are for information only.

Parameter

Min

Typical

Max

Unit

Remarks

Internal supply for HSIC domain

1.20 V

Low-level input

–0.30

0.42 V

High-level input

0.78 1.50 V

Low-level output

0.00

0.30 V Max value at IOL = +2.0 mA

High-level output

0.90

1.20 V

Min value at IOH = –2.0 mA

Input/output leakage current

0.7

µA

0.2V < VIN < 1.5V

Table 24: HSIC pins characteristics

4.2.13 DDC (I2C) pins

DDC (I2C) lines (SCL and SDA) are compliant with the I2C-bus standard mode specification. See the I2C-bus specification [17] for detailed electrical characteristics. The values in Table 25 related to I2C-bus standard mode specifications are for information only.

Parameter

Min

Typical

Max

Unit

Remarks

Internal supply for GDI domain

1.80 V

Digital I/O Interfaces supply (V_INT)

Low-level input

–0.20

0.36 V

High-level input

1.26 2.00 V

Low-level output

0.00

0.35 V Max value at IOL = +1.0 mA

Clock frequency on SCL

100 kHz

Table 25: DDC (I2C) pins characteristics

LARA-R2 series - Data sheet

UBX-16005783 - R27 Electrical specifications Page 33 of 48 C1-Public

4.2.14 Generic Digital Interfaces pins

Parameter

Min

Typical

Max

Unit

Remarks

Internal supply for GDI domain

1.80 V

Digital I/O Interfaces supply (V_INT)

Low-level input

–0.20

0.36 V

High-level input

1.26 2.00 V

Low-level output

0.00

0.35 V Max value at IOL = +6.0 mA for driver class A

High-level output

1.45

1.80 V

Min value at IOH = –6.0 mA for driver class A

Internal pull-up input current

–240

µA

PU class a

–110

µA

PU class b

Internal pull-down input current

240

µA

PD class a

100

µA

PD class b

Input/output leakage current

0.7

µA

0.2V < VIN < 2.0V

Table 26: GDI pins characteristics

4.2.14.1 AC characteristics of clock output pin

Parameter

Description

Min

Typical

Max

Unit

Remarks

1/T1

GPIO6 clock output frequency

13 MHz

AT+UMCLK=2

26 MHz

AT+UMCLK=3

Table 27: AC characteristics of GPIO6 clock output pin

4.2.14.2 AC characteristics of I2S pins

Parameter

Description

Min

Typical

Max

Unit

Remarks

1/T1

I2S_WA frequency

8.000

kHz

<I2S_sample_rate>=0

11.025

kHz

<I2S_sample_rate>=1

12.000

kHz

<I2S_sample_rate>=2

16.000

kHz

<I2S_sample_rate>=3

22.050

kHz

<I2S_sample_rate>=4

24.000

kHz

<I2S_sample_rate>=5

32.000

kHz

<I2S_sample_rate>=6

44.100

kHz

<I2S_sample_rate>=7

48.000

kHz

<I2S_sample_rate>=8

1/T2

I2S_CLK frequency

32 1/T1

<I2S_mode> = 2,..,13

I2S_TXD invalid before I2S_CLK edge

<I2S_mode> = 2,..,13

I2S_TXD valid after I2S_CLK edge

<I2S_mode> = 2,..,13

I2S_RXD setup time before I2S_CLK edge

<I2S_mode> = 2,..,13

I2S_RXD hold time after I2S_CLK edge

<I2S_mode> = 2,..,13

Table 28: AC characteristics of digital audio interface (I2S) pins in Normal I2S mode (long synchronization signal), host role

Parameter

Description

Min

Typical

Max

Unit

Remarks

1/T1

I2S_WA frequency

8.000

kHz

<I2S_sample_rate>=0

11.025

kHz

<I2S_sample_rate>=1

12.000

kHz

<I2S_sample_rate>=2

16.000

kHz

<I2S_sample_rate>=3

22.050

kHz

<I2S_sample_rate>=4

24.000

kHz

<I2S_sample_rate>=5

32.000

kHz

<I2S_sample_rate>=6

44.100

kHz

<I2S_sample_rate>=7

48.000

kHz

<I2S_sample_rate>=8

LARA-R2 series - Data sheet

UBX-16005783 - R27 Electrical specifications Page 34 of 48 C1-Public

Parameter

Description

Min

Typical

Max

Unit

Remarks

1/T2

I2S_CLK frequency

1/T1

<I2S_mode> = 2,..,13

I2S_TXD invalid before I2S_CLK edge

<I2S_mode> = 2,..,13

I2S_TXD valid after I2S_CLK edge

<I2S_mode> = 2,..,13

I2S_RXD setup time before I2S_CLK edge

<I2S_mode> = 2,..,13

I2S_RXD hold time after I2S_CLK edge

<I2S_mode> = 2,..,13

Table 29: AC characteristics of digital audio interface (I2S) pins in Normal I2S mode (long synchronization signal), device role

Parameter

Description

Min

Typical

Max

Unit

Remarks

1/T1

I2S_WA frequency

8.000

kHz

<I2S_sample_rate>=0

11.025

kHz

<I2S_sample_rate>=1

12.000

kHz

<I2S_sample_rate>=2

16.000

kHz

<I2S_sample_rate>=3

22.050

kHz

<I2S_sample_rate>=4

24.000

kHz

<I2S_sample_rate>=5

32.000

kHz

<I2S_sample_rate>=6

44.100

kHz

<I2S_sample_rate>=7

48.000

kHz

<I2S_sample_rate>=8

1/T2

I2S_CLK frequency

18 1/T1

<I2S_mode> = 0

17 1/T1

<I2S_mode> = 1

I2S_WA high begin after I2S_CLK high begin

-24 32

<I2S_mode> = 0, 1

I2S_WA high end after I2S_CLK low end

-24 32

<I2S_mode> = 0, 1

I2S_TXD invalid before I2S_CLK low end

<I2S_mode> = 0, 1

I2S_TXD valid after I2S_CLK high begin

<I2S_mode> = 0, 1

I2S_RXD setup time before I2S_CLK high end

<I2S_mode> = 0, 1

I2S_RXD hold time after I2S_CLK low begin

<I2S_mode> = 0, 1

Table 30: AC characteristics of digital audio interface (I2S) pins in PCM mode (short synchronization signal), host role

Parameter

Description

Min

Typical

Max

Unit

Remarks

1/T1

I2S_WA frequency

8.000

kHz

<I2S_sample_rate>=0

11.025

kHz

<I2S_sample_rate>=1

12.000

kHz

<I2S_sample_rate>=2

16.000

kHz

<I2S_sample_rate>=3

22.050

kHz

<I2S_sample_rate>=4

24.000

kHz

<I2S_sample_rate>=5

32.000

kHz

<I2S_sample_rate>=6

44.100

kHz

<I2S_sample_rate>=7

48.000

kHz

<I2S_sample_rate>=8

1/T2

I2S_CLK frequency

1/T1

<I2S_mode> = 0

1/T1

<I2S_mode> = 1

I2S_WA high begin before I2S_CLK low begin

<I2S_mode> = 0, 1

I2S_WA low begin before I2S_CLK low begin

<I2S_mode> = 0, 1

I2S_TXD invalid before I2S_CLK rising edge

<I2S_mode> = 0, 1

I2S_TXD valid after I2S_CLK rising edge

<I2S_mode> = 0, 1

I2S_RXD setup time before I2S_CLK falling edge

<I2S_mode> = 0, 1

I2S_RXD hold time after I2S_CLK falling edge

<I2S_mode> = 0, 1

Table 31: AC characteristics of digital audio interface (I2S) pins in PCM mode (short synchronization signal), device role

LARA-R2 series - Data sheet

UBX-16005783 - R27 Electrical specifications Page 35 of 48 C1-Public

4.3 Parameters for ATEX applications

This section provides useful parameters and information to integrate LARA-R2 series modules in applications intended for use in areas with potentially explosive atmospheres (ATEX), describing:

• Total internal capacitance and inductance of LARA-R2 series modules (see Table 32)

• Maximum RF output power at the antenna pin of LARA-R2 series modules (see Table 33)

☞ Any specific applicable requirement for the implementation of the apparatus integrating

LARA-R2 series modules, intended for use in potentially explosive atmospheres, must be fulfilled according to the exact applicable standards: check the detailed requisites on the pertinent normative for the application, as for example IEC 60079-0 [18], IEC 60079-11 [19], and IEC 60079-26 [20] standards.

☞ The certification of the application device that integrates a LARA-R2 series module and the

compliance of the application device with all the applicable certification schemes, directives and standards required for use in potentially explosive atmospheres are the sole responsibility of the application device manufacturer.

Table 32 describes the maximum total internal capacitance and the maximum total internal

inductance, considering internal parts tolerance, provided by LARA-R2 series modules.

Module

Parameter

Description

Value

Unit

LARA-R202

Maximum total internal capacitance

211

µF Li

Maximum total internal inductance

26.2

µH

LARA-R203

Maximum total internal capacitance

211

µF Li

Maximum total internal inductance

23.2

µH

LARA-R204

Maximum total internal capacitance

222

µF Li

Maximum total internal inductance

26.0

µH

LARA-R211

Maximum total internal capacitance

214

µF

Maximum total internal inductance

26.1

µH

LARA-R220

Maximum total internal capacitance

213.3

µF Li

Maximum total internal inductance

26.0

µH

LARA-R280

Maximum total internal capacitance

213.3

µF Li

Maximum total internal inductance

26.2

µH

Table 32: LARA-R2 series maximum total internal capacitance and maximum total internal inductance

Table 33 describes the maximum RF output power transmitted by LARA-R2 series modules from the

primary antenna (ANT1) pin as Power Class 4 Mobile Stations for GSM 850 / E-GSM 900 bands and/or as Power Class 3 User Equipment for the LTE and UMTS bands.

Module

Parameter

Description

Value

Unit

LARA-R202

ANT1 Pout

Maximum RF output power from ANT1 pin

25.0

dBm

LARA-R203

ANT1 Pout

Maximum RF output power from ANT1 pin

25.0

dBm

LARA-R204

ANT1 Pout

Maximum RF output power from ANT1 pin

25.0

dBm

LARA-R211

ANT1 Pout

Maximum RF output power from ANT1 pin

35.0

dBm

LARA-R220

ANT1 Pout

Maximum RF output power from ANT1 pin

25.0

dBm

LARA-R280

ANT1 Pout

Maximum RF output power from ANT1 pin

25.0

dBm

Table 33: LARA-R2 series antenna pin (ANT1) maximum RF output power

LARA-R2 series - Data sheet

UBX-16005783 - R27 Mechanical specifications Page 36 of 48 C1-Public

5 Mechanical specifications

K M1 M1 M2

ANT1 pin

Pin 1

Indicator

G H1 J1D

ANT2 pin

H2 H1

Figure 3: LARA-R2 series dimensions (bottom and side views)

Parameter

Description

Typical

Tolerance

Module height [mm]

26.0

(1023.6 mil)

+0.20/–0.20

(+7.9/–7.9 mil)

Module width [mm]

24.0

(944.9 mil)

+0.20/–0.20

(+7.9/–7.9 mil)

Module thickness [mm]

2.6

(102.4 mil)

+0.27/–0.17

(+10.6/–6.7 mil)

Horizontal edge to lateral pin pitch [mm]

2.0

(78.7 mil)

+0.20/-0.20

(+7.9/-7.9 mil)

Vertical edge to lateral pin pitch [mm]

6.5

(255.9 mil)

+0.20/-0.20

(+7.9/-7.9 mil)

Edge to lateral pin pitch [mm]

1.05

(41.3 mil)

+0.20/-0.20

(+7.9/-7.9 mil)

Edge to lateral pin pitch [mm]

5.05

(198.8 mil)

+0.20/-0.20

(+7.9/-7.9 mil)

Lateral pin to pin pitch [mm]

1.1

(43.3 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Lateral pin height [mm]

0.8

(31.5 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Lateral pin close to ANT height [mm]

0.9

(35.4 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Lateral pin width [mm]

1.5

(59.1 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Lateral pin to pin distance [mm]

0.3

(11.8 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Lateral pin to pin close to ANT distance [mm]

0.2

(7.9 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Horizontal edge to central pin pitch [mm]

2.75

(108.3 mil)

+0.20/-0.20

(+7.9/-7.9 mil)

Vertical edge to central pin pitch [mm]

6.75

(265.7 mil)

+0.20/-0.20

(+7.9/-7.9 mil)

Central pin to pin horizontal pitch [mm]

1.8

(70.9 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Central pin to pin horizontal pitch [mm]

3.6

(141.7 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Central pin to pin vertical pitch [mm]

2.1

(82.7 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Central pin height and width [mm]

1.1

(43.3 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Horizontal edge to pin 1 indicator pitch [mm]

2.0

(78.7 mil)

+0.20/-0.20

(+7.9/-7.9 mil)

Vertical edge to pin 1 indicator pitch [mm]

3.4

(133.6 mil)

+0.20/-0.20

(+7.9/-7.9 mil)

Pin 1 indicator diameter [mm]

0.56

(22.0 mil)

+0.05/-0.05

(+2.0/-2.0 mil)

Weight

Module weight [g]

Table 34: LARA-R2 series dimensions

☞ Module height tolerance +/–0.20 mm may be exceeded close to the corners of the PCB due to the

cutting process. In the worst case, the height could be +0.40 mm more than the typical value.

☞ For information regarding Footprint and Paste Mask recommended for the application board

integrating the cellular module, see the LARA-R2 series system integration manual [2].

LARA-R2 series - Data sheet

UBX-16005783 - R27 Qualification and approvals Page 37 of 48 C1-Public

6 Qualification and approvals

6.1 Reliability tests

Tests for product family qualifications according to ISO 16750 “Road vehicles – Environmental conditions and testing for electrical and electronic equipment”, and appropriate standards.

6.2 Approvals

LARA-R2 series modules comply with the Directive 2011/65/EU of the European Parliament and the Council on the Restriction of Use of certain Hazardous Substances in Electrical and Electronic Equipment (EU RoHS 2) and its amendment Directive (EU) 2015/863 (EU RoHS 3).

LARA-R2 series modules are RoHS 3 compliant.

No natural rubbers, hygroscopic materials, or materials containing asbestos are employed.

Table 35 summarizes the main approvals that have been achieved for LARA-R2 series modules.

Certification scheme

LARA-R202

LARA-R203

LARA-R204

LARA-R211

LARA-R220

LARA-R280

LARA-R281

CE (Europe)

■ ■

FCC (United States)

FCC identification number

■

XPY1EIQ24NN

■

XPY1DIQN3NN

□

XPY1EIQN2NN

ISED (Canada) 28

IC certification number

■

8595A-1EIQ24NN

■

8595A-1DIQN3NN

□

8595A-1EIQN2NN

GITEKI (Japan)

□

RCM (Australia)

■

NCC (Taiwan)

■

PTCRB conformance

■ ■

GCF conformance

□ ■

AT&T ■ ■

T-Mobile US

□ □

Verizon □

U.S. Cellular

□ □

Rogers □ □

Telus □ □

Vodafone ■

Deutsche Telekom

■

NTT DoCoMo

□

Note: ■ = certified as voice and data □ = certified as data only

Table 35: LARA-R2 series main certification approvals summary

☞ The above listed certifications might not be available for all the different product type numbers.

Please contact the u-blox office or sales representative nearest you for the complete list of certification approvals available for the selected product ordering number.

Formerly known as IC (Industry Canada)

LARA-R2 series - Data sheet

UBX-16005783 - R27 Product handling & soldering Page 38 of 48 C1-Public

7 Product handling & soldering

7.1 Packaging

LARA-R2 series modules are delivered as hermetically sealed reeled tapes, to enable efficient production, production lot set-up and tear-down.

For more information about packaging, see the u-blox package information user guide [6].

7.1.1 Reels

LARA-R2 series modules are deliverable in quantities of 150 pieces on a reel. The modules are delivered using reel type B2 described in Figure 4 and in the u-blox package information user guide [6].

Figure 4: LARA-R2 series modules reel

Parameter

Specification

Reel type

Delivery quantity

150

Table 36: Reel information for LARA-R2 series modules

Quantities of less than 150 pieces are also available. Contact u-blox for more information.

LARA-R2 series - Data sheet

UBX-16005783 - R27 Product handling & soldering Page 39 of 48 C1-Public

7.1.2 Tapes

Figure 5 shows the position and the orientation of LARA-R2 modules as they are delivered on the tape,

while Figure 6 and Table 37 specify the tape dimensions.

Pin 1 Sprocket hole

Feed direction

Figure 5: Orientation for LARA-R2 series modules on tape

Figure 6: LARA-R2 series modules tape dimensions

Parameter

Typical value

Tolerance

Unit

24.9

0.2

26.8

0.2

3.5

0.2

Table 37: LARA-R2 series modules tape dimensions

☞ 10 sprocket hole pitch cumulative tolerance ± 0.2 mm. ☞ Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole. ☞ A

and B0 are measured on a plane at a distance “R” above the bottom of the pocket.

LARA-R2 series - Data sheet

UBX-16005783 - R27 Product handling & soldering Page 40 of 48 C1-Public

7.2 Moisture sensitivity levels

⚠ LARA-R2 series modules are Moisture Sensitive Devices (MSD) in accordance to the IPC/JEDEC

specification.

The Moisture Sensitivity Level (MSL) relates to the packaging and handling precautions required. LARA-R2 series modules are rated at MSL level 4. For more information regarding moisture sensitivity levels, labeling, storage and drying see the u-blox package information user guide [6].

☞ For the MSL standard, see IPC/JEDEC J-STD-020 (can be downloaded from www.jedec.org).

7.3 Reflow soldering

Reflow profiles are to be selected according to u-blox recommendations (see LARA-R2 series system integration manual [2]).

⚠ Failure to observe these recommendations can result in severe damage to the device!

7.4 ESD precautions

⚠ LARA-R2 series modules contain highly sensitive electronic circuitry and are Electrostatic

Sensitive Devices (ESD). Handling LARA-R2 series modules without proper ESD protection may destroy or damage them permanently.

LARA-R2 series modules are Electrostatic Sensitive Devices (ESD) and require special ESD precautions typically applied to ESD sensitive components.

Table 7 details the maximum ESD ratings of the LARA-R2 series modules.

Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the LARA-R2 series module.

ESD precautions should be implemented on the application board where the module is mounted, as described in the LARA-R2 series system integration manual [2].

⚠ Failure to observe these recommendations can result in severe damage to the device!

LARA-R2 series - Data sheet

UBX-16005783 - R27 Default settings Page 41 of 48 C1-Public

8 Default settings

Interface

AT settings

Comments

UART interface

AT interface enabled

AT command mode is enabled by default on the UART physical interface

AT+IPR=0

One-shot automatic baud rate detection enabled

AT+ICF=3,1

Frame format: 8 bits, no parity, 1 stop bit

☞ Since AT+IPR=0 is the default value (one-shot automatic baud rate

detection enabled), the AT+ICF value in the profile is not applied (AT+IPR=0 overrules the AT+ICF setting) and the one-shot automatic frame detection is active.

AT&K3

HW flow control enabled

AT&S1

DSR line set ON in data mode and set OFF in command mode

AT&D1

Upon an ON-to-OFF transition of DTR, the module enters online command state and issues an OK result code

AT&C1

Circuit 109 changes in accordance with the Carrier detect status; ON if the Carrier is detected, OFF otherwise

MUX disabled

Multiplexing mode can be enabled by AT+CMUX command providing following channels:

• Channel 0: Multiplexer control

• Channel 1 – 5: AT commands / data connection

• Channel 6: GNSS data tunneling

USB interface

Enabled

6 USB CDCs (Communications Device Class) by default available:

• USB1: AT and data

• USB2: AT and data

• USB3: AT and data

• USB4: GNSS tunneling

• USB5: SAP (SIM Access Profile)

• USB6: Primary Log (diagnostic purpose)

AT&K3

HW flow control enabled

AT&S1

DSR line set ON in data mode and set OFF in command mode

AT&D1

Upon an ON-to-OFF transition of DTR, the module enters online command state and issues an OK result code

AT&C1

Circuit 109 changes in accordance with the Carrier detect status; ON if the Carrier is detected, OFF otherwise

Power saving

AT+UPSV=0

Disabled

Network registration

AT+COPS=0

Self network registration

Table 38: LARA-R2 series default settings

See the u-blox AT commands manual [1] and the LARA-R2 series system integration manual [2] for information about further settings and factory-programmed values.

Not supported by LARA-R204-02B and LARA-R211-02B-00 product versions.

Not supported by "02B", "62B", "82B", and "03B" product versions.

LARA-R2 series - Data sheet

UBX-16005783 - R27 Labeling and ordering information Page 42 of 48 C1-Public

9 Labeling and ordering information

9.1 Product labeling

The labels of LARA-R2 series modules include important product information as described in this section.

Figure 7, Figure 8 and Figure 9 illustrate the labels of LARA-R2 series modules, which include: u-blox

logo, production lot, Pb-free marking, product type number, IMEI number, applicable regulatory certifications’ info, and production country.

LARA-R2xx

xxB-xx

Figure 7: Label of LARA-R202, LARA-R203, LARA-R204, LARA-R280 modules

LARA-R211

xxB-xx

LARA-R281

xxB-xx

Figure 8: Label of LARA-R211 and LARA-R281 modules

LARA-R220

xxB-xx

Figure 9: Label of LARA-R220 modules

LARA-R2 series - Data sheet

UBX-16005783 - R27 Labeling and ordering information Page 43 of 48 C1-Public

9.2 Explanation of codes

Three different product code formats are used. The Product Name is used in documentation such as this data sheet and identifies all the u-blox products, independent of packaging and quality grade. The Ordering Code includes options and quality, while the Type Number includes the hardware and firmware versions. Table 39 details these 3 different formats:

Format

Structure

Product Name

PPPP-TGVV

Ordering Code

PPPP-TGVV-MMQ

Type Number

PPPP-TGVV-MMQ-XX

Table 39: Product code formats

Table 40 explains the parts of the product code.

Code

Meaning

Example

PPPP

Form factor

LARA

Platform (Technology and Generation)

• Dominant technology: G: GSM; U: HSUPA; C: CDMA 1xRTT; N: NB-IoT;

R: LTE low data rate (Cat 1 and below); L: LTE high data rate (Cat.3 and above)

• Generation: 1…9

Variant function set based on the same platform [00…99]

Major product version [00…99]

Product grade

• B = professional

• A = automotive

Minor product version

Default value is 00

Table 40: Part identification code

LARA-R2 series - Data sheet

UBX-16005783 - R27 Labeling and ordering information Page 44 of 48 C1-Public

9.3 Ordering information

Ordering number

Product

LARA-R202-02B

Module supporting LTE Cat 1 bands 2 / 4 / 5 / 12, HSPA bands 2 / 5. Mainly designed for operation in America, with AT&T and T-Mobile MNO approvals beside others.

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

LARA-R202-03B

Module supporting LTE Cat 1 bands 2 / 4 / 5 / 12, HSPA bands 2 / 5. Mainly designed for operation in America, with AT&T, USCC and T-Mobile MNO approvals beside others.

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

LARA-R202-82B

Module supporting LTE Cat 1 bands 2 / 4 / 5 / 12, HSPA bands 2 / 5. Mainly designed for operation in America, with AT&T, USCC and T-Mobile MNO approvals beside others.

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

LARA-R203-02B

Module supporting LTE Cat 1 bands 2 / 4 / 12. Mainly designed for operation in America, with AT&T and T-Mobile MNO approvals beside others.

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

LARA-R203-03B

Module supporting LTE Cat 1 bands 2 / 4 / 12. Mainly designed for operation in America, with AT&T and T-Mobile MNO approvals beside others.

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

LARA-R204-02B

Module supporting LTE Cat 1 bands 4 / 13. Mainly designed for operation in America, with Verizon MNO approval.

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

LARA-R211-02B

Module supporting LTE Cat 1 bands 3 / 7 / 20, €GPRS bands 900 / 1800. Mainly designed for operation in EMEA, with Vodafone approval beside others

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

LARA-R220-62B

Module supporting LTE Cat 1 bands 1 / 19. Mainly designed for operation in Japan, with NTT DoCoMo MNO approval.

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

LARA-R280-02B

Module supporting LTE Cat 1 bands 3 / 8 / 28, HSPA band 1. Mainly designed for operation in Asia-Pacific.

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

LARA-R281-02B

Module supporting LTE Cat 1 bands 1 / 3 / 8 / 20 / 28, HSPA band 1. Mainly designed for operation in EMEA.

26.0 x 24.0 x 2.6 mm, 150 pcs/reel

Table 41: Product ordering codes

LARA-R2 series - Data sheet

UBX-16005783 - R27 Appendix Page 45 of 48 C1-Public

Appendix

A Glossary

Abbreviation

Definition

8-PSK

8 Phase-Shift Keying modulation

ADC

Analog to Digital Converter

APAC

Asia-Pacific

CSFB

Circuit Switched Fall-Back

DDC

Display Data Channel (I2C compatible) Interface

Down-link (Reception)

DNS

Domain Name System

EMEA

Europe, the Middle East and Africa

ERS

External Reset Input Signal

ESD

Electrostatic Discharge

FOAT

Firmware update Over AT commands

FOTA

Firmware update Over The Air

Firmware

GDI

Generic Digital Interfaces (power domain)

GMSK

Gaussian Minimum-Shift Keying modulation

GND

Ground

GNSS

Global Navigation Satellite System

GPIO

General Purpose Input Output

HSDPA

High Speed Downlink Packet Access

HSIC

High Speed Inter Chip

HSUPA

High Speed Uplink Packet Access

I2C

Inter-Integrated Circuit Interface

I2S

Inter-IC Sound Interface

IMEI

International Mobile Equipment Identity

IMS

IP Multimedia Subsystem

LGA

Land Grid Array

LTE

Long Term Evolution

MNO

Mobile Network Operator

PCN

Product Change Notification / Sample Delivery Note / Information Note

Pull-Down

POS

Power-On Input Signal

Pull-Up

RMC

Reference Measurement Channel

SDIO

Secure Digital Input Output

Up-link (Transmission)

UMTS

Universal Mobile Telecommunications System

VoLTE

Voice over LTE

Table 42: Explanation of the abbreviations and terms used

LARA-R2 series - Data sheet

UBX-16005783 - R27 Related documentation Page 46 of 48 C1-Public

Revision history

Revision

Date

Name

Comments

R01

03-Mar-2016

sses

Initial release

R02

31-May-2016

sses

Document applicability updated to LARA-R204 and LARA-R211. Improved description of VCC, power-on, reset, host select, UART, USB, HSIC, GPIO pins.

R03

15-Jul-2016

sses

Added description of reels and tapes. Added current consumption and RF performance figures. Updated description of power-on, reset, UART, USB pins.

R04

11-Oct-2016

sses

Updated audio support. Updated PWR_ON, ANT_DET, GPIO and clock output description. Added 2G current consumption figures and remark in mechanical.

R05

25-Nov-2016

sses

Updated power-on and power-off sections.

R06

20-Dec-2016

sses

"Disclosure restriction" replaces "Document status" on page 2 and document footer. Extended the document applicability to LARA-R203-02B.

R07

17-Mar-2017

sses

Updated GPRS / EDGE multi-slot class. Added AC characteristics of I2S pins and other minor characteristics. Updated VUSB_DET pin logical levels input ranges. Extended the document applicability to LARA-R202-02B.

R08

19-Apr-2017

sses

Updated extended VCC range of LARA-R211 modules. Updated LARA-R204-02B and LARA-R211-02B product status.

R09

29-May-2017

sses

Updated LARA-R203-02B product status to engineering sample.

R10

30-Jun-2017

sses

Updated LARA-R202-02B product status. Extended the document applicability to LARA-R220 and LARA-R280.

R11

16-Aug-2017

sses

Updated LARA-R203-02B, LARA-R220-62B, LARA-R280-02B product status.

R12

22-Sep-2017

sses

Updated LARA-R202-02B product status.

R13

27-Oct-2017

sses

Updated LARA-R202-02B, LARA-R220-62B, LARA-R280-02B product status.

R14

15-Dec-2017

lpah

Updated LARA-R280-02B product status.

R15

27-May-2018

lpah

Extended document applicability to LARA-R202-02B-01, LARA-R203-02B-01, LARA-R204-02B-01 and LARA-R280-02B-01.

R16

31-Aug-2018

lpah

Extended document applicability to LARA-R204-02B-02, LARA-R220-62B-01, LARA-R280-02B-02. Added Rogers certification for LARA-R203.

R17

02-Oct-2018

lpah

Added T-Mobile certification for LARA-R202.

R18

20-Dec-2018

lpah / sses

Extended document applicability to LARA-R202-02B-02, LARA-R203-02B-02, LARA-R211-02B-02, LARA-R220-62B-02, LARA-R280-02B-03. Updated pin 1 indicator description. Mechanical dimension updated.

R19

10-Jun-2019

lpah / sses

Extended document applicability to LARA-R202-02B-03, LARA-R203-02B-03. Updated LARA-R211-02B-02 product status. Updated the RoHS statement. Added parameters for ATEX applications

R20

30-Aug-2019

lpah / sses

Extended document applicability to LARA-R202-82B, LARA-R220-62B-03, LARA-R280-02B-04

R21

25-Sep-2019

lpah

LARA-R220-62B-02, LARA-R220-62B-03, LARA-R280-02B-03, LARA-R280-02B-04 product status update

R22

21-Nov-2019

lpah

LARA-R202-82B product status update. Minor other corrections. Added LARA-R202 Rogers certification.

R23

17-Jan-2020

lpah

Extended document applicability to LARA-R203-02B-34.

R24

10-Jun-2020

lpah

LARA-R220-62B-03, LARA-R280-02B-04 application version update. Added LARA-R211 Deutsche Telekom certification. Minor other clarifications.

R25

29-Jul-2020

sses

Extended document applicability to LARA-R211-02B-03, LARA-R281-02B

R26

09-Oct-2020

sses

Updated LARA-R281-02B product status. Minor other clarifications.

R27

30-Mar-2021

sses

Extended document applicability to LARA-R202-03B, LARA-R203-03B

LARA-R2 series - Data sheet

UBX-16005783 - R27 Contact Page 48 of 48 C1-Public

Contact

For complete contact information, visit us at www.u-blox.com.

u-blox Offices

North, Central and South America

u-blox America, Inc.

Phone: +1 703 483 3180 Email: info_us@u-blox.com

Regional Office West Coast:

Phone: +1 408 573 3640 Email: info_us@u-blox.com

Technical Support:

Phone: +1 703 483 3185 Email: support@u-blox.com

Headquarters Europe, Middle East, Africa

u-blox AG

Phone: +41 44 722 74 44 Email: info@u-blox.com Support: support@u-blox.com

Asia, Australia, Pacific

u-blox Singapore Pte. Ltd.

Phone: +65 6734 3811 Email: info_ap@u-blox.com Support: support_ap@u-blox.com

Regional Office Australia:

Phone: +61 3 9566 7255 Email: info_anz@u-blox.com Support: support_ap@u-blox.com

Regional Office China (Beijing):

Phone: +86 10 68 133 545 Email: info_cn@u-blox.com Support: support_cn@u-blox.com

Regional Office China (Chongqing):

Phone: +86 23 6815 1588 Email: info_cn@u-blox.com Support: support_cn@u-blox.com

Regional Office China (Shanghai):

Phone: +86 21 6090 4832 Email: info_cn@u-blox.com Support: support_cn@u-blox.com

Regional Office China (Shenzhen):

Phone: +86 755 8627 1083 Email: info_cn@u-blox.com Support: support_cn@u-blox.com

Regional Office India:

Phone: +91 80 405 092 00 Email: info_in@u-blox.com Support: support_in@u-blox.com

Regional Office Japan (Osaka):

Phone: +81 6 6941 3660 Email: info_jp@u-blox.com Support: support_jp@u-blox.com

Regional Office Japan (Tokyo):

Phone: +81 3 5775 3850 Email: info_jp@u-blox.com Support: support_jp@u-blox.com

Regional Office Korea:

Phone: +82 2 542 0861 Email: info_kr@u-blox.com Support: support_kr@u-blox.com

Regional Office Taiwan:

Phone: +886 2 2657 1090 Email: info_tw@u-blox.com Support: support_tw@u-blox.com

Ublox LARA-R202, LARA-R281, LARA-R280, LARA-R220, LARA-R211 User manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Document information

Contents

1 Functional description

1.1 Overview

1.2 Product features

1.3 Block diagram

1.4 Product description

1.5 AT command support

1.6 Supported features

2 Interfaces

2.1 Power management

2.1.1 Module supply input (VCC)

2.1.2 RTC supply input / output (V_BCKP)

2.1.3 Generic digital interfaces supply output (V_INT)

2.2 Antenna interfaces

2.2.1 Antenna RF interfaces

2.2.2 Antenna detection

2.3 System functions

2.3.1 Module power-on

2.3.2 Module power-off

2.3.3 Module reset

2.3.4 Module / host configuration selection

2.4 SIM

2.4.1 SIM interface

2.4.2 SIM detection

2.5 Serial communication

2.5.1 Main UART interface

2.5.1.1 Multiplexer protocol

2.5.2 Auxiliary UART interface

2.5.3 USB interface

2.5.4 HSIC interface

2.5.5 DDC (I2C) interface

2.5.6 SDIO interface

2.6 Audio

2.7 Clock output

2.8 GPIO

3 Pin definition

3.1 Pin assignment

4 Electrical specifications

4.1 Absolute maximum rating

4.1.1 Maximum ESD

4.2 Operating conditions

4.2.1 Operating temperature range

4.2.2 Supply/power pins

4.2.3 Current consumption

4.2.4 LTE RF characteristics

4.2.5 3G RF characteristics

4.2.6 2G RF characteristics

4.2.7 ANT_DET pin

4.2.8 PWR_ON pin

4.2.9 RESET_N pin

4.2.10 SIM pins

4.2.11 USB pins

4.2.12 HSIC pins

4.2.13 DDC (I2C) pins

4.2.14 Generic Digital Interfaces pins

4.2.14.1 AC characteristics of clock output pin

4.2.14.2 AC characteristics of I2S pins

4.3 Parameters for ATEX applications

5 Mechanical specifications

6 Qualification and approvals

6.1 Reliability tests

6.2 Approvals

7 Product handling & soldering

7.1 Packaging

7.1.1 Reels

7.1.2 Tapes

7.2 Moisture sensitivity levels

7.3 Reflow soldering

7.4 ESD precautions

8 Default settings

9 Labeling and ordering information

9.1 Product labeling

9.2 Explanation of codes

9.3 Ordering information

Appendix