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EVA-8M
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u-blox EVA-8M, EVA-M8 User Manual

www.u-blox.com
UBX-16010593 - R08
EVA-8M and EVA-M8 series
u-blox 8 / u-blox M8 GNSS SiP modules
Hardware integration manual
EVA-8M and EVA-M8 series - Hardware integration manual
Title
EVA-8M and EVA-M8 series
Subtitle
u-blox 8 / u-blox M8 GNSS SiP modules
Document type
Hardware integration manual
Document number
UBX-16010593
Revision and date
R08
28-May-2020
Document status
Production information
Product status
Corresponding content status
In Development / Prototype
Objective Specification
Target values. Revised and supplementary data will be published later.
Engineering Sample
Advance Information
Data based on early testing. Revised and supplementary data will be published later.
Initial Production
Early Production Information
Data from product verification. Revised and supplementary data may be published later.
Mass Production / End of Life
Production Information
Document contains the final product specification.
European Union regulatory compliance
EVA-8M, EVA-M8M, and EVA-M8Q comply with all relevant requirements for RED 2014/53/EU. The EVA-8M and EVA-M8M/Q Declaration of Conformity (DoC) is available at www.u-blox.com within Support > Product resources > Conformity Declaration.
Product name
Type number
ROM/FLASH version
PCN reference
EVA-M8M
EVA-M8M-0-10
ROM SPG 3.01 / Flash FW SPG 3.01
UBX-16012546
EVA-M8M
EVA-M8M-1-10
ROM SPG 3.01 / Flash FW SPG 3.01
UBX-16012546
EVA-M8Q
EVA-M8Q-0-10
ROM SPG 3.01 / Flash FW SPG 3.01
N/A
EVA-8M
EVA-8M-0-10
ROM SPG 3.01
N/A
u-blox or third parties may hold intellectual property rights in the products, names, logos and designs included in this document. Copying, reproduction, modification or disclosure to third parties of this document or any part thereof is only permitted with the express written permission of u-blox. The information contained herein is provided “as is” and u-blox assumes no liability for its use. No warranty, either express or implied, is given, including but not limited to, with respect to the accuracy, correctness, reliability and fitness for a particular purpose of the information. This document may be revised by u-blox at any time without notice. For the most recent documents, visit www.u-blox.com. Copyright © u-blox AG.

Document information

This document applies to the following products:
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EVA-8M and EVA-M8 series - Hardware integration manual

Contents

Document information ................................................................................................................................ 2
Contents .......................................................................................................................................................... 3
1 Hardware description ........................................................................................................................... 6
1.1 Overview ........................................................................................................................................................ 6
2 Design-in ................................................................................................................................................... 7
2.1 Power management ................................................................................................................................... 7
2.1.1 Overview ............................................................................................................................................... 7
2.1.2 Power management configuration ................................................................................................. 8
2.2 Interfaces ...................................................................................................................................................... 9
2.2.1 UART interface .................................................................................................................................... 9
2.2.2 Display data channel (DDC) interface ...........................................................................................10
2.2.3 SPI interface ......................................................................................................................................10
2.2.4 USB interface .....................................................................................................................................10
2.2.5 SQI flash memory .............................................................................................................................11
2.3 I/O pins .........................................................................................................................................................12
2.3.1 Time pulse ..........................................................................................................................................12
2.3.2 External interrupt .............................................................................................................................13
2.3.3 Active antenna supervisor ..............................................................................................................13
2.3.4 Electromagnetic interference and I/O lines .................................................................................14
2.4 Real-time clock (RTC) ...............................................................................................................................15
2.4.1 RTC using a crystal ...........................................................................................................................15
2.4.2 RTC derived from the system clock: single crystal feature .....................................................15
2.4.3 RTC using an external clock ...........................................................................................................15
2.4.4 Time aiding .........................................................................................................................................16
2.5 RF input .......................................................................................................................................................16
2.5.1 Active antenna ..................................................................................................................................16
2.5.2 Passive antenna ................................................................................................................................16
2.5.3 Improved jamming immunity .........................................................................................................17
2.6 Safe boot mode (SAFEBOOT_N) ............................................................................................................17
2.7 System reset (RESET_N) ........................................................................................................................18
2.8 Design-in checklists .................................................................................................................................18
2.8.1 General considerations ....................................................................................................................18
2.8.2 Schematic design-in for EVA-8M / EVA-M8 series GNSS modules .......................................18
2.9 Pin description ...........................................................................................................................................19
2.9.1 Pin name changes.............................................................................................................................20
2.10 Layout design-in checklist ......................................................................................................................20
2.11 Layout ..........................................................................................................................................................21
2.11.1 Footprint .............................................................................................................................................21
2.11.2 Paste mask ........................................................................................................................................21
2.11.3 Placement ..........................................................................................................................................22
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2.12 Layout design-in: Thermal management .............................................................................................22
2.13 Migration considerations ........................................................................................................................22
2.13.1 Hardware migration from EVA-7M to EVA-8M / EVA-M8M / EVA-M8Q ..............................23
2.13.2 C88-M8M - Evaluating EVA-M8M on existing NEO-xM sockets ............................................24
2.14 EOS/ESD/EMI precautions ......................................................................................................................25
2.14.1 Electrostatic discharge (ESD) ........................................................................................................26
2.14.2 ESD protection measures ...............................................................................................................26
2.14.3 Electrical overstress (EOS) .............................................................................................................26
2.14.4 EOS protection measures ...............................................................................................................26
2.14.5 Electromagnetic interference (EMI) .............................................................................................27
2.14.6 Applications with cellular modules ...............................................................................................27
3 Product handling and soldering ..................................................................................................... 30
3.1 Packaging, shipping, storage and moisture preconditioning ..........................................................30
3.2 ESD handling precautions .......................................................................................................................30
3.3 Soldering .....................................................................................................................................................30
3.3.1 Soldering paste .................................................................................................................................30
3.3.2 Reflow soldering ................................................................................................................................31
3.3.3 Optical inspection .............................................................................................................................31
3.3.4 Repeated reflow soldering ..............................................................................................................31
3.3.5 Wave soldering ..................................................................................................................................31
3.3.6 Rework ................................................................................................................................................31
3.3.7 Use of ultrasonic processes ...........................................................................................................31
4 Product testing ................................................................................................................................... 32
4.1 Test parameters for OEM manufacturer .............................................................................................32
4.2 System sensitivity test ............................................................................................................................32
4.2.1 Guidelines for sensitivity tests ......................................................................................................32
4.2.2 “Go/No go” tests for integrated devices ......................................................................................32
Appendix ....................................................................................................................................................... 33
A Reference schematics ....................................................................................................................... 33
A.1 Cost-optimized circuit .............................................................................................................................33
A.2 Best-performance circuit with passive antenna ................................................................................34
A.3 Improved jamming immunity with passive antenna .........................................................................35
A.4 Circuit using active antenna ...................................................................................................................36
A.5 USB self-powered circuit with passive antenna .................................................................................37
A.6 USB bus-powered circuit with passive antenna .................................................................................38
A.7 Circuit using 2-pin antenna supervisor ................................................................................................39
A.8 Circuit using 3-pin antenna supervisor ................................................................................................40
B Component selection ........................................................................................................................ 41
B.1 External RTC (Y1) ......................................................................................................................................41
B.2 RF band-pass filter (F1) ...........................................................................................................................41
B.3 External LNA protection filter (F2) ........................................................................................................41
B.4 USB line protection (D2) ..........................................................................................................................42
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B.5 USB LDO (U1) .............................................................................................................................................42
B.6 External LNA (U1) .....................................................................................................................................42
B.7 Optional SQI Flash (U3) ............................................................................................................................42
B.8 RF ESD protection diode (D2) .................................................................................................................43
B.9 Operational amplifier (U6) .......................................................................................................................43
B.10 Open-drain buffer (U4, U7 and U8) ........................................................................................................43
B.11 Ferrite beads (FB1) ...................................................................................................................................43
B.12 Antenna supervisor switch transistor (T1) .........................................................................................44
B.13 Feed-through capacitors .........................................................................................................................44
B.14 Inductor (L1) ...............................................................................................................................................44
B.15 Standard capacitors .................................................................................................................................44
B.16 Standard resistors ....................................................................................................................................44
C Glossary ................................................................................................................................................. 45
Related documents ................................................................................................................................... 46
Revision history .......................................................................................................................................... 46
Contact .......................................................................................................................................................... 47
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1 Hardware description

1.1 Overview

The EVA-8M / EVA-M8 series GNSS modules feature the excellent performance of the u-blox 8 / u­blox M8 positioning engine. The EVA-8M / EVA-M8 series delivers high sensitivity and minimal acquisition times in the ultra-compact EVA form factor.
The EVA-8M / EVA-M8 series is an ideal solution for cost and space-sensitive applications. It is easy to design-in, only requiring an external GNSS antenna in most applications. The layout of the EVA-8M / EVA-M8 modules is especially designed to ease the customer’s design and limit near field interferences since RF and digital domains are kept separated.
The EVA-8M and EVA-M8M series module uses a crystal oscillator for lower system costs, while EVA­M8Q with TCXO provides the best performance. Like other u-blox GNSS modules, the EVA series uses components selected for functioning reliably in the field over the full operating temperature range.
The EVA-M8M and EVA-M8Q modules include a dual-frequency RF front-end, with which the u-blox M8 concurrent GNSS engine is able to intelligently use the highest amount of visible satellites from up to three GNSS (GPS/Galileo, together with GLONASS or BeiDou) systems for reliable positioning. The EVA-M8M series comes in two variants. The EVA-M8M-0 defaults to GPS/QZSS/GLONASS and fits global applications, whereas EVA-M8M-1 defaults to GPS/QZSS/BeiDou, making it the ideal module for China. The right satellite constellations can be selected without touching software, reducing the design and testing effort.
The EVA-8M includes a single-frequency RF front-end, and can receive and track either GPS or GLONASS signals.
The EVA-8M and EVA-M8 series modules can be easily integrated in manufacturing, thanks to the QFN-like package and low moisture sensitivity level. The modules are available in 500 pcs/reel, ideal for small production batches. The EVA-8M and EVA-M8 series modules combine a high level of integration capability with flexible connectivity options in a miniature package. This makes them perfectly suited for industrial and mass-market end products with strict size and cost requirements. The DDC (I2C-compliant) interface provides connectivity and enables synergies with u-blox cellular modules.
The EVA-8M and EVA-M8 series modules are qualified as stipulated in the JESD47 standard.
☞ For applications needing data logging capability, storing configurations and keeping AssistNow
data, the EVA-8M / EVA-M8 series GNSS modules must be connected to an external SQI flash memory. Firmware update from SQI flash memory is only supported with EVA-M8M and EVA-M8Q series GNSS modules. For more information about product features, see the EVA-M8 data sheet [1] and the EVA-8M data sheet [2]
☞ To determine which u-blox product best meets your needs, see the product selector tables on the
u-blox website www.u-blox.com.
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2 Design-in

To obtain good performance with EVA-8M / EVA-M8 series GNSS receiver modules, there are a number of issues requiring careful attention during the design-in. These include:
Power supply: Good performance requires a clean and stable power supply. Interfaces: Ensure correct wiring, rate and message setup on the module and your host
system.
Antenna interface: For optimal performance, seek short routing, matched impedance and no
stubs.
External LNA: With EVA-M8 and EVA-M8M modules, an additional external LNA is
mandatory if a passive antenna is used. With EVA-M8Q module, an additional external LNA is recommended with passive antenna.

2.1 Power management

2.1.1 Overview

The EVA-8M / EVA-M8 series GNSS modules provide four supply pins: VCC, VCC_IO, V_BCKP and VDD_USB. They can be supplied independently or tied together to adapt various concepts, depending
on the intended application. The following subsections explain the different supply voltages.
Figure 1 shows an example to supply the EVA-8M / EVA-M8 series modules when not using the USB interface. In this case, the VDD_USB pin is connected to ground.
Figure 1: EVA-8M / EVA-M8 series power supply example
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Main supply voltage (VCC)
During operation, the EVA-8M / EVA-M8 series GNSS modules are supplied through the VCC pin. It makes use of an internal DC/DC converter for improved power efficiency. In the following step, built­in LDOs generate stabilized voltages for the Core and RF domains of the chip, respectively. The current at VCC depends heavily on the current state of the system and is in general very dynamic.
☞ Do not add any series resistance (< 0.2 Ω) to the VCC supply, as it will generate input voltage noise
due to the dynamic current conditions.
☞ The equipment must be supplied by an external limited power source in compliance with the clause
2.5 of the standard IEC 60950-1.
I/O supply voltage (VCC_IO)
The digital I/Os of the EVA-8M / EVA-M8 series GNSS modules can be supplied with a separate voltage from the host system connected to the VCC_IO pin of the module. The wide range of VCC_IO allows seamless interfacing to standard logic voltage levels. However, in most applications VCC_IO and VCC share the same voltage level and are tied together. VCC_IO supplies also the RTC and the backup RAM (BBR) during normal operation.
The EVA-8M / EVA-M8 series GNSS modules come in two different IO voltage range flavors:
1. EVA-M8Q with IO voltage from 2.7 V to 3.6 V.
2. EVA-M8M and EVA-8M with the wider range from 1.65 V to 3.6 V. The level should be set
according to section 2.2.5.
☞ VCC_IO must be supplied for the system to boot. ☞ When running the firmware from the external SQI flash, most of the VCC_IO current is consumed
by the SQI bus.
Backup power supply (V_BCKP)
In the event of a power failure at VCC_IO, the backup domain is supplied by V_BCKP.
☞ If no backup supply is available, connect V_BCKP to VCC_IO. ☞ Avoid high resistance on the V_BCKP line: During the switch from main supply to backup supply,
a short current adjustment peak can cause high voltage drop on the pin with possible malfunctions.
☞ If the single crystal feature is enabled (which derives the RTC frequency from the main clock), the
V_BCKP pin also supplies the clock domain if there is a power failure at VCC_IO, meaning that the V_BCKP current will also be higher. Ensure that the capacity of the backup battery chosen meets
your requirements. EVA-M8Q module uses TCXO oscillator and does not support the single crystal feature. For more information about the single crystal feature, see section 2.4.2.
USB interface power supply
VDD_USB supplies I/Os of the USB interface. If the USB interface is being used, the system can be
either self-powered, that is, powered independently from the USB bus, or it can be bus-powered, that is, powered through the USB connection. In the bus-powered mode, the system supply voltages need to be generated from the USB supply voltage VBUS.
☞ If the USB interface is not used, the VDD_USB pin must be connected to GND.

2.1.2 Power management configuration

Depending on the application, the power supply schematic differs. Some examples are shown in the following sections:
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Pin 32 (D_SEL) = “high” (left open)
Pin 32 (D_SEL) = “Low” (connected to GND) UART TXD
SPI MISO
UART RXD
SPI MOSI
DDC SCL
SPI CLK
DDC SDA
SPI CS_N
Single supply voltage for VCC and VCC_IO, no backup supply: see Appendix, Figure 13 Separate supply voltages for VCC, VCC_IO and V_BCKP: see Appendix, Figure 14 Single supply voltage for VCC and VCC_IO, use of a backup supply: see Appendix, Figure 16
☞ For description of the different power operating modes see the EVA-M8 data sheet [1] and the
EVA-8M data sheet [2].

2.2 Interfaces

The EVA-8M / EVA-M8 series GNSS modules provide UART, SPI and DDC (I2C-compatible) interfaces for communication with a host CPU. A USB interface is also available on dedicated pins (see section
2.2.4). Additionally, an SQI interface is available for connecting the EVA-8M / EVA-M8 series GNSS modules with an optional external flash memory.
The UART, SPI and DDC pins are supplied by VCC_IO and operate at this voltage level.
Four dedicated pins can be configured as either 1 x UART and 1 x DDC or a single SPI interface selectable by D_SEL pin. Table 1 below provides the port mapping details.
Table 1: Communication Interfaces overview
☞ It is not possible to use the SPI interface simultaneously with the DDC or UART interface. ☞ For debugging purposes, it is recommended to have a second interface available, for example,
USB, that is independent from the application and accessible via test-points.
For each interface, a dedicated pin can be defined to indicate that data is ready to be transmitted. The TXD ready signal indicates that the receiver has data to transmit. Each TXD ready signal is associated with a particular interface and cannot be shared. A listener can wait on the TXD ready signal instead of polling the DDC or SPI interfaces. The UBX-CFG-PRT message lets you configure the polarity and the number of bytes in the buffer before the TXD ready signal goes active. The TXD ready function is disabled by default.
☞ The TXD ready functionality can be enabled and configured by proper AT commands sent to the
involved u-blox cellular module supporting the feature. For more information see the GPS Implementation and Aiding Features in u-blox wireless modules [6].
☞ The TXD ready feature is supported on several u-blox cellular module products.

2.2.1 UART interface

A UART interface is available for serial communication to a host CPU. The UART interface supports configurable data rates with the default at 9600 baud. Signal levels are related to the VCC_IO supply voltage. An interface based on RS232 standard levels (+/- 7 V) can be realized using level shifter ICs such as the Maxim MAX3232.
Hardware handshake signals and synchronous operation are not supported.
A signal change on the UART RXD pin can also be used to wake up the receiver in power save mode (see the u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [3]).
☞ Designs must allow access to the UART and the SAFEBOOT_N pin for future service, updates, and
reconfiguration.
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Module
VDD_USB
LDO
VDD_USB
R4
USB_DP
USB_DM
R5
C24 C23
D2
VBUS
DP
DM
GND
USB
Device Connector
U1
EN R11
EN

2.2.2 Display data channel (DDC) interface

An I2C-compatible display data channel (DDC) interface is available for serial communication with a host CPU.
☞ The SCL and SDA pins have internal pull-up resistors sufficient for most applications. However,
depending on the speed of the host and the load on the DDC lines additional external pull-up resistors might be necessary. For speed and clock frequency see the EVA-M8 data sheet [1] and the EVA-8M data sheet [2].
☞ To make use of DDC interface the D_SEL pin has to be left open. ☞ The EVA-8M / EVA-M8 series GNSS modules DDC interface provides serial communication with
u-blox cellular modules. See the specification of the applicable cellular module to confirm compatibility.

2.2.3 SPI interface

The SPI interface can be used to provide a serial communication with a host CPU. If the SPI interface is used, UART and DDC are deactivated because they share the same pins.
☞ To make use of the SPI interface, the D_SEL pin has to be connected to GND.

2.2.4 USB interface

The USB interface of the EVA-8M / EVA-M8 series GNSS modules supports the full-speed data rate of 12 Mbit/s. It is compatible with the USB 2.0 FS standard. To implement the physical characteristics required by the USB 2.0 specification, the interface requires some external components. Figure 2 shows the interface pins and additional external components. To comply with USB specifications, VBUS must be connected through an LDO (U1) to pin VDD_USB of the module. This ensures that the internal 1.5 kΩ pull-up resistor on USB_DP gets disconnected when the USB host shuts down VBUS.
Depending on the characteristics of the LDO (U1), for a self-powered design it is recommended to add a pull-down resistor (R8) at its output to ensure VDD_USB does not float if a USB cable is not connected, that is, when VBUS is not present. In USB self-powered mode, the power supply (VCC) can be turned off and the digital block is not powered. In this case, since VBUS is still available, the USB host still receives the signal indicating that the device is present and ready to communicate. This can be avoided by disabling the LDO (U1) using the enable signal (EN) of the VCC-LDO or the output of a voltage supervisor.
The interface can be used either in self-powered or bus-powered mode. The required mode can be configured using the UBX-CFG-USB message. Also, the vendor ID, vendor string, product ID and product string can be changed.
To get the 90 Ω differential impedance in between the USB_DM and USB_DP data line, a 27 Ω series resistor (R4, R5) must be placed into each data line (USB_DM and USB_DP).
Figure 2: USB interface
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Name
Component
Function
Comments
U1
LDO
Regulates VBUS (4.4 …5.25
V) down to a voltage of 3.3 V).
Almost no current requirement (~1 mA) if the GNSS receiver is operated as a USB self-powered device, but if bus-powered LDO (U1), it must be able to deliver the maximum current of ~100 mA.
C24, C23
Capacitors
Required according to the specification of LDO U1.
D2
Protection diodes
Protects circuit from overvoltage / ESD when connecting.
Use low-capacitance ESD protection such as ST Microelectronics USBLC6-2.
R4, R5
Serial termination resistors
Establishes a full-speed
driver impedance of 28…44
Ω.
A value of 27 Ω is recommended.
R11
Resistor
Ensures defined signal at VDD_USB when VBUS is not connected / powered.
100 kΩ is recommended for USB self-powered setup. For bus-powered setup R8 is not required.
Table 2: Summary of USB external components
See Appendix A.5 and Appendix A.6 for reference schematics for self- and bus-powered operation.
☞ If the USB interface is not used, connect VDD_USB to GND.

2.2.5 SQI flash memory

An external SQI (Serial Quad Interface) flash memory can be connected to the EVA-8M / EVA-M8 series GNSS modules. The SQI interface provides the following options:
Stores the current configuration permanently Saves data logging results Holds AssistNow Offline and AssistNow Autonomous data
☞ In addition, the EVA-M8M and EVA-M8Q GNSS modules can make use of a dedicated flash
firmware with an external SQI flash memory. The flash memory with these modules can be used to run firmware out of flash and to update the firmware as well. Running the firmware from the SQI flash requires a minimum SQI flash size of 8 Mbit.
☞ The voltage level of the SQI interface follows the VCC_IO level. Therefore, the SQI flash must be
supplied with the same voltage as VCC_IO of the EVA-8M / EVA-M8 module. It is recommended to place a decoupling capacitor (C4) close to the supply pin of the SQI flash.
☞ Make sure that the SQI flash supply range matches the voltage supplied at VCC_IO.
Figure 3 : Connecting an external SQI flash memory
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SQI flash size of 8 Mbit is sufficient to save AssistNow Offline and AssistNow Autonomous information as well as the current configuration data. However, for EVA-M8M and EVA-M8Q to run firmware from the SQI flash and provide space for logging results, a minimum size of 8 Mbit may not be sufficient, depending on the amount of data to be logged.
☞ For more information about supported SQI flash devices see Table 18.
EVA-8M / EVA-M8 series modules have a configurable VCC_IO monitor threshold (iomonCfg) to ensure that the module only start if the VCC_IO supply is within the supply range of the SQI flash device (VCC_IO is used to supply the SQI flash). This will ensure that any connected SQI flash memory will be detected correctly at startup.
See the u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [3] for setting the iomonCfg value.
With EVA-8M and EVA-M8M modules the VCC_IO monitor threshold is set to default 1.54 V value for using a 1.8 V Flash memory device.
With EVA-M8Q module, the VCC_IO monitor threshold is set to default 2.69 V value in production, but may be increased to 3.0 V.
If the default value for the VCC_IO monitor threshold is not suitable it can be set according to the IO supply voltage level (VCC_IO) in the eFuse by the low level configuration.
If VCC_IO voltage 2.7 V to 3.0 V is used, send the following sequence to the module:
B5 62 06 41 0C 00 00 00 03 1F 04 BA CF 67 FF 7F FF FF E5 95
If VCC_IO voltage 3.0 V to 3.6 V is used, send the following sequence to the module:
B5 62 06 41 0C 00 00 00 03 1F 4F 22 4C 5C FF 7F 7F FF 8A 7C
☞ Applying these sequences results in a permanent change and cannot be reversed. An unstable
supply voltage at the VCC_IO pin while applying these sequences can also damage the receiver.
☞ Make sure that the SAFEBOOT_N pin is available for entering safe boot mode. Programming the
SQI flash memory with flash firmware is done typically at production. For this purpose the EVA­M8M and EVA-M8Q GNSS modules have to enter the safe boot mode. For more information about SAFEBOOT_N pin, see section 2.6.
☞ When the EVA-M8M-1 variant is attached with an external SQI flash without running flash
firmware, the default concurrent reception of GPS/QZSS/SBAS and BeiDou remains unchanged. In case the flash is also used for execution of firmware update, the default reception will be reset to GPS/QZSS/SBAS and GLONASS. EVA-M8M-1 can be changed back to concurrent GPS/QZSS/SBAS and BeiDou by sending a dedicated UBX message (UBX-CFG-GNSS) to the module. For more information, see the u-blox 8 / ublox M8 Receiver Description Including Protocol Specification [3].

2.3 I/O pins

All I/O pins make use of internal pull-ups. Thus, there is no need to connect unused pins to VCC_IO.

2.3.1 Time pulse

A configurable time pulse signal is available with the EVA-8M / EVA-M8 series GNSS modules.
The TIMEPULSE output generates pulse trains synchronized with GPS or UTC time grid with intervals configurable over a wide frequency range. Thus it may be used as a low-frequency time synchronization pulse or as a high-frequency reference signal.
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Function
I/O
Description
Remarks
ANT_OK
I
Antenna OK
“high” = Antenna OK “low” = Antenna not OK
Default configuration
ANT_OFF
O
Control signal to turn on and off the antenna supply
“high” = Antenna OFF “low” = Antenna ON
Default configuration
By default, the time pulse signal is disabled. For more information, see the u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [3].

2.3.2 External interrupt

EXTINT is an external interrupt pin with fixed input voltage thresholds with respect to VCC_IO (see
the EVA-M8 data sheet [1] and the EVA-8M data sheet [2] for more information). It can be used for wake-up functions in power save mode on all u-blox M8 modules and for aiding. Leave open if unused; its function is disabled by default. By default, the external interrupt is disabled.
If the EXTINT is not used for an external interrupt function, it can be used for some other purpose, for example, as an output pin for the TXD ready feature to indicate that the receiver has data to transmit.
For further information, see the pin assignment in section 2.9 and the u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [3].
☞ If EXTINT is configured for on/off switching of the EVA-8M / EVA-M8 series GNSS modules, the
internal pull-up becomes disabled. Make sure the EXTINT input is always driven within the defined voltage level by the host.

2.3.3 Active antenna supervisor

The EVA-8M / EVA-M8 series GNSS modules support active antenna supervisors. The antenna supervisor gives information about the status of the active antenna and turns off the supply to the active antenna in case a short is detected, or to optimize the power consumption when in power save mode.
There is either a 2-pin or a 3-pin antenna supervisor. By default the 2-pin antenna supervisor is enabled.
2-pin antenna supervisor
The 2-pin antenna supervisor function, which is enabled by default, consists of the ANT_OK input and the ANT_OFF output pins.
Table 3: 2-pin antenna supervisor pins
The circuitry, as shown in Appendix A.7 (see Figure 19) provides antenna supply short circuit detection. It will prevent antenna operation via transistor T1 if a short circuit has been detected or if it is not required (for example, in power save mode).
The status of the active antenna can be checked by the UBX-MON-HW message. For more information, see the u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [3].
Open drain buffers U4 and U7 (for example, Fairchild NC7WZ07) are needed to shift the voltage levels. R3 is required as a passive pull-up to control T1 because U4 has an open drain output. R4 serves as a current limiter in the event of a short circuit.
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EVA-8M and EVA-M8 series - Hardware integration manual
Function
I/O
Description
Remarks
ANT_DET
I (pull-up)
Antenna detected
“high” = Antenna detected “low” = Antenna not detected
Byte sequence given in section 2.3.3.2 should be applied.
ANT_OK
I (pull-up)
Antenna not shorted
“high” = antenna has no short “low” = antenna has a short
Byte sequence given in section 2.3.3.2 should be applied.
ANT_OFF
O
Control signal to turn on and off the antenna supply
“high” = turn off antenna supply “low” = short to GND
Byte sequence given in section 2.3.3.2 should be applied.
3-pin antenna supervisor
The 3-pin antenna supervisor is comprised of the ANT_DET (active antenna detection), ANT_OK (short detection) and ANT_OFF (antenna on/off control) pins. This function must be activated by sending the following sequence to the EVA-8M / EVA-M8 series receivers in production:
B5 62 06 41 0C 00 00 00 03 1F CD 1A 38 57 FF FF F6 FF DE 11
☞ Applying this sequence results in a permanent change and cannot be reversed. An unstable supply
voltage at the VCC_IO pin while applying this sequence can also damage the receiver.
Table 4: 3-pin Antenna supervisor pins
The external circuitry, as shown in Appendix A.8 (see Figure 20), provides detection of an active antenna connection status. If the active antenna is present, the DC supply current exceeds a preset threshold defined by R4, R5, and R6. It will shut down the antenna via transistor T1 if a short circuit has been detected via U7 or if it is not required (for example, in power save mode).
The status of the active antenna can be checked by the UBX-MON-HW message. More information see the u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [3].
The open drain buffers U4, U7 and U8 (for example, Fairchild NC7WZ07) are needed to shift the voltage levels. R3 is required as a passive pull-up to control T1 because U4 has an open drain output. R4 serves as a current limiter in the event of a short circuit.

2.3.4 Electromagnetic interference and I/O lines

Any I/O signal line (length > ~3 mm) can act as an antenna and may pick up arbitrary RF signals transferring them as noise into the GNSS receiver. This specifically applies to unshielded lines, lines where the corresponding GND layer is remote or missing entirely, and lines close to the edges of the printed circuit board. If for example, a cellular signal radiates into an unshielded high-impedance line, it is possible to generate noise in the order of volts and not only distort receiver operation but also damage it permanently.
On the other hand, noise generated at the I/O pins will emit from unshielded I/O lines. Receiver performance may be degraded when this noise is coupled into the GNSS antenna (see Figure 9).
In case of improper shielding, it is recommended to use resistors or ferrite beads (see Appendix B.11) on the I/O lines in series. Choose these components with care because they also affect the signal rise times. Alternatively, feed-through capacitors with good GND connection close to the GNSS receiver can be used (see Appendix B.12).
EMI protection measures are particularly useful when RF emitting devices are placed next to the GNSS receiver and/or to minimize the risk of EMI degradation due to self-jamming. An adequate layout with a robust grounding concept is essential to protect against EMI. For more information, see subsection 2.14.6.3.
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EVA-8M and EVA-M8 series - Hardware integration manual

2.4 Real-time clock (RTC)

The use of the RTC is optional to maintain time in the event of power failure at VCC_IO. The RTC is required for hot start, warm start, AssistNow Autonomous, AssistNow Offline and in some power save mode operations. The time information can either be generated by connecting an external RTC crystal to the module, by deriving the RTC from the internal crystal oscillator, by connecting an external
32.768 kHz signal to the RTC input, or by time aiding of the GNSS receiver at every startup.
If a power save mode is used, an external RTC crystal must be connected. Optionally the RTC frequency can be derived from the system clock, or an external 32.768 kHz signal can be provided.

2.4.1 RTC using a crystal

The easiest way to provide time information to the receiver is to connect an RTC crystal to the corresponding pins of the RTC oscillator, RTC_I and RTC_O. There is no need to add load capacitors to the crystal for frequency tuning, because they are already integrated in the chip. Using an RTC crystal will provide the lowest current consumption to V_BCKP in case of a power failure. On the other hand, it will increase the BOM costs and requires space for the RTC crystal.
Figure 4: RTC crystal

2.4.2 RTC derived from the system clock: single crystal feature

The crystal-based EVA-8M / EVA-M8M GNSS modules can be configured in such way that the reference frequency for the RTC is internally derived from the 26 MHz crystal oscillator. For this feature RTC_I must be connected to ground and RTC_O left open. The capacity of the backup battery at V_BCKP must be dimensioned accordingly, taking into account the higher than normal current consumption at V_BCKP in the event of power failure at VCC_IO.
☞ Deriving RTC clock from internal oscillator is not available on TCXO-based EVA-M8Q module. ☞ With EVA-8M / EVA-M8M modules the single crystal feature can be configured by sending the
following sequence to the receiver: B5 62 06 41 0C 00 00 00 03 1F 06 C3 CC B4 FF FF FD FF B8 CF
☞ Applying this sequence results in a permanent change and cannot be reversed. An unstable supply
voltage at the VCC_IO pin while applying this sequence can also damage the receiver.

2.4.3 RTC using an external clock

Some applications can provide a suitable 32.768 kHz external reference to drive the module RTC. The external reference can simply be connected to the RTC_I pin. Make sure that the 32.768 kHz reference signal is always turned on and the voltage at the RTC_I pin does not exceed 350 mVpp. Adjusting of the voltage level (typically 200 mVpp) can be achieved with a resistive voltage divider followed by a DC blocking capacitor in the range of 1 nF to 10 nF. Also make sure the frequency versus temperature behavior of the external clock is within the recommended crystal specification shown in section B.1.
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