l For surface mounted applications in order to
optimize board space
l Low profile package
l Built-in strain relief
l Glass passivated junction
l Low inductance
l Typical ID less than 1A above 13V
l High temperature soldering :
260/10 seconds at terminals
l Plastic package has Underwriters Laboratory
Flammability Classification 94V-O
MECHANICAL DATA
Case: JEDEC DO-214AB Molded plastic
over passivated junction
Terminals: Solder plated, solderable per
MIL-STD-750, method 2026
DO-214AB
Standard Packaging: 16mm tape(EIA-481)
Weight: 0.007 ounce, 0.21 gram
MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS
Ratings at 25ambient temperature unless otherwise specified.
DC Power Dissipation @ TL=75, Measure at Zero Lead Length(Fig. 1)
Derate above 75(Note 1)
Peak forward Surge Current 8.3ms single half sine-wave superimposed on rated
load(JEDEC Method) (Note 1,2)
Operating Junction and Storage Temperature Range TJ,T
NOTES:
1. Mounted on 8.0mm2 copper pads to each terminal.
2. 8.3ms single half sine-wave, or equivalent square wave, duty cycle = 4 pulses per minute maximum.
SYMBOL VALUE UNITS
PD 5.0
40.0
I
See Fig. 5 Amps
FSM
-55 to +150
STG
Watts
mW/
1SMC5348 THRU 1SMC5388
Regulation
ELECTRICAL CHARACTERISTICS (TA=25unless otherwise noted, VF=1.2 Max @ IF=1A for all types.
1. TOLERANCE AND VOLTAGE DESIGNATION - The JEDEC type numbers shown indicate a tolerance of ±10% with
guaranteed limits on only Vz, IR, Ir, and VF as shown in the electrical characteristics table. Units with guaranteed limits
on all seven parameters are indicated by suffix “B” for ±5% tolerance.
2. ZENER VOLTAGE (Vz) AND IMPEDANCE (ZZT & ZZK) - Test conditions for Zener voltage and impedance are as
follows; Iz is applied 40±10 ms prior to reading. Mounting contacts are located from the inside edge of mounting
clips to the body of the diode.(TA=25
).
3. SURGE CURRENT (Ir) - Surge current is specified as the maximum allowable peak, non-recurrent square-wave
current with a pulse width, PW, of 8.3 ms. The data given in Figure 5 may be used to find the maximum surge
current for a quare wave of any pulse width between 1 ms and 1000ms by plotting the applicable points on
logarithmic paper. Examples of this, using the 6.8v and 200V zeners, are shown in Figure 6. Mounting
contact located as specified in Note 3. (TA=25
).
4. VOLTAGE REGULATION (Vz) - Test conditions for voltage regulation are as follows: Vz measurements are made
at 10% and then at 50% of the Iz max value listed in the electrical characteristics table. The test currents are the
same for the 5% and 10% tolerance devices. The test current time druation for each Vz measurement is 40±10 ms.
(TA=25
). Mounting contact located as specified in Note2.
5. MAXIMUM REGULATOR CURRENT (IZM) - The maximum current shown is based on the maximum voltage of a
5% type unit. Therefore, it applies only to the B-suffix device. The actual IZM for any device may not exceed the
value of 5 watts divided by the actual Vz of the device. TL=75at maximum from the device body.
RATING AND CHARACTERISTICS CURVES
1SMC5348 THRU 1SMC5388
TEMPERATURE COEFFICIENTS
Fig. 1-POWER TEMPERATURE DERATING CURVE Fig. 2-TEMPERATURE COEFFICIENT RANGE
FOR UNITS 6 TO 220 VOLTS
Fig. 3-TYPICAL THERMAL RESPONSE
Fig. 4-TYPICAL THERMAL RESISTANCE Fig. 5-MAXIMUM NON-REPETITIVE SURGE CURRENT
VERSUS NOMINAL ZENER VOLTAGE(SEE NOTE 3)
RATING AND CHARACTERISTICS CURVES
1SMC5348 THRU 1SMC5388
ZENER VOLTAGE versus ZENER CURRENT
(Figures 7,8, AND 9)
Fig. 6-PEAK SURGE CURRENT VERSUS PULSE Fig. 7-ZENER VOLTAGE VERSUS ZENER CURRENT
WIDTH(SEE NOTE 3) VZ =6.8 THRU 10 VOLTS
Fig. 8- ZENER VOLTAGE VERSUS ZENER CURRENT Fig. 9- ZENER VOLTAGE VERSUS ZENER CURREN
VZ = 11 THRU 75 VOLTS VZ = 82 THRU 200 VOLTS
APPLICATION NOTE:
Since the actual voltage available from a given zener
diode is temperature dependent, it is necessary to
determine junction temperature under any set of
operating conditions in order to calculate its value. The
following procedure is recommended:
Lead Temperature, TL, should be determined from:
TL = LAPD + TA
LA is the lead-to-ambient thermal resistance (/W)
and PD is the power dissipation.
Junction Temperature, TJ , may be found from:
TJ = TL + TJL
TJL is the increase in junction temperature above the
lead temperature and may be found from Figure 3 for a
train of power pulses or from Figure 4 for dc power.
T
= JLPD
JL
For worst-case design, using expected limits of Iz, limits
of PD and the extremes of TJ(TJ) may be estimated.
Changes in voltage, Vz, can then be found from:
V
=
VZTJ
VZ, the zener voltage temperature coefficient, is fount
from Figures 2.
Under high power-pulse operation, the zener voltage will
vary with time and may also be affected significantly be
the zener resistance. For best regulation, keep current
excursions as low as possible.
Data of Figure 3 should not be used to compute surge
capability. Surge limitations are given in Figure 5. They
are lower than would be expected by considering only
junction temperature, as current crowding effects cause
temperatures to be extremely high in small spots
resulting in device degradation should the limits of
Figure. 5 be exceeded.
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