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Datasheet: Rev. K 01-26-16
Disclaimer: Subject to change without notice
© 2016 TriQuint Semiconductor, Inc
www.triquint.com / www.qorvo.com
Repeaters
Mobile Infrastructure
CDMA / WCDMA / LTE
General Purpose Wireless
400-4000 MHz
+27.5 dBm P1dB
+44 dBm Output IP3
17.8 dB Gain at 2140 MHz
+5 V Single Supply, 135 mA Current
Internal RF overdrive protection
Internal DC overvoltage protection
On chip ESD protection
SOT-89 Package
The TQP7M9102 is a high linearity driver amplifier in a
low-cost, RoHS compliant, surface mount package. This
InGaP/GaAs HBT delivers high performance across a
broad range of frequencies with +44 dBm OIP3 and +27.5
dBm P1dB while only consuming 135 mA quiescent
current. All devices are 100% RF and DC tested.
The TQP7M9102 incorporates on-chip features that
differentiate it from other products in the market. The
amplifier integrates an on-chip DC over-voltage and RF
over-drive protection. This protects the amplifier from
electrical DC voltage surges and high input RF input
power levels that may occur in a system. On-chip ESD
protection allows the amplifier to have a very robust Class
2 HBM ESD rating.
The TQP7M9102 is targeted for use as a driver amplifier
in wireless infrastructure where high linearity, medium
power, and high efficiency are required. The device an
excellent candidate for transceiver line cards in current
and next generation multi-carrier 3G / 4G base stations.
0.5 W High Linearity Amplifier
869−960 MHz Evaluation Board
2.11–2.17 GHz Evaluation Board
2.5–2.7 GHz Evaluation Board
Standard T/R size = 1000 pieces on a 7” reel
RF IN GND RF OUT / V
CC
1 2 3
Backside Paddle - GND
TQP7M9102
½ W High Linearity Amplifier
![](/html/80/802e/802e987c22a4c6aea97eb83df19107499d99d9b97c2ca1a5eeac4d87a23b6875/bg2.png)
Datasheet: Rev. K 01-26-16
Disclaimer: Subject to change without notice
© 2016 TriQuint Semiconductor, Inc
www.triquint.com / www.qorvo.com
Recommended Operating Conditions
Electrical specifications are measured at specified test
conditions. Specifications are not guaranteed over all
recommended operating conditions.
RF Input Power, CW, 50Ω, T=25°C
Operation of this device outside the parameter ranges
given above may cause permanent damage.
Electrical Specifications
Test conditions unless otherwise noted: VCC=+5V, Temp.=+25 °C, matched 2140 MHz reference circuit
Operational Frequency Range
Pout = +9 dBm/tone, ∆f = 1 MHz
Notes:
1. ACLR test set-up: 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 10.2 dB at 0.01% Probability
Performance Summary Table
Test conditions unless otherwise noted: VCC =+5V, Temp.= +25 °C, band specific matching networks
(1)
Notes:
1. Reference designs for the various frequencies are either included on this datasheet or may be obtained by contacting
sjcapplications.engineering@tqs.com.
TQP7M9102
½ W High Linearity Amplifier
![](/html/80/802e/802e987c22a4c6aea97eb83df19107499d99d9b97c2ca1a5eeac4d87a23b6875/bg3.png)
Datasheet: Rev. K 01-26-16
Disclaimer: Subject to change without notice
© 2016 TriQuint Semiconductor, Inc
www.triquint.com / www.qorvo.com
Device Characterization Data
Note: The gain for the unmatched device in a 50 ohm system is shown as the black trace labeled "Gain (S21)". In a circuit tuned for a particular
frequency, it is expected that actual gain will be higher, up to the maximum stable gain. The maximum stable gain is shown as the red trace
[Gmax]. The impedance Smith chart plots are shown from 0.01 to 4 GHz.
Test Conditions: VCC=+5 V, ICQ=135 mA (typ.), Temp.=+25 °C, unmatched 50 Ohm system, reference plane at device leads
0
5
10
15
20
25
30
0 0.5 1 1.5 2 2.5 3 3.5 4
Gain and Maximum Stable Gain
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
-1 -0.75-0.5-0.25 0 0.250.50.75 1
TQP7M9102
½ W High Linearity Amplifier
![](/html/80/802e/802e987c22a4c6aea97eb83df19107499d99d9b97c2ca1a5eeac4d87a23b6875/bg4.png)
Datasheet: Rev. K 01-26-16
Disclaimer: Subject to change without notice
© 2016 TriQuint Semiconductor, Inc
www.triquint.com / www.qorvo.com
746 – 768 MHz Reference Design
1. See Evaluation Board PCB Information for material and stack up.
2. The recommended component values are dependent upon the frequency of operation.
3. All components are of 0603 size unless stated on the schematic.
4. Critical component placement locations:
Distance from U1 Pin Pad 1 (left edge) to R1 (right edge): 0 mils
Distance from U1 Pin Pad 1 (left edge) to C6 (right edge): 60 mils
Distance from U1 Pin Pad 1 (left edge) to C5 (right edge): 230 mils
Distance from U1 Pin Pad 3 (right edge) to L2 (left edge): 0 mils
Bill of Material 746 – 768 MHz Reference Design
½ W High Linearity Amplifier
CAP, 0603, +/-5%. 100V NPO/COG
CAP, 0603, +/-2%. 50V. NPO/COG
CAP, 0603, +/-0.1PF. 100V. NPO/COG
CAP, 0603, 10%, X5R , 10V
IND, 0603, +/-0.3. >5600MHZ
Cap., Chip, 10%, 10V, X5R
Typical Performance 746 – 768 MHz Reference Design
Test conditions unless otherwise noted: VCC=+5 V, ICQ=137 mA (typ.), Temp.=+25 °C
Pout= +18 dBm/tone, f= 1 MHz
J4
J3
U1
L1
C2
C3
C4
C1
R1
C5
L2
C6
U1
TQP7M9102
J4 GND
J3 Vcc
1
2,4
3
J1
RF
Input
J2
RF
Output
L1
0805
33 nH
C1
100 pF
C4
1.0 uF
C3
100 pF
R1
0402
3.0
C6
4.7 pF
C2
100 pF
L2
4.7 nH
C5
12 pF
TQP7M9102
½ W High Linearity Amplifier
![](/html/80/802e/802e987c22a4c6aea97eb83df19107499d99d9b97c2ca1a5eeac4d87a23b6875/bg5.png)
Datasheet: Rev. K 01-26-16
Disclaimer: Subject to change without notice
© 2016 TriQuint Semiconductor, Inc
www.triquint.com / www.qorvo.com
Performance Plots 746 – 768 MHz Reference Design
18
19
20
21
22
745 750 755 760 765 770
Gain (dB)
Frequency (MHz)
Gain vs. Frequency
-15
-10
-5
0
745 750 755 760 765 770
|S11| (dB)
Frequency (MHz)
Input Return Loss vs. Frequency
-15
-10
-5
0
745 750 755 760 765 770
|S22| (dB)
Frequency (MHz)
Output Return Loss vs. Frequency
30
35
40
45
50
15 16 17 18 19 20 21
OIP3 (dBm)
Pout/Tone (dBm)
OIP3 vs. Pout/tone
TQP7M9102
½ W High Linearity Amplifier
![](/html/80/802e/802e987c22a4c6aea97eb83df19107499d99d9b97c2ca1a5eeac4d87a23b6875/bg6.png)
Datasheet: Rev. K 01-26-16
Disclaimer: Subject to change without notice
© 2016 TriQuint Semiconductor, Inc
www.triquint.com / www.qorvo.com
869 – 894 MHz Evaluation Board (TQP7M9102−PCB900)
Notes:
1. See Evaluation Board PCB Information for material and stack up.
2. Components shown on the silkscreen but not on the schematic are not used.
3. The recommended component values are dependent upon the frequency of operation.
4. All components are of 0603 size unless stated on the schematic.
5. Critical component placement locations:
Distance from U1 Pin 1 (left edge) to R1 (right edge): 90 mils (4.3 deg. at 920 MHz)
Distance from R1 (left edge) to C5 (right edge): 70 mils (3.3 deg. at 920 MHz)
Distance from U1 Pin 3 (right edge) to L2 (left edge): 120 mils (5.7 deg. at 920 MHz)
Distance from U1 Pin 3 (right edge) to C6 (left edge): 370 mils (17.6 deg. at 920 MHz)
Bill of Material TQP7M9102−PCB900
TQP7M9102 Amplifier, SOT-89 pkg.
Resistor, Chip, 0603, 5%, 1/16W
Inductor, 0603, +/-0.3 nH
Inductor, 0805, 5%, Coilcraft CS Series
Cap., Chip, 0603, +/-0.1pF. 200V.
Cap., Chip, 0603, +/-0.1pF. 200V.
Cap., Chip, 5%, 50V, NPO/COG
Cap., Chip, 10%, 10V, X5R
Typical Performance TQP7M9102−PCB900
Test conditions unless otherwise noted: VCC=+5V, ICQ=137 mA (typ.), Temp.=+25 °C
Pout= +19 dBm/tone, Δf=1 MHz
Notes:
1. ACLR Test set-up: 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 10.2 dB at 0.01% Probability
J4
J3
U1
L1
C2
C3
C4
C1
R1
C5
L2
C6
U1
TQP7M9102
J4 GND
J3 Vcc
1
2,4
3
J1
RF
Input
J2
RF
Output
L1
33 nH
0805
C1
100 pF
C4
1 uF
C3
100 pF
C2
100 pF
C5
8.2 pF
C6
3.3 pF
R1
1.8
L2
3.3 nH
TQP7M9102
½ W High Linearity Amplifier
![](/html/80/802e/802e987c22a4c6aea97eb83df19107499d99d9b97c2ca1a5eeac4d87a23b6875/bg7.png)
Datasheet: Rev. K 01-26-16
Disclaimer: Subject to change without notice
© 2016 TriQuint Semiconductor, Inc
www.triquint.com / www.qorvo.com
Performance Plots TQP7M9102−PCB900
Test conditions unless otherwise noted: VCC=+5V, ICQ=137 mA (typ.), Temp.=+25 °C
19
20
21
22
23
24
860 880 900 920 940 960
Gain (dB)
Freq (MHz)
Gain vs. Frequency
-25
-20
-15
-10
-5
0
860 880 900 920 940 960
|S11| (dB)
Freq (MHz)
Input Return Loss vs. Frequency
-25
-20
-15
-10
-5
0
860 880 900 920 940 960
|S22| (dB)
Freq (MHz)
Output Return Loss vs. Frequency
-65
-60
-55
-50
-45
-40
-35
12 13 14 15 16 17 18 19 20
+85°C
+25°C
−40°C
W-CDMA 3GPP Test Model 1+64 DPCH
PAR = 10.2 dB @ 0.01% Probability
3.84 MHz BW
Freq.=920 MHz
36
38
40
42
44
46
11 13 15 17 19 21
+85°C
+25°C
−40°C
Freq.=920 MHz
1 MHz Tone Spacing
25
26
27
28
29
30
860 880 900 920 940 960
-65
-60
-55
-50
-45
-40
-35
12 13 14 15 16 17 18 19 20
960 MHz
920 MHz
869 MHz
W-CDMA 3GPP Test Model 1+64 DPCH
PAR = 10.2 dB @ 0.01% Probability
3.84 MHz BW
Temp.=+25°C
30
35
40
45
50
11 13 15 17 19 21
OIP3 (dBm)
Pout/Tone (dBm)
OIP3 Vs. Pout/Tone
960 MHz
920 MHz
869 MHz
1 MHz Tone Spacing
Temp.=+25°C
19
21
23
25
27
29
-3 -1 1 3 5 7
Output Power vs. Input Power
−40°C
+25°C
+85°C
Freq.= 920 MHz
120
140
160
180
200
220
240
260
12 14 16 18 20 22 24 26 28
TQP7M9102
½ W High Linearity Amplifier
![](/html/80/802e/802e987c22a4c6aea97eb83df19107499d99d9b97c2ca1a5eeac4d87a23b6875/bg8.png)
Datasheet: Rev. K 01-26-16
Disclaimer: Subject to change without notice
© 2016 TriQuint Semiconductor, Inc
www.triquint.com / www.qorvo.com
700 – 1000 MHz Evaluation Board (TQP7M9102−PCB900)
Notes:
1. See Evaluation Board PCB Information for material and stack up.
2. Components shown on the silkscreen but not on the schematic are not used.
3. The recommended component values are dependent upon the frequency of operation.
4. All components are of 0603 size unless stated on the schematic.
5. Critical component placement locations:
Distance from U1 Pin 1 (left edge) to R1 (right edge): 90 mils (4.3 deg. at 920 MHz)
Distance from R1 (left edge) to C5 (right edge): 70 mils (3.3 deg. at 920 MHz)
Distance from U1 Pin 3 (right edge) to L2 (left edge): 120 mils (5.7 deg. at 920 MHz)
Distance from U1 Pin 3 (right edge) to C6 (left edge): 370 mils (17.6 deg. at 920 MHz)
Bill of Material TQP7M9102−PCB900
TQP7M9102 Amplifier, SOT-89 pkg.
Resistor, Chip, 0603, 5%, 1/16W
Inductor, 0805, 5%, Coilcraft CS Series
Cap., Chip, 0603, ±0.1pF. 200V. NPO/COG
Cap., Chip, 0603, ±0.1pF. 200V. NPO/COG
Cap., Chip, 5%, 50V, NPO/COG
Cap., Chip, 10%, 10V, X5R
Typical Performance TQP7M9102−PCB900
Test conditions unless otherwise noted: VCC=+5V, ICQ=137 mA (typ.), Temp.=+25 °C
Pout= +19 dBm/tone, Δf=1 MHz
Notes:
1. ACLR Test set-up: 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 10.2 dB at 0.01% Probability
J4
J3
U1
L1
C2
C3
C4
C1
R1
C5
L2
C6
U1
TQP7M9102
J4 GND
J3 Vcc
1
2,4
3
J1
RF
Input
J2
RF
Output
L1
33 nH
0805
C1
100 pF
C4
1 uF
C3
100 pF
C2
100 pF
C5
8.2 pF
C6
3.3 pF
R1
1.8
L2
3.3 nH
TQP7M9102
½ W High Linearity Amplifier
![](/html/80/802e/802e987c22a4c6aea97eb83df19107499d99d9b97c2ca1a5eeac4d87a23b6875/bg9.png)
Datasheet: Rev. K 01-26-16
Disclaimer: Subject to change without notice
© 2016 TriQuint Semiconductor, Inc
www.triquint.com / www.qorvo.com
Performance Plots TQP7M9102−PCB900
Test conditions unless otherwise noted: VCC=+5V, ICQ=137 mA (typ.), Temp.=+25 °C
19
20
21
22
23
24
860 880 900 920 940 960
Gain (dB)
Freq (MHz)
Gain vs. Frequency
-25
-20
-15
-10
-5
0
860 880 900 920 940 960
|S11| (dB)
Freq (MHz)
Input Return Loss vs. Frequency
-25
-20
-15
-10
-5
0
860 880 900 920 940 960
|S22| (dB)
Freq (MHz)
Output Return Loss vs. Frequency
-65
-60
-55
-50
-45
-40
-35
12 13 14 15 16 17 18 19 20
+85°C
+25°C
−40°C
W-CDMA 3GPP Test Model 1+64 DPCH
PAR = 10.2 dB @ 0.01% Probability
3.84 MHz BW
Freq.=920 MHz
36
38
40
42
44
46
11 13 15 17 19 21
+85°C
+25°C
−40°C
Freq.=920 MHz
1 MHz Tone Spacing
25
26
27
28
29
30
860 880 900 920 940 960
-65
-60
-55
-50
-45
-40
-35
12 13 14 15 16 17 18 19 20
960 MHz
920 MHz
869 MHz
W-CDMA 3GPP Test Model 1+64 DPCH
PAR = 10.2 dB @ 0.01% Probability
3.84 MHz BW
Temp.=+25°C
30
35
40
45
50
11 13 15 17 19 21
OIP3 (dBm)
Pout/Tone (dBm)
OIP3 Vs. Pout/Tone
960 MHz
920 MHz
869 MHz
1 MHz Tone Spacing
Temp.=+25°C
19
21
23
25
27
29
-3 -1 1 3 5 7
Output Power vs. Input Power
−40°C
+25°C
+85°C
Freq.= 920 MHz
120
140
160
180
200
220
240
260
12 14 16 18 20 22 24 26 28
TQP7M9102
½ W High Linearity Amplifier