TRIPATH TECHNOLOGY TA3020 Datasheet
TECHNICAL INFORMATION
Stereo 300W (4
using Digital Power Processing
ΩΩΩΩ
) Class-T Digital Audio Amplifier Driver
TM
Technology TA3020
PRELIMINARY – January 2001
General Description
The TA3020 is a two-channel, 300W (4Ω) per channel Amplifier Driver IC that uses Tripath’s
proprietary Digital Power Processing (DPP
audio fidelity of Class-AB and the power efficiency of Class-D amplifiers.
Applications
!"Audio/Video Amplifiers & Receivers
!"Pro-audio Amplifiers
!"Automobile Power Amplifiers
!"Subwoofer Amplifiers
Benefits
!"Reduced system cost with
smaller/less expensive power
supply and heat sink
!"Signal fidelity equal to high quality
Class-AB amplifiers
!"High dynamic range compatible
with digital media such as CD and
DVD
TM
) technology. Class-T amplifiers offer both the
Features
!"Class-T architecture
!"Proprietary Digital Power Processing technology
!"“Audiophile” Sound Quality
!"0.02% THD+N @ 50W, 8Ω
!"0.03% IHF-IM @ 30W, 8Ω
!"High Efficiency
!"95% @ 150W @ 8Ω
!"90% @ 275W @ 4Ω
!"Supports wide range of output power levels
!"Up to 300W/channel (4Ω), single-ended outputs
!"Up to 1000W (4Ω), bridged outputs
!"Output over-current protection
!"Over- and under-voltage protection
!"48-pin DIP (dual-inline package)
Typical Performance
THD+N versus Output Power versus Supply Voltage
10
f = 1kHz
5
BBM = 80nS
BW = 22Hz - 22kHz
2
1
0.5
0.2
THD+N (%)
0.1
0.05
0.02
0.01
1 5002 5 10 20 50 100 200
R
= 4
Ω
L
Output Power (W)
39V
45V
54V
TA3020, Rev 2.1, 01.01 1
TECHNICAL INFORMATION
Absolute Maximum Ratings
(Note 1)
SYMBOL PARAMETER Value UNITS
VPP, VNN Supply Voltage +/- 70 V
V5 Positive 5 V Bias Supply
VN10 Voltage for FET drive VNN+13 V
T
STORE
T
A
TJ Junction Temperature 150º C
ESDHB ESD Susceptibility – Human Body Model (Note 3)
ESDMM ESD Susceptibility – Machine Model (Note 4)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: This is a target specification. Characterization is still needed to validate this temperature range.
Note 3: Human body model, 100pF discharged through a 1.5KΩ resistor.
Note 4: Machine model, 220pF – 240pF discharged through all pins.
Voltage at Input Pins (pins 12-16, 18, 19-26, 29-33, 37)
Storage Temperature Range -55º to 150º C
Operating Free-air Temperature Range (Note 2) -40º to 85º C
All pins
All pins
See the table below for Operating Conditions.
-0.3V to (V5+0.3V)
6
TBD
TBD
V
V
V
Operating Conditions
(Note 5)
SYMBOL PARAMETER MIN. TYP. MAX. UNITS
VPP, VNN Supply Voltage +/- 15 +/-45 +/- 65 V
V5 Positive 5 V Bias Supply 4.5 5 5.5 V
VN10 Voltage for FET drive (Volts above VNN) 9 10 12 V
Note 5: Recommended Operating Conditions indicate conditions for which the device is functional.
See Electrical Characteristics for guaranteed specific performance limits.
2
TA3020, Rev 2.1, 01.01
TECHNICAL INFORMATION
Electrical Characteristics
(Note 6)
TA = 25 °C. See Application/Test Circuit on page 7. Unless otherwise noted, the supply voltage is
VPP=|VNN|=45V.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITS
I
q
I
MUTE
VIH High-level input voltage (MUTE) 3.5 V
VIL Low-level input voltage (MUTE) 1.0 V
VOH High-level output voltage (HMUTE) I
VOL Low-level output voltage (HMUTE) I
V
OFFSET
IOC Over Current Sense Voltage
I
VPPSENSE
V
VPPSENSE
I
VNNSENSE
V
VNNSENSE
Note 6: Minimum and maximum limits are guaranteed but may not be 100% tested.
Quiescent Current
(No load, BBM0=1,BBM1=0,
Mute = 0V)
VPP = +45V
VNN = -45V
V5 = 5V
VN10 = 10V
Mute Supply Current
(No load, Mute = 5V)
VPP = +45V
VNN = -45V
V5 = 5V
VN10 = 10V
= 3mA 4.0 V
OH
= 3mA 0.5 V
OL
Output Offset Voltage No Load, MUTE = Logic low
0.1% R
FBA
, R
FBB
, R
resistors
FBC
TBD TBD 1.0 TBD V
Threshold
VPPSENSE Threshold Currents Over-voltage turn on (muted)
Over-voltage turn off (mute off)
Under-voltage turn off (mute off)
Under-voltage turn on (muted)
Threshold Voltages with
R
VPPSENSE
= XXKΩ
Over-voltage turn on (muted)
Over-voltage turn off (mute off)
Under-voltage turn off (mute off)
Under-voltage turn on (muted)
VNNSENSE Threshold Currents Over-voltage turn on (muted)
Over-voltage turn off (mute off)
Under-voltage turn off (mute off)
Under-voltage turn on (muted)
Threshold Voltages with
R
VNNSENSE
= XXKΩ
Over-voltage turn on (muted)
Over-voltage turn off (mute off)
Under-voltage turn off (mute off)
Under-voltage turn on (muted)
90
90
45
200
1
1
20
1
TBD
TBD
TBD
mA
mA
mA
mA
mA
mA
mA
mA
-TBD TBD mV
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
162
154
TBD
TBD
TBD
TBD
174
169
TBD
TBD
TBD
TBD
79
72
86
77
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
A
µ
A
µ
A
µ
A
µ
V
V
V
V
A
µ
A
µ
A
µ
A
µ
V
V
V
V
TA3020, Rev 2.1, 01.01 3
TECHNICAL INFORMATION
Performance Characteristics – Single Ended
TA = 25 °C. Unless otherwise noted, the supply voltage is VPP=|VNN|=45V, the input frequency is
1kHz and the measurement bandwidth is 20kHz. See Application/Test Circuit.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITS
P
Output Power
OUT
THD + N Total Harmonic Distortion Plus
IHF-IM IHF Intermodulation Distortion
SNR Signal-to-Noise Ratio
CS Channel Separation
η
AV Amplifier Gain
A
VERROR
e
NOUT
(continuous RMS/Channel)
Noise
Power Efficiency
Channel to Channel Gain Error
Output Noise Voltage A Weighted, no signal, input shorted,
THD+N = 0.1%, R
R
THD+N = 1%, R
R
= 50W/Channel, RL = 8Ω
P
OUT
19kHz, 20kHz, 1:1 (IHF), R
= 30W/Channel
P
OUT
A Weighted, R
= 275W/Channel
P
OUT
0dBr = 30W, R
= 150W/Channel, RL = 8Ω
P
OUT
P
= 10W/Channel, RL = 4Ω
OUT
See Application / Test Circuit
P
= 10W/Channel, RL = 4Ω
OUT
See Application / Test Circuit
DC offset nulled to zero
= 8Ω
L
= 4Ω
L
= 8Ω
L
= 4Ω
L
= 4Ω,
L
= 8Ω, f = 1kHz
L
= 8Ω
L
100
190
120
220
0.02 %
0.03 %
102 dB
97 dB
95 %
TBD V/V
260
0.5 dB
W
W
W
W
V
µ
4
TA3020, Rev 2.1, 01.01
TECHNICAL INFORMATION
TA3020 Pinout
48-pin Dip
(Top View)
VN10
LO2
LO2COM
HO2COM
HO2
OCS2LN
OCS2LP
OCS2HP
OCS2HN
VBOOT2
NC
OCR2
FBKOUT1
FBKGND1
HMUTE
FBKOUT2
DCOMP
FBKGND2
BIASCAP
INV2
OAOUT2
BBM0
BBM1
MUTE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
LO1
47
LO1COM
46
HO1COM
45
HO1
44
OCS1HN
43
OCS1HP
42
OCS1LP
41
OCS1LN
40
VBOOT1
39
VNN
38
NC
37
OCR1
36
NC
35
V5
34
AGND
33
OCR1
32
REF1
31
OCR2
30
VNNSENSE
29
VPPSENSE
28
AGND
27
V5
26
OAOUT1
25
INV1
TA3020, Rev 2.1, 01.01 5
TECHNICAL INFORMATION
Pin Description
Pin
1 VN10 “Floating” supply input for the FET drive circuitry. This voltage must be stable
2,48 LO2, LO1 Low side gate drive output (Channel 2 & 1)
3,47 LO2COM, LO1COM Kelvin connection to source of low-side transistor (Channel 2 & 1)
4,46 HO2COM, HO1COM Kelvin connection to source of high-side transistor (Channel 2 & 1)
5,45 HO2, HO1 High side gate drive output (Channel 2 & 1)
6, 7 OCS2LN, OCS2LP Over Current Sense inputs, Channel 2 low-side
8, 9 OCS2HP, OCS2HN Over Current Sense inputs, Channel 2 high-side
10, 40 VBOOT2, VBOOT1 Bootstrapped voltage to supply drive to gate of high-side FET
12, 31 OCR2 Over-current threshold adjustment (Channel 2)
13, 16 FBKOUT1, FBKOUT2 Switching feedback (Channels 1 & 2)
14, 18 FBKGND1, FBKGND2 Ground Kelvin feedback (Channels 1 & 2)
15 HMUTE Logic Output. A logic high indicates both amplifiers are muted, due to the
17 DCOMP Internal mode selection. This pin must be grounded for proper device
19 BIASCAP Bandgap reference times two (typically 2.5VDC). Used to set the common
20, 25 INV2, INV1 Inverting inputs of Input Stage op amps. (Channels 2 & 1)
21, 26 OAOUT2, OAOUT1 Outputs of Input Stage op amps. (Channels 2 & 1)
22, 23 BBM0, BBM1 Break-before-make timing control to prevent shoot-through in the output FETs.
24 MUTE Logic input. A logic high puts the amplifier in mute mode. Ground pin if not
27, 35 V5 5V power supply input.
28,34 AGND Analog ground.
29 VPPSENSE Positive supply voltage sense input. This pin is used for both over and
30 VNNSENSE Negative supply voltage sense input. This pin is used for both over and under
32 REF Used to set internal bias currents. The pin voltage is typically 1.1V.
33, 37 OCR1 Over-current threshold adjustment (Channel 1)
39 VNN Negative supply voltage.
41, 42 OCS1LN, OCS1LP Over Current Sense inputs, Channel 1 low-side
43, 44 OCS1HP, OCS1HN Over Current Sense inputs, Channel 1 high-side
11, 36,
38
Function
and referenced to VNN.
(Channel 2 & 1)
mute pin state, or a “fault” such as an overcurrent, undervoltage, or
overvoltage condition.
operation.
mode voltage for the input op amps. This pin is not capable of driving external
circuitry.
used. Please refer to the section, Mute Control, in the Application Information.
under voltage sensing for the VPP supply.
voltage sensing for the VNN supply.
NC Not connected (bonded) internally. To minimize coupling between pins, tie
these pins to AGND (pin34).
Description
6
TA3020, Rev 2.1, 01.01
TECHNICAL INFORMATION
Application/Test Circuit
26
OAOUT1
C
I
3.3uF
+
V5 (Pin 27)
R
10K
Offset Trim
Circuit
OFA
Ω
R
F
20K
Ω
R
I
49.9K
Ω
R
OFB
499K
Ω
AGND (Pin 28)
C
A
0.1uF
(Pin 28)
5V
(Pin 28)
R
REF
8.25K
1%
Ω,
INV1
R
OFB
499K
C
OF
0.1uF
BIASCAP
MUTE
REF
25
AGND
Ω
2.5V
19
24
32
-
+
V5
200K
V5
TA3020
Processing
Modulation
Ω
OCS1HP
43
C
OCR
(Pin 28)
AGND
150pF
0.01
R
G
5.6, 1W
R
G
5.6, 1W
0.01
R
OCR
20K
C
FB
AGND (Pin 28)
OCS1HN
44
VBOOT1
40
HO1
45
46
HO1COM
VN10
LO1
&
48
47
42
41
37
33
LO1COM
OCS1LP
OCS1LN
OCR1
OCR1
220pF
FBKOUT1
13
FBKGND1
14
HMUTE
15
1W
Ω,
1W
Ω,
Ω
R
S
Q
O
Q
O
R
S
V5 (Pin 27)
R
FBA
1K
Ω
*R
FBB
1.07K
Ω
C
S
C
HBR
0.1uF
0.1uF
R
FBA
1K
*R
1.07K
Ω
*R
13.3K
FBB
D
B
Ω
MUR120
R
B
C
B
0.1uF
L
O
10uH
C
S
0.1uF
FBC
Ω
*R
13.3K
250
VN10
FBC
Ω
+
Ω
+
C
BAUX
47uF
C
O
0.22uF
+
C
S
330uF
C
S
330uF
VPP
R
Z
20
C
0.22uF
2W
Ω,
R
Z
4Ω or 8
L
Ω
VNN
C
3.3uF
V5 (Pin 27)
R
10K
Offset Trim
Circuit
VNN
VPP
*R
V5
*R
V5
(Pin 28)
I
+
R
49.9K
OFA
Ω
AGND (Pin 28)
5V
*R
VNN1
*R
VPP1
VNN2
1.35M
450K
VPP1
I
450K
450K
20K
R
OFB
499K
Ω,
Ω
Ω,
Ω,
Ω,
R
Ω
Ω
0.1uF
0.1uF
1%
1%
1%
1%
OAOUT2
F
DCOMP
C
S
C
S
21
V5
20
INV2
-
R
OFB
499K
C
0.1uF
BBM0
BBM1
+
AGND
Ω
OF
22
23
17
27
V5
28
AGND
35
V5
34
AGND
30
VNNSENSE
29
VPPSENSE
11
NC
F. BEAD
* The values of these components must be
adjusted based on supply voltage range.
See Application Information.
Processing
&
Modulation
Analog Ground
Power Ground
VN10
VN10
VNN
NC
NC
7
8
10
5
4
2
3
7
8
12
31
16
18
1
39
38
36
OCS2HP
OCS2HN
VBOOT2
HO2
HO2COM
LO2
LO2COM
OCS2LP
OCS2LN
OCR2
OCR2
C
OCR
220pF
AGND
(Pin 28)
FBKOUT2
FBKGND2
C
0.1uF,35V
VNN
VNN
270pF
SW
0.01
Ω,
R
G
5.6, 1W
R
G
5.6, 1W
0.01
Ω,
R
OCR
20K
C
FB
AGND (Pin 28)
VN10
R
S
1W
Q
O
Q
O
R
S
1W
V5 (Pin 27)
Ω
*R
1.07K
C
0.1uF
S
D
MUR120
B
VN10
R
250
Ω
B
+
C
B
C
HBR
0.1uF
0.1uF
L
O
10uH
C
S
R
FBA
1K
Ω
FBB
0.1uF
R
FBA
1K
Ω
*R
FBC
13.3K
Ω
*R
*R
1.07K
Ω
FBC
13.3K
FBB
Ω
Ω
+
C
BAUX
47uF
C
0.22uF
+
C
330uF
O
C
S
330uF
VPP
S
R
Z
20
2W
Ω,
C
0.22uF
R
Z
4Ω or 8
L
Ω
VNN
TA3020, Rev 2.1, 01.01 7
p
TECHNICAL INFORMATION
External Components Description
Components Description
R
Inverting input resistance to provide AC gain in conjunction with RF. This input is
I
RF Feedback resistor to set AC gain in conjunction with RI. Please refer to the Amplifier
CI AC input coupling capacitor which, in conjunction with RI, forms a highpass filter at
R
FBA
R
Feedback divider resistor connected to AGND. This value of this resistor depends
FBB
R
Feedback resistor connected from either the OUT1(OUT2) to FBKOUT1(FBKOUT2)
FBC
CFB Feedback delay capacitor that both lowers the idle switching frequency and filters
R
Potentiometer used to manually trim the DC offset on the output of the TA3020.
OFA
R
Resistor that limits the manual DC offset trim range and allows for more precise
OFB
R
Bias resistor. Locate close to pin 32 and ground at pin 28.
REF
CA BIASCAP decoupling capacitor. Should be located close to pin 19 and grounded at
DB Bootstrap diode. This diode charges up the bootstrap capacitors when the output is
CB High frequency bootstrap capacitor, which filters the high side gate drive supply.
C
BAUX
RB Bootstrap resistor that limits C
CSW VN10 generator filter capacitors. The high frequency capacitor (0.1uF) must be
CS Supply decoupling for the power supply pins. For optimum performance, these
biased at the BIASCAP voltage (approximately 2.5VDC).
Gain paragraph, in the Application Information section.
.
)CR2(1f
π=
IIC
Feedback divider resistor connected to V5. This resistor is normally set at 1kΩ.
on the supply voltage setting and helps set the TA3020 gain in conjunction with R
R
F, RFBA,
and R
. Please see the Modulator Feedback Design paragraphs in the
FBC
Application Information Section.
or speaker ground to FBKGND1(FBKGND2). The value of this resistor depends on
the supply voltage setting and helps set the TA3020 gain in conjunction with R
R
FBA,
, and R
. It should be noted that the resistor from OUT1(OUT2) to
FBB
FBKOUT1(FBKOUT2) must have a power rating of greater than
Please see the Modulator Feedback Design paragraphs in the Application
Information Section.
very high frequency noise from the feedback signal, which improves amplifier
performance. The value of C
so that the idle switching difference is greater than 40kHz. Please refer to the
Application / Test Circuit.
adjustment.
pin 28.
low (at VNN) to drive the high side gate circuitry. A fast or ultra fast recovery diode
is recommended for the bootstrap circuitry. In addition, the bootstrap diode must be
able to sustain the entire VPP-VNN voltage. Thus, for most applications, a 150V (or
greater) diode should be used.
This capacitor must be located as close to pin 40 (VBOOT1) or pin10 (VBOOT2) for
reliable operation. The “negative” side of C
HO1COM (pin 46) or HO2COM (pin 4). Please refer to the Application / Test Circuit.
Bulk bootstrap capacitor that supplements C
in a reduction in the average switching frequency.
(bootstrap supply charging).
located close to pin 1 (VN10) to maximize device performance.
com
onents should be located close to the TA3020 and returned to their respective
(Refer to the Application/Test Circuit)
should be offset between channel 1 and channel 2
FB
should be connected directly to the
B
during “clipping” events, which result
B
charging current during TA3020 power up
BAUX
DISS
=
2
I, RF,
FBC
I,
.
)(2RVPPP
8
TA3020, Rev 2.1, 01.01
TECHNICAL INFORMATION
g
ground as shown in the Application/Test Circuit.
R
VNN1
R
VNN2
R
VPP1
R
VPP2
R
S
R
OCR
C
OCR
C
Supply decoupling for the high current Half-bridge supply pins. These components
HBR
RG Gate resistor, which is used to control the MOSFET rise/ fall times. This resistor
CZ Zobel capacitor, which in conjunction with RZ, terminates the output filter at high
RZ Zobel resistor, which in conjunction with CZ, terminates the output filter at high
LO Output inductor, which in conjunction with CO, demodulates (filters) the switching
Main overvoltage and undervoltage sense resistor for the negative supply (VNN).
Please refer to the Electrical Characteristics Section for the trip points as well as the
hysteresis band. Also, please refer to the Over / Under-voltage Protection section in
the Application Information for a detailed discussion of the internal circuit operation
and external component selection.
Secondary overvoltage and undervoltage sense resistor for the negative supply
(VNN). This resistor accounts for the internal V
resistor value should be three times that of R
VNN1
NNSENSE
bias of 1.25V. Nominal
. Please refer to the Over / Undervoltage Protection section in the Application Information for a detailed discussion of
the internal circuit operation and external component selection.
Main overvoltage and undervoltage sense resistor for the positive supply (VPP).
Please refer to the Electrical Characteristics Section for the trip points as well as the
hysteresis band. Also, please refer to the Over / Under-voltage Protection section in
the Application Information for a detailed discussion of the internal circuit operation
and external component selection.
Secondary overvoltage and undervoltage sense resistor for the positive supply
(VPP). This resistor accounts for the internal V
resistor value should be equal to that of R
VPP1
PPSENSE
. Please refer to the Over / Under-
bias of 2.5V. Nominal
voltage Protection section in the Application Information for a detailed discussion of
the internal circuit operation and external component selection.
Over-current sense resistor. Please refer to the section, Setting the Over-current
Threshold, in the Application Information for a discussion of how to choose the value
of R
to obtain a specific current limit trip point.
S
Over-current “trim” resistor, which, in conjunction with R
, sets the current trip point.
S
Please refer to the section, Setting the Over-current Threshold, in the Application
Information for a discussion of how to calculate the value of R
OCR
.
Over-current filter capacitor, which filters the overcurrent signal at the OCR pins to
account for the half-wave rectified current sense circuit internal to the TA3020. A
typical value for this component is 220pF. In addition, this component should be
located near pin 31 or pin 33 as possible.
must be located as close to the device as possible to minimize supply overshoot and
maximize device reliability. These capacitors should have good high frequency
performance including low ESR and low ESL. In addition, the capacitor rating must
be twice the maximum VPP voltage.
serves to dampen the parasitics at the MOSFET gates, which, in turn, minimizes
ringing and output overshoots. The typical power rating is 1 watt.
frequencies. Use a high quality film capacitor capable of sustaining the ripple current
caused by the switching outputs.
frequencies. The combination of R
and CZ minimizes peaking of the output filter
Z
under both no load conditions or with real world loads, including loudspeakers which
usually exhibit a rising impedance with increasing frequency. Depending on the
program material, the power rating of R
may need to be adjusted. The typical
Z
power rating is 2 watts.
waveform into an audio si
nal. Forms a second order filter with a cutoff frequency
TA3020, Rev 2.1, 01.01 9
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