TRINAMIC TMC5160-EVAL-KIT Datasheet

POWER DRIVER FOR STEPPER MOTORS INTEGRATED CIRCUITS

TRINAMIC Motion Control GmbH & Co. KG
Hamburg, Germany

TMC5160 / TMC5160A DATASHEET

FEATURES AND BENEFITS

2-phase stepper motors up to 20A coil current (external MOSFETs)
Motion Controller with SixPoint™ ramp
Step/Dir Interface with microstep interpolation MicroPlyer™
Voltage Range 8 … 60V DC
SPI & Single Wire UART
Encoder Interface and 2x Ref.-Switch Input
Highest Resolution 256 microsteps per full step
StealthChop2™ for quiet operation and smooth motion
Resonance Dampening for mid-range resonances
spreadCycle™ highly dynamic motor control chopper

dcStep™ load dependent speed control

StallGuard2™ high precision sensorless motor load detection
CoolStep™ current control for energy savings up to 75%
Passive Braking and freewheeling mode
Full Protection & Diagnostics
Compact Size 7x7mm2 (body) TQFP48 package / 8x8mm² QFN

APPLICATIONS

Robotics & Industrial Drives
Textile, Sewing Machines
Packing Machines
Factory & Lab Automation
High-speed 3D Printers
Liquid Handling
Medical
Office Automation
CCTV
ATM, Cash Recycler
Pumps and Valves

DESCRIPTION

The TMC5160 / TMC5160A is a high-power
stepper motor controller and driver IC
with serial communication interfaces. It
combines a flexible ramp generator for
automatic target positioning with indus­tries’ most advanced stepper motor
driver. Using external transistors, highly
dynamic, high torque drives can be
realized. Based on TRINAMICs sophisti­cated SpreadCycle and StealthChop
choppers, the driver ensures absolutely
noiseless operation combined with maxi­mum efficiency and best motor torque.
High integration, high energy efficiency
and a small form factor enable miniatu­rized and scalable systems for cost
effective solutions. The complete solution
reduces learning curve to a minimum
while giving best performance in class.

Universal high voltage controller/driver for two-phase bipolar stepper motor. StealthChop™ for quiet
movement. External MOSFETs for up to 20A motor current per coil. With Step/Dir Interface and SPI.

BLOCK DIAGRAM

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 2

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APPLICATION EXAMPLES: HIGH VOLTAGE – MULTIPURPOSE USE

The TMC5160 scores with complete motion controlling features, powerful external MOSFET driver stages,
and high-quality current regulation. It offers a versatility that covers a wide spectrum of applications from
battery powered, high efficiency systems up to embedded applications with 20A motor current per coil. The
TMC5160 contains the complete intelligence which is required to drive a motor. Receiving target positions,
the TMC5160 manages motor movement. Based on TRINAMICs unique features StallGuard2, CoolStep,
DcStep, SpreadCycle, and StealthChop, it optimizes drive performance. It trades off velocity vs. motor
torque, optimizes energy efficiency, smoothness of the drive, and noiselessness. The small form factor of
the TMC5160 keeps costs down and allows for miniaturized layouts. Extensive support at the chip, board,
and software levels enables rapid design cycles and fast time-to-market with competitive products. High
energy efficiency and reliability deliver cost savings in related systems such as power supplies and cooling.
For smaller designs, the compatible, integrated TMC5130 driver provides 1.4A of motor current.

CPU

TMC5160

High-Level

Interface

SPI

CPU

High-Level

Interface

TMC5160

TMC5160

More TMC5160 or TMC5130 or TMC5072

SPI or

UART

MINIATURIZED DESIGN FOR ONE STEPPER MOTOR

COMPACT DESIGN FOR MULTIPLE STEPPER MOTORS

M

Encoder

Ref.

Switches

M

M

Addr.

Addr.

NCS signal for SPI

Chaining

with UART

ORDER CODES

Order code

PN

Description

Size [mm2]

TMC5160A-TA

00-0179

stepper controller/driver for external MOSFETs; TQFP48

7 x 7 (body)

TMC5160A-WA

00-0192

stepper controller/driver f. ext. MOSFETs; wett. QFN8x8

8 x 8

TMC5160A-xx-T

…-T

-T denotes tape on reel packing (xx= TA or WA)

TMC5160-EVAL

40-0138

Evaluation board for TMC5160 (/A)

85 x 55

LANDUNGSBRÜCKE

40-0167

Baseboard for TMC5160-EVAL and further boards.

85 x 55

ESELSBRÜCKE

40-0098

Connector board fitting to Landungsbrücke

61 x 38

Hint: TMC5160 in this manual always refers to both, the TMC5160A and TMC5160, unless explicitly noted
with “non-A-version” or “A-version”. The A-version compatibly replaces the non-A-version.

An ABN encoder interface with scaler unit
and two reference switch inputs are used to
ensure correct motor movement. Automatic
interrupt upon deviation is available.

An application with 2 stepper motors is
shown. Additionally, the ABN Encoder
interface and two reference switches can be
used for each motor. A single CPU controls
the whole system, as there are no real time
tasks required to move a motor. The CPU­board and the controller / driver boards are
highly economical and space saving.

The TMC5160-EVAL is part of TRINAMICs
universal evaluation board system which
provides a convenient handling of the
hardware as well as a user-friendly
software tool for evaluation. The
TMC5160 evaluation board system
consists of three parts:
LANDUNGSBRÜCKE (base board),
ESELSBRÜCKE (connector board including
several test points), and TMC5160-EVAL.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 3

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Table of Contents

1 PRINCIPLES OF OPERATION ......................... 5

1.1 KEY CONCEPTS ................................................ 6

1.2 CONTROL INTERFACES ..................................... 7

1.3 SOFTWARE ...................................................... 7

1.4 MOVING AND CONTROLLING THE MOTOR ........ 8

1.5 AUTOMATIC STANDSTILL POWER DOWN......... 8

1.6 STEALTHCHOP2 & SPREADCYCLE DRIVER ....... 8

1.7 STALLGUARD2 – MECHANICAL LOAD SENSING .

....................................................................... 9

1.8 COOLSTEP – LOAD ADAPTIVE CURRENT

CONTROL ...................................................................... 9

1.9 DCSTEP – LOAD DEPENDENT SPEED CONTROL .

..................................................................... 10

1.10 ENCODER INTERFACE ..................................... 10

2 PIN ASSIGNMENTS ......................................... 11

2.1 PACKAGE OUTLINE ........................................ 11

2.2 SIGNAL DESCRIPTIONS ................................. 12

3 SAMPLE CIRCUITS .......................................... 15

3.1 STANDARD APPLICATION CIRCUIT ................ 15

3.2 EXTERNAL GATE VOLTAGE REGULATOR .......... 16

3.3 CHOOSING MOSFETS AND SLOPE ................ 17

3.4 TUNING THE MOSFET BRIDGE ..................... 19

3.5 HIGHER VOLTAGE APPLICATIONS .................. 22

4 SPI INTERFACE ................................................ 23

4.1 SPI DATAGRAM STRUCTURE ......................... 23

4.2 SPI SIGNALS ................................................ 24

4.3 TIMING ......................................................... 25

5 UART SINGLE WIRE INTERFACE ................ 26

5.1 DATAGRAM STRUCTURE ................................. 26

5.2 CRC CALCULATION ....................................... 28

5.3 UART SIGNALS ............................................ 28

5.4 ADDRESSING MULTIPLE SLAVES .................... 29

6 REGISTER MAPPING ....................................... 31

6.1 GENERAL CONFIGURATION REGISTERS .......... 32

6.2 VELOCITY DEPENDENT DRIVER FEATURE

CONTROL REGISTER SET ............................................. 38

6.3 RAMP GENERATOR REGISTERS ....................... 40

6.4 ENCODER REGISTERS ..................................... 45

6.5 MOTOR DRIVER REGISTERS ........................... 47

7 STEALTHCHOP™ .............................................. 57

7.1 AUTOMATIC TUNING ..................................... 57

7.2 STEALTHCHOP OPTIONS ................................ 60

7.3 STEALTHCHOP CURRENT REGULATOR ............. 60

7.4 VELOCITY BASED SCALING ............................ 63

7.5 COMBINING STEALTHCHOP AND SPREADCYCLE .

..................................................................... 64

7.6 FLAGS IN STEALTHCHOP ............................... 66

7.7 FREEWHEELING AND PASSIVE BRAKING ........ 66

8 SPREADCYCLE AND CLASSIC CHOPPER ... 68

8.1 SPREADCYCLE CHOPPER ................................ 69

8.2 CLASSIC CONSTANT OFF TIME CHOPPER ...... 72

9 SELECTING SENSE RESISTORS .................... 74

10 VELOCITY BASED MODE CONTROL ....... 76

11 DIAGNOSTICS AND PROTECTION......... 78

11.1 TEMPERATURE SENSORS ................................ 78

11.2 SHORT PROTECTION ...................................... 78

11.3 OPEN LOAD DIAGNOSTICS ........................... 80

12 RAMP GENERATOR ..................................... 81

12.1 REAL WORLD UNIT CONVERSION ................. 81

12.2 MOTION PROFILES ........................................ 82

12.3 VELOCITY THRESHOLDS ................................. 84

12.4 REFERENCE SWITCHES .................................. 85

13 STALLGUARD2 LOAD MEASUREMENT ... 87

13.1 TUNING STALLGUARD2 THRESHOLD SGT ..... 88

13.2 STALLGUARD2 UPDATE RATE AND FILTER .... 90

13.3 DETECTING A MOTOR STALL ......................... 90

13.4 HOMING WITH STALLGUARD ........................ 90

13.5 LIMITS OF STALLGUARD2 OPERATION .......... 90

14 COOLSTEP OPERATION ............................. 91

14.1 USER BENEFITS ............................................. 91

14.2 SETTING UP FOR COOLSTEP .......................... 91

14.3 TUNING COOLSTEP ....................................... 93

15 STEP/DIR INTERFACE ................................ 94

15.1 TIMING ......................................................... 94

15.2 CHANGING RESOLUTION ............................... 95

15.3 MICROPLYER AND STAND STILL DETECTION . 96

16 DIAG OUTPUTS ........................................... 97

16.1 STEP/DIR MODE ......................................... 97

16.2 MOTION CONTROLLER MODE ........................ 97

17 DCSTEP .......................................................... 99

17.1 USER BENEFITS ............................................. 99

17.2 DESIGNING-IN DCSTEP ................................ 99

17.3 DCSTEP INTEGRATION WITH THE MOTION

CONTROLLER ............................................................ 100

17.4 STALL DETECTION IN DCSTEP MODE .......... 100

17.5 MEASURING ACTUAL MOTOR VELOCITY IN

DCSTEP OPERATION ................................................ 101

17.6 DCSTEP WITH STEP/DIR INTERFACE ......... 102

18 SINE-WAVE LOOK-UP TABLE................. 105

18.1 USER BENEFITS ........................................... 105

18.2 MICROSTEP TABLE ...................................... 105

19 EMERGENCY STOP .................................... 106

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 4

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20 ABN INCREMENTAL ENCODER

INTERFACE .............................................................. 107

20.1 ENCODER TIMING ....................................... 108

20.2 SETTING THE ENCODER TO MATCH MOTOR

RESOLUTION ............................................................ 108

20.3 CLOSING THE LOOP .................................... 109

21 DC MOTOR OR SOLENOID .................... 110

21.1 SOLENOID OPERATION ............................... 110

22 QUICK CONFIGURATION GUIDE ......... 111

23 GETTING STARTED .................................. 116

23.1 INITIALIZATION EXAMPLES ......................... 116

24 STANDALONE OPERATION .................... 117

25 EXTERNAL RESET ...................................... 119

26 CLOCK OSCILLATOR AND INPUT ........ 119

26.1 USING THE INTERNAL CLOCK...................... 119

26.2 USING AN EXTERNAL CLOCK ....................... 119

27 ABSOLUTE MAXIMUM RATINGS .......... 120

28 ELECTRICAL CHARACTERISTICS .......... 120

28.1 OPERATIONAL RANGE ................................ 120

28.2 DC AND TIMING CHARACTERISTICS ........... 121

28.3 THERMAL CHARACTERISTICS........................ 123

29 LAYOUT CONSIDERATIONS................... 125

29.1 EXPOSED DIE PAD ...................................... 125

29.2 WIRING GND ............................................ 125

29.3 WIRING BRIDGE SUPPLY ............................ 125

29.4 SUPPLY FILTERING ...................................... 125

29.5 LAYOUT EXAMPLE ....................................... 126

30 PACKAGE MECHANICAL DATA .............. 128

30.1 DIMENSIONAL DRAWINGS TQFP48-EP ..... 128

30.2 DIMENSIONAL DRAWINGS QFN-WA ......... 130

30.3 PACKAGE CODES ......................................... 131

31 DESIGN PHILOSOPHY ............................. 132

32 DISCLAIMER ............................................... 132

33 ESD SENSITIVE DEVICE.......................... 132

34 DESIGNED FOR SUSTAINABILITY ....... 132

35 TABLE OF FIGURES .................................. 133

36 REVISION HISTORY ................................. 134

37 REFERENCES ............................................... 134

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 5

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1 Principles of Operation

The TMC5160 motion controller and driver chip is an intelligent power component interfacing between
CPU and a high power stepper motor. All stepper motor logic is completely within the TMC5160. No
software is required to control the motor – just provide target positions. The TMC5160 offers a
number of unique enhancements which are enabled by the system-on-chip integration of driver and
controller. The SixPoint ramp generator of the TMC5160 uses StealthChop, DcStep, CoolStep, and
StallGuard2 automatically to optimize every motor movement. The TMC5160 ideally extends the
TMC2100, TMC2130 and TMC5130 family to higher voltages and higher motor currents.

THE TMC5160 OFFERS THREE BASIC MODES OF OPERATION:

MODE 1: Full Featured Motion Controller & Driver

All stepper motor logic is completely within the TMC5160. No software is required to control the
motor – just provide target positions. Enable this mode by tying low pin SD_MODE.

MODE 2: Step & Direction Driver

An external high-performance S-ramp motion controller like the TMC4361 or a central CPU generates
step & direction signals synchronized to other components like additional motors within the system.
The TMC5160 takes care of intelligent current and mode control and delivers feedback on the state of
the motor. The MicroPlyer automatically smoothens motion. Tie SD_MODE high.

MODE 3: Simple Step & Direction Driver

The TMC5160 positions the motor based on step & direction signals. The MicroPlyer automatically
smoothens motion. No CPU interaction is required; configuration is done by hardware pins. Basic
standby current control can be done by the TMC5160. Optional feedback signals allow error detection
and synchronization. Enable this mode by tying pin SPI_MODE low and SD_MODE high.

47R

47R

LS

VCC_IO

TMC5160

SPI interface

CSN
SCK

SDO

SDI

Ref. switch
processing

REFL/STEP

REFR/DIR

DIAG / INT out

and

Single wire

interface

5V Voltage

regulator

charge pump

22n

100V

100n

16V

DIAG0/SWN

CLK_IN

DIAG1/SWP

+V

M

5VOUT

VSA

2.2µ

+V

IO

DRV_ENN

GNDD

GNDA

TST_MODE

DIE PAD

VCC

opt. ext. clock

12-16MHz

3.3V or 5V

I/O voltage

100n

100n

LS

stepper
motor

N

S

BMA2

100n

SRAH

C

E

2R2

470n

Encoder

unit

A B N

ENCB_DCEN

ENCA_DCIN

ENCN_DCO

Encoder input /

dcStep control in S/D

mode

SD_MODE

SPI_MODE

opt. driver enable

B.Dwersteg, ©

TRINAMIC 2014

R

S

SRAL

LA1

LA2

HA1

HA2

BMA1

HS

HS

CA1

C

B

CA2

C

B

+V

M

LS

LS

BMB2

SRBH

R

S

SRBL

LB1

LB2

HB1

HB2

BMB1

HS

HS

CB1

C

B

CB2

C

B

+V

M

Both GND: UART mode

CPI

CPO

VCP

VS

11.5V Voltage
regulator

12VOUT

2.2µ

mode selection

470n

470n

R

G

R

G

R

G

R

G

R

G

R

G

R

G

R

G

47R

47R

+V

IO

pd pd pd

+V

IO

Stepper driver

Protection

& diagnostics

spreadCycle &

stealthChop

Chopper

programmable

sine table

4*256 entry

stallGuard2™

coolStep™

x

linear 6 point

RAMP generator

Step &

Direction pulse

generation

Control register

set

Interface

dcStep™

coolStep

&

stealthChop

motor driver

B.Dwersteg, ©

TRINAMIC 2014

Motion control

Figure 1.1 TMC5160 basic application block diagram (motion controller)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 6

www.trinamic.com

47R

47R

LS

VCC_IO

TMC5160

SPI interface

CSN
SCK

SDO

SDI

STEP

DIR

DIAG / INT out

and

Single wire

interface

5V Voltage

regulator

charge pump

22n

100V

100n

16V

DIAG0

CLK_IN

DIAG1

+V

M

5VOUT

VSA

2.2µ

+V

IO

DRV_ENN

GNDD

GNDA

TST_MODE

DIE PAD

VCC

opt. ext. clock

12-16MHz

3.3V or 5V

I/O voltage

100n

100n

LS

stepper
motor

N

S

BMA2

100n

SRAH

C

E

2R2

470n

DCEN

DCIN

DCO

dcStep control

SD_MODE

SPI_MODE

opt. driver enable

B.Dwersteg, ©

TRINAMIC 2014

R

S

SRAL

LA1

LA2

HA1

HA2

BMA1

HS

HS

CA1

C

B

CA2

C

B

+V

M

LS

LS

BMB2

SRBH

R

S

SRBL

LB1

LB2

HB1

HB2

BMB1

HS

HS

CB1

C

B

CB2

C

B

+V

M

CPI

CPO

VCP

VS

11.5V Voltage
regulator

12VOUT

2.2µ

mode selection

470n

470n

R

G

R

G

R

G

R

G

R

G

R

G

R

G

R

G

47R

47R

+V

IO

pd pd pd

+V

IO

Stepper driver

Protection

& diagnostics

spreadCycle &

stealthChop

Chopper

programmable

sine table

4*256 entry

stallGuard2™

coolStep™

x

Control register

set

Interface

dcStep™

spreadCycle

&

stealthChop

motor driver

B.Dwersteg, ©
TRINAMIC 2014

step multiplier

microPlyer™

Standstill

current

reduction

Figure 1.2 TMC5160 STEP/DIR application diagram

47R

47R

LS

TMC5160

STEP

DIR

5V Voltage

regulator

charge pump

22n

100V

100n

16V

+V

M

5VOUT

VSA

2.2µ

DRV_ENN

GNDD

GNDA

TST_MODE

DIE PAD

VCC

100n

LS

stepper

motor

N

S

BMA2

100n

SRAH

C

E

2R2

470n

dcStep control

opt. driver enable

B.Dwersteg, ©

TRINAMIC 2014

R

S

SRAL

LA1

LA2

HA1

HA2

BMA1

HS

HS

CA1

C

B

CA2

C

B

+V

M

LS

LS

BMB2

SRBH

R

S

SRBL

LB1

LB2

HB1

HB2

BMB1

HS

HS

CB1

C

B

CB2

C

B

+V

M

CPI

CPO

VCP

VS

11.5V Voltage

regulator

12VOUT

2.2µ

470n

470n

R

G

R

G

R

G

R

G

R

G

R

G

R

G

R

G

47R

47R

Stepper driver

Protection

& diagnostics

spreadCycle &

stealthChop

Chopper

programmable

sine table

4*256 entry

x

Control register

set (default

values)

B.Dwersteg, ©
TRINAMIC 2014

step multiplier

microPlyer

Standstill

current

reduction

VCC_IO

CLK_IN

+V

IO

opt. ext. clock

12-16MHz

3.3V or 5V

I/O voltage

100n

SD_MODE

SPI_MODE

Standalone mode

mode selection

pd

+V

IO

Status out

(open drain)

Configuration

interface

(GND or VCC_IO

level)

CFG0

CFG1

CFG3

CFG2

DIAG0

DIAG1

Microstep Resolution

8 / 16 / 32 / 64

unused

unused

CFG4

CFG5

CFG6

B.Dwersteg, ©

TRINAMIC 2014

Run Current Setting

16 / 18 / 20 / 22 /

24 / 26 / 28 / 31

spreadCycle (GND) /

stealthChop (VCC_IO)

Current Reduction

Enable (VCC_IO)

pd

pd

OTP

Figure 1.3 TMC5160 standalone driver application diagram

1.1 Key Concepts

The TMC5160 implements advanced features which are exclusive to TRINAMIC products. These features
contribute toward greater precision, greater energy efficiency, higher reliability, smoother motion, and
cooler operation in many stepper motor applications.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 7

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StealthChop2™ No-noise, high-precision chopper algorithm for inaudible motion and inaudible

standstill of the motor. Allows faster motor acceleration and deceleration than
StealthChop™ and extends StealthChop to low stand still motor currents.

SpreadCycle™ High-precision chopper algorithm for highly dynamic motion and absolutely clean

current wave. Low noise, low resonance and low vibration chopper.

DcStep™ Load dependent speed control. The motor moves as fast as possible and never loses

a step.

StallGuard2™ Sensorless stall detection and mechanical load measurement.
CoolStep™ Load-adaptive current control reducing energy consumption by as much as 75%.
MicroPlyer™ Microstep interpolator for obtaining full 256 microstep smoothness with lower

resolution step inputs starting from fullstep

In addition to these performance enhancements, TRINAMIC motor drivers offer safeguards to detect
and protect against shorted outputs, output open-circuit, overtemperature, and undervoltage
conditions for enhancing safety and recovery from equipment malfunctions.

1.2 Control Interfaces

The TMC5160 supports both, an SPI interface and a UART based single wire interface with CRC
checking. Additionally, a standalone mode is provided for pure STEP/DIR operation without use of the
serial interface. Selection of the actual interface is done via the configuration pins SPI_MODE and
SD_MODE, which can be hardwired to GND or VCC_IO depending on the desired interface.

1.2.1 SPI Interface

The SPI interface is a bit-serial interface synchronous to a bus clock. For every bit sent from the bus
master to the bus slave another bit is sent simultaneously from the slave to the master.
Communication between an SPI master and the TMC5160 slave always consists of sending one 40-bit
command word and receiving one 40-bit status word.

The SPI command rate typically is a few commands per complete motor motion.

1.2.2 UART Interface

The single wire interface allows differential operation similar to RS485 (using SWP and SWN) or single
wire interfacing (leaving open SWN). It can be driven by any standard UART. No baud rate
configuration is required.

1.3 Software

From a software point of view the TMC5160 is a peripheral with a number of control and status
registers. Most of them can either be written only or read only. Some of the registers allow both read
and write access. In case read-modify-write access is desired for a write only register, a shadow
register can be realized in master software.

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1.4 Moving and Controlling the Motor

1.4.1 Integrated Motion Controller

The integrated 32 bit motion controller automatically drives the motor to target positions, or
accelerates to target velocities. All motion parameters can be changed on the fly. The motion
controller recalculates immediately. A minimum set of configuration data consists of acceleration and
deceleration values and the maximum motion velocity. A start and stop velocity is supported as well
as a second acceleration and deceleration setting. The integrated motion controller supports
immediate reaction to mechanical reference switches and to the sensorless stall detection StallGuard2.

Benefits are:

- Flexible ramp programming

- Efficient use of motor torque for acceleration and deceleration allows higher machine throughput

- Immediate reaction to stop and stall conditions

1.4.2 STEP/DIR Interface

The motor can optionally be controlled by a step and direction input. In this case, the motion
controller remains unused. Active edges on the STEP input can be rising edges or both rising and
falling edges as controlled by another mode bit (dedge). Using both edges cuts the toggle rate of the
STEP signal in half, which is useful for communication over slow interfaces such as optically isolated
interfaces. On each active edge, the state sampled from the DIR input determines whether to step
forward or back. Each step can be a fullstep or a microstep, in which there are 2, 4, 8, 16, 32, 64, 128,
or 256 microsteps per fullstep. A step impulse with a low state on DIR increases the microstep
counter and a high decreases the counter by an amount controlled by the microstep resolution. An
internal table translates the counter value into the sine and cosine values which control the motor
current for microstepping.

1.5 Automatic Standstill Power Down

An automatic current reduction drastically reduces application power dissipation and cooling
requirements. Modify stand still current, delay time and decay via register settings. Automatic
freewheeling and passive motor braking are provided as an option for stand still. Passive braking
reduces motor standstill power consumption to zero, while still providing effective dampening and
braking! An option for faster detection of standstill is provided for both, ramp generator and STEP/DIR
operation.

t

CURRENT

TPOWERDOWN

power down

delay time

RMS motor current trace

IHOLD

IRUN

IHOLDDELAY

power down

ramp time

STEP

Standstill flag

(stst)

standstill delay

2^20 / 2^18 clocks

(faststandstill)

Figure 1.4 Automatic Motor Current Power Down

1.6 StealthChop2 & SpreadCycle Driver

StealthChop is a voltage chopper based principle. It especially guarantees that the motor is absolutely
quiet in standstill and in slow motion, except for noise generated by ball bearings. Unlike other
voltage mode choppers, StealthChop2 does not require any configuration. It automatically learns the
best settings during the first motion after power up and further optimizes the settings in subsequent
motions. An initial homing sequence is sufficient for learning. Optionally, initial learning parameters

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 9

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can be pre-configured via the interface. StealthChop2 allows high motor dynamics, by reacting at once
to a change of motor velocity.

For highest dynamic applications, SpreadCycle is an option to StealthChop2. It can be enabled via
input pin (standalone mode) or via SPI or UART interface. StealthChop2 and SpreadCycle may even be
used in a combined configuration for the best of both worlds: StealthChop2 for no-noise stand still,
silent and smooth performance, SpreadCycle at higher velocity for high dynamics and highest peak
velocity at low vibration.

SpreadCycle is an advanced cycle-by-cycle chopper mode. It offers smooth operation and good
resonance dampening over a wide range of speed and load. The SpreadCycle chopper scheme
automatically integrates and tunes fast decay cycles to guarantee smooth zero crossing performance.

Benefits of using StealthChop2:

- Significantly improved microstepping with low cost motors

- Motor runs smooth and quiet

- Absolutely no standby noise

- Reduced mechanical resonance yields improved torque

1.7 StallGuard2 – Mechanical Load Sensing

StallGuard2 provides an accurate measurement of the load on the motor. It can be used for stall
detection as well as other uses at loads below those which stall the motor, such as CoolStep load­adaptive current reduction. This gives more information on the drive allowing functions like
sensorless homing and diagnostics of the drive mechanics.

1.8 CoolStep – Load Adaptive Current Control

CoolStep drives the motor at the optimum current. It uses the StallGuard2 load measurement
information to adjust the motor current to the minimum amount required in the actual load situation.
This saves energy and keeps the components cool.

Benefits are:

- Energy efficiency power consumption decreased up to 75%

- Motor generates less heat improved mechanical precision

- Less or no cooling improved reliability

- Use of smaller motor less torque reserve required → cheaper motor does the job

Figure 1.5 shows the efficiency gain of a 42mm stepper motor when using CoolStep compared to
standard operation with 50% of torque reserve. CoolStep is enabled above 60RPM in the example.

0

0,1

0,2

0,3

0,4

0,5

0,6

0,7

0,8

0,9

0 50 100 150 200 250 300 350

Efficiency

Velocity [RPM]

Efficiency with coolStep

Efficiency with 50% torque reserve

Figure 1.5 Energy efficiency with CoolStep (example)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 10

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1.9 DcStep – Load Dependent Speed Control

DcStep allows the motor to run near its load limit and at its velocity limit without losing a step. If
the mechanical load on the motor increases to the stalling load, the motor automatically decreases
velocity so that it can still drive the load. With this feature, the motor will never stall. In addition to
the increased torque at a lower velocity, dynamic inertia will allow the motor to overcome mechanical
overloads by decelerating. DcStep directly integrates with the ramp generator, so that the target
position will be reached, even if the motor velocity needs to be decreased due to increased
mechanical load. A dynamic range of up to factor 10 or more can be covered by DcStep without any
step loss. By optimizing the motion velocity in high load situations, this feature further enhances
overall system efficiency.

Benefits are:

- Motor does not loose steps in overload conditions

- Application works as fast as possible

- Highest possible acceleration automatically

- Highest energy efficiency at speed limit

- Highest possible motor torque using fullstep drive

- Cheaper motor does the job

1.10 Encoder Interface

The TMC5160 provides an encoder interface for external incremental encoders. The encoder provides
automatic checking for step loss and can be used for homing of the motion controller (alternatively to
reference switches). A programmable prescaler allows the adaptation of the encoder resolution to the
motor resolution. A 32 bit encoder counter is provided.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 11

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2 Pin Assignments

2.1 Package Outline

25

26

3724

DRV_ENN

CPO

HA2

BMA1

CA2

VSA

LA1

LA2

VCP

REFL_STEP

CB1

HB1

ENCA_DCIN_CFG5

LB2

HB2

ENCB_DCEN_CFG4

1

TST_MODE

REFR_DIR

VCC_IO

SDO_CFG0

SDI_CFG1

SCK_CFG2

CSN_CFG3

DIAG1_SWP

SRAH

GNDA

12VOUT

SD_MODE

CB2

VS

2
3
4
5
6
7
8

9
10
11

14

15

16

17

18

19

202122

23

36
35
34
33
32
31
30
29
28
27

48

47

46

45

444342

414039

38

BMB1

13

CPI

VCC

5VOUT

PAD = GNDD, GNDP

12

SPI_MODE

BMB2

ENCN_DCO_CFG6

DIAG0_SWN

SRAL

HA1

CA1

TMC5160-TA

TQFP-48

SRBL

SRBH

BMA2

LB1

CLK

GNDD

GNDD

Figure 2.1 TMC5160-TA package and pinning TQFP-EP 48 (7x7mm² body, 9x9mm² with leads)

B. Dwersteg, TRINAMIC 2012

TMC5160-WA

QFN56 8mm x 8mm

0.5 pitch

1

2

3

4

5

6

7

8

1314151617

181920

212223

37

36

35

34

33

32

31

30

29

47

45

44

43

46

39

42

41

40

28

12

9

10

11

24

25

27

26

38

REFL_STEP

CLK

ENCA_DCIN_CFG5

ENCB_DCEN_CFG4

REFR_DIR

VCC_IO

SDO_CFG0

SDI_CFG1

SCK_CFG2

CSN_CFG3

SD_MODE

SPI_MODE

PAD = GNDD, GNDP

VSA

CB1

HB1

TST_MODE

SRAH

GNDA

12VOUT

BMB1

5VOUT

SRAL

SRBL

SRBH

DRV_ENN

CPO

HA2
CA2

BMA2

VCP

DIAG1_SWP

VS
CPI

VCC

ENCN_DCO_CFG6

DIAG0_SWN

HA1

BMA1

LA2

LB2

HB2

CB2

LB1

BMB2

CA1

LA1

GNDD

Figure 2.2 TMC5160-WA package and pinning QFN-WA (8x8mm²)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 12

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2.2 Signal Descriptions

Pin

TQFP

QFN

Type

Function

HB1

1 2

High side gate driver output.

CB1 2 3 Bootstrap capacitor positive connection.

12VOUT

3 4

Output of internal 11.5V gate voltage regulator and supply pin
of low side gate drivers. Attach 2.2µF to 10µF ceramic
capacitor to GND plane near to pin for best performance. Use
at least 10 times more capacity than for bootstrap capacitors.
In case an external gate voltage supply is available, tie VSA
and 12VOUT to the external supply.

VSA

4 5

Analog supply voltage for 11.5V and 5V regulator. Normally
tied to VS. Provide a 100nF filtering capacitor.

5VOUT

5 6

Output of internal 5V regulator. Attach 2.2µF to 10µF ceramic
capacitor to GNDA near to pin for best performance. Output
for VCC supply of the chip.

GNDA

6 7

Analog GND. Connect to GND plane near pin.

SRAL

7 8 AI

Sense resistor GND connection for phase A. Connect to the
GND side of the sense resistor in order to compensate for
voltage drop on the GND interconnection.

SRAH

8 9 AI

Sense resistor for phase A. Connect to the upper side of the
sense resistor. A Kelvin connection is preferred with high
motor currents. Symmetrical RC-Filtering may be added for
SRAL and SRAH to eliminate high frequency switching spikes
from other drives or switching of coil B.

SRBH

9

10

AI

Sense resistor for phase B. Connect to the upper side of the
sense resistor. A Kelvin connection is preferred with high
motor currents. Symmetrical RC-Filtering may be added for
SRBL and SRBH to eliminate high frequency switching spikes
from other drives or switching of coil A.

SRBL

10

11

AI

Sense resistor GND connection for phase B. Connect to the
GND side of the sense resistor in order to compensate for
voltage drop on the GND interconnection.

TST_MODE

11

12

DI

Test mode input. Tie to GND using short wire.

CLK

12

13

DI

CLK input. Tie to GND using short wire for internal clock or
supply external clock. Internal clock-fail over circuit protects
against loss of external clock signal.

CSN_CFG3

13

14

DI

SPI chip select input (negative active) (SPI_MODE=1) or
Configuration input (SPI_MODE=0)

SCK_CFG2

14

15

DI

SPI serial clock input (SPI_MODE=1) or
Configuration input (SPI_MODE=0)

SDI_CFG1

15

16

DI

SPI data input (SPI_MODE=1) or
Configuration input (SPI_MODE=0) or
Next address input (NAI) for single wire interface.

SDO_CFG0

16

17

DIO

SPI data output (tristate) (SPI_MODE=1) or
Configuration input (SPI_MODE=0) or
Next address output (NAO) for single wire interface.

REFL_STEP

17

18

DI

Left reference input (for internal ramp generator) or
STEP input when (SD_MODE=1).

REFR_DIR

18

19

DI

Right reference input (for internal ramp generator) or
DIR input (SD_MODE=1).

GNDD

19,
30

25,
Pad

Digital GND. Connect to GND plane near pin.
VCC_IO

20

20 3.3V to 5V IO supply voltage for all digital pins.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 13

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Pin

TQFP

QFN

Type

Function

SD_MODE

21

21

DI

Mode selection input. When tied low, the internal ramp
generator generates step pulses. When tied high, the STEP/DIR
inputs control the driver. SD_MODE=0 and SPI_MODE=0 enable
UART operation.

SPI_MODE

22

22

DI
(pd)

Mode selection input. When tied low with SD_MODE=1, the
chip is in standalone mode and pins have their CFG functions.
When tied high, the SPI interface is enabled. Integrated pull
down resistor.

ENCB_DCEN_
CFG4

23

23

DI
(pd)

Encoder B-channel input (when using internal ramp generator)
or
DcStep enable input (SD_MODE=1, SPI_MODE=1) – leave open
or tie to GND for normal operation in this mode (no DcStep).
Configuration input (SPI_MODE=0)

ENCA_DCIN_
CFG5

24

24

DI
(pd)

Encoder A-channel input (when using internal ramp generator)
or
DcStep gating input for axis synchronization (SD_MODE=1,
SPI_MODE=1) or
Configuration input (SPI_MODE=0)

ENCN_DCO_
CFG6

25

26

DIO

Encoder N-channel input (SD_MODE=0) or
DcStep ready output (SD_MODE=1).
With SD_MODE=0, pull to GND or VCC_IO, if the pin is not used
for an encoder.

DIAG0_SWN

26

27

DIO
(pu+
pd)

Diagnostics output DIAG0.
Interrupt or STEP output for motion controller (SD_MODE=0,
SPI_MODE=1).
Use external pullup resistor with 47k or less in open drain
mode.
Single wire I/O (negative) (only with SD_MODE=0 and
SPI_MODE=0)

DIAG1_SWP

27

28

DIO
(pd)

Diagnostics output DIAG1.
Position compare or DIR output for motion controller
(SD_MODE=0, SPI_MODE=1).
Use external pullup resistor with 47k or less in open drain
mode.
Single wire I/O (positive) (only with SD_MODE=0 and
SPI_MODE=0)

DRV_ENN

28

29

DI

Enable input. The power stage becomes switched off (all
motor outputs floating) when this pin becomes driven to a
high level.

VCC

29

30

5V supply input for digital circuitry within chip. Provide 100nF
or bigger capacitor to GND (GND plane) near pin. Shall be
supplied by 5VOUT. A 2.2 or 3.3 Ohm resistor is recommended
for decoupling noise from 5VOUT. When using an external
supply, make sure, that VCC comes up before or in parallel to
5VOUT or VCC_IO, whichever comes up later!

CPO

31

31 Charge pump capacitor output.

CPI

32

32

Charge pump capacitor input. Tie to CPO using 22nF 100V
capacitor.

VS

33

33

Motor supply voltage. Provide filtering capacity near pin with
short loop to GND plane. Must be tied to the positive bridge
supply voltage.

VCP

34

34 Charge pump voltage. Tie to VS using 100nF capacitor.

CA2

35

35 Bootstrap capacitor positive connection.

HA2

36

36 High side gate driver output.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 14

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Pin

TQFP

QFN

Type

Function

BMA2

37

37 Bridge Center and bootstrap capacitor negative connection.

LA2

38

38 Low side gate driver output.

LA1

39

39 Low side gate driver output.

BMA1

40

40 Bridge Center and bootstrap capacitor negative connection.

HA1

41

41 High side gate driver output.

CA1

42

42 Bootstrap capacitor positive connection.

CB2

43

43 Bootstrap capacitor positive connection.

HB2

44

44 High side gate driver output.

BMB2

45

45 Bridge Center and bootstrap capacitor negative connection.

LB2

46

46 Low side gate driver output.

LB1

47

47 Low side gate driver output.

BMB1

48 1

Bridge Center and bootstrap capacitor negative connection.

Exposed die
pad

- -

Connect the exposed die pad to a GND plane. Provide as many
as possible vias for heat transfer to GND plane. Serves as GND
pin for the low side gate drivers. Ensure low loop inductivity
to sense resistor GND.

*(pd) denominates a pin with pulldown resistor
* All digital pins DI, DIO and DO use VCC_IO level and contain protection diodes to GND and VCC_IO
* All digital inputs DI and DIO have internal Schmitt-Triggers

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 15

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3 Sample Circuits

The following sample circuits show the required external components in different operation and
supply modes. The connection of the bus interface and further digital signals are left out for clarity.

3.1 Standard Application Circuit

47R

47R

LS

VCC_IO

TMC5160

SPI interface

CSN
SCK

SDO

SDI

reference switch

processing

REFL/STEP

REFR/DIR

DIAG / INT out

and

Single wire

interface

5V Voltage

regulator

charge pump

22n
100V

100n

16V

DIAG0/SWN

CLK_IN

DIAG1/SWP

+V

M

5VOUT

VSA

2.2µ

+V

IO

DRV_ENN

GNDD

GNDA

TST_MODE

DIE PAD

VCC

opt. ext. clock

12-16MHz

3.3V or 5V

I/O voltage

100n

100n

Controller

LS

stepper
motor

N

S

BMA2

Chopper

100n

SRAH

C

E

Optional use lower
voltage down to 12V

2R2

470n

Use low inductivity SMD
type, e.g. 1210 or 2512
resistor for RS!

Encoder

unit

A B N

ENCB_DCEN

ENCA_DCIN

ENCN_DCO

Encoder input /

dcStep control in S/D

mode

SD_MODE

SPI_MODE

opt. driver enable

B.Dwersteg, ©

TRINAMIC 2014

R

S

SRAL

LA1

LA2

HA1

HA2

BMA1

HS

HS

CA1

C

B

CA2

C

B

+V

M

LS

LS

BMB2

SRBH

R

S

SRBL

LB1

LB2

HB1

HB2

BMB1

HS

HS

CB1

C

B

CB2

C

B

+V

M

Both GND: UART mode

CPI

CPO

VCP

VS

11.5V Voltage
regulator

12VOUT

2.2µ

mode selection

Bootstrap capacitors CB:
220nF for MOSFETs with QG<20nC, 470nF for larger Q

G

470n

470n

Keep inductivity of the fat
interconnections as small
as possible to avoid
undershoot of BM <-5V!

R

G

R

G

R

G

R

G

R

G

R

G

R

G

R

G

Slope control resistors RG: Adapt to MOSFET to yield slopes of roughly
100ns. Slope must be slower than bulk diode recovery time.

47R

47R

+V

IO

pd pd pd

+V

IO

Figure 3.1 Standard application circuit

The standard application circuit uses a minimum set of additional components. Eight MOSFETs are
selected for the desired current, voltage and package type. Two sense resistors set the motor coil
current. See chapter 9 to choose the right value for sense resistors. Use low ESR capacitors for
filtering the power supply. A minimum capacity of 100µF per ampere of coil current near to the power
bridge is recommended for best performance. The capacitors need to cope with the current ripple
caused by chopper operation. Current ripple in the supply capacitors also depends on the power
supply internal resistance and cable length. VCC_IO can be supplied from 5VOUT, or from an external
source, e.g. a 3.3V regulator. In order to minimize linear voltage regulator power dissipation of the
internal 5V and 11.5V voltage regulators in applications where VM is high, a different (lower) supply
voltage should be used for VSA (see chapter 3.2).

Basic layout hints

Place sense resistors and all filter capacitors as close as possible to the power MOSFETs. Place the
TMC5160 near to the MOSFETs and use short interconnection lines in order to minimize parasitic trace
inductance. Use a solid common GND for all GND, GNDA and GNDD connections, also for sense
resistor GND. Connect 5VOUT filtering capacitor directly to 5VOUT and GNDA pin. See layout hints for
more details. Low ESR electrolytic capacitors are recommended for VS filtering.

Hint

In safety critical applications, VS and the bridge may be supplied by a separate, switched supply in
order to realize safe torque off. Make sure that the slope at VS does not exceed 1V/µs.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 16

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Attention

In case VSA is supplied by a different voltage source, make sure that VSA does not drop out during
motor operation. The motor driver should be disabled in case VSA becomes switched off before VS.
Hard switching edges on VSA might result in bridge cross-conduction otherwise. It is safest to derive
VSA voltage from VS supply.

3.2 External Gate Voltage Regulator

At high supply voltages like 48V, the internal gate voltage regulator and the internal 5V regulator
have considerable power dissipation, especially with high MOSFET gate charges, high chopper
frequency or high system clock frequency >12MHz. A good thermal coupling of the heat slug to the
system PCB GND plane is required to dissipate heat. Still, the thermal thresholds will be lowered
significantly by self-heating. To reduce power dissipation, supply an external gate driver voltage to the
TMC5160. Figure 3.2 shows the required connection. The internal gate voltage regulator becomes
disabled in this constellation. 12V +/-1V are recommended for best results.

5V Voltage

regulator

+V

G

5VOUT

VSA

2.2µ

VCC

2.2µ

12V Gate Voltage

2R2

470n

11.5V Voltage
regulator

12VOUT

Figure 3.2 External gate voltage supply

Hint

With MOSFETs above 50nC of total gate charge, chopper frequency >40kHz, or at clock frequency
>12MHz, it is recommended to use a VSA supply not higher than 40V.

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3.3 Choosing MOSFETs and Slope

The selection of power MOSFETs depends on a number of factors, like package size, on-resistance,
voltage rating and supplier. It is not true, that larger, lower RDSon MOSFETs will always be better, as
a larger device also has higher capacitances and may add more ringing in trace inductance and power
dissipation in the gate drive circuitry. Adapt the MOSFETs to the required motor voltage (adding 5-10V
of reserve to the peak supply voltage) and to the desired maximum current, in a way that resistive
power dissipation still is low for the thermal capabilities of the chosen MOSFET package. The TMC5160
drives the MOSFET gates with roughly 10V, so normal, 10V specified types are sufficient. Logic level
FETs (4.5V specified RDSon) will also work, but may be more critical with regard to bridge cross­conduction due to lower V

GS(th)

.

The gate drive current and MOSFET gate resistors RG (optional) determine switching behavior and
should basically be adapted to the MOSFET gate-drain charge (Miller charge). Figure 3.3 shows the
influence of the Miller charge on the switching event. Figure 3.4 additionally shows the switching
events in different load situations (load pulling the output up or down), and the required bridge
brake-before-make time.
The following table shall serve as a thumb rule for programming the MOSFET driver current
(DRVSTRENGTH setting) and the selection of gate resistors:

MOSFET MILLER CHARGE VS. DRVSTRENGTH AND RG

Miller Charge
[nC] (typ.)

DRVSTRENGTH
setting

Value of RG [Ω]

<10 0 ≤ 15

10…20

0 or 1

≤ 10

20…40

1 or 2

≤ 7.5

40…60

2 or 3

≤ 5

>60 3 ≤ 2.7

The TMC5160 provides increased gate-off drive current to avoid bridge cross-conduction induced by
high dV/dt. This protection will be less efficient with gate resistors exceeding the values given in the
table. Therefore, for larger values of RG, a parallel diode may be required to ensure keeping the
MOSFET safely off during switching events.

MOSFET gate charge vs. switching event

QG – Total gate charge (nC)

V

GS

– Gate to source voltage (V)

10

8

6

4

2

0

0 5 10 15 20 25

V

DS

– Drain to source voltage (V)

25

20

15

10

5

0

V

M

Q

MILLER

Figure 3.3 Miller charge determines switching slope

Hints

- Choose modern MOSFETs with fast and soft recovery bulk diode and low reverse recovery charge.

- A small, SMD MOSFET package allows compacter routing and reduces parasitic inductance effects.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 18

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MOSFET drivers

Lx

BMx

Hx

0V

V

12VOUT

0V

0V

V

VM

VVM+V

12VOUT

V

VM

Load pulling BMx down Load pulling BMx up

t

BBM

t

BBM

Miller plateau

Hx-

BMx

0V

VCX-V

BMx

Miller plateau

Effective break-before-make time

-1.2V

Output
slope

Output
slope

t

BBM

Figure 3.4 Slopes, Miller plateau and blank time

The following DRV_CONF parameters allow adapting the driver to the MOSFET bridge:

Parameter

Description

Setting

Comment

BBMTIME

Break-before-make time setting to ensure non­overlapping switching of high-side and low-side
MOSFETs. BBMTIME allows fine tuning of times in
increments shorter than a clock period.
For higher times, use BBMCLKS.

0…24

time[ns]
100ns*32/(32-BBMTIME)

Ensure ~30% headroom
Reset Default: 0

BBMCLKS

Like BBMTIME, but in multiple of a clock cycle.
The longer setting rules (BBMTIME vs. BBMCLKS).

0…15

0: off

Reset Default: OTP 4 or 2

DRV_
STRENGTH

Selection of gate driver current. Adapts the gate
driver current to the gate charge of the external
MOSFETs.

0…3

Reset Default = 2

FILT_ISENSE

Filter time constant of sense amplifier to suppress
ringing and coupling from second coil operation
Hint: Increase setting if motor chopper noise
occurs due to cross-coupling of both coils.
(Reset Default = %00)

0…3

00: ~100ns (reset default)
01: ~200ns
10: ~300ns
11: ~400ns

DRV_CONF Parameters

Use the lowest gate driver strength setting DRVSTRENGTH giving favorable switching slopes, before
increasing the value of the gate series resistors. A slope time of nominal 40ns to 80ns is absolutely
sufficient and will normally be covered by the shortest possible Break-Before-Make time setting
(BBMTIME=0, BBMCLKS=0).
In case slower slopes have to be used, e.g. with large MOSFETs, ensure that the break-before-make
time (BBMTIME, optionally use BBMCLKS for times >200ns) sufficiently covers the switching event, in
order to avoid bridge cross conduction. The shortest break-before-make time, safely covering the
switching event, gives best results. Add roughly 30% of reserve, to cover production stray of MOSFETs
and driver.

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3.4 Tuning the MOSFET Bridge

A clean switching event is favorable to ensure low power dissipation and good EMC behavior.
Unsuitable layout or components endanger stable operation of the circuit. Therefore, it is important to
understand the effect of parasitic trace inductivity and MOSFET reverse recovery.

Stray inductance in power routing will cause ringing whenever the opposite MOSFET is in diode
conduction prior to switching on a low-side or high-side MOSFET. Diode conduction occurs during
break-before make time whenever the load current is inverse to the following bridge polarity. The
MOSFET bulk diode has a certain, type specific reverse recovery time and charge. This time typically is
in the range of a few 10ns. During reverse recovery time, the bulk diode will cause high current flow
across the bridge. This current is taken from the power supply filter capacitors (see thick lines Figure

3.5). Once the diode opens parasitic inductance tries to keep the current flowing. A high, fast slope
results and leads to ringing in all parasitic inductivities (see Figure 3.6). This may lead to bridge
voltage undershooting the GND level as well as fast pulses on VS and all MOSFET connections. It
must be ensured, that the driver IC does not see spikes on its BM pins to GND going below -5V.
Severe VS ripple might overload the charge-pump circuitry. Measure the voltage directly at the driver
pins to driver GND. The amount of undershooting depends on energy stored in parasitic inductivities
from low side drain to low side source and via the sense resistor RS to GND.

When using relatively small MOSFETs, a soft slope control requires a high gate series resistance. This
endangers safe MOSFET switch off. Add additional diodes to ensure safe MOSFET off conditions with
slow switch-on slopes (shown for right MOSFET pair in Figure 3.5).

Figure 3.7 shows performance of the basic circuit after adapting switching slope and adding 1nF
bridge output capacitors.

LS

GNDD

GNDA

DIE PAD

LS

BMA2

SRAH

Capacitor reduces

ringing on sense resistor.

R

S

SRAL

LA1

LA2

HA1

HA2

BMA1

HS

HS

CA1

C

B

CA2

C

B

+V

M

R

G

R

G

R

G

R

G

Coil
out

47R

47R

RG

RG

Decide use and value of the additional components based on measurements of the actual circuit using the final layout!

100n

1n,

100V

1n,

100V

2n2

RC-Filter protects SRAH /

SRAL and reduces spikes
seen by the chopper

RG: Reduce slope and protect the driver against ringing in the

interconnections between MOSFET and driver

VS

220nF

1R

Optional RC filter

against VS ringing

4.7µF

LOW­ESR

Additional 1A type Schottky Diodes (selected for full VM range) in combination with RG to 1.0 Ohm) eliminate
undershooting of BM in case of high parasitic layout inductivity, e.g. with long interconnections to MOSFETs.

470pF to a few nF output

capacitors close to bridge
and / or output reduce

ringing and improve EMC

Filter capacitors placed near bridge

Optional gate diodes in combination
with very high value of R

G

Figure 3.5 Bridge protection options for power routing inductivity

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 20

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ENSURE RELIABLE OPERATION

- Use SMD MOSFETs and short interconnections

- Provide sufficient power filtering capacity close to the bridge and close to VS pin

- Tune MOSFET switching slopes (measure switch-on event at MOSFET gate) to be slower than the

MOSFET bulk diode reverse recovery time. This will reduce cross conduction.

- Add optional gate resistors close to MOSFET gate and output capacitors to ensure clean switching

and reliable operation by minimizing ringing. Figure 3.5 shows the options plus some variations.

- Some MOSFETs eliminate reverse recovery charge by integrating a fast diode from source to drain.

Figure 3.6 Ringing of output (blue) and Gate voltages (Yellow, Cyan) with untuned brige

Figure 3.7 Switching event with optimized components (without / after bulk diode conduction)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 21

www.trinamic.com

BRIDGE OPTIMIZATION EXAMPLE

A stepper driver for 6A of motor current has been designed using the MOSFET AOD4126 in the
standard schematic.
The MOSFETs have a low gate capacitance and offer roughly 50ns slope time at the lowest driver
strength setting. At lowest driver strength setting, switching quality is best (Figure 3.6), but still
shows a lot of ringing. Low side gate resistors have been added to slightly increase switching slope
time following high-side bulk diode conduction by increasing the effect of Gate-Drain (Miller) charge.
High side gate resistors have been added for symmetry. Tests showed, that 1nF output capacitors
dramatically reduce ringing of the power bridge following bulk diode conduction (Figure 3.7). Figure

3.8 shows the actual components and values after optimization.

LS

GNDD

GNDA

DIE PAD

LS

BMA2

SRAH

50m,
2512

SRAL

LA1

LA2

HA1

HA2

BMA1

HS

HS

CA1

470n

CA2

470n

+V

M

4.7µF

10R 10R

10R

Coil
out

47R

47R

1n,
100V

1n,
100V

10R

4x AOD4126

Figure 3.8 Example for bridge with tuned components (see scope shots)

BRIDGE LAYOUT CONSIDERATIONS

- Tune the bridge layout for minimum loop inductivity. A compact layout is best.

- Keep MOSFET gate connections short and straight and avoid loop inductivity between BM and

corresponding HS driver pin. Loop inductance is minimized with parallel traces, or adjacent traces
on adjacent layers. A wider trace reduces inductivity (don’t use minimum trace width).

- Minimize the length of the sense resistor connection to low-side MOSFET source, and place the

TMC5160 near the sense resistor’s GND connection, with its GND connections directly connected to

the same GND plane.

- Optimize switching behavior by tuning gate current setting and gate resistors. Add MOSFET bridge

output capacitors (470pF to a few nF) to reduce ringing.

- Measure the performance of the bridge by probing BM pins directly at the bridge or at the

TMC5160 using a short GND tip on the scope probe rather than a GND cable, if available.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 22

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3.5 Higher Voltage Applications

Some applications require higher voltage tolerance, than the TMC5160 can directly support. For peak
voltages above 60V, use an external gate driver IC boosting the TMC5160 gate driver outputs. Figure

3.9 shows a sample circuit. It uses one external gate-driver IC for each half-bridge, to boost the
TMC5160 outputs. BBM control still is done by TMC5160. These ICs are 12V tolerant, so the TMC5160
output signals can be directly used for driving their control inputs. The BM pins however need to be
kept near GND, in order to yield a GND-related high side control signal. By attaching BM to the
respective sense resistor, the short to VS protection still can react to overcurrent conditions. Limit
short detection voltage drop to 0.5V…0.8V to avoid high side outputs to reach a too high level. High­side short protection has to be disabled using CHOPCONF.diss2g, as it cannot work in this circuit
configuration.
Keep layout and all interconnections compact, in order to avoid disturbance by parasitic effects. Also
consult application notes for the selected gate driver ICs.

47R

47R

One bridge shown

5V Voltage

regulator

charge pump

22n

100V

100n

16V

+12V

5VOUT

VSA

2.2µ

VCC

100n

stepper

motor

N

S

Chopper

2.2u

C

E

8-14V for gate driving

2R2

470n

B.Dwersteg, ©

TRINAMIC 2014

LS

LS

BMB2

SRBH

R

S

SRBL

LB1

LB2

HB1

HB2

BMB1

HS

HS

CB1

CB2

+V

M

CPI

CPO

VCP

VS

11.5V Voltage

regulator

12VOUT

2.2µ

470n

Keep inductivity of the fat
interconnections as small

as possible!

R

G

R

G

Motor voltage that exceeds

drive capabilities of TMC 5160,

e.g. 60V-100V

12V level gate

control signals

1n-2.2n

Low-Side over-

current sensing @ R s

Gate drive shown fo r

one half bridge

LM5109

gate

driver

HILIHO

LO

VDD

VSS

100n

1µ

HS

HB

22n

22k

12V

Charge pump for hig h

dutycycle support

Figure 3.9 External Gate Driver Example

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 23

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4 SPI Interface

4.1 SPI Datagram Structure

The TMC5160 uses 40 bit SPI™ (Serial Peripheral Interface, SPI is Trademark of Motorola) datagrams
for communication with a microcontroller. Microcontrollers which are equipped with hardware SPI are
typically able to communicate using integer multiples of 8 bit. The NCS line of the device must be
handled in a way, that it stays active (low) for the complete duration of the datagram transmission.

Each datagram sent to the device is composed of an address byte followed by four data bytes. This
allows direct 32 bit data word communication with the register set. Each register is accessed via 32
data bits even if it uses less than 32 data bits.

For simplification, each register is specified by a one-byte address:

- For a read access the most significant bit of the address byte is 0.

- For a write access the most significant bit of the address byte is 1.

Most registers are write-only registers, some can be read additionally, and there are also some read
only registers.

4.1.1 Selection of Write / Read (WRITE_notREAD)

The read and write selection is controlled by the MSB of the address byte (bit 39 of the SPI
datagram). This bit is 0 for read access and 1 for write access. So, the bit named W is a
WRITE_notREAD control bit. The active high write bit is the MSB of the address byte. So, 0x80 has to
be added to the address for a write access. The SPI interface always delivers data back to the master,
independent of the W bit. The data transferred back is the data read from the address which was
transmitted with the previous datagram, if the previous access was a read access. If the previous
access was a write access, then the data read back mirrors the previously received write data. So, the
difference between a read and a write access is that the read access does not transfer data to the
addressed register but it transfers the address only and its 32 data bits are dummies, and, further the
following read or write access delivers back the data read from the address transmitted in the
preceding read cycle.

A read access request datagram uses dummy write data. Read data is transferred back to the master
with the subsequent read or write access. Hence, reading multiple registers can be done in a
pipelined fashion.

Whenever data is read from or written to the TMC5160, the MSBs delivered back contain the SPI
status, SPI_STATUS, a number of eight selected status bits.

SPI DATAGRAM STRUCTURE

MSB (transmitted first)

40 bit

LSB (transmitted last)

39 ...

... 0

→ 8 bit address
 8 bit SPI status

 → 32 bit data

39 ... 32

31 ... 0

→ to TMC5160
RW + 7 bit address
 from TMC5160
8 bit SPI status

8 bit data

8 bit data

8 bit data

8 bit data

39 / 38 ... 32

31 ... 24

23 ... 16

15 ... 8

7 ... 0

W

38...32

31...28

27...24

23...20

19...16

15...12

11...8

7...4

3...0

39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 1
0

9 8 7 6 5 4 3 2 1

0

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 24

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Example:

For a read access to the register (XACTUAL) with the address 0x21, the address byte has to
be set to 0x21 in the access preceding the read access. For a write access to the register
(VACTUAL), the address byte has to be set to 0x80 + 0x22 = 0xA2. For read access, the data
bit might have any value (-). So, one can set them to 0.

action data sent to TMC5160 data received from TMC5160
read XACTUAL → 0x2100000000  0xSS & unused data
read XACTUAL → 0x2100000000  0xSS & XACTUAL
write VMAX:= 0x00ABCDEF → 0xA700ABCDEF  0xSS & XACTUAL
write VMAX:= 0x00123456 → 0xA700123456  0xSS00ABCDEF

*)S: is a placeholder for the status bits SPI_STATUS

4.1.2 SPI Status Bits Transferred with Each Datagram Read Back

New status information becomes latched at the end of each access and is available with the next SPI
transfer.

SPI_STATUS – status flags transmitted with each SPI access in bits 39 to 32

Bit

Name

Comment

7

status_stop_r

RAMP_STAT[1] – 1: Signals stop right switch status (motion controller

only)

6

status_stop_l

RAMP_STAT[0] – 1: Signals stop left switch status (motion controller only)

5

position_reached

RAMP_STAT[9] – 1: Signals target position reached (motion controller only)

4

velocity_reached

RAMP_STAT[8] – 1: Signals target velocity reached (motion controller only)

3

standstill

DRV_STATUS[31] – 1: Signals motor stand still

2

sg2

DRV_STATUS[24] – 1: Signals StallGuard flag active

1

driver_error

GSTAT[1] – 1: Signals driver 1 driver error (clear by reading GSTAT)

0

reset_flag

GSTAT[0] – 1: Signals, that a reset has occurred (clear by reading GSTAT)

4.1.3 Data Alignment

All data are right aligned. Some registers represent unsigned (positive) values, some represent integer
values (signed) as two’s complement numbers, single bits or groups of bits are represented as single
bits respectively as integer groups.

4.2 SPI Signals

The SPI bus on the TMC5160 has four signals:

- SCK – bus clock input

- SDI – serial data input

- SDO – serial data output

- CSN – chip select input (active low)

The slave is enabled for an SPI transaction by a low on the chip select input CSN. Bit transfer is
synchronous to the bus clock SCK, with the slave latching the data from SDI on the rising edge of SCK
and driving data to SDO following the falling edge. The most significant bit is sent first. A minimum
of 40 SCK clock cycles is required for a bus transaction with the TMC5160.

If more than 40 clocks are driven, the additional bits shifted into SDI are shifted out on SDO after a
40-clock delay through an internal shift register. This can be used for daisy chaining multiple chips.

CSN must be low during the whole bus transaction. When CSN goes high, the contents of the internal
shift register are latched into the internal control register and recognized as a command from the
master to the slave. If more than 40 bits are sent, only the last 40 bits received before the rising edge
of CSN are recognized as the command.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 25

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4.3 Timing

The SPI interface is synchronized to the internal system clock, which limits the SPI bus clock SCK to
half of the system clock frequency. If the system clock is based on the on-chip oscillator, an additional
10% safety margin must be used to ensure reliable data transmission. All SPI inputs as well as the
ENN input are internally filtered to avoid triggering on pulses shorter than 20ns. Figure 4.1 shows the
timing parameters of an SPI bus transaction, and the table below specifies their values.

CSN

SCK

SDI

SDO

t

CC

t

CC

t

CL

t

CH

bit39 bit38 bit0

bit39 bit38 bit0

t

DO

t

ZC

t

DU

t

DH

t

CH

Figure 4.1 SPI timing

Hint

Usually this SPI timing is referred to as SPI MODE 3

SPI interface timing

AC-Characteristics

clock period: t

CLK

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

SCK valid before or after change
of CSN

tCC 10

ns

CSN high time

t

CSH

*) Min time is for
synchronous CLK
with SCK high one
tCH before CSN high
only

t

CLK

*)

>2t

CLK

+10

ns

SCK low time

tCL

*) Min time is for
synchronous CLK
only

t

CLK

*)

>t

CLK

+10

ns

SCK high time

tCH

*) Min time is for
synchronous CLK
only

t

CLK

*)

>t

CLK

+10

ns

SCK frequency using internal
clock

f

SCK

assumes minimum
OSC frequency

4

MHz

SCK frequency using external
16MHz clock

f

SCK

assumes
synchronous CLK

8

MHz

SDI setup time before rising
edge of SCK

tDU 10

ns

SDI hold time after rising edge
of SCK

tDH 10

ns

Data out valid time after falling
SCK clock edge

tDO

no capacitive load
on SDO

t

FILT

+5

ns

SDI, SCK and CSN filter delay
time

t

FILT

rising and falling
edge

12

20

30

ns

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 26

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5 UART Single Wire Interface

The UART single wire interface allows the control of the TMC5160 with any microcontroller UART. It
shares transmit and receive line like an RS485 based interface. Data transmission is secured using a
cyclic redundancy check, so that increased interface distances (e.g. over cables between two PCBs) can
be bridged without the danger of wrong or missed commands even in the event of electro-magnetic
disturbance. The automatic baud rate detection and an advanced addressing scheme make this
interface easy and flexible to use.

5.1 Datagram Structure

5.1.1 Write Access

UART WRITE ACCESS DATAGRAM STRUCTURE

each byte is LSB…MSB, highest byte transmitted first

0 … 63

sync + reserved

8 bit slave

address

RW + 7 bit

register addr.

32 bit data

CRC

0…7

8…15

16…23

24…55

56…63

1 0 1

0

Reserved (don’t cares

but included in CRC)

SLAVEADDR

register
address

1

data bytes 3, 2, 1, 0

(high to low byte)

CRC

0 1 2 3 4 5 6 7 8

…

15

16 … 23

24 … 55

56 … 63

A sync nibble precedes each transmission to and from the TMC5160 and is embedded into the first
transmitted byte, followed by an addressing byte. Each transmission allows a synchronization of the
internal baud rate divider to the master clock. The actual baud rate is adapted and variations of the
internal clock frequency are compensated. Thus, the baud rate can be freely chosen within the valid
range. Each transmitted byte starts with a start bit (logic 0, low level on SWP) and ends with a stop
bit (logic 1, high level on SWP). The bit time is calculated by measuring the time from the beginning
of start bit (1 to 0 transition) to the end of the sync frame (1 to 0 transition from bit 2 to bit 3). All
data is transmitted byte wise. The 32 bit data words are transmitted with the highest byte first.

A minimum baud rate of 9000 baud is permissible, assuming 20 MHz clock (worst case for low baud
rate). Maximum baud rate is f

CLK

/16 due to the required stability of the baud clock.

The slave address is determined by the register SLAVEADDR. If the external address pin NEXTADDR is
set, the slave address becomes incremented by one.

The communication becomes reset if a pause time of longer than 63 bit times between the start bits
of two successive bytes occurs. This timing is based on the last correctly received datagram. In this
case, the transmission needs to be restarted after a failure recovery time of minimum 12 bit times of
bus idle time. This scheme allows the master to reset communication in case of transmission errors.
Any pulse on an idle data line below 16 clock cycles will be treated as a glitch and leads to a timeout
of 12 bit times, for which the data line must be idle. Other errors like wrong CRC are also treated the
same way. This allows a safe re-synchronization of the transmission after any error conditions.
Remark, that due to this mechanism an abrupt reduction of the baud rate to less than 15 percent of
the previous value is not possible.

Each accepted write datagram becomes acknowledged by the receiver by incrementing an internal
cyclic datagram counter (8 bit). Reading out the datagram counter allows the master to check the
success of an initialization sequence or single write accesses. Read accesses do not modify the
counter.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 27

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5.1.2 Read Access

UART READ ACCESS REQUEST DATAGRAM STRUCTURE

each byte is LSB…MSB, highest byte transmitted first

sync + reserved

8 bit slave address

RW + 7 bit register

address

CRC

0...7

8…15

16…23

24…31

1 0 1

0

Reserved (don’t cares

but included in CRC)

SLAVEADDR

register address

0

CRC

0 1 2 3 4 5 6 7 8

…

15

16 … 23

24 … 31

The read access request datagram structure is identical to the write access datagram structure, but
uses a lower number of user bits. Its function is the addressing of the slave and the transmission of
the desired register address for the read access. The TMC5160 responds with the same baud rate as
the master uses for the read request.

In order to ensure a clean bus transition from the master to the slave, the TMC5160 does not
immediately send the reply to a read access, but it uses a programmable delay time after which the
first reply byte becomes sent following a read request. This delay time can be set in multiples of
eight bit times using SENDDELAY time setting (default=8 bit times) according to the needs of the
master. In a multi-slave system, set SENDDELAY to min. 2 for all slaves. Otherwise a non-addressed
slaves might detect a transmission error upon read access to a different slave.

UART READ ACCESS REPLY DATAGRAM STRUCTURE

each byte is LSB…MSB, highest byte transmitted first

0 ...... 63

sync + reserved

8 bit slave

address

RW + 7 bit

register addr.

32 bit data

CRC

0…7

8…15

16…23

24…55

56…63

1 0 1 0 reserved (0)

0xFF

register
address

0

data bytes 3, 2, 1, 0

(high to low byte)

CRC

0 1 2 3 4 5 6 7 8

…

15

16 … 23

24 … 55

56 … 63

The read response is sent to the master using address code %1111. The transmitter becomes switched
inactive four bit times after the last bit is sent.

Address %11111111 is reserved for read accesses going to the master. A slave cannot use this
address.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 28

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5.2 CRC Calculation

An 8 bit CRC polynomial is used for checking both read and write access. It allows detection of up to
eight single bit errors. The CRC8-ATM polynomial with an initial value of zero is applied LSB to MSB,
including the sync- and addressing byte. The sync nibble is assumed to always be correct. The
TMC5160 responds only to correctly transmitted datagrams containing its own slave address. It
increases its datagram counter for each correctly received write access datagram.

    



SERIAL CALCULATION EXAMPLE

CRC = (CRC << 1) OR (CRC.7 XOR CRC.1 XOR CRC.0 XOR [new incoming bit])

C-CODE EXAMPLE FOR CRC CALCULATION

void swuart_calcCRC(UCHAR* datagram, UCHAR datagramLength)

{

int i,j;

UCHAR* crc = datagram + (datagramLength-1); // CRC located in last byte of message
UCHAR currentByte;

*crc = 0;

for (i=0; i<(datagramLength-1); i++) { // Execute for all bytes of a message

currentByte = datagram[i]; // Retrieve a byte to be sent from Array
for (j=0; j<8; j++) {
if ((*crc >> 7) ^ (currentByte&0x01)) // update CRC based result of XOR operation
{

*crc = (*crc << 1) ^ 0x07;

}
else
{

*crc = (*crc << 1);

}

currentByte = currentByte >> 1;

} // for CRC bit

} // for message byte
}

5.3 UART Signals

The UART interface on the TMC5160 comprises four signals:

TMC5160 UART INTERFACE SIGNALS

SWP

Non-inverted data input and output

SWN

Inverted data input and output for use in differential transmission. Can be left open
in a 5V IO voltage system. Tie to the half IO level voltage for best performance in a

3.3V single wire non-differential application.

SDI_CFG1
(NAI)

Address increment pin for chained sequential addressing scheme

SDO_CFG0
(NAO)

Next address output pin for chained sequential addressing scheme (reset default=
high)

In UART mode (SPI_MODE low and SD_MODE low) the slave checks the single wire SWP and SWN for
correctly received datagrams with its own address continuously. Both signals are switched as input
during this time. It adapts to the baud rate based on the sync nibble, as described before. In case of
a read access, it switches on its output drivers on SWP and SWN and sends its response using the
same baud rate.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 29

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5.4 Addressing Multiple Slaves

ADDRESSING ONE OR TWO SLAVES

If only one or two TMC5160 are addressed by a master using a single UART interface, a hardware
address selection can be done by setting the NAI pins of both devices to different levels.

ADDRESSING UP TO 255 SLAVES

A different approach can address any number of devices by using the input NAI as a selection pin.
Addressing up to 255 units is possible.

Master CPU

(µC with UART,

software

switches TXD to

hi-Z for

receiving)

TMC5160

#1

NAI

NAO

SWIOP

SWION

TMC5160

#2

NAI

SWIOP

SWION

NAO

TMC5160

#3

NAI

SWIOP

SWION

TXD

address 0, NAO is high address 1 address 1

program to address 254 & set NAO low address 0, NAO is high address 1

address 254 program to address 253 & set NAO low address 0

address 254 address 253 program to address 252 & set NAO low

R

IDLE

+V

IO

R

IDLE

forces stop bit level in idle conditions,

3k3 is sufficient with 14 slaves

RXD

Addressing phase 1:

Addressing phase 2:

Addressing phase 3:

Addressing phase 4:

EXAMPLE FOR ADDRESSING UP TO 255 TMC5160

Addressing phase X: continue procedure

Figure 5.1 Addressing multiple TMC5160 via single wire interface using chaining

PROCEED AS FOLLOWS:

- Tie the NAI pin of your first TMC5160 to GND.

- Interconnect NAO output of the first TMC5160 to the next drivers NAI pin. Connect further

drivers in the same fashion.

- Now, the first driver responds to address 0. Following drivers are set to address 1.

- Program the first driver to its dedicated slave address. Note: once a driver is initialized with

its slave address, its NAO output, which is tied to the next drivers NAI has to be programmed
to logic 0 in order to differentiate the next driver from all following devices.

- Now, the second driver is accessible and can get its slave address. Further units can be

programmed to their slave addresses sequentially.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 30

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Master CPU

(µC with RS485

tranceiver)

TMC5160

#1

NAI

NAO

SWIOP

SWION

TMC5160

#2

NAI

SWIOP

SWION

TMC5160

#3

SWIOP

SWION

A

B

Addressing phase 1: address 0, NAO high address 1 address 1

Addressing phase 2: program to address 254 & set NAO low address 0, NAO high address 1

Addressing phase 3: address 254 program to address 253 & set NAO low address 0, NAO high

Addressing phase 4: address 254 address 253 program to address 252 & set NAO low

1k

+V

IO

NAO

NAI

EXAMPLE FOR ADDRESSING UP TO 255 TMC5160

Addressing phase X: continue procedure

R

TERM

R

TERM

R

FILT

C

FILT

R

FILT

C

FILT

Figure 5.2 Addressing multiple TMC5160 via the differential interface, additional filtering for NAI

A different scheme (not shown) uses bus switches (like 74HC4066) to connect the bus to the next unit
in the chain without using the NAI input. The bus switch can be controlled in the same fashion, using
the NAO output to enable it (low level shall enable the bus switch). Once the bus switch is enabled it
allows addressing the next bus segment. As bus switches add a certain resistance, the maximum
number of nodes will be reduced.

It is possible to mix different styles of addressing in a system. For example, a system using two
boards with each two TMC5160 can have both devices on a board with a different level on NEXTADDR,
while the next board is chained using analog switches separating the bus until the drivers on the first
board have been programmed.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 31

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6 Register Mapping

This chapter gives an overview of the complete register set. Some of the registers bundling a number
of single bits are detailed in extra tables. The functional practical application of the settings is detailed
in dedicated chapters.

Note

- All registers become reset to 0 upon power up, unless otherwise noted.

- Add 0x80 to the address Addr for write accesses!

NOTATION OF HEXADECIMAL AND BINARY NUMBERS

0x

precedes a hexadecimal number, e.g. 0x04

%

precedes a multi-bit binary number, e.g. %100

NOTATION OF R/W FIELD

R

Read only

W

Write only

R/W

Read- and writable register

R+C

Clear by writing “1” bit

OVERVIEW REGISTER MAPPING

REGISTER

DESCRIPTION

General Configuration Registers

These registers contain

- global configuration

- global status flags

- interface configuration

- and I/O signal configuration

Ramp Generator Motion Control Register Set

This register set offers registers for

- choosing a ramp mode

- choosing velocities

- homing

- acceleration and deceleration

- target positioning

- reference switch and StallGuard2 event

configuration

- ramp and reference switch status

Velocity Dependent Driver Feature Control Register
Set

This register set offers registers for

- driver current control

- setting thresholds for CoolStep operation

- setting thresholds for different chopper modes

- setting thresholds for DcStep operation

Encoder Register Set

The encoder register set offers all registers needed for
proper ABN encoder operation.

Motor Driver Register Set

This register set offers registers for

- setting / reading out microstep table and

counter

- chopper and driver configuration

- CoolStep and StallGuard2 configuration

- DcStep configuration

- reading out StallGuard2 values and driver error

flags

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6.1 General Configuration Registers

GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

Register

Description / bit names

RW

0x00

18

GCONF

Bit

GCONF – Global configuration flags

0

recalibrate

1: Zero crossing recalibration during driver disable

(via ENN or via TOFF setting)

1

faststandstill

Timeout for step execution until standstill detection:
1: Short time: 2^18 clocks
0: Normal time: 2^20 clocks

2

en_pwm_mode

1: StealthChop voltage PWM mode enabled

(depending on velocity thresholds). Switch from
off to on state while in stand-still and at IHOLD=
nominal IRUN current, only.

3

multistep_filt

1: Enable step input filtering for StealthChop

optimization with external step source (default=1)

4

shaft

1: Inverse motor direction

5

diag0_error (only with SD_MODE=1)
1: Enable DIAG0 active on driver errors:
Over temperature (ot), short to GND (s2g),

undervoltage chargepump (uv_cp)
DIAG0 always shows the reset-status, i.e. is active low
during reset condition.

6

diag0_otpw (only with SD_MODE=1)
1: Enable DIAG0 active on driver over temperature

prewarning (otpw)

7

diag0_stall (with SD_MODE=1)
1: Enable DIAG0 active on motor stall (set

TCOOLTHRS before using this feature)
diag0_step (with SD_MODE=0)

0: DIAG0 outputs interrupt signal
1: Enable DIAG0 as STEP output (half frequency,

dual edge triggered) for external STEP/DIR driver

8

diag1_stall (with SD_MODE=1)
1: Enable DIAG1 active on motor stall (set

TCOOLTHRS before using this feature)
diag1_dir (with SD_MODE=0)

0: DIAG1 outputs position compare signal
1: Enable DIAG1 as DIR output for external STEP/DIR

driver

9

diag1_index (only with SD_MODE=1)
1: Enable DIAG1 active on index position (microstep

look up table position 0)

10

diag1_onstate (only with SD_MODE=1)
1: Enable DIAG1 active when chopper is on (for the

coil which is in the second half of the fullstep)

11

diag1_steps_skipped (only with SD_MODE=1)
1: Enable output toggle when steps are skipped in

DcStep mode (increment of LOST_STEPS). Do not

enable in conjunction with other DIAG1 options.

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GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

Register

Description / bit names

12

diag0_int_pushpull

0: SWN_DIAG0 is open collector output (active low)
1: Enable SWN_DIAG0 push pull output (active high)

13

diag1_poscomp_pushpull

0: SWP_DIAG1 is open collector output (active low)
1: Enable SWP_DIAG1 push pull output (active high)

14

small_hysteresis

0: Hysteresis for step frequency comparison is 1/16
1: Hysteresis for step frequency comparison is 1/32

15

stop_enable

0: Normal operation
1: Emergency stop: ENCA_DCIN stops the sequencer

when tied high (no steps become executed by

the sequencer, motor goes to standstill state).

16

direct_mode

0: Normal operation
1: Motor coil currents and polarity directly

programmed via serial interface: Register XTARGET

(0x2D) specifies signed coil A current (bits 8..0)

and coil B current (bits 24..16). In this mode, the

current is scaled by IHOLD setting. Velocity based

current regulation of StealthChop is not available

in this mode. The automatic StealthChop current

regulation will work only for low stepper motor

velocities.

17

test_mode

0: Normal operation
1: Enable analog test output on pin ENCN_DCO.

IHOLD[1..0] selects the function of ENCN_DCO:

0…2: T120, DAC, VDDH
Hint: Not for user, set to 0 for normal operation!

R+

WC

0x01

3

GSTAT

Bit

GSTAT – Global status flags

(Re-Write with ‘1’ bit to clear respective flags)

0

reset

1: Indicates that the IC has been reset. All registers

have been cleared to reset values.

1

drv_err
1: Indicates, that the driver has been shut down

due to overtemperature or short circuit detection.

Read DRV_STATUS for details. The flag can only

be cleared when the temperature is below the

limit again.

2

uv_cp
1: Indicates an undervoltage on the charge pump.

The driver is disabled during undervoltage. This

flag is latched for information.

R

0x02

8

IFCNT

Interface transmission counter. This register becomes
incremented with each successful UART interface write access.
It can be read out to check the serial transmission for lost
data. Read accesses do not change the content. Disabled in SPI
operation. The counter wraps around from 255 to 0.

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GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

Register

Description / bit names

W

0x03

8

+ 4 SLAVECONF

Bit

SLAVECONF

7..0

SLAVEADDR:
These eight bits set the address of unit for the UART
interface. The address becomes incremented by one
when the external address pin NEXTADDR is active.
Range: 0-253 (254 cannot be incremented), default=0

11..8

SENDDELAY:
0, 1: 8 bit times (not allowed with multiple slaves)
2, 3: 3*8 bit times
4, 5: 5*8 bit times
6, 7: 7*8 bit times
8, 9: 9*8 bit times
10, 11: 11*8 bit times
12, 13: 13*8 bit times
14, 15: 15*8 bit times

R

0x04

8

+ 8 IOIN

Bit

INPUT

Reads the state of all input pins available

0

REFL_STEP

1

REFR_DIR

2

ENCB_DCEN_CFG4

3

ENCA_DCIN_CFG5

4

DRV_ENN

5

ENC_N_DCO_CFG6

6

SD_MODE (1=External step and dir source)

7

SWCOMP_IN (Shows voltage difference of SWN and
SWP. Bring DIAG outputs to high level with pushpull
disabled to test the comparator.)

31..
24

VERSION: 0x30=first version of the IC
Identical numbers mean full digital compatibility.

W

0x04

1

OUTPUT

Bit

OUTPUT

Sets the IO output pin polarity in UART mode

0

In UART mode, SDO_CFG0 is an output. This bit
programs the output polarity of this pin. Its main
purpose it to use SDO_CFG0 as NAO next address
output signal for chain addressing of multiple ICs.
Hint: Reset Value is 1 for use as NAO to next IC in
single wire chain

W

0x05

32

X_COMPARE

Position comparison register for motion controller position
strobe. The Position pulse is available on output SWP_DIAG1.

XACTUAL = X_COMPARE:

- Output signal PP (position pulse) becomes high. It

returns to a low state, if the positions mismatch.

W

0x06

OTP_PROG

Bit

OTP_PROGRAM – OTP programming

Write access programs OTP memory (one bit at a time),
Read access refreshes read data from OTP after a write

2..0

OTPBIT
Selection of OTP bit to be programmed to the selected
byte location (n=0..7: programs bit n to a logic 1)

5..4

OTPBYTE

Set to 00

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GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

Register

Description / bit names

15..8

OTPMAGIC

Set to 0xbd to enable programming. A programming
time of minimum 10ms per bit is recommended (check
by reading OTP_READ).

R

0x07

OTP_READ

Bit

OTP_READ (Access to OTP memory result and update)

See separate table!

7..0

OTP0 byte 0 read data

RW

0x08

5

FACTORY_
CONF

4..0

FCLKTRIM (Reset default: OTP)

0…31: Lowest to highest clock frequency. Check at

charge pump output. The frequency span is not
guaranteed, but it is tested, that tuning to 12MHz
internal clock is possible. The devices come preset to
12MHz clock frequency by OTP programming.
(Reset Default: OTP)

W

0x09

19

SHORT_
CONF

Bit

SHORT_CONF

3..0

S2VS_LEVEL:
Short to VS detector level for lowside FETs. Checks for
voltage drop in LS MOSFET and sense resistor.
4 (highest sensitivity) … 15 (lowest sensitivity)

Hint: Settings from 1 to 3 will trigger during normal
operation due to voltage drop on sense resistor.

(Reset Default: OTP 6 or 12)

11..8

S2G_LEVEL:
Short to GND detector level for highside FETs. Checks
for voltage drop on high side MOSFET
2 (highest sensitivity) … 15 (lowest sensitivity)

Attention: Settings below 6 not recommended at >52V
operation – false detection might result

(Reset Default: OTP 6 or 12)

17..16

SHORTFILTER:
Spike filtering bandwidth for short detection
0 (lowest, 100ns), 1 (1µs), 2 (2µs) 3 (3µs)
Hint: A good PCB layout will allow using setting 0.
Increase value, if erroneous short detection occurs.
(Reset Default = %01)

18

shortdelay: Short detection delay
0=750ns: normal, 1=1500ns: high
The short detection delay shall cover the bridge
switching time. 0 will work for most applications.
(Reset Default = 0)

W

0x0A

22

DRV_CONF

Bit

DRV_CONF

4..0

BBMTIME:

Break-Before make delay
0=shortest (100ns) … 16 (200ns) … 24=longest (375ns)
>24 not recommended, use BBMCLKS instead

Hint: Choose the lowest setting safely covering the
switching event in order to avoid bridge cross­conduction. Add roughly 30% of reserve.

(Reset Default = 0)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 36

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GENERAL CONFIGURATION REGISTERS (0X00…0X0F)

R/W

Addr

n

Register

Description / bit names

11..8

BBMCLKS:

0..15: Digital BBM time in clock cycles (typ. 83ns).
The longer setting rules (BBMTIME vs. BBMCLKS).
(Reset Default: OTP 4 or 2)

17..16

OTSELECT:
Selection of over temperature level for bridge disable,
switch on after cool down to 120°C / OTPW level.
00: 150°C
01: 143°C
10: 136°C (not recommended when VSA > 24V)
11: 120°C (not recommended, no hysteresis)

Hint: Adapt overtemperature threshold as required to
protect the MOSFETs or other components on the PCB.
(Reset Default = %00)

19..18

DRVSTRENGTH:
Selection of gate driver current. Adapts the gate driver
current to the gate charge of the external MOSFETs.
00: weak
01: weak+TC (medium above OTPW level)
10: medium
11: strong

Hint: Choose the lowest setting giving slopes <100ns.
(Reset Default = %10)

21..20

FILT_ISENSE:
Filter time constant of sense amplifier to suppress
ringing and coupling from second coil operation
00: low – 100ns
01: – 200ns
10: – 300ns
11: high – 400ns

Hint: Increase setting if motor chopper noise occurs
due to cross-coupling of both coils.

(Reset Default = %00)

W

0x0B

8

GLOBAL
SCALER

7..0

Global scaling of Motor current. This value is multiplied
to the current scaling in order to adapt a drive to a
certain motor type. This value should be chosen before
tuning other settings, because it also influences
chopper hysteresis.

0: Full Scale (or write 256)

1 … 31: Not allowed for operation
32 … 255: 32/256 … 255/256 of maximum current.

Hint: Values >128 recommended for best results
(Reset Default = 0)

R

0x0C

16

OFFSET_
READ

15..8

Offset calibration result phase A (signed)

7..0

Offset calibration result phase B (signed)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 37

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6.1.1 OTP_READ – OTP configuration memory

The OTP memory holds power up defaults for certain registers. All OTP memory bits are cleared to 0
by default. Programming only can set bits, clearing bits is not possible. Factory tuning of the clock
frequency affects otp0.0 to otp0.4. The state of these bits therefore may differ between individual ICs.

0X07: OTP_READ – OTP MEMORY MAP

Bit

Name

Function

Comment

7

otp0.7

otp_TBL

Reset default for TBL:
0: TBL=%10 (~3µs)
1: TBL=%01 (~2µs)

6

otp0.6

otp_BBM

Reset default for DRVCONF.BBMCLKS
0: BBMCLKS=4
1: BBMCLKS=2

5

otp0.5

otp_S2_LEVEL

Reset default for Short detection Levels:
0: S2G_LEVEL = S2VS_LEVEL = 6
1: S2G_LEVEL = S2VS_LEVEL = 12

4

otp0.4

OTP_FCLKTRIM

Reset default for FCLKTRIM
0: lowest frequency setting
31: highest frequency setting

Attention: This value is pre-programmed by factory clock
trimming to the default clock frequency of 12MHz and
differs between individual ICs! It should not be altered.

3

otp0.3

2

otp0.2

1

otp0.1

0

otp0.0

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 38

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6.2 Velocity Dependent Driver Feature Control Register Set

VELOCITY DEPENDENT DRIVER FEATURE CONTROL REGISTER SET (0X10…0X1F)

R/W

Addr

n

Register

Description / bit names

W

0x10

5

+

5

+

4

IHOLD_IRUN

Bit

IHOLD_IRUN – Driver current control

4..0

IHOLD
Standstill current (0=1/32…31=32/32)
In combination with StealthChop mode, setting
IHOLD=0 allows to choose freewheeling or coil
short circuit for motor stand still.

12..8

IRUN
Motor run current (0=1/32…31=32/32)

Hint: Choose sense resistors in a way, that normal

IRUN is 16 to 31 for best microstep performance.

19..16

IHOLDDELAY

Controls the number of clock cycles for motor
power down after a motion as soon as standstill is
detected (stst=1) and TPOWERDOWN has expired.
The smooth transition avoids a motor jerk upon
power down.

0: instant power down

1..15: Delay per current reduction step in multiple
of 2^18 clocks

W

0x11

8

TPOWER
DOWN

TPOWERDOWN sets the delay time after stand still (stst) of the

motor to motor current power down. Time range is about 0 to
4 seconds.

Attention: A minimum setting of 2 is required to allow
automatic tuning of StealthChop PWM_OFFS_AUTO.

Reset Default = 10
0…((2^8)-1) * 2^18 t

CLK

R

0x12

20

TSTEP

Actual measured time between two 1/256 microsteps derived
from the step input frequency in units of 1/fCLK. Measured
value is (2^20)-1 in case of overflow or stand still.

All TSTEP related thresholds use a hysteresis of 1/16 of the
compare value to compensate for jitter in the clock or the step
frequency. The flag small_hysteresis modifies the hysteresis to
a smaller value of 1/32.
(Txxx*15/16)-1 or
(Txxx*31/32)-1 is used as a second compare value for each
comparison value.
This means, that the lower switching velocity equals the
calculated setting, but the upper switching velocity is higher as
defined by the hysteresis setting.

When working with the motion controller, the measured TSTEP
for a given velocity V is in the range
(2

24

/ V) ≤ TSTEP ≤ 2

24

/ V - 1.

In DcStep mode TSTEP will not show the mean velocity of the
motor, but the velocities for each microstep, which may not be
stable and thus does not represent the real motor velocity in
case it runs slower than the target velocity.

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VELOCITY DEPENDENT DRIVER FEATURE CONTROL REGISTER SET (0X10…0X1F)

R/W

Addr

n

Register

Description / bit names

W

0x13

20

TPWMTHRS

This is the upper velocity for StealthChop voltage PWM mode.
TSTEP ≥ TPWMTHRS

- StealthChop PWM mode is enabled, if configured

- DcStep is disabled

W

0x14

20

TCOOLTHRS

This is the lower threshold velocity for switching on smart
energy CoolStep and StallGuard feature. (unsigned)

Set this parameter to disable CoolStep at low speeds, where it
cannot work reliably. The stop on stall function (enable with
sg_stop when using internal motion controller) and the stall
output signal become enabled when exceeding this velocity. In
non-DcStep mode, it becomes disabled again once the velocity
falls below this threshold.

TCOOLTHRS ≥ TSTEP ≥ THIGH:

- CoolStep is enabled, if configured

- StealthChop voltage PWM mode is disabled

TCOOLTHRS ≥ TSTEP

- Stop on stall is enabled, if configured

- Stall output signal (DIAG0/1) is enabled, if configured

W

0x15

20

THIGH

This velocity setting allows velocity dependent switching into
a different chopper mode and fullstepping to maximize torque.
(unsigned)
The stall detection feature becomes switched off for 2-3
electrical periods whenever passing THIGH threshold to
compensate for the effect of switching modes.

TSTEP ≤ THIGH:

- CoolStep is disabled (motor runs with normal current

scale)

- StealthChop voltage PWM mode is disabled

- If vhighchm is set, the chopper switches to chm=1

with TFD=0 (constant off time with slow decay, only).

- If vhighfs is set, the motor operates in fullstep mode

and the stall detection becomes switched over to
DcStep stall detection.

Microstep velocity time reference t for velocities: TSTEP = f

CLK

/ f

STEP

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 40

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6.3 Ramp Generator Registers

6.3.1 Ramp Generator Motion Control Register Set

RAMP GENERATOR MOTION CONTROL REGISTER SET (0X20…0X2D)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

RW

0x20

2

RAMPMODE

RAMPMODE:

0: Positioning mode (using all A, D and V

parameters)

1: Velocity mode to positive VMAX (using

AMAX acceleration)

2: Velocity mode to negative VMAX (using

AMAX acceleration)

3: Hold mode (velocity remains unchanged,

unless stop event occurs)

0…3

RW

0x21

32

XACTUAL

Actual motor position (signed)

Hint: This value normally should only be
modified, when homing the drive. In
positioning mode, modifying the register
content will start a motion.

-2^31…

+(2^31)-1

R

0x22

24

VACTUAL

Actual motor velocity from ramp generator
(signed)

The sign matches the motion direction. A
negative sign means motion to lower
XACTUAL.

+-(2^23)-1
[µsteps / t]

W

0x23

18

VSTART

Motor start velocity (unsigned)

For universal use, set VSTOP ≥ VSTART. This is
not required if the motion distance is sufficient
to ensure deceleration from VSTART to VSTOP.

0…(2^18)-1
[µsteps / t]

W

0x24

16

A1

First acceleration between VSTART and V1
(unsigned)

0…(2^16)-1
[µsteps / ta²]

W

0x25

20

V1

First acceleration / deceleration phase
threshold velocity (unsigned)

0: Disables A1 and D1 phase, use AMAX, DMAX
only

0…(2^20)-1
[µsteps / t]

W

0x26

16

AMAX

Second acceleration between V1 and VMAX
(unsigned)

This is the acceleration and deceleration value
for velocity mode.

0…(2^16)-1
[µsteps / ta²]

W

0x27

23

VMAX

Motion ramp target velocity (for positioning
ensure VMAX ≥ VSTART) (unsigned)

This is the target velocity in velocity mode. It
can be changed any time during a motion.

0…(2^23)-512
[µsteps / t]

W

0x28

16

DMAX

Deceleration between VMAX and V1 (unsigned)

0…(2^16)-1
[µsteps / ta²]

W

0x2A

16

D1

Deceleration between V1 and VSTOP
(unsigned)

Attention: Do not set 0 in positioning mode,
even if V1=0!

1…(2^16)-1
[µsteps / ta²]

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 41

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RAMP GENERATOR MOTION CONTROL REGISTER SET (0X20…0X2D)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

W

0x2B

18

VSTOP

Motor stop velocity (unsigned)

Hint: Set VSTOP ≥ VSTART to allow positioning
for short distances

Attention: Do not set 0 in positioning mode,
minimum 10 recommend!

1…(2^18)-1
[µsteps / t]
Reset
Default=1

W

0x2C

16

TZEROWAIT

Defines the waiting time after ramping down
to zero velocity before next movement or
direction inversion can start. Time range is
about 0 to 2 seconds.

This setting avoids excess acceleration e.g.
from VSTOP to -VSTART.

0…(2^16)-1 *
512 t

CLK

RW

0x2D

32

XTARGET

Target position for ramp mode (signed). Write
a new target position to this register in order
to activate the ramp generator positioning in
RAMPMODE=0. Initialize all velocity,
acceleration and deceleration parameters
before.

Hint: The position is allowed to wrap around,
thus, XTARGET value optionally can be treated
as an unsigned number.

Hint: The maximum possible displacement is
+/-((2^31)-1).

Hint: When increasing V1, D1 or DMAX during
a motion, rewrite XTARGET afterwards in order
to trigger a second acceleration phase, if
desired.

-2^31…

+(2^31)-1

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 42

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6.3.2 Ramp Generator Driver Feature Control Register Set

RAMP GENERATOR DRIVER FEATURE CONTROL REGISTER SET (0X30…0X36)

R/W

Addr

n

Register

Description / bit names

W

0x33

23

VDCMIN

Automatic commutation DcStep becomes enabled above
velocity VDCMIN (unsigned) (only when using internal ramp
generator, not for STEP/DIR interface – in STEP/DIR mode,
DcStep becomes enabled by the external signal DCEN)

In this mode, the actual position is determined by the sensor­less motor commutation and becomes fed back to XACTUAL. In
case the motor becomes heavily loaded, VDCMIN also is used
as the minimum step velocity. Activate stop on stall (sg_stop)
to detect step loss.

0: Disable, DcStep off
|VACT| ≥ VDCMIN ≥ 256:

- Triggers the same actions as exceeding THIGH setting.

- Switches on automatic commutation DcStep

Hint: Also set DCCTRL parameters in order to operate DcStep.

(Only bits 22… 8 are used for value and for comparison)

RW

0x34

12

SW_MODE

Switch mode configuration

See separate table!

R+

WC

0x35

14

RAMP_STAT

Ramp status and switch event status

See separate table!

R

0x36

32

XLATCH

Ramp generator latch position, latches XACTUAL upon a
programmable switch event (see SW_MODE).

Hint: The encoder position can be latched to ENC_LATCH
together with XLATCH to allow consistency checks.

Time reference t for velocities: t = 2^24 / f

CLK

Time reference ta² for accelerations: ta² = 2^41 / (f

CLK

)²

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 43

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6.3.2.1 SW_MODE – Reference Switch & StallGuard2 Event Configuration Register

0X34: SW_MODE – REFERENCE SWITCH AND STALLGUARD2 EVENT CONFIGURATION REGISTER

Bit

Name

Comment

11

en_softstop

0: Hard stop
1: Soft stop

The soft stop mode always uses the deceleration ramp settings DMAX, V1,
D1, VSTOP and TZEROWAIT for stopping the motor. A stop occurs when
the velocity sign matches the reference switch position (REFL for negative
velocities, REFR for positive velocities) and the respective switch stop
function is enabled.

A hard stop also uses TZEROWAIT before the motor becomes released.

Attention: Do not use soft stop in combination with StallGuard2. Use soft
stop for StealthChop operation at high velocity. In this case, hard stop
must be avoided, as it could result in severe overcurrent.

10

sg_stop

1: Enable stop by StallGuard2 (also available in DcStep mode). Disable to
release motor after stop event. Program TCOOLTHRS for velocity threshold.

Hint: Do not enable during motor spin-up, wait until the motor velocity
exceeds a certain value, where StallGuard2 delivers a stable result. This
velocity threshold should be programmed using TCOOLTHRS.

9

en_latch_encoder

1: Latch encoder position to ENC_LATCH upon reference switch event.

8

latch_r_inactive

1: Activates latching of the position to XLATCH upon an inactive going
edge on the right reference switch input REFR. The active level is defined
by pol_stop_r.

7

latch_r_active

1: Activates latching of the position to XLATCH upon an active going edge
on the right reference switch input REFR.

Hint: Activate latch_r_active to detect any spurious stop event by reading
status_latch_r.

6

latch_l_inactive

1: Activates latching of the position to XLATCH upon an inactive going
edge on the left reference switch input REFL. The active level is defined
by pol_stop_l.

5

latch_l_active

1: Activates latching of the position to XLATCH upon an active going edge
on the left reference switch input REFL.

Hint: Activate latch_l_active to detect any spurious stop event by reading
status_latch_l.

4

swap_lr

1: Swap the left and the right reference switch input REFL and REFR

3

pol_stop_r

Sets the active polarity of the right reference switch input
0=non-inverted, high active: a high level on REFR stops the motor
1=inverted, low active: a low level on REFR stops the motor

2

pol_stop_l

Sets the active polarity of the left reference switch input
0=non-inverted, high active: a high level on REFL stops the motor
1=inverted, low active: a low level on REFL stops the motor

1

stop_r_enable

1: Enables automatic motor stop during active right reference switch input

Hint: The motor restarts in case the stop switch becomes released.

0

stop_l_enable

1: Enables automatic motor stop during active left reference switch input

Hint: The motor restarts in case the stop switch becomes released.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 44

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6.3.2.2 RAMP_STAT – Ramp & Reference Switch Status Register

0X35: RAMP_STAT – RAMP AND REFERENCE SWITCH STATUS REGISTER

R/W

Bit

Name

Comment

R

13

status_sg

1: Signals an active StallGuard2 input from the CoolStep driver or
from the DcStep unit, if enabled.

Hint: When polling this flag, stall events may be missed – activate
sg_stop to be sure not to miss the stall event.

R+

WC

12

second_move

1: Signals that the automatic ramp required moving back in the
opposite direction, e.g. due to on-the-fly parameter change
(Write ‘1’ to clear)

R

11

t_zerowait_
active

1: Signals, that TZEROWAIT is active after a motor stop. During this
time, the motor is in standstill.

R

10

vzero

1: Signals, that the actual velocity is 0.

R 9 position_

reached

1: Signals, that the target position is reached.
This flag becomes set while XACTUAL and XTARGET match.

R 8 velocity_

reached

1: Signals, that the target velocity is reached.
This flag becomes set while VACTUAL and VMAX match.

R+

WC

7

event_pos_
reached

1: Signals, that the target position has been reached
(position_reached becoming active).
(Write ‘1’ to clear flag and interrupt condition)
This bit is ORed to the interrupt output signal.

R+

WC

6

event_stop_
sg

1: Signals an active StallGuard2 stop event.
Resetting the register will clear the stall condition and the motor
may re-start motion, unless the motion controller has been stopped.
(Write ‘1’ to clear flag and interrupt condition)
This bit is ORed to the interrupt output signal.

R

5

event_stop_r

1: Signals an active stop right condition due to stop switch.
The stop condition and the interrupt condition can be removed by
setting RAMP_MODE to hold mode or by commanding a move to the
opposite direction. In soft_stop mode, the condition will remain
active until the motor has stopped motion into the direction of the
stop switch. Disabling the stop switch or the stop function also
clears the flag, but the motor will continue motion.
This bit is ORed to the interrupt output signal.

4

event_stop_l

1: Signals an active stop left condition due to stop switch.
The stop condition and the interrupt condition can be removed by
setting RAMP_MODE to hold mode or by commanding a move to the
opposite direction. In soft_stop mode, the condition will remain
active until the motor has stopped motion into the direction of the
stop switch. Disabling the stop switch or the stop function also
clears the flag, but the motor will continue motion.
This bit is ORed to the interrupt output signal.

R+

WC

3

status_latch_r

1: Latch right ready
(enable position latching using SW_MODE settings
latch_r_active or latch_r_inactive)
(Write ‘1’ to clear)

2

status_latch_l

1: Latch left ready
(enable position latching using SW_MODE settings
latch_l_active or latch_l_inactive)
(Write ‘1’ to clear)

R

1

status_stop_r

Reference switch right status (1=active)

0

status_stop_l

Reference switch left status (1=active)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 45

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6.4 Encoder Registers

Attention:
The encoder interface is not available in Step&Direction mode, as the encoder pins serve a different
function in that mode.

ENCODER REGISTER SET (0X38…0X3C)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

RW

0x38

11

ENCMODE

Encoder configuration and use of N channel

See separate table!

RW

0x39

32

X_ENC

Actual encoder position (signed)

-2^31…

+(2^31)-1

W

0x3A

32

ENC_CONST

Accumulation constant (signed)
16 bit integer part, 16 bit fractional part

X_ENC accumulates
+/- ENC_CONST / (2^16*X_ENC) (binary)
or
+/-ENC_CONST / (10^4*X_ENC) (decimal)

ENCMODE bit enc_sel_decimal switches
between decimal and binary setting.
Use the sign, to match rotation direction!

binary:
± [µsteps/2^16]
±(0 …

32767.999847)

decimal:
±(0.0 …

32767.9999)

reset default =

1.0 (=65536)

R+

WC

0x3B

2

ENC_STATUS

Encoder status information

bit 0: n_event
bit 1: deviation_warn

1: Event detected.
To clear the status bit, write with a 1 bit at
the corresponding position.

Deviation_warn cannot be cleared while a
warning still persists. Set ENC_DEVIATION
zero to disable.
Both bits are ORed to the interrupt output
signal.

R

0x3C

32

ENC_LATCH

Encoder position X_ENC latched on N event

W

0x3D

20

ENC_
DEVIATION

Maximum number of steps deviation
between encoder counter and XACTUAL for
deviation warning
Result in flag ENC_STATUS.deviation_warn
0=Function is off.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 46

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6.4.1 ENCMODE – Encoder Register

0X38: ENCMODE – ENCODER REGISTER

Bit

Name

Comment

10

enc_sel_decimal

0

Encoder prescaler divisor binary mode:
Counts ENC_CONST(fractional part) /65536

1

Encoder prescaler divisor decimal mode:
Counts in ENC_CONST(fractional part) /10000

9

latch_x_act

1: Also latch XACTUAL position together with X_ENC.
Allows latching the ramp generator position upon an N channel event as
selected by pos_edge and neg_edge.

8

clr_enc_x
0

Upon N event, X_ENC becomes latched to ENC_LATCH only

1

Latch and additionally clear encoder counter X_ENC at N-event

7

neg_edge

n p

N channel event sensitivity

6

pos_edge

0 0

N channel event is active during an active N event level

0 1

N channel is valid upon active going N event

1 0

N channel is valid upon inactive going N event

1 1

N channel is valid upon active going and inactive going N event

5

clr_once

1: Latch or latch and clear X_ENC on the next N event following the write
access

4

clr_cont

1: Always latch or latch and clear X_ENC upon an N event (once per
revolution, it is recommended to combine this setting with edge sensitive
N event)

3

ignore_AB
0

An N event occurs only when polarities given by
pol_N, pol_A and pol_B match.

1

Ignore A and B polarity for N channel event

2

pol_N

Defines active polarity of N (0=low active, 1=high active)

1

pol_B

Required B polarity for an N channel event (0=neg., 1=pos.)

0

pol_A

Required A polarity for an N channel event (0=neg., 1=pos.)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 47

www.trinamic.com

6.5 Motor Driver Registers

MICROSTEPPING CONTROL REGISTER SET (0X60…0X6B)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

W

0x60

32

MSLUT[0]

microstep
table entries
0…31

Each bit gives the difference between entry x
and entry x+1 when combined with the cor­responding MSLUTSEL W bits:
0: W= %00: -1
%01: +0
%10: +1
%11: +2
1: W= %00: +0
%01: +1
%10: +2
%11: +3
This is the differential coding for the first
quarter of a wave. Start values for CUR_A and

CUR_B are stored for MSCNT position 0 in
START_SIN and START_SIN90.

ofs31, ofs30, …, ofs01, ofs00

…

ofs255, ofs254, …, ofs225, ofs224

32x 0 or 1

reset default=
sine wave
table

W

0x61

…

0x67

7

x

32

MSLUT[1...7]

microstep
table entries
32…255

7x
32x 0 or 1

reset default=
sine wave
table

W

0x68

32

MSLUTSEL

This register defines four segments within
each quarter MSLUT wave. Four 2 bit entries
determine the meaning of a 0 and a 1 bit in
the corresponding segment of MSLUT.

See separate table!

0<X1<X2<X3
reset default=
sine wave
table

W

0x69

8

+ 8 MSLUTSTART

bit 7… 0: START_SIN
bit 23… 16: START_SIN90

START_SIN gives the absolute current at
microstep table entry 0.
START_SIN90 gives the absolute current for
microstep table entry at positions 256.
Start values are transferred to the microstep
registers CUR_A and CUR_B, whenever the
reference position MSCNT=0 is passed.

START_SIN
reset default
=0

START_SIN90
reset default
=247

R

0x6A

10

MSCNT

Microstep counter. Indicates actual position
in the microstep table for CUR_A. CUR_B uses
an offset of 256 (2 phase motor).
Hint: Move to a position where MSCNT is
zero before re-initializing MSLUTSTART or
MSLUT and MSLUTSEL.

0…1023

R

0x6B

9

+ 9 MSCURACT

bit 8… 0: CUR_A (signed):
Actual microstep current for

motor phase A as read from

MSLUT (not scaled by current)
bit 24… 16: CUR_B (signed):
Actual microstep current for

motor phase B as read from

MSLUT (not scaled by current)

+/-0...255

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 48

www.trinamic.com

DRIVER REGISTER SET (0X6C…0X7F)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

RW

0x6C

32

CHOPCONF

chopper and driver configuration

See separate table!

reset default=
0x10410150

W

0x6D

25

COOLCONF

CoolStep smart current control register
and StallGuard2 configuration

See separate table!

W

0x6E

24

DCCTRL

DcStep (DC) automatic commutation
configuration register (enable via pin DCEN
or via VDCMIN):
bit 9… 0: DC_TIME: Upper PWM on time

limit for commutation (DC_TIME *

1/f

CLK

). Set slightly above effective

blank time TBL.
bit 23… 16: DC_SG: Max. PWM on time for

step loss detection using DcStep

StallGuard2 in DcStep mode.

(DC_SG * 16/f

CLK

)

Set slightly higher than

DC_TIME/16
0=disable
Hint: Using a higher microstep resolution or
interpolated operation, DcStep delivers a
better StallGuard signal.
DC_SG is also available above VHIGH if
vhighfs is activated. For best result also set
vhighchm.

R

0x6F

32

DRV_
STATUS

StallGuard2 value and driver error flags

See separate table!

W

0x70

22

PWMCONF

Voltage PWM mode chopper configuration

See separate table!

reset default=
0xC40C001E

R

0x71

9+8

PWM_SCALE

Results of StealthChop amplitude regulator.
These values can be used to monitor
automatic PWM amplitude scaling (255=max.
voltage).

bit 7… 0

PWM_SCALE_SUM:
Actual PWM duty cycle. This
value is used for scaling the
values CUR_A and CUR_B read
from the sine wave table.

0…255

bit 24… 16

PWM_SCALE_AUTO:
9 Bit signed offset added to the
calculated PWM duty cycle. This
is the result of the automatic
amplitude regulation based on
current measurement.

signed

-255…+255

R

0x72

8+8

PWM_AUTO

These automatically generated values can be
read out in order to determine a default /
power up setting for PWM_GRAD and
PWM_OFS.

bit 7… 0

PWM_OFS_AUTO:
Automatically determined offset
value

0…255

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 49

www.trinamic.com

DRIVER REGISTER SET (0X6C…0X7F)

R/W

Addr

n

Register

Description / bit names

Range [Unit]

bit 23… 16

PWM_GRAD_AUTO:
Automatically determined
gradient value

0…255

R

0x73

20

LOST_STEPS

Number of input steps skipped due to higher
load in DcStep operation, if step input does
not stop when DC_OUT is low. This counter
wraps around after 2^20 steps. Counts up or
down depending on direction. Only with
SDMODE=1.

MICROSTEP TABLE CALCULATION FOR A SINE WAVE EQUIVALENT TO THE POWER ON DEFAULT

 󰇧     











󰇨  

- i:[0… 255] is the table index

- The amplitude of the wave is 248. The resulting maximum positive value is 247 and the

maximum negative value is -248.

- The round function rounds values from 0.5 to 1.4999 to 1

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 50

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6.5.1 MSLUTSEL – Look up Table Segmentation Definition

0X68: MSLUTSEL – LOOK UP TABLE SEGMENTATION DEFINITION

Bit

Name

Function

Comment

31

X3

LUT segment 3 start

The sine wave look up table can be divided into up to
four segments using an individual step width control
entry Wx. The segment borders are selected by X1, X2
and X3.

Segment 0 goes from 0 to X1-1.
Segment 1 goes from X1 to X2-1.
Segment 2 goes from X2 to X3-1.
Segment 3 goes from X3 to 255.

For defined response the values shall satisfy:
0<X1<X2<X3

30

29

28

27

26

25

24

23

X2

LUT segment 2 start

22

21

20

19

18

17

16

15

X1

LUT segment 1 start

14

13

12

11

10 9 8

7

W3

LUT width select from
ofs(X3) to ofs255

Width control bit coding W0…W3:
%00: MSLUT entry 0, 1 select: -1, +0
%01: MSLUT entry 0, 1 select: +0, +1
%10: MSLUT entry 0, 1 select: +1, +2
%11: MSLUT entry 0, 1 select: +2, +3

6

5

W2

LUT width select from
ofs(X2) to ofs(X3-1)

4

3

W1

LUT width select from
ofs(X1) to ofs(X2-1)

2

1

W0

LUT width select from
ofs00 to ofs(X1-1)

0

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 51

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6.5.2 CHOPCONF – Chopper Configuration

0X6C: CHOPCONF – CHOPPER CONFIGURATION

Bit

Name

Function

Comment

31

diss2vs

short to supply
protection disable

0: Short to VS protection is on
1: Short to VS protection is disabled

30

diss2g

short to GND
protection disable

0: Short to GND protection is on
1: Short to GND protection is disabled

29

dedge

enable double edge
step pulses

1: Enable step impulse at each step edge to reduce step
frequency requirement.

28

intpol

interpolation to 256
microsteps

1: The actual microstep resolution (MRES) becomes
extrapolated to 256 microsteps for smoothest motor
operation (useful for STEP/DIR operation, only)

27

mres3

MRES

micro step resolution

%0000:
Native 256 microstep setting. Normally use this setting
with the internal motion controller.

26

mres2

25

mres1

24

mres0

%0001 … %1000:
128, 64, 32, 16, 8, 4, 2, FULLSTEP

Reduced microstep resolution esp. for STEP/DIR operation.
The resolution gives the number of microstep entries per
sine quarter wave.
The driver automatically uses microstep positions which
result in a symmetrical wave, when choosing a lower
microstep resolution.

step width=2^MRES [microsteps]

23

tpfd3

TPFD

passive fast decay time

TPFD allows dampening of motor mid-range resonances.
Passive fast decay time setting controls duration of the
fast decay phase inserted after bridge polarity change
N

CLK

= 128*TPFD
%0000: Disable
%0001 … %1111: 1 … 15

22

tpfd2

21

tpdf1

20

tpfd0

19

vhighchm

high velocity chopper
mode

This bit enables switching to chm=1 and fd=0, when VHIGH
is exceeded. This way, a higher velocity can be achieved.
Can be combined with vhighfs=1. If set, the TOFF setting
automatically becomes doubled during high velocity
operation in order to avoid doubling of the chopper
frequency.

18

vhighfs

high velocity fullstep
selection

This bit enables switching to fullstep, when VHIGH is
exceeded. Switching takes place only at 45° position.
The fullstep target current uses the current value from
the microstep table at the 45° position.

17 - reserved

reserved, set to 0

16

tbl1

TBL

blank time select

%00 … %11:
Set comparator blank time to 16, 24, 36 or 54 clocks

Hint: %01 or %10 is recommended for most applications
(Reset Default: OTP %01 or %10)

15

tbl0

14

chm

chopper mode

0

Standard mode (SpreadCycle)

1

Constant off time with fast decay time.
Fast decay time is also terminated when the
negative nominal current is reached. Fast decay is
after on time.

13 - reserved

Reserved, set to 0

12

disfdcc

fast decay mode

chm=1:
disfdcc=1 disables current comparator usage for termi-

nation of the fast decay cycle

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 52

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0X6C: CHOPCONF – CHOPPER CONFIGURATION

Bit

Name

Function

Comment

11

fd3

TFD [3]

chm=1:

MSB of fast decay time setting TFD

10

hend3

HEND

hysteresis low value

OFFSET

sine wave offset

chm=0

%0000 … %1111:
Hysteresis is -3, -2, -1, 0, 1, …, 12
(1/512 of this setting adds to current setting)
This is the hysteresis value which becomes
used for the hysteresis chopper.

9

hend2

8

hend1

7

hend0

chm=1

%0000 … %1111:
Offset is -3, -2, -1, 0, 1, …, 12
This is the sine wave offset and 1/512 of the
value becomes added to the absolute value
of each sine wave entry.

6

hstrt2

HSTRT

hysteresis start value
added to HEND

chm=0

%000 … %111:
Add 1, 2, …, 8 to hysteresis low value HEND

(1/512 of this setting adds to current setting)

Attention: Effective HEND+HSTRT ≤ 16.

Hint: Hysteresis decrement is done each 16

clocks

5

hstrt1

4

hstrt0

TFD [2..0]

fast decay time setting

chm=1

Fast decay time setting (MSB: fd3):
%0000 … %1111:
Fast decay time setting TFD with
N

CLK

= 32*TFD (%0000: slow decay only)

3

toff3

TOFF off time

and driver enable

Off time setting controls duration of slow decay phase
N

CLK

= 24 + 32*TOFF
%0000: Driver disable, all bridges off
%0001: 1 – use only with TBL ≥ 2
%0010 … %1111: 2 … 15

2

toff2

1

toff1

0

toff0

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 53

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6.5.3 COOLCONF – Smart Energy Control CoolStep and StallGuard2

0X6D: COOLCONF – SMART ENERGY CONTROL COOLSTEP AND STALLGUARD2

Bit

Name

Function

Comment

… - reserved

set to 0

24

sfilt StallGuard2 filter

enable

0

Standard mode, high time resolution for
StallGuard2

1

Filtered mode, StallGuard2 signal updated for each
four fullsteps (resp. six fullsteps for 3 phase motor)
only to compensate for motor pole tolerances

23 - reserved

set to 0

22

sgt6

StallGuard2 threshold
value

This signed value controls StallGuard2 level for stall
output and sets the optimum measurement range for
readout. A lower value gives a higher sensitivity. Zero is
the starting value working with most motors.

-64 to +63: A higher value makes StallGuard2 less

sensitive and requires more torque to
indicate a stall.

21

sgt5

20

sgt4

19

sgt3

18

sgt2

17

sgt1

16

sgt0

15

seimin

minimum current for
smart current control

0: 1/2 of current setting (IRUN)
1: 1/4 of current setting (IRUN)

14

sedn1

current down step
speed

%00: For each 32 StallGuard2 values decrease by one
%01: For each 8 StallGuard2 values decrease by one
%10: For each 2 StallGuard2 values decrease by one
%11: For each StallGuard2 value decrease by one

13

sedn0

12 - reserved

set to 0

11

semax3

StallGuard2 hysteresis
value for smart current
control

If the StallGuard2 result is equal to or above
(SEMIN+SEMAX+1)*32, the motor current becomes
decreased to save energy.
%0000 … %1111: 0 … 15

10

semax2

9

semax1

8

semax0

7 - reserved

set to 0

6

seup1

current up step width

Current increment steps per measured StallGuard2 value
%00 … %11: 1, 2, 4, 8

5

seup0

4 - reserved

set to 0

3

semin3

minimum StallGuard2
value for smart current
control and
smart current enable

If the StallGuard2 result falls below SEMIN*32, the motor
current becomes increased to reduce motor load angle.
%0000: smart current control CoolStep off
%0001 … %1111: 1 … 15

2

semin2

1

semin1

0

semin0

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 54

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6.5.4 PWMCONF – Voltage PWM Mode StealthChop

0X70: PWMCONF – VOLTAGE MODE PWM STEALTHCHOP

Bit

Name

Function

Comment

31

PWM_LIM

PWM automatic scale
amplitude limit when
switching on

Limit for PWM_SCALE_AUTO when switching back from
SpreadCycle to StealthChop. This value defines the upper
limit for bits 7 to 4 of the automatic current control
when switching back. It can be set to reduce the current
jerk during mode change back to StealthChop.
It does not limit PWM_GRAD or PWM_GRAD_AUTO offset.
(Default = 12)

30

29

28

27

PWM_REG

Regulation loop
gradient

User defined maximum PWM amplitude change per half
wave when using pwm_autoscale=1. (1…15):
1: 0.5 increments (slowest regulation)
2: 1 increment
3: 1.5 increments
4: 2 increments (Reset default))
…
8: 4 increments
...
15: 7.5 increments (fastest regulation)

26

25

24

23 - reserved

set to 0

22 - reserved

set to 0

21

freewheel1

Allows different
standstill modes

Stand still option when motor current setting is zero
(I_HOLD=0).
%00: Normal operation
%01: Freewheeling
%10: Coil shorted using LS drivers
%11: Coil shorted using HS drivers

20

freewheel0

19

pwm_
autograd

PWM automatic
gradient adaptation

0

Fixed value for PWM_GRAD
(PWM_GRAD_AUTO = PWM_GRAD)

1

Automatic tuning (only with pwm_autoscale=1)
(Reset default)
PWM_GRAD_AUTO is initialized with PWM_GRAD
while pwm_autograd=0 and becomes optimized
automatically during motion.
Preconditions

1. PWM_OFS_AUTO has been automatically

initialized. This requires standstill at IRUN for
>130ms in order to a) detect standstill b) wait >
128 chopper cycles at IRUN and c) regulate
PWM_OFS_AUTO so that

-1 < PWM_SCALE_AUTO < 1

2. Motor running and 1.5 * PWM_OFS_AUTO <

PWM_SCALE_SUM < 4* PWM_OFS_AUTO and
PWM_SCALE_SUM < 255.

Time required for tuning PWM_GRAD_AUTO
About 8 fullsteps per change of +/-1.
Also enables use of reduced chopper frequency for
tuning PWM_OFS_AUTO.

18

pwm_
autoscale

PWM automatic
amplitude scaling

0

User defined feed forward PWM amplitude. The
current settings IRUN and IHOLD have no influence!
The resulting PWM amplitude (limited to 0…255) is:

PWM_OFS * ((CS_ACTUAL+1) / 32)

+ PWM_GRAD * 256 / TSTEP

1

Enable automatic current control (Reset default)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 55

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0X70: PWMCONF – VOLTAGE MODE PWM STEALTHCHOP

Bit

Name

Function

Comment

17

pwm_freq1

PWM frequency
selection

%00: f

PWM

=2/1024 f

CLK

(Reset default)

%01: f

PWM

=2/683 f

CLK

%10: f

PWM

=2/512 f

CLK

%11: f

PWM

=2/410 f

CLK

16

pwm_freq0

15

PWM_
GRAD

User defined amplitude
gradient

Velocity dependent gradient for PWM amplitude:
PWM_GRAD * 256 / TSTEP
This value is added to PWM_AMPL to compensate for
the velocity-dependent motor back-EMF.

Use PWM_GRAD as initial value for automatic scaling to
speed up the automatic tuning process. To do this, set
PWM_GRAD to the determined, application specific value,
with pwm_autoscale=0. Only afterwards, set

pwm_autoscale=1. Enable StealthChop when finished.

Hint:

After initial tuning, the required initial value can be read
out from PWM_GRAD_AUTO.

14

13

12

11

10

9 8 7

PWM_
OFS

User defined amplitude
(offset)

User defined PWM amplitude offset (0-255) related to full
motor current (CS_ACTUAL=31) in stand still.
(Reset default=30)

Use PWM_OFS as initial value for automatic scaling to
speed up the automatic tuning process. To do this, set
PWM_OFS to the determined, application specific value,
with pwm_autoscale=0. Only afterwards, set

pwm_autoscale=1. Enable StealthChop when finished.

PWM_OFS = 0 will disable scaling down motor current

below a motor specific lower measurement threshold.
This setting should only be used under certain
conditions, i.e. when the power supply voltage can vary
up and down by a factor of two or more. It prevents
the motor going out of regulation, but it also prevents
power down below the regulation limit.

PWM_OFS > 0 allows automatic scaling to low PWM duty
cycles even below the lower regulation threshold. This
allows low (standstill) current settings based on the
actual (hold) current scale (register IHOLD_IRUN).

6

5 4 3

2

1

0

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6.5.5 DRV_STATUS – StallGuard2 Value and Driver Error Flags

0X6F: DRV_STATUS – STALLGUARD2 VALUE AND DRIVER ERROR FLAGS

Bit

Name

Function

Comment

31

stst

standstill indicator

This flag indicates motor stand still in each operation mode.
This occurs 2^20 clocks after the last step pulse.

30

olb

open load indicator
phase B

1: Open load detected on phase A or B.
Hint: This is just an informative flag. The driver takes no action
upon it. False detection may occur in fast motion and
standstill. Check during slow motion, only.

29

ola

open load indicator
phase A

28

s2gb

short to ground
indicator phase B

1: Short to GND detected on phase A or B. The driver becomes
disabled. The flags stay active, until the driver is disabled by
software (TOFF=0) or by the ENN input.

27

s2ga

short to ground
indicator phase A

26

otpw

overtemperature pre­warning flag

1: Overtemperature pre-warning threshold is exceeded.
The overtemperature pre-warning flag is common for both
bridges.

25

ot

overtemperature flag

1: Overtemperature limit has been reached. Drivers become
disabled until otpw is also cleared due to cooling down of the
IC.
The overtemperature flag is common for both bridges.

24

StallGuard

StallGuard2 status

1: Motor stall detected (SG_RESULT=0) or DcStep stall in DcStep
mode.

23

-

reserved

Ignore these bits

22

21

20

CS
ACTUAL

actual motor current /
smart energy current

Actual current control scaling, for monitoring smart energy
current scaling controlled via settings in register COOLCONF, or
for monitoring the function of the automatic current scaling.

19

18

17

16

15

fsactive

full step active
indicator

1: Indicates that the driver has switched to fullstep as defined
by chopper mode settings and velocity thresholds.

14

stealth

StealthChop indicator

1: Driver operates in StealthChop mode

13

s2vsb

short to supply
indicator phase B

1: Short to supply detected on phase A or B. The driver
becomes disabled. The flags stay active, until the driver is
disabled by software (TOFF=0) or by the ENN input. Sense
resistor voltage drop is included in the measurement!

12

s2vsa

short to supply
indicator phase A

11 - reserved

Ignore this bit

10 - reserved

Ignore this bit

9

SG_
RESULT

StallGuard2 result
respectively PWM on
time for coil A in stand
still for motor
temperature detection

Mechanical load measurement:
The StallGuard2 result gives a means to measure mechanical
motor load. A higher value means lower mechanical load. A
value of 0 signals highest load. With optimum SGT setting,
this is an indicator for a motor stall. The stall detection
compares SG_RESULT to 0 in order to detect a stall. SG_RESULT
is used as a base for CoolStep operation, by comparing it to a
programmable upper and a lower limit. It is not applicable in
StealthChop mode.

StallGuard2 works best with microstep operation or DcStep.
Temperature measurement:

In standstill, no StallGuard2 result can be obtained. SG_RESULT
shows the chopper on-time for motor coil A instead. Move the
motor to a determined microstep position at a certain current
setting to get a rough estimation of motor temperature by a
reading the chopper on-time. As the motor heats up, its coil
resistance rises and the chopper on-time increases.

8

7 6 5

4

3 2 1

0

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7 StealthChop™

StealthChop is an extremely quiet mode of operation for stepper motors. It is based on a
voltage mode PWM. In case of standstill and at low velocities, the motor is absolutely
noiseless. Thus, StealthChop operated stepper motor applications are very suitable for

indoor or home use. The motor operates absolutely free of vibration at low velocities.
With StealthChop, the motor current is applied by driving a certain effective voltage into the coil,
using a voltage mode PWM. With the enhanced StealthChop2, the driver automatically adapts to the
application for best performance. No more configurations are required. Optional configuration allows
for tuning the setting in special cases, or for storing initial values for the automatic adaptation
algorithm. For high velocity drives SpreadCycle should be considered in combination with
StealthChop.

Figure 7.1 Motor coil sine wave current with StealthChop (measured with current probe)

7.1 Automatic Tuning

StealthChop2 integrates an automatic tuning procedure (AT), which adapts the most important
operating parameters to the motor automatically. This way, StealthChop2 allows high motor dynamics
and supports powering down the motor to very low currents. Just two steps have to be respected by
the motion controller for best results: Start with the motor in standstill, but powered with nominal
run current (AT#1). Move the motor at a medium velocity, e.g. as part of a homing procedure (AT#2).
Figure 7.2 shows the tuning procedure.
Border conditions for AT#1 and AT#2 are shown in the following table:

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AUTOMATIC TUNING TIMING AND BORDER CONDITIONS

Step

Parameter

Conditions

Required Duration

AT#1

PWM_
OFS_AUTO

- Motor in standstill and actual current scale (CS) is

identical to run current (IRUN).

- If standstill reduction is enabled, an initial step

pulse switches the drive back to run current, or set
IHOLD to IRUN.

- Pin VS at operating level.

Attention: Driver may reduce chopper frequency during
AT#1. Use reduced standstill current IHOLD<IRUN to
prevent extended periods of time at lower chopper
frequency

≤ 2^20+2*2^18 t

CLK

,
≤ 130ms
(with internal clock)

AT#2

PWM_
GRAD_AUTO

- Move motor at a velocity, where a significant

amount of back EMF is generated and where the full
run current can be reached. Conditions:

- 1.5 * PWM_OFS_AUTO < PWM_SCALE_SUM <

4 * PWM_OFS_AUTO

- PWM_SCALE_SUM < 255.
Hint: A typical range is 60-300 RPM.

8 fullsteps are required
for a change of +/-1.
For a typical motor with
PWM_GRAD_AUTO
optimum at 50 or less, up
to 400 fullsteps are
required when starting
from default value 0.

Hint:

Determine best conditions for automatic tuning with the evaluation board.
Use application specific parameters for PWM_GRAD and PWM_OFS for initialization in firmware to provide
initial tuning parameters.
Monitor PWM_SCALE_AUTO going down to zero during the constant velocity phase in AT#2 tuning. This
indicates a successful tuning.

Attention:
Operating in StealthChop without proper tuning can lead to high motor currents during a deceleration
ramp, especially with low resistive motors and fast deceleration settings. Follow the automatic tuning
process and check optimum tuning conditions using the evaluation board. It is recommended to use
an initial value for settings PWM_OFS and PWM_GRAD determined per motor type.
Protect the power stage and supply by additionally tuning the overcurrent protection.

Known Limitations TMC5160 non-A-version only:
Successful completion of AT#1 tuning phase is not safely detected by the TMC5160. It will require
multiple motor start / stop events to safely detect completion.
Successful determination is mandatory for AT#2: Tuning of PWM_GRAD will not start when AT#1 has
not completed.
Successful completion of AT#1 and AT#2 only can be checked by monitoring PWM_SCALE_AUTO
approaching 0 during AT#2 motion.

Solution a):
Complete automatic tuning phase AT#1 process, by using a slow-motion sequence which leads to
standstill detection in between of each two steps. Use a velocity of 8 (6 Hz) or lower and execute
minimum 10 steps during AT#1 phase.

Solution b):

Store initial parameters for PWM_GRAD_AUTO for the application. Therefore, use the motor and
operating conditions determined for the application and do a complete automatic tuning sequence
(refer to a)). Store the resulting PWM_GRAD_AUTO value and use it for initialization of PWM_GRAD.
With this, tuning of AT#2 phase is not mandatory in the application and can be skipped. Automatic
tuning will further optimize settings during operation. Combine with a) if desired.

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AT#1

Stand still

AT#2

Homing

Ready

Power Up

stealthChop2 regulates to nominal

current and stores result to

PWM_OFS_AUTO

(Requires stand still for >130ms)

N

PWM_GRAD_AUTO becomes

initialized upon power up

Driver Enabled? N

Standstill re-

duction enabled?

Y

Issue (at least) a single step

pulse and stop again, to

power motor to run current

Y

Driver Enabled? N

Y

Move the motor, e.g. for homing.

Include a constant, medium velocity

ramp segment.

Store PWM_GRAD_AUTO to

CPU memory for faster

tuning procedure

Option with interface

PWM_

GRAD_AUTO

initialized from

CPU?

N

Y

stealthChop2 regulates to nominal

current and optimizes PWM_GRAD_AUTO

(requires 8 fullsteps per change of 1,

typically a few 100 fullsteps in sum)

stealthChop2 settings are optimized!

stealthChop2 keeps tuning during

subsequent motion and stand still periods

adapting to motor heating, supply

variations, etc.

Figure 7.2 StealthChop2 automatic tuning procedure

Attention
Modifying GLOBALSCALER or VS voltage invalidates the result of the automatic tuning process. Motor
current regulation cannot compensate significant changes until next AT#1 phase. Automatic tuning
adapts to changed conditions whenever AT#1 and AT#2 conditions are fulfilled in the later operation.

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7.2 StealthChop Options

In order to match the motor current to a certain level, the effective PWM voltage becomes scaled
depending on the actual motor velocity. Several additional factors influence the required voltage level
to drive the motor at the target current: The motor resistance, its back EMF (i.e. directly proportional
to its velocity) as well as the actual level of the supply voltage. Two modes of PWM regulation are
provided: The automatic tuning mode (AT) using current feedback (pwm_autoscale = 1, pwm_autograd
= 1) and a feed forward velocity-controlled mode (pwm_autoscale = 0). The feed forward velocity­controlled mode will not react to a change of the supply voltage or to events like a motor stall, but it
provides very stable amplitude. It does not use nor require any means of current measurement. This
is perfect when motor type and supply voltage are well known. Therefore, we recommend the
automatic mode, unless current regulation is not satisfying in the given operating conditions.

It is recommended to use application specific initial tuning parameters, fitting the motor type and
supply voltage. Additionally, operate in automatic tuning mode in order to respond to parameter
change, e.g. due to motor heat-up or change of supply voltage.

Non-automatic mode (pwm_autoscale=0) should be taken into account only with well-known motor
and operating conditions. In this case, careful programming via the interface is required. The
operating parameters PWM_GRAD and PWM_OFS can be determined in automatic tuning mode
initially.

The StealthChop PWM frequency can be chosen in four steps in order to adapt the frequency divider
to the frequency of the clock source. A setting in the range of 20-50kHz is good for most applications.
It balances low current ripple and good higher velocity performance vs. dynamic power dissipation.

CHOICE OF PWM FREQUENCY FOR STEALTHCHOP

Clock frequency
f

CLK

PWM_FREQ=%00

f

PWM

=2/1024 f

CLK

PWM_FREQ=%01
f

PWM

=2/683 f

CLK

PWM_FREQ=%10

f

PWM

=2/512 f

CLK

PWM_FREQ=%11

f

PWM

=2/410 f

CLK

18MHz

35.2kHz

52.7kHz

70.3kHz

87.8kHz

16MHz

31.3kHz

46.9kHz

62.5kHz

78.0kHz

12MHz (internal)

23.4kHz

35.1kHz

46.9kHz

58.5kHz

10MHz

19.5kHz

29.3kHz

39.1kHz

48.8kHz

8MHz

15.6kHz

23.4kHz

31.2kHz

39.0kHz

Table 7.1 Choice of PWM frequency – green / light green: recommended

7.3 StealthChop Current Regulator

In StealthChop voltage PWM mode, the autoscaling function (pwm_autoscale = 1, pwm_auto_grad = 1)
regulates the motor current to the desired current setting. Automatic scaling is used as part of the
automatic tuning process (AT), and for subsequent tracking of changes within the motor parameters.
The driver measures the motor current during the chopper on time and uses a proportional regulator
to regulate PWM_SCALE_AUTO in order match the motor current to the target current. PWM_REG is the
proportionality coefficient for this regulator. Basically, the proportionality coefficient should be as
small as possible in order to get a stable and soft regulation behavior, but it must be large enough to
allow the driver to quickly react to changes caused by variation of the motor target current (e.g.
change of VREF). During initial tuning step AT#2, PWM_REG also compensates for the change of motor
velocity. Therefore, a high acceleration during AT#2 will require a higher setting of PWM_REG. With
careful selection of homing velocity and acceleration, a minimum setting of the regulation gradient
often is sufficient (PWM_REG=1). PWM_REG setting should be optimized for the fastest required
acceleration and deceleration ramp (compare Figure 7.3 and Figure 7.4). The quality of the setting

PWM_REG in phase AT#2 and the finished automatic tuning procedure (or non-automatic settings for
PWM_OFS and PWM_GRAD) can be examined when monitoring motor current during an acceleration

phase Figure 7.5.

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Figure 7.3 Scope shot: good setting for PWM_REG

Figure 7.4 Scope shot: too small setting for PWM_REG during AT#2

Motor Velocity

Time

Stand still

PWM scale

PWM reaches max. amplitude

255

0

Motor Current

Nominal Current
(sine wave RMS)

RMS current constant

(IRUN)

0

PWM scale

Current may drop due

to high velocity

PWM

_

GRAD

(

_

AUTO

)

ok

PWM

_

GRAD

(

_

AUTO

)

ok

PWM_OFS_(AUTO) ok

(

PWM

_

REG

during AT

#

2

ok

)

IHOLD

PWM_OFS_(AUTO) ok

Figure 7.5 Successfully determined PWM_GRAD(_AUTO) and PWM_OFS(_AUTO)

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 62

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Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.

7.3.1 Lower Current Limit

The StealthChop current regulator imposes a lower limit for motor current regulation. As the coil
current can be measured in the shunt resistor during chopper on phase only, a minimum chopper
duty cycle allowing coil current regulation is given by the blank time as set by TBL and by the
chopper frequency setting. Therefore, the motor specific minimum coil current in StealthChop
autoscaling mode rises with the supply voltage and with the chopper frequency. A lower blanking
time allows a lower current limit. It is important for the correct determination of PWM_OFS_AUTO,
that in AT#1 the run current set by the sense resistor, GLOBALSCALER and IRUN is well within the
regulation range. Lower currents (e.g. for standstill power down) are automatically realized based on
PWM_OFS_AUTO and PWM_GRAD_AUTO respectively based on PWM_OFS and PWM_GRAD with non­automatic current scaling. The freewheeling option allows going to zero motor current.

Lower motor coil current limit for StealthChop2 automatic tuning:





 













With VM the motor supply voltage and R

COIL

the motor coil resistance.

I

Lower Limit

can be treated as a thumb value for the minimum nominal IRUN motor current setting. In
case the lower current limit is not sufficient to reach the desired setting, the driver will retry with a
lower chopper frequency in step AT#1, only.
f

PWM

is the chopper frequency as determined by setting PWM_FREQ. In AT#1, the driver tries a lower,
(roughly half frequency), in case it cannot reach the current. The frequency will remain active in
standstill, while currentscale CS=IRUN. With automatic standstill reduction, this is a short moment.

EXAMPLE:

A motor has a coil resistance of 5Ω, the supply voltage is 24V. With TBL=%01 and PWM_FREQ=%00,
t

BLANK

is 24 clock cycles, f

PWM

is 2/(1024 clock cycles):



































 

This means, the motor target current for automatic tuning must be 225mA or more, taking into
account all relevant settings. This lower current limit also applies for modification of the motor
current via the GLOBALSCALER.

Attention

For automatic tuning, a lower coil current limit applies. The motor current in automatic tuning phase
AT#1 must exceed this lower limit. I

LOWER LIMIT

can be calculated or measured using a current probe.
Setting the motor run-current or hold-current below the lower current limit during operation by
modifying IRUN and IHOLD is possible after successful automatic tuning.

The lower current limit also limits the capability of the driver to respond to changes of
GLOBALSCALER.

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7.4 Velocity Based Scaling

Velocity based scaling scales the StealthChop amplitude based on the time between each two steps,
i.e. based on TSTEP, measured in clock cycles. This concept basically does not require a current
measurement, because no regulation loop is necessary. A pure velocity-based scaling is available via
programming, only, when setting pwm_autoscale = 0. The basic idea is to have a linear approximation
of the voltage required to drive the target current into the motor. The stepper motor has a certain coil
resistance and thus needs a certain voltage amplitude to yield a target current based on the basic
formula I=U/R. With R being the coil resistance, U the supply voltage scaled by the PWM value, the
current I results. The initial value for PWM_OFS can be calculated:



  



 







With VM the motor supply voltage and I

COIL

the target RMS current

The effective PWM voltage U

PWM

(1/SQRT(2) x peak value) results considering the 8 bit resolution and

248 sine wave peak for the actual PWM amplitude shown as PWM_SCALE:





 


















 





With rising motor velocity, the motor generates an increasing back EMF voltage. The back EMF voltage
is proportional to the motor velocity. It reduces the PWM voltage effective at the coil resistance and
thus current decreases. The TMC5160 provides a second velocity dependent factor (PWM_GRAD) to
compensate for this. The overall effective PWM amplitude (PWM_SCALE_SUM) in this mode
automatically is calculated in dependence of the microstep frequency as:

    











With f

STEP

being the microstep frequency for 256 microstep resolution equivalent

and f

CLK

the clock frequency supplied to the driver or the actual internal frequency

As a first approximation, the back EMF subtracts from the supply voltage and thus the effective current
amplitude decreases. This way, a first approximation for PWM_GRAD setting can be calculated:

 



󰇯







󰇰   





 

 

C

BEMF

is the back EMF constant of the motor in Volts per radian/second.
MSPR is the number of microsteps per rotation, e.g. 51200 = 256µsteps multiplied by 200 fullsteps for
a 1.8° motor.

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PWM scaling

(PWM_SCALE_SUM)

Velocity

PWM_OFS

PWM reaches
max. amplitude

255

0

PWM

_

GRAD

Motor current

Nominal current

(e.g. sine wave RMS)

Current drops

(

depends on

motor load

)

Constant motor

RMS current

0

V

PWMMAX

Figure 7.6 Velocity based PWM scaling (pwm_autoscale=0)

Hint
The values for PWM_OFS and PWM_GRAD can easily be optimized by tracing the motor current with a
current probe on the oscilloscope. Alternatively, automatic tuning determines these values and they
can be read out from PWM_OFS_AUTO and PWM_GRAD_AUTO.

UNDERSTANDING THE BACK EMF CONSTANT OF A MOTOR

The back EMF constant is the voltage a motor generates when turned with a certain velocity. Often
motor datasheets do not specify this value, as it can be deducted from motor torque and coil current
rating. Within SI units, the numeric value of the back EMF constant C

BEMF

has the same numeric value
as the numeric value of the torque constant. For example, a motor with a torque constant of 1 Nm/A
would have a C

BEMF

of 1V/rad/s. Turning such a motor with 1 rps (1 rps = 1 revolution per second =

6.28 rad/s) generates a back EMF voltage of 6.28V. Thus, the back EMF constant can be calculated as:











 

󰇟

󰇠

  



󰇟󰇠

I

COILNOM

is the motor’s rated phase current for the specified holding torque

HoldingTorque is the motor specific holding torque, i.e. the torque reached at I

COILNOM

on both coils.
The torque unit is [Nm] where 1Nm = 100Ncm = 1000mNm.
The voltage is valid as RMS voltage per coil, thus the nominal current is multiplied by 2 in this
formula, since the nominal current assumes a full step position, with two coils operating.

7.5 Combining StealthChop and SpreadCycle

For applications requiring high velocity motion, SpreadCycle may bring more stable operation in the
upper velocity range. To combine no-noise operation with highest dynamic performance, the TMC5160
allows combining StealthChop and SpreadCycle based on a velocity threshold (Figure 7.7). With this,
StealthChop is only active at low velocities.

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Running low speed

optionoption

Running low speed

Running high speed

motor stand still

motor going to standby

motor in standby

motor in standby

v

t

TSTEP < TPWMTHRS*16/16

TSTEP > TPWMTHRS

0

VACTUAL
~1/TSTEP

current

TPOWERDOWN

RMS current

I_HOLD

I_RUN

dI * IHOLDDELAY

stealthChop

spreadCycle

Chopper mode

TRINAMIC, B. Dwersteg, 14.3.14

Figure 7.7 TPWMTHRS for optional switching to SpreadCycle

As a first step, both chopper principles should be parameterized and optimized individually. In a next
step, a transfer velocity has to be fixed. For example, StealthChop operation is used for precise low
speed positioning, while SpreadCycle shall be used for highly dynamic motion. TPWMTHRS determines
the transition velocity. Read out TSTEP when moving at the desired velocity and program the
resulting value to TPWMTHRS. Use a low transfer velocity to avoid a jerk at the switching point.

A jerk occurs when switching at higher velocities, because the back-EMF of the motor (which rises
with the velocity) causes a phase shift of up to 90° between motor voltage and motor current. So
when switching at higher velocities between voltage PWM and current PWM mode, this jerk will occur
with increased intensity. A high jerk may even produce a temporary overcurrent condition (depending
on the motor coil resistance). At low velocities (e.g. 1 to a few 10 RPM), it can be completely
neglected for most motors. Therefore, consider the switching jerk when choosing TPWMTHRS. Set
TPWMTHRS zero if you want to work with StealthChop only.

When enabling the StealthChop mode the first time using automatic current regulation, the motor
must be at stand still in order to allow a proper current regulation. When the drive switches to
StealthChop at a higher velocity, StealthChop logic stores the last current regulation setting until the
motor returns to a lower velocity again. This way, the regulation has a known starting point when
returning to a lower velocity, where StealthChop becomes re-enabled. Therefore, neither the velocity
threshold nor the supply voltage must be considerably changed during the phase while the chopper
is switched to a different mode, because otherwise the motor might lose steps or the instantaneous
current might be too high or too low.

A motor stall or a sudden change in the motor velocity may lead to the driver detecting a short
circuit or to a state of automatic current regulation, from which it cannot recover. Clear the error flags
and restart the motor from zero velocity to recover from this situation.

Hint

Start the motor from standstill when switching on StealthChop the first time and keep it stopped for
at least 128 chopper periods to allow StealthChop to do initial standstill current control.

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7.6 Flags in StealthChop

As StealthChop uses voltage mode driving, status flags based on current measurement respond
slower, respectively the driver reacts delayed to sudden changes of back EMF, like on a motor stall.

Attention

A motor stall, or abrupt stop of the motion during operation in StealthChop can lead to a overcurrent
condition. Depending on the previous motor velocity, and on the coil resistance of the motor, it
significantly increases motor current for a time of several 10ms. With low velocities, where the back
EMF is just a fraction of the supply voltage, there is no danger of triggering the short detection.

Hint
Tune low side driver overcurrent detection to safely trigger upon motor stall, when using
StealthChop. This will avoid high peak current draw from the power supply.

7.6.1 Open Load Flags

In StealthChop mode, status information is different from the cycle-by-cycle regulated SpreadCycle
mode. OLA and OLB show if the current regulation sees that the nominal current can be reached on
both coils.

- A flickering OLA or OLB can result from asymmetries in the sense resistors or in the motor

coils.

- An interrupted motor coil leads to a continuously active open load flag for the coil.

- One or both flags are active, if the current regulation did not succeed in scaling up to the full

target current within the last few fullsteps (because no motor is attached or a high velocity
exceeds the PWM limit).

If desired, do an on-demand open load test using the SpreadCycle chopper, as it delivers the safest
result. With StealthChop, PWM_SCALE_SUM can be checked to detect the correct coil resistance.

7.6.2 PWM_SCALE_SUM Informs about the Motor State

Information about the motor state is available with automatic scaling by reading out
PWM_SCALE_SUM. As this parameter reflects the actual voltage required to drive the target current into
the motor, it depends on several factors: motor load, coil resistance, supply voltage, and current
setting. Therefore, an evaluation of the PWM_SCALE_SUM value allows checking the motor operation
point. When reaching the limit (255), the current regulator cannot sustain the full motor current, e.g.
due to a drop in supply volage.

7.7 Freewheeling and Passive Braking

StealthChop provides different options for motor standstill. These options can be enabled by setting
the standstill current IHOLD to zero and choosing the desired option using the FREEWHEEL setting.
The desired option becomes enabled after a time period specified by TPOWERDOWN and IHOLDDELAY.
Current regulation becomes frozen once the motor target current is at zero current in order to ensure
a quick startup. With the freewheeling options, both freewheeling and passive braking can be
realized. Passive braking is an effective eddy current motor braking, which consumes a minimum of
energy, because no active current is driven into the coils. However, passive braking will allow slow
turning of the motor when a continuous torque is applied.

Hint

Operate the motor within your application when exploring StealthChop. Motor performance often is
better with a mechanical load, because it prevents the motor from stalling due mechanical oscillations
which can occur without load.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 67

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PARAMETERS RELATED TO STEALTHCHOP

Parameter

Description

Setting

Comment

en_spread_
cycle

General disable for use of StealthChop (register
GCONF).

1

Do not use StealthChop

0

StealthChop enabled

TPWMTHRS

Specifies the upper velocity for operation in
StealthChop. Entry the TSTEP reading (time
between two microsteps) when operating at the
desired threshold velocity.

0 …

1048575

StealthChop is disabled if

TSTEP falls TPWMTHRS

PWM_LIM

Limiting value for limiting the current jerk when
switching from SpreadCycle to StealthChop.
Reduce the value to yield a lower current jerk.

0 … 15

Upper four bits of 8 bit
amplitude limit
(Default=12)

pwm_
autoscale

Enable automatic current scaling using current
measurement. If off, use forward controlled
velocity-based mode.

0

Forward controlled mode

1

Automatic scaling with
current regulator

pwm_
autograd

Enable automatic tuning of PWM_GRAD_AUTO
0

disable, use PWM_GRAD
from register instead

1

enable

PWM_FREQ

PWM frequency selection. Use the lowest setting
giving good results. The frequency measured at
each of the chopper outputs is half of the
effective chopper frequency f

PWM

.

0

f

PWM

=2/1024 f

CLK

1

f

PWM

=2/683 f

CLK

2

f

PWM

=2/512 f

CLK

3

f

PWM

=2/410 f

CLK

PWM_REG

User defined PWM amplitude regulation loop P­coefficient. A higher value leads to a higher
adaptation speed when pwm_autoscale=1.

1 … 15

Results in 0.5 to 7.5 steps
for PWM_SCALE_AUTO
regulator per fullstep

PWM_OFS

User defined PWM amplitude (offset) for velocity
based scaling and initialization value for automatic
tuning of PWM_OFFS_AUTO.

0 … 255

PWM_OFS=0 disables
linear current scaling
based on current setting

PWM_GRAD

User defined PWM amplitude (gradient) for
velocity based scaling and initialization value for
automatic tuning of PWM_GRAD_AUTO.

0 … 255

FREEWHEEL

Stand still option when motor current setting is
zero (I_HOLD=0). Only available with StealthChop
enabled. The freewheeling option makes the
motor easy movable, while both coil short options
realize a passive brake.

0

Normal operation

1

Freewheeling

2

Coil short via LS drivers

3

Coil short cia HS drivers

PWM_SCALE
_AUTO

Read back of the actual StealthChop voltage PWM
scaling correction as determined by the current
regulator. Shall regulate close to 0 during tuning.

-255 …
255

(read only) Scaling value
becomes frozen when
operating in SpreadCycle

PWM_GRAD
_AUTO
PWM_OFS
_AUTO

Allow monitoring of the automatic tuning and
determination of initial values for PWM_OFS and
PWM_GRAD.

0 … 255

(read only)

TOFF

General enable for the motor driver, the actual
value does not influence StealthChop

0

Driver off

1 … 15

Driver enabled

TBL

Comparator blank time. This time needs to safely
cover the switching event and the duration of the
ringing on the sense resistor. Choose a setting of
1 or 2 for typical applications. For higher
capacitive loads, 3 may be required. Lower
settings allow StealthChop to regulate down to
lower coil current values.

0

16 t

CLK

1

24 t

CLK

2

36 t

CLK

3

54 t

CLK

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8 SpreadCycle and Classic Chopper

While StealthChop is a voltage mode PWM controlled chopper, SpreadCycle is a cycle-by-cycle current
control. Therefore, it can react extremely fast to changes in motor velocity or motor load. The currents
through both motor coils are controlled using choppers. The choppers work independently of each
other. In Figure 8.1 the different chopper phases are shown.

R

SENSE

I

COIL

On Phase:
current flows in
direction of target
current

R

SENSE

I

COIL

Fast Decay Phase:
current flows in
opposite direction
of target current

R

SENSE

I

COIL

Slow Decay Phase:
current re-circulation

+V

M

+V

M

+V

M

Figure 8.1 Chopper phases

Although the current could be regulated using only on phases and fast decay phases, insertion of the
slow decay phase is important to reduce electrical losses and current ripple in the motor. The
duration of the slow decay phase is specified in a control parameter and sets an upper limit on the
chopper frequency. The current comparator can measure coil current during phases when the current
flows through the sense resistor, but not during the slow decay phase, so the slow decay phase is
terminated by a timer. The on phase is terminated by the comparator when the current through the
coil reaches the target current. The fast decay phase may be terminated by either the comparator or
another timer.

When the coil current is switched, spikes at the sense resistors occur due to charging and discharging
parasitic capacitances. During this time, typically one or two microseconds, the current cannot be
measured. Blanking is the time when the input to the comparator is masked to block these spikes.

There are two cycle-by-cycle chopper modes available: a new high-performance chopper algorithm
called SpreadCycle and a proven constant off-time chopper mode. The constant off-time mode cycles
through three phases: on, fast decay, and slow decay. The SpreadCycle mode cycles through four
phases: on, slow decay, fast decay, and a second slow decay.

The chopper frequency is an important parameter for a chopped motor driver. A too low frequency
might generate audible noise. A higher frequency reduces current ripple in the motor, but with a too
high frequency magnetic losses may rise. Also power dissipation in the driver rises with increasing
frequency due to the increased influence of switching slopes causing dynamic dissipation. Therefore, a
compromise needs to be found. Most motors are optimally working in a frequency range of 16 kHz to
30 kHz. The chopper frequency is influenced by a number of parameter settings as well as by the
motor inductivity and supply voltage.

Hint

A chopper frequency in the range of 16 kHz to 30 kHz gives a good result for most motors when
using SpreadCycle. A higher frequency leads to increased switching losses.

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 69

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Three parameters are used for controlling both chopper modes:

8.1 SpreadCycle Chopper

The SpreadCycle (patented) chopper algorithm is a precise and simple to use chopper mode which
automatically determines the optimum length for the fast-decay phase. The SpreadCycle will provide
superior microstepping quality even with default settings. Several parameters are available to
optimize the chopper to the application.

Each chopper cycle is comprised of an on phase, a slow decay phase, a fast decay phase and a
second slow decay phase (see Figure 8.3). The two slow decay phases and the two blank times per
chopper cycle put an upper limit to the chopper frequency. The slow decay phases typically make up
for about 30%-70% of the chopper cycle in standstill and are important for low motor and driver
power dissipation.

Calculation of a starting value for the slow decay time TOFF:

EXAMPLE:

Target Chopper frequency: 25kHz.
Assumption: Two slow decay cycles make up for 50% of overall chopper cycle time







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




 

For the TOFF setting this means:

󰇛



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

 󰇜

With 12 MHz clock this gives a setting of TOFF=3.0, i.e. 3.
With 16 MHz clock this gives a setting of TOFF=4.25, i.e. 4 or 5.

The hysteresis start setting forces the driver to introduce a minimum amount of current ripple into
the motor coils. The current ripple must be higher than the current ripple which is caused by resistive
losses in the motor in order to give best microstepping results. This will allow the chopper to
precisely regulate the current both for rising and for falling target current. The time required to
introduce the current ripple into the motor coil also reduces the chopper frequency. Therefore, a
higher hysteresis setting will lead to a lower chopper frequency. The motor inductance limits the

Parameter

Description

Setting

Comment

TOFF

Sets the slow decay time (off time). This setting also
limits the maximum chopper frequency.

For operation with StealthChop, this parameter is not
used, but it is required to enable the motor. In case of
operation with StealthChop only, any setting is OK.

Setting this parameter to zero completely disables all
driver transistors and the motor can free-wheel.

0

chopper off

1…15

off time setting
N

CLK

= 24 + 32*TOFF
(1 will work with minimum
blank time of 24 clocks)

TBL

Selects the comparator blank time. This time needs to
safely cover the switching event and the duration of the
ringing on the sense resistor. For most applications, a
setting of 1 or 2 is good. For highly capacitive loads,
e.g. when filter networks are used, a setting of 2 or 3
will be required.

0

16 t

CLK

1

24 t

CLK

2

36 t

CLK

3

54 t

CLK

chm

Selection of the chopper mode

0

SpreadCycle

1

classic const. off time

TPFD

Adds passive fast decay time after bridge polarity
change. Starting from 0, increase value, in case the
motor suffers from mid-range resonances.

0…15

Fast decay time in multiple
of 128 clocks (128 clocks
are roughly 10µs)

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ability of the chopper to follow a changing motor current. Further the duration of the on phase and
the fast decay must be longer than the blanking time, because the current comparator is disabled
during blanking.

It is easiest to find the best setting by starting from a low hysteresis setting (e.g. HSTRT=0, HEND=0)
and increasing HSTRT, until the motor runs smoothly at low velocity settings. This can best be
checked when measuring the motor current either with a current probe or by probing the sense
resistor voltages (see Figure 8.2). Checking the sine wave shape near zero transition will show a small
ledge between both half waves in case the hysteresis setting is too small. At medium velocities (i.e.
100 to 400 fullsteps per second), a too low hysteresis setting will lead to increased humming and
vibration of the motor.

Figure 8.2 No ledges in current wave with sufficient hysteresis (magenta: current A, yellow &
blue: sense resistor voltages A and B)

A too high hysteresis setting will lead to reduced chopper frequency and increased chopper noise but
will not yield any benefit for the wave shape.

Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.
For detail procedure see Application Note AN001 - Parameterization of SpreadCycle

As experiments show, the setting is quite independent of the motor, because higher current motors
typically also have a lower coil resistance. Therefore choosing a low to medium default value for the
hysteresis (for example, effective hysteresis = 4) normally fits most applications. The setting can be
optimized by experimenting with the motor: A too low setting will result in reduced microstep
accuracy, while a too high setting will lead to more chopper noise and motor power dissipation.
When measuring the sense resistor voltage in motor standstill at a medium coil current with an
oscilloscope, a too low setting shows a fast decay phase not longer than the blanking time. When
the fast decay time becomes slightly longer than the blanking time, the setting is optimum. You can
reduce the off-time setting, if this is hard to reach.

The hysteresis principle could in some cases lead to the chopper frequency becoming too low, e.g.
when the coil resistance is high when compared to the supply voltage. This is avoided by splitting
the hysteresis setting into a start setting (HSTRT+HEND) and an end setting (HEND). An automatic
hysteresis decrementer (HDEC) interpolates between both settings, by decrementing the hysteresis
value stepwise each 16 system clocks. At the beginning of each chopper cycle, the hysteresis begins
with a value which is the sum of the start and the end values (HSTRT+HEND), and decrements during
the cycle, until either the chopper cycle ends or the hysteresis end value (HEND) is reached. This way,

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the chopper frequency is stabilized at high amplitudes and low supply voltage situations, if the
frequency gets too low. This avoids the frequency reaching the audible range.

t

I

target current

target current - hysteresis start

target current + hysteresis start

on sd fd sd

target current + hysteresis end

target current - hysteresis end

HDEC

Figure 8.3 SpreadCycle chopper scheme showing coil current during a chopper cycle

Two parameters control SpreadCycle mode:

Parameter

Description

Setting

Comment

HSTRT

Hysteresis start setting. This value is an offset
from the hysteresis end value HEND.

0…7

HSTRT=1…8
This value adds to HEND.

HEND

Hysteresis end setting. Sets the hysteresis end

value after a number of decrements. The sum
HSTRT+HEND must be ≤16. At a current setting of
max. 30 (amplitude reduced to 240), the sum is
not limited.

0…2

-3…-1: negative HEND

3

0: zero HEND

4…15

1…12: positive HEND

With HSTRT=0 and HEND=0, the hysteresis is 0 (off).

EXAMPLE:

A hysteresis of 4 has been chosen. You might decide to not use hysteresis decrement. In this case
set:

HEND=6 (sets an effective end value of 6-3=3)
HSTRT=0 (sets minimum hysteresis, i.e. 1: 3+1=4)

In order to take advantage of the variable hysteresis, we can set most of the value to the HSTRT, i.e.
4, and the remaining 1 to hysteresis end. The resulting configuration register values are as follows:

HEND=0 (sets an effective end value of -3)
HSTRT=6 (sets an effective start value of hysteresis end +7: 7-3=4)

Hint

Highest motor velocities sometimes benefit from setting TOFF to 2 or 3 and a short TBL of 2 or 1.

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8.2 Classic Constant Off Time Chopper

The classic constant off time chopper is an alternative to SpreadCycle. Perfectly tuned, it also gives
good results. Also, the classic constant off time chopper (automatically) is used in combination with
fullstepping in DcStep operation.

The classic constant off-time chopper uses a fixed-time fast decay following each on phase. While the
duration of the on phase is determined by the chopper comparator, the fast decay time needs to be
long enough for the driver to follow the falling slope of the sine wave, but it should not be so long
that it causes excess motor current ripple and power dissipation. This can be tuned using an
oscilloscope or evaluating motor smoothness at different velocities. A good starting value is a fast
decay time setting similar to the slow decay time setting.

t

I

mean value = target current

target current + offset

on

sdfd

sdon

fd

Figure 8.4 Classic const. off time chopper with offset showing coil current

After tuning the fast decay time, the offset should be tuned for a smooth zero crossing. This is
necessary because the fast decay phase makes the absolute value of the motor current lower than the
target current (see Figure 8.5). If the zero offset is too low, the motor stands still for a short moment
during current zero crossing. If it is set too high, it makes a larger microstep. Typically, a positive
offset setting is required for smoothest operation.

t

I

Target current

Coil current

t

I

Target current

Coil current

Coil current does not have optimum shape Target current corrected for optimum shape of coil current

Figure 8.5 Zero crossing with classic chopper and correction using sine wave offset

Three parameters control constant off-time mode:

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Parameter

Description

Setting

Comment

TFD
(fd3 &
HSTRT)

Fast decay time setting. With CHM=1, these bits

control the portion of fast decay for each chopper
cycle.

0

slow decay only

1…15

duration of fast decay
phase

OFFSET
(HEND)

Sine wave offset. With CHM=1, these bits control

the sine wave offset. A positive offset corrects for
zero crossing error.

0…2

negative offset: -3…-1

3

no offset: 0

4…15

positive offset 1…12

disfdcc

Selects usage of the current comparator for
termination of the fast decay cycle. If current
comparator is enabled, it terminates the fast decay
cycle in case the current reaches a higher negative
value than the actual positive value.

0

enable comparator
termination of fast decay
cycle

1

end by time only

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9 Selecting Sense Resistors

The TMC5160 provides several means to set the motor current: Sense resistors, GLOBALSCALER and
currentscale CS. To adapt a drive to the motor, choose a sense-resistor value fitting or slightly
exceeding the maximum desired current at 100% settings of the scalers. Fine-tune the current to the
specific motor via the 8 bit GLOBALSCALER. Situation specific motor current adaptation is done by 5
bit scalers (actual scale can be read via CS), controlled by CoolStep, run- and hold current (IRUN,
IHOLD). This makes the CS control compatible to other TRINAMIC ICs.

Set the desired maximum motor current by selecting an appropriate value for the sense resistor. The
following table shows the RMS current values which are reached using standard resistors.

CHOICE OF R

SENSE

AND RESULTING MAX. MOTOR CURRENT

WITH GLOBALSCALER=0 (RESP. VALUE 256)

R

SENSE

[Ω]

RMS current [A]
(CS=31)

Sine wave peak
current [A] (CS=31)

0.22

1.1

1.5

0.15

1.6

2.2

0.12

2.0

2.8

0.10

2.3

3.3

0.075

3.1

4.4

0.066

3.5

5.0

0.050

4.7

6.6

0.033

7.1

10.0

0.022

10.6

15.0

Sense resistors should be carefully selected. The full motor current flows through the sense resistors.
Due to chopper operation the sense resistors see pulsed current from the MOSFET bridges. Therefore,
a low-inductance type such as film or composition resistors is required to prevent voltage spikes
causing ringing on the sense voltage inputs leading to unstable measurement results. Also, a low­inductance, low-resistance PCB layout is essential. A massive ground plane is best. Please also refer to
layout considerations in chapter 29.

The sense resistor sets the upper current which can be set by software settings IRUN, IHOLD and
GLOBALSCALER. Choose the sense resistor value so that the maximum desired current (or slightly
more) flows at the maximum current setting (GLOBALSCALER = 256 (setting 0) and IRUN = 31).

CALCULATION OF RMS CURRENT



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















The momentary motor current is calculated by:

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

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

GLOBALSCALER is the global current scaler. A setting of 0 is treated as full scale (256).
CS is the current scale setting as set by the IHOLD and IRUN and CoolStep.
VFS is the full scale voltage (please refer to electrical characteristics, V

SRT

).

CUR

A/B

is the actual value from the internal sine wave table.

248 is the amplitude of the internal sine wave table.

The sense resistor needs to be able to conduct the peak motor coil current in motor standstill
conditions, unless standby power is reduced. Under normal conditions, the sense resistor conducts

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 75

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less than the coil RMS current, because no current flows through the sense resistor during the slow
decay phases.

CALCULATION OF PEAK SENSE RESISTOR POWER DISSIPATION





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Hint

For best precision of current setting, it is advised to measure and fine tune the current in the
application. Choose the sense resistors to the next value covering the desired motor current. Set IRUN
to 31 corresponding 100% of the desired motor current and fine-tune motor current using

GLOBALSCALER.

Attention

Be sure to use a symmetrical sense resistor layout and short and straight sense resistor traces of
identical length. Well matching sense resistors ensure best performance.
A compact layout with massive ground plane is best to avoid parasitic resistance effects.

Parameter

Description

Setting

Comment

IRUN

Current scale when motor is running. Scales coil
current values as taken from the internal sine
wave table. For high precision motor operation,
work with a current scaling factor in the range 16
to 31, because scaling down the current values
reduces the effective microstep resolution by
making microsteps coarser. This setting also
controls the maximum current value set by
CoolStep.

0 … 31

scaling factor
1/32, 2/32, … 32/32

IHOLD

Identical to IRUN, but for motor in stand still.

IHOLD
DELAY

Allows smooth current reduction from run current
to hold current. IHOLDDELAY controls the number
of clock cycles for motor power down after
TZEROWAIT in increments of 2^18 clocks: 0=instant
power down, 1..15: Current reduction delay per
current step in multiple of 2^18 clocks.

Example: When using IRUN=31 and IHOLD=16, 15
current steps are required for hold current
reduction. A IHOLDDELAY setting of 4 thus results
in a power down time of 4*15*2^18 clock cycles,
i.e. roughly one second at 16MHz.

0

instant IHOLD

1 … 15

1*218 … 15*218
clocks per current
decrement

GLOBAL
SCALER

Allows fine control of the motor current range
setting

0 … 255

scales in 1/256 steps
0=full scale

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10 Velocity Based Mode Control

The TMC5160 allows the configuration of different chopper modes and modes of operation for
optimum motor control. Depending on the motor load, the different modes can be optimized for
lowest noise & high precision, highest dynamics, or maximum torque at highest velocity. Some of the
features like CoolStep or StallGuard2 are useful in a limited velocity range. A number of velocity
thresholds allow combining the different modes of operation within an application requiring a wide
velocity range.

option

option

option

option

optionoption

option

microstep

microstep

high velocity fullstep

microstep + coolStep

microstep + coolStep

microstepping

microstepping

motor stand still

motor going to standby

motor in standby

motor in standby

v

t

VPWMTHRS+Δ

VPWMTHRS

0

VCOOLTHRS+Δ

VHIGH+Δ

VACTUAL
~1/TSTEP

VCOOLTHRS

VHIGH

current

TZEROWAIT

RMS current

I_HOLD

I_RUN

dI * IHOLDDELAY

coolStep current reduction

stealthChop

spreadCycle

const. Toff

Chopper mode

TRINAMIC, B. Dwersteg, 14.3.14

Figure 10.1 Choice of velocity dependent modes

Figure 10.1 shows all available thresholds and the required ordering. VPWMTHRS, VHIGH and
VCOOLTHRS are determined by the settings TPWMTHRS, THIGH and TCOOLTHRS. The velocity is
described by the time interval TSTEP between each two step pulses. This allows determination of the
velocity when an external step source is used. TSTEP always becomes normalized to 256
microstepping. This way, the thresholds do not have to be adapted when the microstep resolution is
changed. The thresholds represent the same motor velocity, independent of the microstep settings.
TSTEP becomes compared to these threshold values. A hysteresis of 1/16 TSTEP resp. 1/32 TSTEP is
applied to avoid continuous toggling of the comparison results when a jitter in the TSTEP
measurement occurs. The upper switching velocity is higher by 1/16, resp. 1/32 of the value set as
threshold. The StealthChop threshold TPWMTHRS is not shown. It can be included with VPWMTHRS <
VCOOLTHRS. The motor current can be programmed to a run and a hold level, dependent on the
standstill flag stst.

Using automatic velocity thresholds allows tuning the application for different velocity ranges.
Features like CoolStep will integrate completely transparently in your setup. This way, once
parameterized, they do not require any activation or deactivation via software.

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Parameter

Description

Setting

Comment

stst

This flag indicates motor stand still in each operation
mode. This occurs 2^20 clocks after the last step pulse.

0/1

Status bit, read only

TPOWER
DOWN

This is the delay time after stand still (stst) of the
motor to motor current power down. Time range
is about 0 to 4 seconds.

0…255

Time in multiples of 2^18

t

CLK

TSTEP

Actual measured time between two 1/256
microsteps derived from the step input frequency
in units of 1/fCLK. Measured value is (2^20)-1 in
case of overflow or stand still.

0…
1048575

Status register, read only.
Actual measured step time
in multiple of t

CLK

TPWMTHRS

TSTEP ≥ TPWMTHRS

- StealthChop PWM mode is enabled, if

configured

- DcStep is disabled

0…
1048575

Setting to control the
upper velocity threshold
for operation in
StealthChop

TCOOLTHRS

TCOOLTHRS ≥ TSTEP ≥ THIGH:

- CoolStep is enabled, if configured

- StealthChop voltage PWM mode is

disabled

TCOOLTHRS ≥ TSTEP

- Stop on stall and stall output signal is

enabled, if configured

0…
1048575

Setting to control the
lower velocity threshold
for operation with
CoolStep and StallGuard

THIGH

TSTEP ≤ THIGH:

- CoolStep is disabled (motor runs with

normal current scale)

- StealthChop voltage PWM mode is

disabled

- If vhighchm is set, the chopper switches

to chm=1 with TFD=0 (constant off time
with slow decay, only).

- If vhighfs is set, the motor operates in

fullstep mode and the stall detection
becomes switched over to DcStep stall
detection.

0…
1048575

Setting to control the
upper threshold for
operation with CoolStep
and StallGuard as well as
optional high velocity step
mode

small_
hysteresis

Hysteresis for step frequency comparison based
on TSTEP (lower velocity threshold) and
(TSTEP*15/16)-1 respectively (TSTEP*31/32)-1 (upper
velocity threshold)

0

Hysteresis is 1/16

1

Hysteresis is 1/32

vhighfs

This bit enables switching to fullstep, when VHIGH
is exceeded. Switching takes place only at 45°
position. The fullstep target current uses the
current value from the microstep table at the 45°
position.

0

No switch to fullstep

1

Fullstep at high velocities

vhighchm

This bit enables switching to chm=1 and fd=0, when
VHIGH is exceeded. This way, a higher velocity can

be achieved. Can be combined with vhighfs=1. If set,
the TOFF setting automatically becomes doubled
during high velocity operation in order to avoid
doubling of the chopper frequency.

0

No change of chopper
mode

1

Classic const. Toff chopper
at high velocities

en_pwm_
mode

StealthChop voltage PWM enable flag (depending
on velocity thresholds). Switch from off to on
state while in stand still, only.

0

No StealthChop

1

StealthChop below
VPWMTHRS

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11 Diagnostics and Protection

The TMC5160 supplies a complete set of diagnostic and protection capabilities, like short circuit
protection and undervoltage detection. Open load detection allows testing if a motor coil connection
is interrupted. See the DRV_STATUS table for details.

11.1 Temperature Sensors

The driver integrates a four level temperature sensor (120°C pre-warning and selectable 136°C / 143°C /
150°C thermal shutdown) for diagnostics and for protection of the IC and the power MOSFETs and
adjacent components against excess heat. Choose the overtemperature level to safely cover error
conditions like missing heat convection. Heat is mainly generated by the power MOSFETs, and, at
increased voltage, by the internal voltage regulators. For many applications, already the
overtemperature pre-warning will indicate an abnormal operation situation and can be used to initiate
user warning or power reduction measures like motor current reduction. The thermal shutdown is
just an emergency measure and temperature rising to the shutdown level should be prevented by
design.

After triggering the overtemperature sensor (ot flag), the driver remains switched off until the system
temperature falls below the pre-warning level (otpw) to avoid continuous heating to the shutdown
level.

11.2 Short Protection

The TMC5160 protects the MOSFET power stages against a short circuit or overload condition by
monitoring the voltage drop in the high-side MOSFETs, as well as the voltage drop in sense resistor
and low-side MOSFETs (Figure 11.1). A programmable short detection delay (shortdelay) allows
adjusting the detector to work with very slow switching slopes. Additionally, the short detector
allows filtering of the signal. This helps to prevent spurious triggering caused by effects of PCB
layout, or long, adjacent motor cables (SHORTFILTER). All control bits are available via register
SHORT_CONF. Additionally, the short detection is protected against single events, e.g. caused by ESD
discharges, by retrying three times before switching off the motor continuously.

Parameter

Description

Setting

Comment

S2VS_LEVEL

Short or overcurrent detector level for lowside
FETs. Checks for voltage drop in LS MOSFET and
sense resistor.
Hint: 6 to 8 recommended, down to 4 at low
current scale

4…15

4 (highest sensitivity) …
15 (lowest sensitivity)

(Reset Default:
OTP 6 or 12)

S2G_LEVEL

S2G_LEVEL:

Short to GND detector level for highside FETs.
Checks for voltage drop on high side MOSFET.
Hint: 6 to 14 recommended (minimum 12 if the
bridge supply voltage can exceed 52V)

2…15

2 (highest sensitivity) …
15 (lowest sensitivity)

(Reset Default:
OTP 6 or 12)

SHORT_
FILTER

Spike filtering bandwidth for short detection
Hint: A good PCB layout will allow using setting 0.
Increase value, if erroneous short detection
occurs.

0…3

0 (lowest, 100ns),
1 (1µs) (Reset Default),
2 (2µs),
3 (3µs)

shortdelay

shortdelay: Short detection delay

The short detection delay shall cover the bridge
switching time. 0 will work for most applications.

0/1

0=750ns: normal,
1=1500ns: high

CHOPCONF.
diss2vs

Allows to disable short to VS protection.

0/1

Leave detection enabled
for normal use (0).

CHOPCONF.
diss2g

Allows to disable short to GND protection.

0/1

Leave detection enabled
for normal use (0).

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LS short

detection

(S2VS)

No-short

area

HS short

detection

(S2G)

No-short

area

BMx

(coil output

voltage)

Internal high-side

driver enable

VS-V

BM

S2G level

0V

V

S

t

SD

detection active

Short to GND monitor phase

Internal Error Flag

t

SD

Short detected

short
delay

short
delay

inactive

Short to GND
detected

Driver disable

0

1

0

1

Output
floating

S2VS level

V

BM

Short to VS monitor phase

short
delay

inactive

detection

active

inactive

inactive

t

SD

Internal low-side

driver enable

0

1

Figure 11.1 Short detection

As the low-side short detection includes the sense resistor, it can be set to a high sensitivity and
provides good precision of current detection. This way, it will safely cover most overcurrent
conditions, i.e. when the motor stalls, or is abruptly stopped in StealthChop mode.

Hint

Once a short condition is safely detected, the corresponding driver bridge (A or B) becomes switched
off, and the s2ga or s2gb flag, respectively s2vsa or s2vsb becomes set.
To restart the motor, disable and re-enable the driver.

Attention

Short protection cannot protect the system and the power stages for all possible short events, as a
short event is rather undefined and a complex network of external components may be involved.
Therefore, short circuits should basically be avoided.

Hint

Set low-side short protection (S2VS) to sensitively detect an overcurrent condition (at 150 to 200% of
nominal peak current). Especially with low resistive motors an overcurrent can easily be triggered by
false settings, or motor stall when using StealthChop. Therefore, a sensitive short to VS setting will
protect the power stage.

Attention

High-side short detection (S2G) sensitivity may increase at voltages of 52V and above. Therefore, a
higher setting is required if motor supply voltage can overshoot up to 55V. We recommend a setting
of 12 to 15 in this case. For fine tuning of overcurrent detection, trim the S2VS detector threshold.
High-side short detection may falsely trigger if motor supply voltage overshoots 55V.

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11.3 Open Load Diagnostics

Interrupted cables are a common cause for systems failing, e.g. when connectors are not firmly
plugged. The TMC5160 detects open load conditions by checking, if it can reach the desired motor coil
current. This way, also undervoltage conditions, high motor velocity settings or short and
overtemperature conditions may cause triggering of the open load flag, and inform the user, that
motor torque may suffer. In motor stand still, open load cannot be measured, as the coils might
eventually have zero current.

Open load detection is provided for system debugging.
In order to safely detect an interrupted coil connection, read out the open load flags at low or
nominal motor velocity operation, only. If possible, use SpreadCycle for testing, as it provides the
most accurate test. However, the ola and olb flags have just informative character and do not cause
any action of the driver.

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12 Ramp Generator

The ramp generator allows motion based on target position or target velocity. It automatically
calculates the optimum motion profile taking into account acceleration and velocity settings. The
TMC5160 integrates a new type of ramp generator, which offers faster machine operation compared to
the classical linear acceleration ramps. The sixPoint ramp generator allows adapting the acceleration
ramps to the torque curves of a stepper motor and uses two different acceleration settings each for
the acceleration phase and for the deceleration phase. See Figure 12.2.

12.1 Real World Unit Conversion

The TMC5160 uses its internal or external clock signal as a time reference for all internal operations.
Thus, all time, velocity and acceleration settings are referenced to f

CLK

. For best stability and
reproducibility, it is recommended to use an external quartz oscillator as a time base, or to provide a
clock signal from a microcontroller.

The units of a TMC5160 register content are written as register[5160].

PARAMETER VS. UNITS

Parameter / Symbol

Unit

calculation / description / comment

f

CLK

[Hz]

[Hz]

clock frequency of the TMC5160 in [Hz]

s

[s]

second

US

µstep

FS

fullstep

µstep velocity v[Hz]

µsteps / s

v[Hz] = v[5160] * ( f

CLK

[Hz]/2 / 2^23 )

µstep acceleration a[Hz/s]

µsteps / s^2

a[Hz/s] = a[5160] * f

CLK

[Hz]^2 / (512*256) / 2^24

USC microstep count

counts

microstep resolution in number of microsteps
(i.e. the number of microsteps between two
fullsteps – normally 256)

rotations per second v[rps]

rotations / s

v[rps] = v[µsteps/s] / USC / FSC
FSC: motor fullsteps per rotation, e.g. 200

rps acceleration a[rps/s^2]

rotations / s^2

a[rps/s^2] = a[µsteps/s^2] / USC / FSC

ramp steps[µsteps] = rs

µsteps

rs = (v[5160])^2 / a[5160] / 2^8
microsteps during linear acceleration ramp
(assuming acceleration from 0 to v)

TSTEP, T…THRS

-

TSTEP = f

CLK

/ f

STEP

The time reference for velocity thresholds is
referred to the actual microstep frequency of
the clock input respectively velocity v[Hz].

In rare cases, the upper acceleration limit might impose a limitation to the application, e.g. when
working with a reduced clock frequency or high gearing and low load on the motor. In order to
increase the effective acceleration possible, the microstep resolution of the sequencer input may be
decreased. Setting the CHOPCONF options intpol=1 and MRES=%0001 will double the motor velocity for
the same speed setting and thus also double effective acceleration and deceleration. The motor will
have the same smoothness, but half position resolution with this setting.

Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.

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12.2 Motion Profiles

For the ramp generator register set, please refer to the chapter 6.3.

12.2.1 Ramp Mode

The ramp generator delivers two phase acceleration and two phase deceleration ramps with
additional programmable start and stop velocities (see Figure 12.1).

The two different sets of acceleration and deceleration can be combined freely. A common transition

speed V1 allows for velocity dependent switching between both acceleration and deceleration
settings. A typical use case will use lower acceleration and deceleration values at higher velocities, as

the motors torque declines at higher velocity. When considering friction in the system, it becomes
clear, that typically deceleration of the system is quicker than acceleration. Thus, deceleration values
can be higher in many applications. This way, operation speed of the motor in time critical
applications can be maximized.
As target positions and ramp parameters may be changed any time during the motion, the motion
controller will always use the optimum (fastest) way to reach the target, while sticking to the
constraints set by the user. This way it might happen, that the motion becomes automatically
stopped, crosses zero and drives back again. This case is flagged by the special flag second_move.

12.2.2 Start and Stop Velocity

When using increased levels of start- and stop velocity, it becomes clear, that a subsequent move into
the opposite direction would provide a jerk identical to VSTART+VSTOP, rather than only VSTART. As
the motor probably is not able to follow this, you can set a time delay for a subsequent move by
setting TZEROWAIT. An active delay time is flagged by the flag t_zerowait_active. Once the target
position is reached, the flag position_reached becomes active.

v

t

acceleration phase deceleration phase

motor

stop

VSTOP

VSTART

0

V1

VMAX

AMAX

DMAX

D

1

A

1

-

A

1

TZEROWAIT

acceleration

phase

VACTUAL

Figure 12.1 Ramp generator velocity trace showing consequent move in negative direction

Note

The start velocity can be set to zero, if not used.
The stop velocity can be set to ten (or down to one), if not used.
Take care to set VSTOP identical to or above VSTART. This ensures that even a short motion can

be terminated successfully at the target position.

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Torque for VSTART

Torque available for

AMAX

Torque available for acceleration A1

Torque required

for static loads

torque

velocity [RPM]

0

M

FRICT

M

MAX

VMAX

M

FRICT

Portion of torque required for friction and static load within the system

M

MAX

Motor pull-out torque at v=0

motor torque

M

NOM2

high acceleration

reduced accel.

V1

M

NOM1

M

NOM1/2

Torque available at V1 resp. VMAX

Motor torque used in acceleration phase

high deceleration

reduced decel.

2xM

FRICT

Overall torque usable for deceleration

VSTART

Figure 12.2 Illustration of optimized motor torque usage with TMC5160 ramp generator

12.2.3 Velocity Mode

For the ease of use, velocity mode movements do not use the different acceleration and deceleration
settings. You need to set VMAX and AMAX only for velocity mode. The ramp generator always uses
AMAX to accelerate or decelerate to VMAX in this mode.

In order to decelerate the motor to stand still, it is sufficient to set VMAX to zero. The flag vzero
signals standstill of the motor. The flag velocity_reached always signals, that the target velocity has
been reached.

12.2.4 Early Ramp Termination

In cases where users can interact with a system, some applications require terminating a motion by
ramping down to zero velocity before the target position has been reached.

OPTIONS TO TERMINATE MOTION USING ACCELERATION SETTINGS:

a) Switch to velocity mode, set VMAX=0 and AMAX to the desired deceleration value. This will stop

the motor using a linear ramp.

b) For a stop in positioning mode, set VSTART=0 and VMAX=0. VSTOP is not used in this case. The

driver will use AMAX and A1 (as determined by V1) for going to zero velocity, unless the ramp is
already in the deceleration phase to stop at the target position.

c) For a stop using D1, DMAX and VSTOP, trigger the deceleration phase by copying XACTUAL to

XTARGET. Set TZEROWAIT sufficiently to allow the CPU to interact during this time. The driver will
decelerate and eventually come to a stop. Poll the actual velocity to terminate motion during
TZEROWAIT time using option a) or b).

d) Activate a stop switch. This can be done by means of the hardware input, e.g. using a wired 'OR'

to the stop switch input. If you do not use the hardware input and have tied the REFL and REFR
to a fixed level, enable the stop function (stop_l_enable, stop_r_enable) and use the inverting
function (pol_stop_l, pol_stop_r) to simulate the switch activation.

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12.2.5 Application Example: Joystick Control

Applications like surveillance cameras can be optimally enhanced using the motion controller: while
joystick commands operate the motor at a user defined velocity, the target ramp generator ensures
that the valid motion range never is left.

REALIZE JOYSTICK CONTROL

1. Use positioning mode in order to control the motion direction and to set the motion limit(s).

2. Modify VMAX at any time in the range VSTART to your maximum value. With VSTART=0, you can

also stop motion by setting VMAX=0. The motion controller will use A1 and AMAX as determined
by V1 to adapt velocity for ramping up and ramping down.

3. In case you do not modify the acceleration settings, you do not need to rewrite XTARGET, just

modify VMAX.

4. DMAX, D1 and VSTOP only become used when the ramp controller slows down due to reaching

the target position, or when the target position has been modified to point to the other direction.

12.3 Velocity Thresholds

The ramp generator provides a number of velocity thresholds coupled with the actual velocity
VACTUAL. The different ranges allow programming the motor to the optimum step mode, coil current
and acceleration settings. Most applications will not require all of the thresholds, but in principle all
modes can be combined as shown in Figure 12.1. VHIGH and VCOOLTHRS are determined by the
settings THIGH and TCOOLTHRS in order to allow determination of the velocity when an external step
source is used. TSTEP becomes compared to these threshold values. A hysteresis of 1/16 TSTEP resp.
1/32 TSTEP is applied to avoid continuous toggling of the comparison results when a jitter in the
TSTEP measurement occurs. The upper switching velocity is higher by 1/16, resp. 1/32 of the value set
as threshold. The StealthChop threshold TPWMTHRS is not shown. It can be included with VPWMTHRS
< VCOOLTHRS.

high velocity fullstep

microstep + coolStep

microstep + coolStep

microstepping

microstepping

motor stand still

motor going to standby

motor in standby

motor in standby

v

t

VSTOP

VSTART

0

V1

VMAX

AMAX

DMAX

D

1

A

1

VACTUAL

VCOOLTHRS

VHIGH

current

TZEROWAIT

RMS current

I_HOLD

I_RUN

dI * IHOLDDELAY

coolStep current reduction

Figure 12.3 Ramp generator velocity dependent motor control

The velocity thresholds for the different chopper modes and sensorless operation features are coupled
to the time between each two microsteps TSTEP.

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12.4 Reference Switches

Prior to normal operation of the drive an absolute reference position must be set. The reference
position can be found using a mechanical stop which can be detected by stall detection, or by a
reference switch.

In case of a linear drive, the mechanical motion range must not be left. This can be ensured also for
abnormal situations by enabling the stop switch functions for the left and the right reference switch.
Therefore, the ramp generator responds to a number of stop events as configured in the SW_MODE
register. There are two ways to stop the motor:

- It can be stopped abruptly, when a switch is hit. This is useful in an emergency case and for

StallGuard based homing.

- Or the motor can be softly decelerated to zero using deceleration settings (DMAX, V1, D1).

Hint

Latching of the ramp position XACTUAL to the holding register XLATCH upon a switch event gives a
precise snapshot of the position of the reference switch.

+VCC_IO

REFL

Traveler

Motor

+VCC_IO

REFR

Negative

direction

Positive
direction

10k10k

22k

1nF

Optional RC filter
(example)

Figure 12.4 Using reference switches (example)

Normally open or normally closed switches can be used by programming the switch polarity or
selecting the pullup or pull-down resistor configuration. A normally closed switch is failsafe with
respect to an interrupt of the switch connection. Switches which can be used are:

- mechanical switches,

- photo interrupters, or

- hall sensors.

Be careful to select reference switch resistors matching your switch requirements!
In case of long cables additional RC filtering might be required near the TMC5160 reference inputs.
Adding an RC filter will also reduce the danger of destroying the logic level inputs by wiring faults,
but it will add a certain delay which should be considered with respect to the application.

IMPLEMENTING A HOMING PROCEDURE

1. Make sure, that the home switch is not pressed, e.g. by moving away from the switch.

2. Activate position latching upon the desired switch event and activate motor (soft) stop upon

active switch. StallGuard based homing requires using a hard stop (en_softstop=0).

3. Start a motion ramp into the direction of the switch. (Move to a more negative position for a left

switch, to a more positive position for a right switch). You may timeout this motion by using a
position ramping command.

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4. As soon as the switch is hit, the position becomes latched and the motor is stopped. Wait until

the motor is in standstill again by polling the actual velocity VACTUAL or checking vzero or the
standstill flag.

5. Switch the ramp generator to hold mode and calculate the difference between the latched

position and the actual position. For StallGuard based homing or when using hard stop, XACTUAL
stops exactly at the home position, so there is no difference (0).

6. Write the calculated difference into the actual position register. Now, homing is finished. A move

to position 0 will bring back the motor exactly to the switching point. In case StallGuard was
used for homing, read and write back RAMP_STAT to clear the StallGuard stop event event_stop_sg
and release the motor from the stop condition.

HOMING WITH A THIRD SWITCH

Some applications use an additional home switch, which operates independently of the mechanical
limit switches. The encoder functionality of the TMC5160 provides an additional source for position
latching. It allows using the N channel input to snapshot XACTUAL with a rising or falling edge event,
or both. This function also provides an interrupt output.

1. Activate the latching function (ENCMODE: Set ignoreAB, clr_cont, neg_edge or pos_edge and

latch_x_act). The latching function can then trigger the interrupt output (check by reading n_event
in ENC_STATUS when interrupt is signaled at DIAG0).

2. Move to the direction, where the N channel switch should be. In case the motor hits a stop

switch (REFL or REFR) before the home switch is detected, reverse the motion direction.

3. Read out XLATCH once the switch has been triggered. It gives the position of the switch event.

4. After detection of the switch event, stop the motor, and subtract XLATCH from the actual position.

Read and write back ENC_STAT to clear the status flags. (A detailed description of the required
steps is in the homing procedure above.)

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13 StallGuard2 Load Measurement

StallGuard2 provides an accurate measurement of the load on the motor. It can be used for stall
detection as well as other uses at loads below those which stall the motor, such as CoolStep load­adaptive current reduction. The StallGuard2 measurement value changes linearly over a wide range of
load, velocity, and current settings, as shown in Figure 13.1. At maximum motor load, the value goes
to zero or near to zero. This corresponds to a load angle of 90° between the magnetic field of the
coils and magnets in the rotor. This also is the most energy-efficient point of operation for the motor.

motor load

(% max. torque)

stallGuard2

reading

100

200

300

400

500

600

700

800

900

1000

0 10 20 30 40 50 60 70 80 90 100

Start value depends
on motor and
operating conditions

Motor stalls above this point.
Load angle exceeds 90° and
available torque sinks.

stallGuard value reaches zero

and indicates danger of stall.

This point is set by stallGuard

threshold value SGT.

Figure 13.1 Function principle of StallGuard2

Parameter

Description

Setting

Comment

SGT

This signed value controls the StallGuard2
threshold level for stall detection and sets the
optimum measurement range for readout. A
lower value gives a higher sensitivity. Zero is the
starting value working with most motors. A
higher value makes StallGuard2 less sensitive and
requires more torque to indicate a stall.

0

indifferent value
+1… +63

less sensitivity

-1… -64

higher sensitivity

sfilt

Enables the StallGuard2 filter for more precision
of the measurement. If set, reduces the
measurement frequency to one measurement per
electrical period of the motor (4 fullsteps).

0

standard mode

1

filtered mode

Status word

Description

Range

Comment

SG_RESULT

This is the StallGuard2 result. A higher reading
indicates less mechanical load. A lower reading
indicates a higher load and thus a higher load
angle. Tune the SGT setting to show a SG_RESULT
reading of roughly 0 to 100 at maximum load
before motor stall.

0… 1023

0: highest load
low value: high load
high value: less load

Hint

In order to use StallGuard2 and CoolStep, the StallGuard2 sensitivity should first be tuned using the
SGT setting!

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13.1 Tuning StallGuard2 Threshold SGT

The StallGuard2 value SG_RESULT is affected by motor-specific characteristics and application-specific
demands on load and velocity. Therefore the easiest way to tune the StallGuard2 threshold SGT for a
specific motor type and operating conditions is interactive tuning in the actual application.

INITIAL PROCEDURE FOR TUNING STALLGUARD SGT

1. Operate the motor at the normal operation velocity for your application and monitor SG_RESULT.

2. Apply slowly increasing mechanical load to the motor. If the motor stalls before SG_RESULT

reaches zero, decrease SGT. If SG_RESULT reaches zero before the motor stalls, increase SGT. A
good SGT starting value is zero. SGT is signed, so it can have negative or positive values.

3. Set TCOOLTHRS to a value above TSTEP and enable sg_stop to enable the stop on stall feature.

Make sure, that the motor is safely stopped whenever it is stalled. Increase SGT if the motor
becomes stopped before a stall occurs. Restart the motor by disabling sg_stop or by reading and
writing back the RAMP_STAT register (write+clear function).

4. The optimum setting is reached when SG_RESULT is between 0 and roughly 100 at increasing load

shortly before the motor stalls, and SG_RESULT increases by 100 or more without load. SGT in
most cases can be tuned for a certain motion velocity or a velocity range. Make sure, that the
setting works reliable in a certain range (e.g. 80% to 120% of desired velocity) and also under
extreme motor conditions (lowest and highest applicable temperature).

OPTIONAL PROCEDURE ALLOWING AUTOMATIC TUNING OF SGT

The basic idea behind the SGT setting is a factor, which compensates the StallGuard measurement for
resistive losses inside the motor. At standstill and very low velocities, resistive losses are the main
factor for the balance of energy in the motor, because mechanical power is zero or near to zero. This
way, SGT can be set to an optimum at near zero velocity. This algorithm is especially useful for tuning
SGT within the application to give the best result independent of environment conditions, motor
stray, etc.

1. Operate the motor at low velocity < 10 RPM (i.e. a few to a few fullsteps per second) and target

operation current and supply voltage. In this velocity range, there is not much dependence of
SG_RESULT on the motor load, because the motor does not generate significant back EMF.
Therefore, mechanical load will not make a big difference on the result.

2. Switch on sfilt. Now increase SGT starting from 0 to a value, where SG_RESULT starts rising. With

a high SGT, SG_RESULT will rise up to the maximum value. Reduce again to the highest value,
where SG_RESULT stays at 0. Now the SGT value is set as sensibly as possible. When you see
SG_RESULT increasing at higher velocities, there will be useful stall detection.

The upper velocity for the stall detection with this setting is determined by the velocity, where the
motor back EMF approaches the supply voltage and the motor current starts dropping when further
increasing velocity.

SG_RESULT goes to zero when the motor stalls and the ramp generator can be programmed to stop
the motor upon a stall event by enabling sg_stop in SW_MODE. Set TCOOLTHRS to match the lower
velocity threshold where StallGuard delivers a good result in order to use sg_stop.

The power supply voltage also affects SG_RESULT, so tighter voltage regulation results in more
accurate values. StallGuard measurement has a high resolution, and there are a few ways to enhance
its accuracy, as described in the following sections.

Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.
For detail procedure see Application Note AN002 - Parameterization of StallGuard2 & CoolStep

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13.1.1 Variable Velocity Limits TCOOLTHRS and THIGH

The SGT setting chosen as a result of the previously described SGT tuning can be used for a certain
velocity range. Outside this range, a stall may not be detected safely, and CoolStep might not give the
optimum result.

back EMF reaches

supply voltage

optimum

SGT setting

Motor RPM

(200 FS motor)

stallGuard2

reading at

no load

2

4

6

8

10

12

14

16

100

200

300

400

500

600

700

800

900

10001820

0 0 50 100 150 200 250 300 350 400 450 500 550 600

lower limit for stall

detection

good operation

range with single

SGT setting

Figure 13.2 Example: optimum SGT setting and StallGuard2 reading with an example motor

In many applications, operation at or near a single operation point is used most of the time and a
single setting is sufficient. The driver provides a lower and an upper velocity threshold to match this.
The stall detection is disabled outside the determined operation point, e.g. during acceleration phases
preceding a sensorless homing procedure when setting TCOOLTHRS to a matching value. An upper
limit can be specified by THIGH.

In some applications, a velocity dependent tuning of the SGT value can be expedient, using a small
number of support points and linear interpolation.

13.1.2 Small Motors with High Torque Ripple and Resonance

Motors with a high detent torque show an increased variation of the StallGuard2 measurement value
SG with varying motor currents, especially at low currents. For these motors, the current dependency
should be checked for best result.

13.1.3 Temperature Dependence of Motor Coil Resistance

Motors working over a wide temperature range may require temperature correction, because motor
coil resistance increases with rising temperature. This can be corrected as a linear reduction of SGT at
increasing temperature, as motor efficiency is reduced.

13.1.4 Accuracy and Reproducibility of StallGuard2 Measurement

In a production environment, it may be desirable to use a fixed SGT value within an application for
one motor type. Most of the unit-to-unit variation in StallGuard2 measurements results from manu­facturing tolerances in motor construction. The measurement error of StallGuard2 – provided that all
other parameters remain stable – can be as low as:

 󰇛󰇜

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13.2 StallGuard2 Update Rate and Filter

The StallGuard2 measurement value SG_RESULT is updated with each full step of the motor. This is
enough to safely detect a stall, because a stall always means the loss of four full steps. In a practical
application, especially when using CoolStep, a more precise measurement might be more important
than an update for each fullstep because the mechanical load never changes instantaneously from
one step to the next. For these applications, the sfilt bit enables a filtering function over four load
measurements. The filter should always be enabled when high-precision measurement is required. It
compensates for variations in motor construction, for example due to misalignment of the phase A to
phase B magnets. The filter should be disabled when rapid response to increasing load is required
and for best results of sensorless homing using StallGuard.

13.3 Detecting a Motor Stall

For best stall detection, work without StallGuard filtering (sfilt=0). To safely detect a motor stall the
stall threshold must be determined using a specific SGT setting. Therefore, the maximum load needs
to be determined, which the motor can drive without stalling. At the same time, monitor the
SG_RESULT value at this load, e.g. some value within the range 0 to 100. The stall threshold should be
a value safely within the operating limits, to allow for parameter stray. The response at an SGT
setting at or near 0 gives some idea on the quality of the signal: Check the SG value without load and
with maximum load. They should show a difference of at least 100 or a few 100, which shall be large
compared to the offset. If you set the SGT value in a way, that a reading of 0 occurs at maximum
motor load, the stall can be automatically detected by the motion controller to issue a motor stop. In
the moment of the step resulting in a step loss, the lowest reading will be visible. After the step loss,
the motor will vibrate and show a higher SG_RESULT reading.

13.4 Homing with StallGuard

The homing of a linear drive requires moving the motor into the direction of a hard stop. As
StallGuard needs a certain velocity to work (as set by TCOOLTHRS), make sure that the start point is
far enough away from the hard stop to provide the distance required for the acceleration phase. After
setting up SGT and the ramp generator registers, start a motion into the direction of the hard stop
and activate the stop on stall function (set sg_stop in SW_MODE). Once a stall is detected, the ramp
generator stops motion and sets VACTUAL zero, stopping the motor. The stop condition also is
indicated by the flag StallGuard in DRV_STATUS. After setting up new motion parameters in order to
prevent the motor from restarting right away, StallGuard can be disabled, or the motor can be re­enabled by reading and writing back RAMP_STAT. The write and clear function of the event_stop_sg
flag in RAMP_STAT restarts the motor after expiration of TZEROWAIT in case the motion parameters
have not been modified. Best results are yielded at 30% to 70% of nominal motor current and
typically 1 to 5 RPS (motors smaller than NEMA17 may require higher velocities).

13.5 Limits of StallGuard2 Operation

StallGuard2 does not operate reliably at extreme motor velocities: Very low motor velocities (for many
motors, less than one revolution per second) generate a low back EMF and make the measurement
unstable and dependent on environment conditions (temperature, etc.). The automatic tuning
procedure described above will compensate for this. Other conditions will also lead to extreme
settings of SGT and poor response of the measurement value SG_RESULT to the motor load.

Very high motor velocities, in which the full sinusoidal current is not driven into the motor coils also
leads to poor response. These velocities are typically characterized by the motor back EMF reaching
the supply voltage.

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14 CoolStep Operation

CoolStep is an automatic smart energy optimization for stepper motors based on the motor
mechanical load, making them “green”.

14.1 User Benefits

CoolStep allows substantial energy savings, especially for motors which see varying loads or operate
at a high duty cycle. Because a stepper motor application needs to work with a torque reserve of 30%
to 50%, even a constant-load application allows significant energy savings because CoolStep
automatically enables torque reserve when required. Reducing power consumption keeps the system
cooler, increases motor life, and allows reducing cost in the power supply and cooling components.

Reducing motor current by half results in reducing power by a factor of four.

14.2 Setting up for CoolStep

CoolStep is controlled by several parameters, but two are critical for understanding how it works:

Parameter

Description

Range

Comment

SEMIN

4-bit unsigned integer that sets a lower threshold.
If SG goes below this threshold, CoolStep
increases the current to both coils. The 4-bit
SEMIN value is scaled by 32 to cover the lower
half of the range of the 10-bit SG value. (The
name of this parameter is derived from
smartEnergy, which is an earlier name for
CoolStep.)

0

disable CoolStep

1…15

threshold is SEMIN*32

SEMAX

4-bit unsigned integer that controls an upper
threshold. If SG is sampled equal to or above this

threshold enough times, CoolStep decreases the
current to both coils. The upper threshold is
(SEMIN + SEMAX + 1)*32.

0…15

threshold is
(SEMIN+SEMAX+1)*32

Figure 14.1 shows the operating regions of CoolStep:

- The black line represents the SG measurement value.

- The blue line represents the mechanical load applied to the motor.

- The red line represents the current into the motor coils.

When the load increases, SG_RESULT falls below SEMIN, and CoolStep increases the current. When the
load decreases, SG_RESULT rises above (SEMIN + SEMAX + 1) * 32, and the current is reduced.

Energy efficiency

–

consumption decreased up to 75%

Motor generates less heat

–

improved mechanical precision

Less cooling infrastructure

–

for motor and driver

Cheaper motor

–

does the job!

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stallGuard2

reading

0=maximum load

motor current increment area

motor current reduction area

stall possible

SEMIN

SEMAX+SEMIN+1

Zeit

motor current

current setting I_RUN
(upper limit)

½ or ¼ I_RUN
(lower limit)

mechanical load

current increment due to

increased load

slow current reduction due

to reduced motor load

load angle optimized load angle optimized

load

angle

optimized

Figure 14.1 CoolStep adapts motor current to the load

Five more parameters control CoolStep and one status value is returned:

Parameter

Description

Range

Comment

SEUP

Sets the current increment step. The current
becomes incremented for each measured
StallGuard2 value below the lower threshold.

0…3

step width is
1, 2, 4, 8

SEDN

Sets the number of StallGuard2 readings above
the upper threshold necessary for each current
decrement of the motor current.

0…3

number of StallGuard2
measurements per
decrement:
32, 8, 2, 1

SEIMIN

Sets the lower motor current limit for CoolStep
operation by scaling the IRUN current setting.

0

0: 1/2 of IRUN

1

1: 1/4 of IRUN

TCOOL
THRS

Lower velocity threshold for switching on
CoolStep and stop on stall. Below this velocity
CoolStep becomes disabled (not used in STEP/DIR
mode). Adapt to the lower limit of the velocity
range where StallGuard2 gives a stable result.

Hint: May be adapted to disable CoolStep during
acceleration and deceleration phase by setting
identical to VMAX.

1…
2^20-1

Specifies lower CoolStep
velocity by comparing
the threshold value to

TSTEP

THIGH

Upper velocity threshold value for CoolStep and
stop on stall. Above this velocity CoolStep
becomes disabled. Adapt to the velocity range
where StallGuard2 gives a stable result.

1…
2^20-1

Also controls additional
functions like switching
to fullstepping.

Status
word

Description

Range

Comment

CSACTUAL

This status value provides the actual motor
current scale as controlled by CoolStep. The value

goes up to the IRUN value and down to the
portion of IRUN as specified by SEIMIN.

0…31

1/32, 2/32, … 32/32

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14.3 Tuning CoolStep

Before tuning CoolStep, first tune the StallGuard2 threshold level SGT, which affects the range of the
load measurement value SG_RESULT. CoolStep uses SG_RESULT to operate the motor near the
optimum load angle of +90°.

The current increment speed is specified in SEUP, and the current decrement speed is specified in
SEDN. They can be tuned separately because they are triggered by different events that may need
different responses. The encodings for these parameters allow the coil currents to be increased much
more quickly than decreased, because crossing the lower threshold is a more serious event that may
require a faster response. If the response is too slow, the motor may stall. In contrast, a slow
response to crossing the upper threshold does not risk anything more serious than missing an
opportunity to save power.

CoolStep operates between limits controlled by the current scale parameter IRUN and the seimin bit.

14.3.1 Response Time

For fast response to increasing motor load, use a high current increment step SEUP. If the motor load
changes slowly, a lower current increment step can be used to avoid motor oscillations. If the filter
controlled by sfilt is enabled, the measurement rate and regulation speed are cut by a factor of four.

Hint
The most common and most beneficial use is to adapt CoolStep for operation at the typical system
target operation velocity and to set the velocity thresholds according. As acceleration and
decelerations normally shall be quick, they will require the full motor current, while they have only a
small contribution to overall power consumption due to their short duration.

14.3.2 Low Velocity and Standby Operation

Because CoolStep is not able to measure the motor load in standstill and at very low RPM, a lower
velocity threshold is provided in the ramp generator. It should be set to an application specific
default value. Below this threshold the normal current setting via IRUN respectively IHOLD is valid. An
upper threshold is provided by the VHIGH setting. Both thresholds can be set as a result of the
StallGuard2 tuning process.

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15 STEP/DIR Interface

The STEP and DIR inputs provide a simple, standard interface compatible with many existing motion
controllers. The MicroPlyer STEP pulse interpolator brings the smooth motor operation of high­resolution microstepping to applications originally designed for coarser stepping. In case an external
step source is used, the complete integrated motion controller can be switched off. The only motion
controller registers remaining active in this case are the current settings in register IHOLD_IRUN.

15.1 Timing

Figure 15.1 shows the timing parameters for the STEP and DIR signals, and the table below gives
their specifications. When the dedge mode bit in the CHOPCONF register is set, both edges of STEP
are active. If dedge is cleared, only rising edges are active. STEP and DIR are sampled and
synchronized to the system clock. An internal analog filter removes glitches on the signals, such as
those caused by long PCB traces. If the signal source is far from the chip, and especially if the signals
are carried on cables, the signals should be filtered or differentially transmitted.

+VCC_IO

SchmittTrigger

0.44 VCC_IO

0.56 VCC_IO

83k

C

Input filter

R*C = 20ns +-30%

STEP

or DIR

Input

Internal
Signal

DIR

STEP

t

DSH

t

SH

t

SL

t

DSU

Active edge

(DEDGE=0)

Active edge

(DEDGE=0)

Figure 15.1 STEP and DIR timing, Input pin filter

STEP and DIR interface timing

AC-Characteristics

clock period is t

CLK

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

step frequency (at maximum
microstep resolution)

f

STEP

dedge=0

½ f

CLK

dedge=1

¼ f

CLK

fullstep frequency

fFS f

CLK

/512

STEP input low time *)

tSL

max(t

FILTSD

,

t

CLK

+20)

100

ns

STEP input high time *)

t

SH

max(t

FILTSD

,

t

CLK

+20)

100

ns

DIR to STEP setup time

t

DSU

20

ns

DIR after STEP hold time

t

DSH

20

ns

STEP and DIR spike filtering time
*)

t

FILTSD

rising and falling
edge

13

20

30

ns

STEP and DIR sampling relative
to rising CLK input

t

SDCLKHI

before rising edge
of CLK input

t

FILTSD

ns

*) These values are valid with full input logic level swing, only. Asymmetric logic levels will increase
filtering delay t

FILTSD

, due to an internal input RC filter.

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15.2 Changing Resolution

The TMC5160 includes an internal microstep table with 1024 sine wave entries to generate sinusoidal
motor coil currents. These 1024 entries correspond to one electrical revolution or four fullsteps. The
microstep resolution setting determines the step width taken within the table. Depending on the DIR
input, the microstep counter is increased (DIR=0) or decreased (DIR=1) with each STEP pulse by the
step width. The microstep resolution determines the increment respectively the decrement. At
maximum resolution, the sequencer advances one step for each step pulse. At half resolution, it
advances two steps. Increment is up to 256 steps for fullstepping. The sequencer has special
provision to allow seamless switching between different microstep rates at any time. When switching
to a lower microstep resolution, it calculates the nearest step within the target resolution and reads
the current vector at that position. This behavior especially is important for low resolutions like
fullstep and halfstep, because any failure in the step sequence would lead to asymmetrical run when
comparing a motor running clockwise and counterclockwise.

EXAMPLES:

Fullstep: Cycles through table positions: 128, 384, 640 and 896 (45°, 135°, 225° and 315° electrical

position, both coils on at identical current). The coil current in each position
corresponds to the RMS-Value (0.71 * amplitude). Step size is 256 (90° electrical)

Half step: The first table position is 64 (22.5° electrical), Step size is 128 (45° steps)
Quarter step: The first table position is 32 (90°/8=11.25° electrical), Step size is 64 (22.5° steps)

This way equidistant steps result and they are identical in both rotation directions. Some older drivers
also use zero current (table entry 0, 0°) as well as full current (90°) within the step tables. This kind of
stepping is avoided because it provides less torque and has a worse power dissipation in driver and
motor.

Step position

table position

current coil A

current coil B

Half step 0

64

38.3%

92.4%

Full step 0

128

70.7%

70.7%

Half step 1

192

92.4%

38.3%

Half step 2

320

92.4%

-38.3%

Full step 1

384

70.7%

-70.7%

Half step 3

448

38.3%

-92.4%

Half step 4

576

-38.3%

-92.4%

Full step 2

640

-70.7%

-70.7%

Half step 5

704

-92.4%

-38.3%

Half step 6

832

-92.4%

38.3%

Full step 3

896

-70.7%

70.7%

Half step 7

960

-38.3%

92.4%

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15.3 MicroPlyer and Stand Still Detection

For each active edge on STEP, MicroPlyer produces microsteps at 256x resolution, as shown in Figure

15.2. It interpolates the time in between of two step impulses at the step input based on the last
step interval. This way, from 2 microsteps (128 microstep to 256 microstep interpolation) up to 256
microsteps (full step input to 256 microsteps) are driven for a single step pulse.

Enable MicroPlyer by setting the intpol bit in the CHOPCONF register.
GCONF.faststandstill allows reduction of standstill detection time to 2^18 clocks (~20ms)

The step rate for the interpolated 2 to 256 microsteps is determined by measuring the time interval of
the previous step period and dividing it into up to 256 equal parts. The maximum time between two
microsteps corresponds to 220 (roughly one million system clock cycles), for an even distribution of
256 microsteps. At 12 MHz system clock frequency, this results in a minimum step input frequency of
12 Hz for MicroPlyer operation (50 Hz with faststandstill = 1). A lower step rate causes the STST bit to
be set, which indicates a standstill event. At that frequency, microsteps occur at a rate of (system
clock frequency)/216 ~ 256 Hz. When a stand still is detected, the driver automatically switches the
motor to holding current IHOLD.

Hint

MicroPlyer only works perfectly with a stable STEP frequency. Do not use the dedge option if the STEP
signal does not have a 50% duty cycle.

STEP

Interpolated

microstep

Active edge

(dedge=0)

Active edge

(dedge=0)

Active edge

(dedge=0)

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 32

Active edge

(dedge=0)

STANDSTILL

(stst) active

33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Motor

angle

52 53 54 55 56 57 58 59 60 61 62 63 64 65 6651

2^20 t

CLK

Figure 15.2 MicroPlyer microstep interpolation with rising STEP frequency (Example: 16 to 256)

In Figure 15.2, the first STEP cycle is long enough to set the standstill bit stst. This bit is cleared on
the next STEP active edge. Then, the external STEP frequency increases. After one cycle at the higher
rate MicroPlyer adapts the interpolated microstep rate to the higher frequency. During the last cycle at
the slower rate, MicroPlyer did not generate all 16 microsteps, so there is a small jump in motor
angle between the first and second cycles at the higher rate. With the flag GCONF.faststandstill
enabled, standstill detection is after 2^18 clocks (rather than 2^20 clocks) without step pulse. This
allows faster current reduction for energy saving in drives with short stand still times.

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16 DIAG Outputs

16.1 STEP/DIR Mode

Operation with an external motion controller often requires quick reaction to certain states of the
stepper motor driver. Therefore, the DIAG outputs supply a configurable set of different real time
information complementing the STEP/DIR interface.

Both, the information available at DIAG0 and DIAG1 can be selected as well as the type of output
(low active open drain – default setting, or high active push-pull). In order to determine a reset of the
driver, DIAG0 always shows a power-on reset condition by pulling low during a reset condition.
Figure 16.1 shows the available signals and control bits.

DIAG1

DIAG0

PMD

PDD

PDD=100k pulldown
PMD=50k to VCC/2

Power-on reset

Driver error

diag0_error

Overtemp. prewarning

diag0_otpw

Stall

diag0_stall

diag0_pushpull

Sequencer microstep 0 index

diag1_index

Chopper on-state

diag1_onstate

diag1_steps_skipped

diag1_pushpull

diag1_stall

dcStep steps skipped

Figure 16.1 DIAG outputs in STEP/DIR mode

The stall output signal allows StallGuard2 to be handled by the external motion controller like a stop
switch. The index output signals the microstep counter zero position, to allow the application to
reference the drive to a certain current pattern. Chopper on-state shows the on-state of both coil
choppers (alternating) when working in SpreadCycle or constant off time in order to determine the
duty cycle. The DcStep skipped information is an alternative way to find out when DcStep runs with a
velocity below the step velocity. It toggles with each step not taken by the sequencer.

Attention

The duration of the index pulse corresponds to the duration of the microstep. When working without
interpolation at less than 256 microsteps, the index time goes down to two CLK clock cycles.

16.2 Motion Controller Mode

In motion controller mode, the DIAG outputs deliver a position compare signal to allow exact
triggering of external logic, and an interrupt signal in order to trigger software to certain conditions
within the motion ramp. Either an open drain (active low) output signal can be chosen (default), or an
active high push-pull output signal. When using the open drain output, an external pull up resistor in
the range 4.7kΩ to 33kΩ is required. DIAG0 also becomes driven low upon a reset condition. However

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the end of the reset condition cannot be determined by monitoring DIAG0 in this configuration,
because event_pos_reached flag also becomes active upon reset and thus the pin stays actively low
after the reset condition. In order to safely determine a reset condition, monitor the reset flag by SPI
or read out any register to confirm that the chip is powered up.

DIAG1

DIAG0

PMD

PDD

PDD=100k pulldown

PMD=50k to VCC/2

Power-on reset

Toggle upon each step

diag0_step

diag0_pushpull

diag1_pushpull

event_pos_reached

event_stop_sg

event_stop_r

event_stop_l

N_event

Direction

diag1_dir

Position compare
XACTUAL = X_COMPARE

Interrupt-signal

deviation_warn

Figure 16.2 DIAG outputs with SD_MODE=0

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17 DcStep

DcStep is an automatic commutation mode for the stepper motor. It allows the stepper to run with
its target velocity as commanded by the ramp generator as long as it can cope with the load. In case
the motor becomes overloaded, it slows down to a velocity, where the motor can still drive the load.
This way, the stepper motor never stalls and can drive heavy loads as fast as possible. Its higher
torque available at lower velocity, plus dynamic torque from its flywheel mass allow compensating
for mechanical torque peaks. In case the motor becomes completely blocked, the stall flag becomes
set.

17.1 User Benefits

17.2 Designing-In DcStep

In a classical application, the operation area is limited by the maximum torque required at maximum
application velocity. A safety margin of up to 50% torque is required, in order to compensate for
unforeseen load peaks, torque loss due to resonance and aging of mechanical components. DcStep
allows using up to the full available motor torque. Even higher short time dynamic loads can be
overcome using motor and application flywheel mass without the danger of a motor stall. With
DcStep the nominal application load can be extended to a higher torque only limited by the safety
margin near the holding torque area (which is the highest torque the motor can provide).
Additionally, maximum application velocity can be increased up to the actually reachable motor
velocity.

Classic operation area

with safety margin

torque

velocity [RPM]

dcStep operation - no step loss can occur

additional flywheel mass torque reserve

microstep
operation

0

M

NOM1

M

MAX

VDCMIN

VMAX

M

NOM

: Nominal torque required by application

M

MAX

: Motor pull-out torque at v=0

application area

max

.

motor torque

safety margin

dcStep extended

Safety margin:

Classical application operation area is limited by a certain
percentage of motor pull-out torque

M

NOM2

Figure 17.1 DcStep extended application operation area

Quick Start

For a quick start, see the Quick Configuration Guide in chapter 22.
For detail configuration procedure see Application Note AN003 - DcStep

Motor

–

never loses steps

Application

–

works as fast as possible

Acceleration

–

automatically as high as possible

Energy efficiency

–

highest at speed limit

Cheaper motor

–

does the job!

TMC5160/TMC5160A DATASHEET (Rev. 1.14 / 2020-MAY-19) 100

www.trinamic.com

17.3 DcStep Integration with the Motion Controller

DcStep requires only a few settings. It directly feeds back motor motion to the ramp generator, so
that it becomes seamlessly integrated into the motion ramp, even if the motor becomes overloaded
with respect to the target velocity. DcStep operates the motor in fullstep mode at the ramp generator
target velocity VACTUAL or at reduced velocity if the motor becomes overloaded. It requires setting
the minimum operation velocity VDCMIN. VDCMIN shall be set to the lowest operating velocity where
DcStep gives a reliable detection of motor operation. The motor never stalls unless it becomes braked
to a velocity below VDCMIN. In case the velocity should fall below this value, the motor would restart
once its load is released, unless the stall detection becomes enabled (set sg_stop). Stall detection is
covered by StallGuard2.

v

t

dcStep active

VDCMIN

0

V1

VMAX

AMAX

DMAX

D

1

A

1

Nominal ramp profile Ramp profile with torque overload and same target position

overload

Figure 17.2 Velocity profile with impact by overload situation

Hint

DcStep requires that the phase polarity of the sine wave is positive within the MSCNT range 768 to
255 and negative within 256 to 767. The cosine polarity must be positive from 0 to 511 and negative
from 512 to 1023. A phase shift by 1 would disturb DcStep operation. Therefore it is advised to work
with the default wave. Please refer chapter 18.2 for an initialization with the default table.

17.4 Stall Detection in DcStep Mode

While DcStep is able to decelerate the motor upon overload, it cannot avoid a stall in every operation
situation. Once the motor is blocked, or it becomes decelerated below a motor dependent minimum
velocity where the motor operation cannot safely be detected any more, the motor may stall and
loose steps. In order to safely detect a step loss and avoid restarting of the motor, the stop on stall
can be enabled (set flag sg_stop). In this case VACTUAL becomes set to zero once the motor is stalled.
It remains stopped until reading the RAMP_STAT status flags. The flag event_stop_sg shows the active
stop condition. A StallGuard2 load value also is available during DcStep operation. The range of
values is limited to 0 to 255, in certain situations up to 511 will be read out. In order to enable
StallGuard, also set TCOOLTHRS corresponding to a velocity slightly above VDCMIN or up to VMAX.

Stall detection in this mode may trigger falsely due to resonances, when flywheel loads are loosely
coupled to the motor axis.