Trimble 642356X B1 User Manual

Product Overview T3130-8XV10PO5-7600

Jan 2007

PBA 31308

Bluetooth QD ID: B012097/B012098

UniStone

BlueMoon Universal Platform

Never stop thinking.

Edition 2007-01-31

Published by Infineon Technologies AG 81726 Munich, Germany

Attention please!

The information herein is given to describe certain components and shall not be considered as warranted characteristics.

Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding

circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).

Warnings

Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office.

Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

For questions on technology, delivery and prices, please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http://www.infineon.com

ABM

, AOP®, ARCOFI®, ARCOFI®-BA, ARCOFI®-SP, DigiTape®, EPIC®-1, EPIC®-S, ELIC®, FALC®54, FALC®56, FALC®-E1, FALC®-LH, IDEC®, IOM®, IOM®-1, IOM®-2, IPAT®-2, ISAC®-P, ISAC®-S, ISAC®-S TE, ISAC®-P TE, ITAC®, IWE®, MUSAC®-A, OCTAT®-P, QUAT®-S, SICAT®, SICOFI®, SICOFI®-2, SICOFI®-4, SICOFI®-4µC, SLICOFI® are registered trademarks of Infineon Technologies AG.

ACE™, ASM™, ASP™, POTSWIRE™, QuadFALC™, SCOUT™ are trademarks of Infineon Technologies AG.

ARM, the ARM Powered logo, Thumb and StrongARM are registered trademarks of ARM Limited. The ARM logo, AMBA, ARMulator, EmbeddedICE, ModulGen, Multi-ICE, PrimeCell, ARM7TDMI, ARM7TDMI-S, ARM9TDMI, TDMI and STRONG are trademarks of ARM Limited.

The Bluetooth® word mark is owned by the Bluetooth SIG, Inc. and any use of this mark by Infineon Technologies AG is under license.

The BlueMoon® trade mark is owned by Infineon Technologies AG.

UniStone

PBA 31308

Revision History: 2007-01-31 T3130-8XV10PO5-7600

Previous Version:

Section

Subjects (major changes since last revision)

Product Overview 4 T3130-8XV10PO5-7600, 2007-01-31

UniStone

1 General Device Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.3 Pin Configuration LGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.4 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.5 System Integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

1.6 FW version . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2 Basic Operating Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.2 Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3 Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1 HCI / UART Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1.1 Supported Transport Layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1.2 UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1.2.1 Baud Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.2 PCM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.3 WLAN Coexistence Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4 General Device Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 HCI+ and Bluetooth Device Data (BD_DATA) . . . . . . . . . . . . . . . . . . . . . . 20

4.2 Manufacturer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.3 Firmware ROM Patching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.3.1 Patch Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5 Bluetooth Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.1 Supported Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.2 UniStone Specifics and Extensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.2.1 During Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.2.1.1 Scatternet and Piconet Capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.2.1.2 Role Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.2.1.3 Dynamic Polling Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.2.1.4 Adaptive Frequency Hopping (AFH) . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.2.1.5 Channel Quality Driven Data Rate Change (CQDDR) . . . . . . . . . . . 23

5.2.2 Synchronous Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.2.2.1 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5.2.2.2 Voice Coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5.2.3 RSSI and Output Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5.2.3.1 Received Signal Strength Indication (RSSI) . . . . . . . . . . . . . . . . . . . 24

5.2.3.2 Output Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5.2.3.3 Ultra Low Transmit Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Product Overview 5 T3130-8XV10PO5-7600, 2007-01-31

UniStone

6.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

6.2 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6.3 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6.3.1 Pad Driver and Input Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6.3.2 Pull-ups and Pull-downs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6.3.3 Protection Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6.4 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.4.1 Characteristics of 32.768 kHz Clock Signal . . . . . . . . . . . . . . . . . . . . . . 33

6.5 RF Part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.5.1 Characteristics RF Part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.5.1.1 Bluetooth Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

7 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

7.1 Package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

7.2 Production Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

7.2.1 Pin mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8 Acronyms & Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Product Overview 6 T3130-8XV10PO5-7600, 2007-01-31

UniStone

General Device Overview

1 General Device Overview

1.1 Features

General

• Complete Bluetooth 2.0 + EDR solution

• Ultra low power design in 0.13 µm CMOS

• Temperature range from -40°C to 85°C

• Integrates ARM7TDMI, RAM and patchable ROM

• On-module voltage regulators. External supply 2.9-4.1V

• On-module EEPROM with configureable data

• Reference clock included

• Low power clock from internal oscillator or external low power clock (e.g. 32.768 kHz)

• Dynamic low power mode switching

Interfaces

• 3.25 MBaud UART with transport layer detection (HCI UART, HCI Three-Wire UART)

• PCM/I2S interface for digital audio

• WLAN coexistence interface

• General purpose I/Os with interrupt capabilities. JTAG for boundary scan and debug

• Transmit power programmable from -45 dBm to 4.5 dBm

• Transmit power typ. 2.5 dBm (default settings)

• Receiver sensitivity typ. -86 dBm

• Integrated antenna switch, balun and antenna filter

• Integrated LNA with excellent blocking and intermodulation performance

• No external components except antenna

• Digital demodulation for optimum sensitivity and co-/adjacent channel performance

Bluetooth

• Piconet with seven slaves. Scatternet with two slave roles while still being visible

• SCO and eSCO with hardware accelerated audio signal processing

• Power control and RSSI. Hold, Park and Sniff.

• Adaptive Frequency Hopping, Quality of Service, Channel Quality Driven Data Rate

• Bluetooth security features: Authentication, Pairing and Encryption

• Bluetooth test mode and Infineon’s active Bluetooth tester mode

Product Overview 7 T3130-8XV10PO5-7600, 2007-01-31

UniStone

1.2 Block Diagram

UniStone

EEPROM

VDD_PCM

VDD_UA RT

UART - HCI

PCM1

supply

Low Po wer Cloc k

(Optional)

32.768 kHz

Voltage

Regu lator

Figure 1-1 Simplified block diagram of UniStone.

I2C

PMB8753 BlueMoon

UniCellular

26 MHz

Crystal

General Device Overview

Balun Filter

Product Overview 8 T3130-8XV10PO5-7600, 2007-01-31

UniStone

1.3 Pin Configuration LGA

0,6

F1 F2 F3 F4 F5 F6 F7 F8 F9

E1 E2 E3 E4 E5 E6 E7 E8 E9

D1 D2 D3 D4 D5 D6 D7 D8 D9

C1 C2 C3 C4 C5 C6 C7 C8 C9

B1 B2 B3 B4 B5 B6 B7 B8 B9

A2 A3 A4 A5 A6 A7 A8 A9

General Device Overview

11,6

1,2 1,01,0

1,35

1,2

1,35

0,6

Figure 1-2 Pin Configuration for UniStone in Top View (footprint)

1.4 Pin Description

The non-shaded cells indicate pins that will be fixed for the product lifetime. Shaded cells indicate that the pin might be removed/changed in future variants. All pins not listed below shall be not connected.

Product Overview 9 T3130-8XV10PO5-7600, 2007-01-31

UniStone

General Device Overview

Pin No. Symbol Input/

A2 P1.6 I/O/OD Internal1 Z Z Port 1.6

A3 RESET# AI Internal1 Input Input Hardware Reset

A8 P1.5/

B1 P1.7/

B2 P1.8/

B3 P1.0/

B4 P1.4/

B5 ONOFF I - - Turns off module completely

B9 SLEEPX I/O VDDUART PD H Sleep indication signal

C2 P0.9 I/O/OD Internal2 Z Z Port 0.9

C3 JTAG# I Internal2 PU PU Mode selection Port 1:

C4 TRST# I Internal2 PD PD JTAG interface

D1 P0.10 I/O/OD Internal2 Z Z Port 0.10

D2 P0.8 I/O/OD Internal2 PD PD Port 0.8

D3 P1.1/

D4 P0.3/

D5 P0.2/

D9 ANTENNA AI/AO inactive inactive RF input/output single ended

E1 P0.12/

E2 P0.13/

E3 P1.3/

E4 P0.0/

E5 P0.1/

CLK32

WAKEUP_BT

WAKEUP_HOST

TMS

RTCK

TCK

PCMOUT

PCMIN

SDA0

SCL0

TDO/ SLOT_STATE

PCMFR1

PCMCLK

Output

I/O/OD Internal1 Input Input Port 1.5 or

I/O/OD Internal1 PD/

I/O/OD Internal1 PD PD Port 1.8 or

I/O/OD Internal2 PU

I/O/OD Internal2 Z Z Port 1.4 or

I/O/OD Internal2 PU

I/O/OD VDDPCM Conf.

I/O/OD VDDPCM Z Z Port 0.2 or

I/O/OD Internal2 PU PU Port 0.12 or

I/O/OD Internal2 PU PU Port 0.13 or

I/O/OD Internal2 Z Z Port 1.3 or

I/O/OD VDDPCM PD PD Port 0.0 or

I/O/OD VDDPCM PD PD Port 0.1 or

Supply voltage

During

Reset

Input

PD def.

After

Reset

PD/ Input

Conf. PD def.

Function

LPM clock input (e.g.

32.768kHz)

Port 1.7 or Bluetooth wake-up signal

Host wake-up signal

Port 1.0 or JTAG interface

JTAG interface

0: JTAG 1: Port

Port 1.1 or JTAG interface

Port 0.3 or PCM data out

PCM data in

I2C data signal

I2C clock signal

JTAG interface or WLAN coexistence interface

PCM frame signal 1

PCM clock

Product Overview 10 T3130-8XV10PO5-7600, 2007-01-31

UniStone

Pin No. Symbol Input/

E6 P0.5/

F2 P1.2/

F3 P0.11/

F4 P0.14/

F5 P0.7/

F7 P0.4/

F8 P0.6/

A4, A5, A6 VSUPPLY SI - - Power supply

C1 VREG SO - - Regulated Power supply

F6 VDDUART SI - - UART interface Power supply

C5 VDDPCM SI - - PCM interface Power supply

A1, A7, A9, C8, C9, D7, D8, E8, E9, F1, F9

UARTRXD

TDI/ RF_ACTIVE

TX_CONF

UARTCTS

UARTTXD

UARTRTS

VSS - - Ground

Output

I/O/OD VDDUART Z Z Port 0.5 or

I/O/OD Internal2 PU

I/O/OD Internal2 Z Z Port 0.11or

I/O VDDUART Z Z Port 0.14 or

I/O/OD VDDUART Z Z Port 0.7 or

I/O/OD VDDUART PU PU Port 0.4 or

I/O/OD VDDUART PU PU Port 0.6 or

Supply voltage

During

Reset

General Device Overview

After

Reset

UART receive data

Port 1.2 or JTAG interface or WLAN coexistence interface

WLAN coexistence interface

UART CTS flow control

UART transmit data

UART RTS flow control

Function

1) Fixed pull-up/pull-down if JTAG interface is selected, not affected by any chip reset. If JTAG interface is not selected the port is tristate.

Descriptions of acronyms used in the pin list:

Acronym Description

I Input

O Output

OD Output with open drain capability

Z Tristate

PU Pull-up

PD Pull-down

A Analog (e.g. AI means analog input)

S Supply (e.g. SO means supply output)

Product Overview 11 T3130-8XV10PO5-7600, 2007-01-31

UniStone

General Device Overview

1.5 System Integration

UniStone is optimized for a low bill of material (BOM) and a small PCB size. Figure 1-3 shows a typical application example.

HOST

UARTRTS UARTTXD

UARTPCM / I2S

UARTRXD UARTCTS

PCMCLK PCMFR1 PCMIN PCMOUT

WAKEUP_HOST WAKEUP_BT RESET# CLK32

VDDSUP

Power Supply

UniStone

VDDUART

VDDPCM

ANTENNA

TX_CONF

RF_ACTIVE

SLOT_STATE

WLAN

Subsystem

Optional

Figure 1-3 Example Bluetooth System

The UART interface is used for Bluetooth HCI communication between the host and UniStone. When the HCI UART transport layer is used, four interface lines are needed: two for data (UARTTXD and UARTRXD) and two for hardware flow control (UARTRTS and UARTCTS). When the HCI Three-Wire UART transport layer is used the hardware flow control lines are optional. In addition to the standard Bluetooth HCI commands, UniStone supports a set of Infineon specific commands called HCI+.

Digital audio can either be sent over the HCI interface or over the dedicated PCM/I2S interface. The PCM/I2S interface is highly configurable.

Low power mode control of UniStone and the host can be implemented in different ways, either using the dedicated WAKEUP_HOST and WAKEUP_BT signals or using signaling over the HCI interface. The host can reset UniStone via the RESET# signal.

A low power clock can be connected to CLK32 or generated internally by a low power oscillator. Power is supplied to a single VSUPPLY input from which internal regulators can generate all required voltages. The UART and the PCM interfaces have separate supply voltages so that they can comply with host signaling.

Product Overview 12 T3130-8XV10PO5-7600, 2007-01-31

UniStone

If a WLAN subsystem is collocated with UniStone the WLAN coexistence interface should be used to enhance Bluetooth and WLAN performance. To coexist with external WLAN devices UniStone supports adaptive frequency hopping.

General Device Overview

1.6 FW version

UniStone is available in different versions. Please check corresponding release documents for latest information.

Product Overview 13 T3130-8XV10PO5-7600, 2007-01-31

UniStone

Basic Operating Information

2 Basic Operating Information

2.1 Power Supply

BlueMoon UniCellular is supplied from a single supply voltage VSUPPLY. This supply voltage must always be present. The Bluemoon UniCellular chip is supplied from an internally generated 2.5 V supply voltage. This voltage can be accessed from the VREG pin. This voltage may not be used for supplying other components in the host system but can be used for referencing the host interfaces.

The PCM interface and the UART interface are supplied with dedicated, independent, reference levels via the VDDPCM and VDDUART pins. All other digital I/O pins are supplied internally by either 2.5 V (Internal2) or 1.5 V(Internal1). Section 1.4 provides a mapping between pins and supply voltages.

The I/O power domains (VDDPCM and VDDUART) are completely separated from the other power domains and can stay present also in low power modes.

2.2 Clocking

BlueMoon UniCellular has one clock input CLK32 that is optional. If used this 32.768 kHz clock must always be present to assist BlueMoon UniCellular to keep the time in low power modes.

The low power clock can be generated internally by the crystal oscillator and/or the low power oscillator or provided externally.

Product Overview 14 T3130-8XV10PO5-7600, 2007-01-31

+ 30 hidden pages