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Warning
A working knowledge of electronics and PC-technology is required to use this
product.
Pay attention to electrostatic discharges. Use a CMOS protected workplace.
Disconnect power source when connecting any cables or devices.
This is a high-technology product.
A working knowledge of electronics and
PC-technology is required!
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Table of contents
CHAPTER 1:GENERAL INFORMATION ............................................................................................................. 4
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CHAPTER 1:GENERAL INFORMATION
1.1General Description
The MZ-6SER is an embedded system controller measuring just 3.63 inches x 4.86 inches,
which incorporates the revolutionary ZFx86 “PC-on-a-chip” processor. The MZ-6SER offers
the quickest route of integrating a full x86 AT-compatible computer into your embedded control
application. In addition, the built-in peripherals minimize the number of additional modules
required. By combining the system hardware, I/O, software, and solid-state mass storage, the
MZ-6SER lowers your exposure to possible development risks, costs and significantly reduces
your time-to-market.
The MZ-6SER’s fully compatible PC/104 embedded expansion bus, permits easy integration to
a wide selection of low-cost hardware peripherals. The numerous features provide an ideal
price/performance solution.
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1.2Specifications
586 CPU
32-bit CPU core operating at 33Mhz to 128Mhz
8K byte Level 1 cache, write back and write through support
Floating point unit
PC Core Logic with PCI enhancement
32 bit 33MHz PCI rev 2.1 compliant “Northbridge” and “Southbridge”
AT-compatible DMA controllers, interrupt controllers, timer/counters
AT keyboard controller and Real-time clock
Memory
Synchronous DRAM support
Up to 64Mb SDRAM soldered in place
Universal Serial Bus
Two independent USB interface, USB 1.1 and OpenHCL compliant
PCI bus master burst reads and writes
Over current and power control support
Serial Ports
Six 16550-compatible serial ports
Six RS-232 with two ports convertible to RS-485
Baud rates up to 115.2 K baud
Parallel Ports
One enhanced bi-directional parallel port
Supports SPP, ECP and EPP
Keyboard/Mouse Interface
Supports AT keyboard and PS/2 mouse
Floppy interface
Supports one floppy disk drive
IDE Hard Drive Interface
One enhanced IDE channel, supports up to two drives (master/slave)
PCI bus master burst reads and writes
Ultra DMA and PIO modes (1-4) support
Power Management
I/O traps and idle timers for peripheral power management
Hardware and software CPU suspend mode support
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Solid State Flash Storage
Can be supplied with M-System 32Mbyte TSOP Millennium Plus DiskOnChip or Millennium
DiskOnChip in byte wide socket.
Expansion Bus - ISA PC/104 signals
Fully compliant with the PC/104 expansion bus
Mechanical/Environmental
3.63 inches x 4.86 inches
Standard PC/104 16-bit stack through connector for PC/104-compliant modules
Standard ribbon cable connectors for IDE, serial, and parallel
Case temperature: -40 to +85°C
Storage temperature: -67F to 185F (-55C to 85C)
Weight: 70 grams
1.3Embedded Features
Failsafe Boot ROM
12Kbyte BIOS update ROM (BUR) to allow flash BIOS install or upgrade
Provides permanent and fail-safe mechanism to update software under all adverse
conditions
Z-Tag Interface
High speed interface to download S/W
Uses floppy interface when “Drive Select” signal is inactive
Communication protocol compatible with serial EEPROMs
Z-tag programming tool allows easy field upgrade
Dual Watchdog Timer
Software and hardware control of watch dog timer event
16 bit counter primary watch dog connected to WSIRQ/NMI/SMI, reset by WDT input
Second 8 bit counter connected to H/W reset line, enabled by primary counter output
Software included
Phoenix embedded PC BIOS
Software Compatibility
Linux
DOS
Windows 9X/NT
Most PC-Compatible RTOS
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CHAPTER2:INSTALLATION
2.1Locating the Connectors & Jumpers
Jumpers on the MZ-6SER are provided to configure the board for different functionality.
Table 1: Jumper List
LabelFunction
JP1
JP2
JP3
JP4
JP5
JP6
JP7
JP8
JP9
JP10
CPU CLOCK MULTIPLIER & PCI CLOCK DIVIDE
BIOS WRITE ENABLE
WATCH DOG SOURCE
COMPACT FLASH MASTER/SLAVE SELECT
CPU OSCILLATOR SELECT
CORE VOLTAGE SELECT
RS232 COM5 & 6 ENABLE
RS485 HALF/FULL DUPLEX SELECT
MILLENIUM PLUS DOC WRITE ENABLE
BUR/BOOT ROM SELECT
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J
JP10
Figure 1: Connector and Jumper Location MZ-6SER Top
JP1
CN16
CN14
CN15
CN1 & CN2
CN3 & CN4
CN5 & CN6
JP7
CN13
CN12
P4
JP6
CN7
JP8
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CN8CN9
CN11
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Figure 2: Connector Location MZ-6SER Bottom
CN10CN18CN17
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CHAPTER 3:JUMPERS
3.1Clock Multiplier select (JP1)
The clock multiplier selection jumper sets the clock frequency multiplier for the MZ-6SER core.
Each setting will put the MZ-6SER core at a different operating speed.
The CPU operating speed is determined by the CPU clock (33MHz or 64MHz) multiplied by
the CPU frequency ratio.
- Refer to section 3.6 for setting CPU clock
- For example, using 2X ratio, the CPU speed will be (2x64) = 128 MHz
Table 2: Clock Multiplier Select (JP1)
Jumper
CPU Freq ratio
1X
2X
3X**
4X**
*Factory default setting
**The maximum rated speed of the ZFx86 processor is 128MHz. Avoid
using combinations of CPU Freq ratio and Oscillator frequency that results
in over clocking the ZFx86. Over clocking will void the warranty.
JP1 [3-4]JP1 [1-2]
ON*ON*
OFFON
OFFOFF
ONOFF
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3.2PCI Clock Divider (JP1)
When the CPU oscillator is set for 33 MHz, set the PCI dividers for divide-by-one for proper
operation. When the CPU oscillator is set for 64 MHz, set the PCI Clock dividers for divide-bytwo operation.
- Refer to section 3.6 for setting CPU clock
Table 3: PCI Clock Divider (JP1)
Front side PCI dividerBack side PCI dividerFunction
description
Divide by one
Divide by two
JP1 [5-6]JP1 [7-8]
OffOff
On*On*
*Factory default setting
3.3Write Enable Jumper for Bios Flash (JP2)
Install jumper shunt on JP2 to enable writing to the Bios Flash chip. The Bios chip is a
512Kbyte device with the Bios located at 40000H to 7FFFFH. Locations from 0 to 3FFFFH are
available for the customers use.
- Remove the jumper shunt on JP2 to write protect the Bios Flash. This will allow
read only accesses.
3.4Watchdog Timer (JP3)
The MZ-6SER has two watchdog timers, WD1 and WD2. Both timers are programmable.
WD1 counter expires in 2 seconds and WD2 in 7ms. WD2 starts counting down after WD1
expires. When WD2 counter reaches zero, it will unconditionally cause a system reset.
The watchdog timer alarms if not triggered by the system or application at least once every 2
seconds. If the watchdog timer does not receive a reset “tickle” when 2 seconds has elapsed,
it generates an alarm signal. The watchdog timer alarm is reset “tickled” by toggling the WDI
signal or writing to index 0x10h of the ZF-Logic I/O space. The watchdog is triggered
continuously (disabled) if jumper shunt JP3 [2-3] is installed. This arrangement allows
watchdog input (WDI) to be toggled by the watchdog alarm output (WDO) in a self-triggering
fashion. If a jumper shunt JP3 [1-2] is installed, the watchdog will be triggered by an external
signal or event from pin5 of CN8.
The watchdog timer alarm signal (WDO) can be programmed to generate the following
response when the corresponding bit is set at the watchdog control register in the ZF-Logic I/O
space.
• Non-maskable interrupt (NMI)
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• System controller interrupt (SCI)
• System Management interrupt (SMI)
• Hardware reset
Table 4: Watchdog Jumper (CN16)
FunctionJumper Position
External source to reset watchdog
Disable watchdog
1-2
2-3
Note: The watchdog timer is not enabled at power up by the BIOS. Therefore, the
position of the jumper at CN16 does not affect the operation of the MZ-6SER.
3.5Master /Slave Mode Select (JP4)
JP4 configures the compact flash device inserted into CN18 either as a master or slave IDE
device.
Table 5: Master/Slave Mode Select (JP4)
Mode
Master
Slave
JP4
Off*
On
*Factory default setting
3.6CPU Clock Oscillator Select (JP5)
The CPU clock oscillator can be set for 33 MHz or 64 MHz operation. Selecting the 33MHz
oscillator and setting the clock multiplier to 1X will offer the lowest power consumption, while
setting the CPU clock oscillator to 64 MHz and the clock multiplier to 2X will offer the greatest
processing capability.
Table 6: CPU Clock select (JP5)
Oscillator
JP5
Frequency
33 MHz
64 MHz
JP5 [2-3] shunt On
JP5 [1-2] shunt On*
*Factory default setting
**The MZ-6SER will not function without a shunt installed on JP5
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3.7CPU Core Voltage Select (JP6)
At a CPU speed of 128 MHz, the core voltage must be set for 2.75 volts. At frequencies below
128 MHz, the core voltage should be lowered to conserve power, and to reduce the dissipated
heat. Jumper JP6 allows for three possible core voltages of 2.75 volts, 2.5 volts and 2.25
volts.
Table 7: CPU Core Voltage Select (JP6)
Core VoltageJP6
2.25 volts
2.5 volts
2.75 volts
JP6 [2-3] shunt On
JP6 [1-2] shunt On*
No shunt installed
*Factory default setting
3.8Enable RS232 Drivers for Serial 5 and Serial 6 Port (JP7)
When using serial five in half duplex RS485 mode, the serial five RS232 driver must be
disabled. When using serial six for half or full duplex RS485 mode, the serial six RS232 driver
must be disabled.
Table 8: Serial 5 and 6 RS232 Driver Disable (JP7)
Serial 5 RS232 DriverSerial 6 RS232 Driver
Driver Enable
Driver Disable
JP7 [1-3]*JP7 [2-4]*
JP7 [3-5]JP7 [4-6]
*Factory default setting
3.9RS485 Half/Full Duplex Mode Select (JP8)
Jumper JP8 routes the RS485 signals to setup half or full duplex operation. When half duplex
operation is setup, communication for the RS485 port five is routed to serial ports five, and
communication for the RS485 ports six is routed to serial port six. When full duplex mode is
selected the RS485 receive signal is routed to the RS485 port six.
Table 9: Half/Full Duplex Routing (JP8)
Installed Jumpers
Half Duplex
Full Duplex
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JP8 [1-3] [5-7] [6-8]
JP8 [3-4] [7-8]
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3.10 M-Systems Millennium Plus Disk-On-Chip Write Enable (JP9) - (Only for the MZ6SER-MP version)
Install jumper shunt on JP9 to enable writing to the Millennium Plus. The Millennium Plus chip
is a 32Mbyte solid-state disk. Please refer to the M-Systems manual on the Millennium Plus
for setup, configuration and programming.
Remove the jumper shunt on JP9 to write protect the Millennium Plus. This will allow read only
accesses.
3.11 BUR/Boot ROM Select (JP10)
JP10 allows the MZ-6SER to boot from standard BIOS or BUR. If boot ROM mode is selected,
the MZ-6SER will startup normally by executing the BIOS code and transfer control to a boot
device. If BUR mode is selected, the MZ-6SER will execute the BUR code to update the flash
BIOS using the Z-Tag interface. It also provides an elementary debugger console functionality
through COM1. For details of Z-Tag and BUR operation, see the MachZ data book.
Table 10: Bur/Boot Rom Select (JP10)
BUR/BOOT selectBUR ModeBoot ROM
JP10
*Factory setting
OFFON*
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CHAPTER 4:CONNECTORS
Connectors on the MZ-6SER are provided to interface to external devices such as hard disk
drives, floppy drives and keyboards. Pin 1 of each connector on the MZ-6SER should line up
with Pin 1 of the corresponding mating connector on the cable.
Table 11: MZ-6SER Connector List
ConnectorFunction
CN1 & 2
CN3 & 4
CN5 & 6
CN7
CN8
CN9
CN10
CN11
CN12
CN13
CN14
CN15
CN16
CN17
CN18
RS232 COM1 & 2 connector
RS232 COM 3 & 4 connector
RS232 COM 5 & 6 connector
RS485 COM5 & 6
Utility (keyboard, mouse, speaker)
Floppy interface connector
Z-Tag interface
USB 1 &2 connector
IDE interface connector
Parallel connector
PC 104 connector (40 pin)
PC 104 connector (64 pin)
Main power input connector
CMOS backup battery holder
Compact flash connector
Note: Pin-1 of each connector on the MZ-6SER is designated by a small white dot on the
PCB. Pin-1 on the connector should line up with pin-1 of the corresponding mating connector
on the cable.
4.1Serial Interfaces (CN1 to CN6)
The MZ-6SER provides six PC-compatible asynchronous serial ports. All six serial ports have
RS232 drivers. Serial port five and serial port six are jumper configurable as half duplex
RS485 ports. Serial port six can be configured as a full duplex RS485 (with serial port five in
RS232 mode only). Serial RS232 ports connectors are grouped in sets of two. That is, Serial
1 (CN1) and Serial 2 (CN2) connectors are adjacent to each other creating a 10 pin by 2 pin
header. Similarly, serial 3 (CN3) and serial 4 (CN4) are adjacent, and serial 5 (CN5) and serial
6 (CN6) are adjacent. RS485 signals are available on connector CN7.
All six serial ports supply full complements of input and output handshaking lines. These
signals are at standard RS232C levels. The RS232C level converters provide the required
RS232C voltage levels with internal +5 volt to ±9 volt converters. The serial port drivers have
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an automatic power down mode that turns off the driver outputs. This occurs whenever there
isn't a valid signal level on any of the receive pins on the driver chip.
Serial port one and Serial port two can be disabled using BIOS SETUP. The IOCS (I/O chip
select) signals the quad UART uses for Serial ports 3 to 6 can be disabled through the BIOS
SETUP. When disabled, the port’s I/O address is made available for other expansion devices
on the 16-bit BUS.
Table 12: Serial Port Resources
Serial PortTypical UsageI/O AddressStandard Interrupt
Serial 1 (CN1)
Serial 2 (CN2)
Serial 3 (CN3)
Serial 4 (CN4)
Serial 5 (CN5)
Serial 6 (CN6)
6DSR5Serial 5 Data Set ReadyINPUT
7RTS5Serial 5 Request To SendOUTPUT
8CTS5Serial 5 Clear To SendINPUT
9RI5Serial 5 Ring IndicatorINPUT
N/CNo connection
SignalFunctionIn/Out
1
Pin
6DSR6Serial 6 Data Set ReadyINPUT
7RTS6Serial 6 Request To SendOUTPUT
8CTS6Serial 6 Clear To SendINPUT
9RI6Serial 6 Ring IndicatorINPUT
N/CNo connection
MZ-6SER but only at the end of an attached cable. The connector description of DB-9 is used
in this manual for clarity even though the correct technical term is DE-9. The second letter of
DE-9 designates the shell size (per EIA standard). However, the majority of the world
recognizes the description of DB-9 and not DE-9.
2
CN1 to CN6 are edge mounted PCB connectors with even number pins located on the “top”,
and odd number pins on the “bottom”.
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Table 16: RS485 Serial Connector (CN7) for Half Duplex Mode
Pin#SignalFunctionInput/Output
1
2
3
4
5
6
7
8
TR1A100 ohm termination resistor 1N/A
TR1B100 ohm termination resistor 1N/A
CMD6+Serial 6 RS-422 Data +Input/Output
CMD6-Serial 6 RS-422 Data -Input/Output
TR2A100 ohm termination resistor 2N/A
TR2B100 ohm termination resistor 2N/A
CMD5+Serial 5 RS-422 Data +Input/Output
CMD5-Serial 5 RS-422 Data -Input/Output
Table 17: RS485 Serial Connector (CN7) for Full Duplex Mode
Pin#SignalFunctionInput/Output
1
2
3
4
5
6
7
8
2
CN7 is edge mounted PCB connectors with even number pins located on the “top”, and odd
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4.2Utility Connector (CN8)
The following inputs and outputs on are provided on a flat ribbon connector:
• Keyboard input
• PS/2 mouse input
• Infrared I/O
• Speaker Out
• SMBus/I2C
• RTC & CMOS backup battery
• Watchdog trigger source
• Hardware reset
• Hard drive LED
The MZ104+UTIL card supports the flat ribbon cable from the MZ-6SER card. This provides
an easy and quick method to connect to the external "utility" devices to the
MZ-6SER.
Table 18: Utility connector (CN8)
PinSignalFunction
HDDLEDOUTHard drive LED output (8mA source)
1
RESETXHardware reset
2
IRRXDInfrared receive
3
IRTXDInfrared Transmit
4
WD_EXTExternal Trigger Source for watchdog timer
5
VBAT_CLKRTC backup battery +V terminal (3.6V)
6
SDASMBus data
7
KBMPWR+5V
8
GNDGround
9
SCLSMBus clock
10
SPKOUTSpeaker output
11
KBLOCKXKeyboard lock
12
MCLKXP/S2 mouse clock
13
MDATXP/S2 mouse data
14
KBCLKXKeyboard clock
15
KBDATXKeyboard data
16
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4.3Floppy Interface (CN9)
The floppy interface uses a flat ribbon cable connector to provide the signals to control one
3½“ or 5¼” floppy drive. The default interrupt request for the floppy interface is IRQ6.
Table 19: Floppy Interface (CN9)
PinSignalFunctionPinSignalFunction
VCC5V+5V
1
VCC5V+5V
3
VCC5V+5V
5
NC-
7
NC-
9
NC-
11
NC-
13
GNDGround
15
GNDGround
17
GNDGround
19
GNDGround
21
GNDGround
23
GNDGround
25
INDXIndex
2
DRX0Drive select 0
4
DSKCHGXDisk Change
6
NC-
8
MTRXOMotor On
10
DIRXDirection Select
12
STEPXStep
14
WDATAXWrite data
16
WGATEXWrite gate
18
TRKX0Track 00
20
WPXWrite Protect
22
RDATAXRead data
24
HDSELXSide one select
26
4.4Z-Tag connector (CN10)
The Z-Tag connector (CN10) is a 14-pin edge connector that interfaces with the Z-Tag Dongle
allowing for easy field flash updates or user code execution. Please refer to the Z-Tag and
BUR chapter of the ZFx86 Data Book for complete details. A Z-Tag Manager utility program
and manual are provided on the MZ104+ Quickstart CD and are available for download at
www.ZFMicro.com. The Z-Tag Dongle, part number ZFx86DONGLE-1, is available from Tri-M
Systems.
4.5USB 1,2 Connector (CN11)
The MZ-6SER provides two USB (Universal Serial BUS) interfaces, which give complete plug
and play, for external devices.
Table 20: USB 1,2 Connector (CN11)
PinSignalPinSignal
1USBVCC22USBD2F3USBD2F+4GND
5USBVCC16USBD1F-
1
CN11 is an edge mounted PCB connector with odd number pins located on the “top”, and
7USBD1F+8GND
even number pins on the “bottom”.
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4.6IDE Interface (CN12)
The MZ-6SER has a PCI bus mastering ATA-4 compatible IDE controller. The IDE controller
supports Ultra DMA, Multi-word DMA, and all Programmed I/O (PIO) modes. Up to two drives
can be connected, in a master-slave arrangement. Generally, the first hard disk drive (master)
will appear as C drive. The second drive, if attached, will appear as D.
Table 21: Hard Disk Resources
ResourceFunction
I/O Address (1F0h-1F7h)Hard Disk Interface
IRQ14Interrupt
Use SETUP to auto-detect your attached hard drives. For further details about setting up IDE
hard disk parameters See the SETUP description in the BIOS manual provided on the MZ104
Quickstart CD or available for download at www.ZFMicro.com.
Table 22: IDE Drive Interface (CN12)
PinSignal NameFunction
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
1
CN12 is an edge mounted PCB connector with odd number pins located on the “top”, and
RESETReset signal from
host
DD7Data bit 7I/O
DD6Data bit 6I/O
DD5Data bit 5I/O
DD4Data bit 4I/O
DD3Data bit 3I/O
DD2Data bit 2I/O
DD1Data bit 1I/O
DD0Data bit 0I/O
GNDGroundGND
DREQDMA 0 RequestOUT
DIOWWrite strobeOUT
DIORRead strobeOUT
IORDYI/O channel readyIN
IDEPDACKDMA 0 AcknowledgeIN
IRQ14Drive interrupt
request
DA1IDE Address 1Out
DA0IDE Address 1Out
HDCS0IDE Chip Select 0Out
HDDLEDDrive ActivityOut
VCC5V+5V+5V
GNDGroundGND
In/Ou
t
OUT
IN
PinSignal NameFunction
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
GNDGroundGND
DD8Data bit 8I/O
DD9Data bit 9I/O
DD10Data bit 10I/O
DD11Data bit 11I/O
DD12Data bit 12I/O
DD13Data bit 13I/O
DD14Data bit 14I/O
DD15Data bit 15I/O
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4.7Parallel (CN13)
The MZ-6SER parallel port is fully compatible with the PC/AT parallel port. In the extended
mode, it functions as a PS/2-like bi-directional port. In Extended Capabilities Port (ECP) mode,
it is IEEE 1284 compliant, including level 2.
The parallel ports uses the following PC resources when enabled:
The default interrupt for parallel port LPT1 is IRQ7. The parallel port output signals provide up
to 14-mA drive current. RC filters are provided for noise suppression. The parallel port signals
appear on CN13, a dual-row ribbon-cable pin edge connector. The port may be cabled to
appear on a standard PC DB-25 connector. A DB-25 connector and cable are provided for this
purpose in the optional MZ-6SER cable kit. The following table shows the parallel port signals
appearing on CN13 and the equivalent pin out on a DB-25 connector.
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Table 26: PC/104 16bit Connector (CN15)
Pin #SignalPin #Signal
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
GND
SBHEX
SA23
SA22
SA21
SA20
SA19
SA18
SA17
MEMR
MEMW
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
KEY
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
GND
MCS16
IOCS16
IRQ10
IRQ11
IRQ12
IRQ15
N/A
N/A
N/A
DACK5
DRQ5
N/A
N/A
N/A
N/A
+5V
MASTER
GND
GND
4.9External Power (CN16)
The MZ-6SER can be powered by supplying 5VDC and common to CN4. Alternatively, the
MZ-6SER can be powered by supplying 5VDC through the 16-bit PC104 connector (CN14 &
CN15) with a PC/104 power supply such as the Tri-M Engineering HE104 or HESC-104
.
Table 27: External Power Connector (CN16)
Pin NumberSignal
1VCC +5VDC
2GND
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4.10CMOS & RTC Battery Holder (CN17)
A lithium battery, model CR2032 is used to maintain the RTC (real time clock) operation when
+5VDC main power is removed. The battery can be inserted into battery holder CN17 or it can
be connected to the utility connector CN8.
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4.12Interrupt and I/O Port assignments
Table 29: IRQ Interrupt
IRQ NumberMZ-6SER Assignment
0Systems timer (not available for other devices)
1Keyboard controller (not available for other devices)
2Second PIC cascade (not available for other devices)
3Serial port two (COM2:)
4Serial port one (COM1:)
5Serial port three
6Floppy disk controller (not available for other devices)
7Parallel (printer) port one (LPT1:)
8Real-time clock (RTC)
9Unassigned
10Serial port four
11USB / Serial port five
12PS/2 Mouse
13Math coprocessor
14Primary IDE
15Secondary IDE / Serial port six
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DMA Controller
PIC
Motherboard Resources
System Timer
Keyboard
Systems Speaker
Keyboard
System CMOS / Real time clock
DMA Controller
Motherboard Resources
PIC
DMA Controller
Numeric Data Processor
Serial Port 5
Serial Port 4
Serial Port 6
Serial Port 2
Printer Port
Serial Port 3
Floppy Disk Controller
Floppy Disk Controller
Serial Port 1
Motherboard Resources
Motherboard Resources
Printer Port
PCI Bus
Motherboard Resources
Motherboard Resources
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CHAPTER 5:BIOS SETTINGS
5.1BIOS Setup
The MZ-6SER system BIOS (Basic Input Output System) supports a standard SETUP function
to configure system parameters. The BIOS uses these parameters to establish default
conditions during system initialization, both during the Power On Self Test (POST) phase, and
during system boot.
Using SETUP
To enter the SETUP function, press the <F2> key during POST.
Note: When you change SETUP parameters, the new values do not take effect until
the system is rebooted.
For details about how to set the various parameters using SETUP, please refer to the MachZ
BIOS Users Manual Supplement and the Phoenix BIOS 4.0 Rev 6 manual.
Customizing BIOS CMOS default
The CMOS default settings of the MZ-6SER can be customized by using the ZEB and
AMDFLASH utilities from ZFMicro. www.zflinux.com
The ZEB utility allows the majority of the CMOS parameters to be set to a particular value
which become the default settings when the MZ-6SER is powered up. ZEB modifies a BIOS
image file which is then programmed into the flash device using AMDFLASH utility. Please
note that setting the CMOS defaults is different from changing the CMOS settings. The CMOS
default settings only become effective when there is a no backup battery provided or when the
CMOS settings are cleared.
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APPENDIX 1:OPTIONAL MZ104+UTIL UTILITY BOARD
The MZ104+UTIL Utility Board, (see Figure 3) provides a convenient means to connect
peripheral devices to the MZ-6SER embedded CPU module. In addition, the MZ104+UTIL
provides input/output functionality of a status LED, and a hardware-reset switch. For
applications requiring a GPS receiver, the Utility Board also acts as carrier board to mate with
several models of Royaltek GPS receivers available from Tri-M Systems.
The MZ104+UTIL interfaces to the MZ-6SER CPU module via three ribbon cables and one
flex-foil cable. The MZ104+UTIL can be mounted above the MZ-6SER with PC/104 stand offs.
The MZ104+UTIL supports the Royaltek REB2000/2100 series as well as the REB12R series
GPS receivers. A 10-position single-row female socket is provided for REB2000 series
receiver while a 20-position dual-row female socket is provided for REB12R series receiver.
Power is provided to the MZ104+UTIL board through connector CN7 on the MZ-6SER. No
separate power source is required.
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APPENDIX 2:LITERATURE REFERENCES
The following references are for information about the PC/104 architecture, the PC DOS, and
the PC BIOS.
ISA System Architecture
MindShare, Inc., Tom Shanley and Don
Anderson
Internet: [email protected]
CompuServe: 72507,1054
Published by Addison Wesley, Inc.
AT Bus Design
Edward Solari
Anabooks
12145 Alta Carmel Ct., Suite 250
San Diego, CA 92128
ISBN 0-929392-08-6
Personal Computer Bus Standard P996
Institute of Electrical and Electronic
Engineers, Inc.
445 Hoes Lane
Piscataway, NJ 08854
DiskOnChip
M-Systems Corp
8371 Central Avenue Suite A
Newark, CA 94560
Phone: 510-494-2090
FAX: 510-494-5545
MachZ
ZF Linux Devices, Inc.
1052 Elwell Court
Palo Alto, CA 94301
Phone: 650-940-4793
FAX: 650-965-4050
PC Interrupts
PC Interrupts, Ralf Brown,
Addison/Wesley.
BIOS Reference
System BIOS for IBM PC/XT/AT
Computers, Phoenix, Addison/Wesley