Transcend Secure Digital Card SD80, SD80 Series Specification Sheet

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Transcend Information Inc.
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Description
Secure Digital Card is a compact, slim and high
capacity storage media with copyright protection.
Designed in advanced SD specification Ver.1.1,
Transcend SD80 series now reaches a new
performance milestone. Based on 0.16 um process
controller and high quality SLC (Single-Level-Cell)
NAND Flash chip, Transcend SD80 series can
provide high performance ,low power consumption yet
excellent reliability.
-Manufactured with SLC NAND Flash chip
-Operating Temperature : -25 ~ 85°C
Placement
Front Back
Features
Storage Capacity: 128M~1GB
Operating Voltage: 2.7 ~ 3.6V
Operating Temperature: -25 ~ 85°C
Insertion/removal durability: 10,000 cycles
Fully compatible with SD card spec. v1.1
Support SD command class 0,2,4,5,7,8
Mechanical Write Protection Switch
Forward compatibility to MultiMediaCard Version 2.11
Supports Copy Protection for Recorded Media(CPRM)
for music and other commercial media
Form Factor: 24mm x 32mm x 2.1mm
Pin Definition
SD Mode SPI Mode
Pin No.
Name Type
Description Name Type
Description
1
CD/DAT3
I/O/PP
Card Detect/Data Line [Bit3]
CS I
Chip Select (neg true)
2
CMD PP Command/Response
DI I
Data In
3
V
SS1
S Supply voltage ground
VSS S
Supply voltage ground
4
V
DD
S Supply voltage
VDD S
Supply voltage
5
CLK I Clock
SCLK
I
Clock
6
V
SS2
S Supply voltage ground
VSS2
S
Supply voltage ground
7
DAT0 I/O/PP Data Line [Bit0]
DO O/PP
Data Out
8
DAT1 I/O/PP Data Line [Bit1]
RSV
9
DAT2
I/O/PP Data Line [Bit2] RSV
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Transcend Information Inc.
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Architecture
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Transcend Information Inc.
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Bus Operating Conditions
General
Parameter Symbol
Min. Max. Unit Remark
Peak voltage on all lines -0.3 VDD+0.3
V
All Inputs
Input Leakage Current -10 10 µA
All Outputs
Output Leakage Current -10 10 µA
Power Supply Voltage
Parameter Symbol
Min. Max. Unit Remark
Supply voltage V
DD
2.0 3.6 V CMD0, 15,55,ACMD41
commands
Supply voltage specified in OCR register 2.7 3.6 V Except CMD0, 15,55,
ACMD41 commands
Supply voltage differentials (V
SS1
, V
SS2
) -0.3 0.3 V
Power up time 250 ms From 0v to VDD Min.
Bus Signal Line Load
The total capacitance CL the CLK line of the SD Memory Card bus is the sum of the bus master capacitance C
HOST
, the bus
capacitance C
BUS
itself and the capacitance C
CARD
of each card connected to this line:
CL = C
HOST
+ C
BUS
+ Ν*C
CARD
Parameter Symbol
Min. Max. Unit Remark
Bus signal line capacitance CL 100 pF fPP ≤ 20 MHz, 7 cards
Single card capacitance C
CARD
10 pF
Maximum signal line inductance 16 nH fPP ≤ 20 MHz
Pull-up resistance inside card (pin1) R
DAT3
10 90 k May be used for card
detection
Note that the total capacitance of CMD and DAT lines will be consist of C
HOST
, C
BUS
and one C
CARD
only since they are
connected separately to the SD Memory Card host.
Parameter Symbol
Min. Max. Unit Remark
Pull-up resistance R
CMD
, R
DAT
10 100 k To prevent bus floating
Bus signal line capacitance CL 250 pF fPP ≤ 5 MHz, 21 cards
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Transcend Information Inc.
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Bus Signal Levels
As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage.
To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within the following specified ranges for any VDD of the allowed voltage range:
Parameter Symbol Min. Max. Unit Remark
Output HIGH voltage V
OH
0.75* VDD V I
OH
= -100 µA @VDD min
Output LOW voltage V
OL
0.125* VDD V I
OL
= -100 µA @VDD min
Input HIGH voltage V
IH
0.625* VDD V
DD
+ 0.3 V
Input LOW voltage V
IL
VSS – 0.3 0.25* VDD V
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Transcend Information Inc.
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Bus Timing (Default)
Parameter Symbol Min Max. Unit Remark
Clock CLK (All values are referred to min (VIH) and max (VIL)
Clock frequency Data Transfer Mode f
PP
0 25 MHz CL ≤ 100 pF, (7 cards)
Clock frequency Identification Mode
(The low freq. is required for MultiMediaCard
compatibility.)
f
OD
0 400 KHz CL ≤ 250 pF, (21 cards)
t
WL
10 ns CL ≤ 100 pF, (7 cards) Clock low time
50 ns CL ≤ 250 pF, (21 cards)
t
WH
10 ns CL ≤ 100 pF, (7 cards) Clock high time
50 ns CL ≤ 250 pF, (21 cards)
Clock rise time t
TLH
10 ns CL ≤ 100 pF, (7 cards)
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Transcend Information Inc.
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50 ns CL ≤ 250 pF, (21 cards)
t
THL
10 ns CL ≤ 100 pF, (7 cards) Clock fall time
50 ns CL ≤ 250 pF, (21 cards)
Inputs CMD, DAT (referenced to CLK)
Input set-up time t
ISU
5 ns CL ≤ 25 pF, (1 cards)
Input hold time t
IH
5 ns CL ≤ 25 pF, (1 cards)
Outputs CMD, DAT (referenced to CLK)
Output Delay time during Data Transfer Mode t
ODLY
0 14 ns CL ≤ 25 pF, (1 cards)
Output Delay time during Identification Mode t
ODLY
0 50 ns CL ≤ 25 pF, (1 cards)
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Bus Timing (High Speed Mode)
Parameter Symbol Min Max. Unit Remark
Clock CLK (All values are referred to min (VIH) and max (VIL)
Clock frequency Data Transfer Mode f
PP
0 50 MHz
Clock low time t
WL
7 ns
Clock high time t
WH
7 ns
Clock rise time t
TLH
3 ns
Clock fall time t
THL
3 ns
Inputs CMD, DAT (referenced to CLK)
Input set-up time t
ISU
6 ns
Input hold time t
IH
2 ns
Outputs CMD, DAT (referenced to CLK)
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