Thank you very much for purchasing our Programmable Controller.
This operation manual is the programming manual for TOYOPUC-PC2/3 series.
For safety use of this product, read carefully this manual and other related individual operation
manuals altogether. Further, keep these manuals in file at an easily accessible place so that
persons concerned can read them anytime as necessary.
The distributor or dealer of this product is requested to hand over the said manuals to the end
user without fail.
The specification and other relevant information included in this Manual are subject to change
due to better improvement without prior notice.
Any product applicable to the strategic goods (or services) stipulated in the Foreign Exchange
and Foreign Trade Control Act is subject to export license of the Japanese Government, where
exported to overseas.
Should this product result in trouble during the guarantee period due to somewhat cause
attributed to our responsibility, necessary device(s) or parts(s) shall be repaired or replaced at
our discretion. For any other trouble or accident out of our responsibility , our company shall be
released from the responsibility for injury which may arise from such a trouble or accident.
i
FOR SAFETY OPERATION
Before installing, operating, maintaining and checking, read carefully this Manual without fail for
proper and safety operation and work. Any operator and any maintenance man who relate to
this product (Programmable Controller) are requested to acquire the knowledge on devices,
safety information and cautions before being engaged in the operation and maintenance. This
Manual classifies the safety caution level into "WARNING" and "CAUTION" using alert symbols
as follows.
Failure to observe the instructions given in this Manual could result
in death or bodily injury of the operator.
Failure to observe the instructions given in this Manual could result in
risk of bodily injury or physical damage to equipment, etc.
Don't overhaul the module and don't touch the module internals,
with the power switch kept ON.
Failure to observe this instruction could result in electric shock.
Don't touch the terminals with the power switch kept ON.
Failure to observe this instruction could result in electric shock.
Execute write during PC run (write during run) only when cyclic
operation of main equipment/machine is in shutdown.
Failure to observe this instruction could result in breakdown of its
device(s) and bodily injury from mis-operation, if any.
In handling the lithium battery, read and observe " Lithium Battery
Handling Cautions " given in this Manual. Improper handling
would cause liquid leak, overheat, sparking, and fracture, which
could then result in breakdown of units and devices and bodily
injury.
Regarding safe-related signals and emergency stop circuit, etc.,
handle those signals in external units without through this system.
ii
Use this product under an environment which meets the
environmental general specification specified in this Manual.
Don't attach/detach each module to/from its base, with the power
switch kept ON.
Don't touch directly the electronic circuits inside the module.
Failure to observe this instruction could result in breakdown of the
module by static electricity.
iii
REVISION HISTORY OF OPERATION MANUAL
g
j
T
Operation manual revision No. is added as a part of Manual No. described on the cover sheet of
the manual.
Operation Manual No.
T - 3 0 7 # E
N: Japanese E: English
Series No.
Revision symbol
Revision
No.
1 2003.06.30 1st revision
2 2004.09.02 Correction of MSET/CSET command
3 2005.01.10 Correction of CSET command
4 2006.01.01
5 2006.03.20
6 2006.11.10 Correct missing description.
7 2007.03.30 Correction of I/O address allocation
8 2012.05 TOYODA brand logo added on the front cover
9 2013.04 Correction of errors
10 2022.03 TOYODA brand logo removed
Date of RevisionRevision Details
The company name “TOYODA MACHINE WORKS,LTD”
is chan
ed to “JTEKT CORPORATION”
Special register was corrected.
The device that was able to use the PC3 series was corrected.
Clock ad
ustment instruction is added
Equivalent
Japanese
manual
version
-3079N
iv
Composition of Related Operation Manuals
Operation
manual No.
T-822#E PC2 series
T-833#E PC2J series
T-845#E PC2J SUB-CPU
T-862#E PC2JN
T-873#E
T-880#E PC2S1 series
T-300#E PC3J series
T-303#E PC3JNF/PC3JNM
T-304#E PC3JM
T-310#E PC3JD
T-320#E PC3JB series
T-311#E PC3JG
PC2JNM
PC2JNF
Title Outline
This manual describes the basic
operating procedure, functions, and
specifications of PC2 series.
This manual describes the basic
operating procedure, functions, and
specifications of PC2J series.
This manual describes the basic operating
procedure, functions, and specifications of
SUB-CPU.
This manual describes the basic operating
procedure, functions, and specifications of
PC2JN.
This manual describes the basic operating
procedure, functions, and specifications of
PC2JNM/PC2JNF.
This manual describes the basic operating
procedure, functions, and specifications of
PC2S1 series.
This manual describes the basic operating
procedure, functions, and specifications of
PC3J series.
This manual describes the basic operating
procedure, functions, and specifications of
PC3JNF/PC3JNM.
This manual describes the basic operating
procedure, functions, and specifications of
PC3JM.
This manual describes the basic operating
procedure, functions, and specifications of
PC3JD.
This manual describes the basic operating
procedure, functions, and specifications of
PC3JB series.
This manual describes the basic operating
procedure, functions, and specifications of
PC3JG.
v
This manual describes programming with the TOYOPUC-PC2/3 series.
Although the basic programming method is common to all the PC2/3 series, there are differences
in the application instructions and the external I/O devices which can be used and in the program
capacities, etc. Model-specific functions are marked as shown below. Common functions are not
marked.
Along with this manual, it is recommended that you read the operation manuals for TOUOPUC.
PC/L2-specific functions------------------PC2/L2
PC2J series-specific function------------PC2J
The PC2J series controllers are classified into two types according to the program capacity.
8KW
PC2J
PC2JS
PC2JR
PC2JF
PC2F
PC2FS
PC2J-8KW
16KW
PC2JC
PC2J16
SUB-CPU
PC2JN
PC2J-16KW
32KW
PC2JNM
PC2JNF
PC2J-32KW
PC3J-specific functions---------------PC3J
PC3JG-specific functions-------------PC3JG
Ver.---------This is usable for the specific version or later.
PC2/L2, PC2J : Ver 3.50 or later
PC2JS/JR : Ver2.30 or later
PC2JC : Ver 3.20 or later
PC2J16 : Ver2.10 or later
SUB-CPU : Ver2.50 or later
PC2JNM/PC2JNF : Ver2.00 or later
This is not usable for PC2JN.
vi
Contents
FOREWORD
FOR SAFETY OPERATION
REVISION HISTORY OF OPERATION MANUAL
Composition of Related Operation Manuals
1.1. Usage of TOYOPUC...................................................................................................................................... 1-1
1.1.1. Connection between I/O devices and TOYOPUC...................................................................................1-1
1.4.6. Special relay..........................................................................................................................................1-12
1.4.7 Link relay ................................................................................................................................................1-37
1.4.8. Designation of Register Bit PC3J........................................................................................................ 1-38
1.5.2. Data register.......................................................................................................................................... 1-39
1.5.4. Link register........................................................................................................................................... 1-40
1.5.5. Current value register............................................................................................................................1-40
1.5.7. Special register...................................................................................................................................... 1-41
2. EXECUTION OF PROGRAM............................................................................................................................... 2-1
2.3. Interrupt program PC2/L2............................................................................................................................ 2-5
2.3.3. Interrupt program considerations.............................................................................................................2-7
2.4. Scan time ....................................................................................................................................................... 2-8
3.1. Contents of parameters.................................................................................................................................. 3-1
3.2. Setting the parameters................................................................................................................................... 3-4
3.2.1. Auto setting by CPU module....................................................................................................................3-4
3.2.1.1. In case of PC2/L2, PC2J.............................................................................................................. 3-4
3.2.1.2. In case of PC3J series.................................................................................................................3-8
3.2.2. Setting with a peripheral device...............................................................................................................3-9
4. USER MEMORY STRUCTURE............................................................................................................................4-1
4.1. Program memory structure ............................................................................................................................ 4-1
4.1.1. In case of PC2/L, PC2J ........................................................................................................................... 4-1
4.1.2. In case of PC3J series............................................................................................................................. 4-2
4.2. Data memory structure................................................................................................................................. 4-11
4.2.1. In case of PC2/L, PC2J ......................................................................................................................... 4-1 1
4.2.1.1. Data memory map........................................................................................................................... 4-11
4.2.1.2. Data memory address..................................................................................................................... 4-12
4.2.2. In case of PC3J series........................................................................................................................... 4-15
4.2.2.1. Data memory map...........................................................................................................................4-15
5.1.1. Extension on the PC3J series .................................................................................................................5-2
2.AND, AND NOT...........................................................................................................................................5-7
3.OR, OR NOT ...............................................................................................................................................5-8
5.3. Contact type application instructions............................................................................................................5-48
54.D<=N 32-bit data comparison (<=) * .................................................................................................5-103
5.4. Output type application instructions Note)............................................................................................... 5-104
5.4.1. Transfer instructions ............................................................................................................................ 5-122
1.MOV 2-digit Hex constant transfer (FUN100).....................................................................................5-123
2.WMOV 4-digit Hex constant transfer (FUN101).................................................................................. 5-124
3.DMOV 8-digit Hex constant transfer (FUN102) ..................................................................................5-125
4.MOVP 2-digit BCD constant transfer (FUN103)..................................................................................5-126
5.WMOVP 4-digit BCD constant transfer (FUN1)..................................................................................5-127
6.DMOVP 8-digit BCD constant transfer (FUN104)...............................................................................5-128
7.MOVR 3-digit decimal constant transfer (FUN105) ............................................................................ 5-129
8.WMOVR 5-digit decimal constant transfer (FUN7)............................................................................. 5-130
9.DMOVR 10-digit decimal constant transfer (FUN106)........................................................................ 5-131
10.MOVQ 3-digit octal transfer (FUN107)..............................................................................................5-132
11.WMOVQ 6-digit octal transfer (FUN8)...............................................................................................5-133
12.DMOVQ 11-digit octal transfer (FUN108) .........................................................................................5-134
13.MOVT 2-digit Hex constant transfer to two places (FUN62).............................................................5-135
14.WMOVT 4-digit Hex constant transfer to two places (FUN 110).......................................................5-136
15.MOVE 1-byte data direct transfer (FUN90).......................................................................................5-137
16.WMOVE 2-byte data direct transfer (FUN0) .....................................................................................5-138
17.DMOVE 4-byte data direct transfer (FUN111)...................................................................................5-139
18.MOVF 1-byte data indirect transfer 1 (FUN74).................................................................................5-140
19.WMOVF 2-byte data indirect transfer 1 (FUN112)............................................................................5-141
20.DMOVF 4-byte data indirect transfer 1 (FUN113) *..........................................................................5-142
21.MOVG 1-byte data indirect transfer 2 (FUN75) ................................................................................5-143
22.WMOVG 2-byte data indirect transfer 2 (FUN114)........................................................................... 5-144
23.DMOVG 4-byte data indirect transfer 2 (FUN115) *..........................................................................5-145
24.MOVH 1-byte data indirect transfer 3 (FUN76).................................................................................5-146
25.WMOVH 2-byte data indirect transfer 3 (FUN116) ...........................................................................5-147
26.DMOVH 4-byte data indirect transfer 3 (FUN117) *.......................................................................... 5-148
27.BMOV1 Byte data block transfer 1 (FUN70).....................................................................................5-149
28.BMOV2 Byte data block transfer 2 (FUN118) *.................................................................................5-150
29.WBMOV Word data block transfer (FUN119) *.................................................................................5-151
30.BMVI Byte data indirect block transfer (FUN71)...............................................................................5-152
31.WBMVI Word data indirect block transfer (FUN120) *......................................................................5-153
32.DIV Byte data delivery (FUN5)..........................................................................................................5-154
33.WDIV Word data delivery (FUN122).................................................................................................5-155
34.DDIV 32-bit data delivery (FUN123) *...............................................................................................5-156
35.BDIV Byte data block delivery(FUN72).............................................................................................5-157
36.WBDIV Word data block delivery(FUN126) ......................................................................................5-158
37.PUP Byte data extraction (FUN6) .....................................................................................................5-159
38.WPUP Word data extraction (FUN124) ............................................................................................5-160
39.DPUP 32-bit data extraction (FUN125) * ..........................................................................................5-161
40.BPUP Byte data block extraction(FUN73) ........................................................................................ 5-162
41.WBPUP Word data block extraction(FUN127).................................................................................. 5-163
42.SXCH 4-bit data exchange(FUN53)..................................................................................................5-164
43.XCH 8-bit data exchange(FUNl32) ................................................................................................... 5-165
44.WXCH 16-bit data exchange(FUN2)................................................................................................. 5-166
45.DXCH 32-bit data exchange(FUN133) *...........................................................................................5-167
46.BXCH Byte data block exchange(FUN134)......................................................................................5-168
47.WBXCH Word data block exchange (FUN 135) ...............................................................................5-169
48.JIS Storage in JIS code (FUN 109)...................................................................................................5-170
49.FIL1 Byte data fill 1 (FUN 77)............................................................................................................5-171
50.FIL2 Byte data fill 2 (FUN 128) * .......................................................................................................5-172
51.WFIL Word data fill (FUN 129) *........................................................................................................5-173
52.FILI1 Byte data indirect fill 1 (FUN 78)..............................................................................................5-174
53.FILI2 Byte data indirect fill 2 (FUN 130) * .........................................................................................5-175
54.WFILI Word data indirect fill (FUN 131) *..........................................................................................5-176
55.CMOV Byte data transfer on clearance confirmation (FUN 20)........................................................5-177
56.WCMOV Word data transfer on clearance confirmation (FUN 166)................................................. 5-178
57.CLR Matching data clearance (byte) (FUN 21).................................................................................5-179
58.WCLR Matching data clearance (Word) (FUN 167) ......................................................................... 5-180
59.REF External input transfer (FUN 283) !#..........................................................................................5-181
60.REFO External output transfer (FUN 284) !#.....................................................................................5-182
61.MOVJ 1-byte transfer from register to file register (FUN 144) %&.....................................................5-183
62.WMOVJ 2-byte transfer from register to file register (FUN 145) %&..................................................5-184
63.DMOVJ 4-byte transfer from register to file register (FUN 146) %&...................................................5-185
64.MOVK 1-byte transfer from file register to register (FUN 147) %&.....................................................5-186
65.WMOVK 2-byte transfer from file register to register (FUN 148) %&.................................................5-187
66.DMOVK 4-byte transfer from file register to register (FUN 149) %&..................................................5-188
124.PCH2 Even Parity check (FUN 82)................................................................................................. 5-256
5.4.7. Data conversion...................................................................................................................................5-257
125.BIN 2-digit BCD to 8-bit binary (FUN 152)...................................................................................... 5-258
126.WBIN 4-digit BCD to 16-bit binary (FUN 3).....................................................................................5-259
127.DBIN 8-bit BCD to 32-bit binary (FUN 153)....................................................................................5-260
128.BCD 8-bit binary to 2-digit BCD (FUN 154) .................................................................................... 5-261
129.WBCD 16-bit binary to 4-bit BCD (FUN 4)......................................................................................5-262
130.DBCD 32-bit binary to 8-digit BCD (FUN 155)................................................................................ 5-263
131.JBIN JIS code to binary (FUN 156).................................................................................................5-264
132.BJIS Binary to JIS code (FUN 157) ................................................................................................5-266
133.DECO 4 to 16 decoder (FUN 50)....................................................................................................5-268
134.ENCO 16 to 4 encoder (FUN 51)....................................................................................................5-270
141.CP Byte data comparison (FUN 17)................................................................................................5-282
142.WCP Word data comparison (FUN 12)...........................................................................................5-283
143.DCP 32-bit data comparison (FUN 211) .........................................................................................5-284
5.4.9. Bit operation.........................................................................................................................................5-285
144.BSET Byte data bit set (FUN 136) *................................................................................................ 5-286
145.WBSET Word data set (FUN 137).................................................................................................. 5-287
146.DBSET 32-bit data bit set (FUN 138) * ...........................................................................................5-288
147.BRST Byte data bit reset (FUN 139) * ............................................................................................ 5-289
148.WBRST Word data bit reset (FUN 140)..........................................................................................5-290
149.DBRST 32-bit data bit reset (FUN 141) *........................................................................................ 5-291
150.BPU Bit extraction (FUN 54) *.........................................................................................................5-292
151.WBPU Word data bit extraction (FUN 142).....................................................................................5-293
152.DBPU 32-bit data extraction (FUN 143) * .......................................................................................5-294
153.SUM Byte data ON-bit count (FUN 208).........................................................................................5-295
154.WSUM Word data ON-bit count (FUN 209).................................................................................... 5-296
155.DSUM 32-bit data ON-bit count (FUN 210) .................................................................................... 5-297
214.NEXT End of repetition (FUN 480) #...............................................................................................5-367
5.4.13 Master control ....................................................................................................................................5-368
215.MC Master control set (FUN 440)...................................................................................................5-369
216.MCR Master control reset (FUN 444) .............................................................................................5-370
5.4.21. Other application instruction.............................................................................................................. 5-410
244.SYS Setting/resetting of I/O monitor error automatic indication ..................................................... 5-411
Note) The instructions marked with # can be used by the L2 but not by the PC2 of the version before
SCPU-3.01.
The instructions marked with * can not be use by the PC2 of the some versions.
The available versions are the following as.
CPU Version
PC2J Ver3.50 or later
PC2JS/JR Ver2.30 or later
PC2JF Ver3.50 or later
PC2F Ver4.30 or later
PC2FS Ver2.10 or later
PC2JC Ver3.20 or later
PC2J16 Ver2.10 or later
SUB-CPU Ver2.50 or later
PC2JNM/PC2JNF Ver2.00 or later
PC2JN Ver2.10 or later
The instructions marked with ! can not be used by the SUB-CPU.
The instructions marked with % can be used by the PC2/L2.
The instructions marked with $ can be used by the PC2/L2 of the Ver SCPU-4.10 or later.
The instructions marked with & can be used by the PC3J series.
ADJ Built-in clock 30-second adjustment (FUN 292) ! 5-414
AND Byte data logical product(AND) (FUN 13) 5-216
AND STR 5-9
AND, AND NOT 5-7
ANDH Logical product (AND) of hexadecimal 2-digit constant (FUN 347) PC3J 5-450
ANN Annunciator (FUN 291) 5-412
ARIO Area-designated I/O refresh (FUN 295) PC3J 5-464
AVE Byte data average (FUN 380) PC3J 5-463
BAUD Peripheral device communication speed setting (FUN 288) # 5-415
BBMOV Bit Block Transfer (move) (FUN 121) PC3J 5-422
BCD 8-bit binary to 2-digit BCD (FUN 154) 5-261
BDIV Byte data block delivery(FUN72) 5-157
BIN 2-digit BCD to 8-bit binary (FUN 152) 5-258
BJIS Binary to JIS code (FUN 157) 5-266
BMOV1 Byte data block transfer 1 (FUN70) 5-149
BMOV2 Byte data block transfer 2 (FUN118) * 5-150
BMVI Byte data indirect block transfer (FUN71) 5-152
BPU Bit extraction (FUN 54) * 5-292
BPUP Byte data block extraction(FUN73) 5-162
BRSET Buffer register(EB) address set (FUN 371) PC3JG 5-466
BRST Byte data bit reset (FUN 139) * 5-289
BSET Byte data bit set (FUN 136) * 5-286
BSFL Byte data n bits left shift (FUN 227) * 5-308
BSFR Byte data n bits right shift (FUN 224) * 5-302
BSRL Byte data n bits right-left shift (FUN 230) 5-314
BXCH Byte data block exchange(FUN134) 5-168
CALL Subroutine call (FUN 273) 5-363
CDIR Indirect memory card data read (FUN 298) $ 5-408
CDIW Indirect memory card write (FUN 299) $ 5-409
CDO1 Code conversion output 1 (FUN 86) 5-279
CDO2 Code conversion output 2 (FUN 87) 5-280
CDR Memory card data read (FUN 296) $ 5-406
CDSET Code conversion set (FUN 85) 5-278
CDW Memory card data write (FUN 297) $ 5-407
CLR Matching data clearance (byte) (FUN 21) 5-179
CMOV Byte data transfer on clearance confirmation (FUN 20) 5-177
CNT (Direct mode up counter) 5-33
CNT (Indirect mode up counter) 5-34
CNTD (Direct mode down counter) 5-35
CNTD (Indirect mode down counter) 5-36
CNTH (Direct mode up/down counter) 5-37
CNTH (Indirect up/down counter) 5-39
CP Byte data comparison (FUN 17) 5-282
CRET Return from subroutine (FUN 285) PC3J 5-463
CSET I/O Register read-out instruction issue to TOYOPUC-PCS (FUN 370) PC3JG 5-470
D<=H 8-digit hexadecimal constant comparison (<=) * 5-101
D<=N 32-bit data comparison (<=) * 5-103
D<>D 10-digit decimal constant comparison (<>) * 5-66
D<>H 8-digit hexadecimal constant comparison (<>) * 5-65
D<>N 32-bit data comparison (<>) * 5-67
D<D 10-digit decimal constant comparison (<) * 5-93
D<H 8-digit hexadecimal constant comparison (<) * 5-92
D<N 32-bit data comparison (<) * 5-94
D=D 10-digit decimal constant comparison (=) * 5-57
D=H 8-digit hexadecimal constant comparison (=) * 5-56
D=N 32-bit data comparison (=) * 5-58
D>=D 10-digit decimal constant comparison (>=) * 5-84
D>=H 8-digit hexadecimal constant comparison (>=) * 5-83
D>=N 32-bit data comparison (>=) * 5-85
D>D 10-digit decimal constant comparison (>) * 5-75
D>H 8-digit hexadecimal constant comparison (>) * 5-74
D>N 32-bit data comparison (>) * 5-76
DAND 32-bit data logical product(AND) (FUN 188) 5-218
DANDH Logical product (AND) of hexadecimal 8-digit constant (FUN 349) PC3J 5-452
DAVE 32-bit data average (FUN 382) PC3J 5-463
DBCD 32-bit binary to 8-digit BCD (FUN 155) 5-263
DBIN 8-bit BCD to 32-bit binary (FUN 153) 5-260
DBPU 32-bit data extraction (FUN 143) * 5-294
DBRST 32-bit data bit reset (FUN 141) * 5-291
DBSET 32-bit data bit set (FUN 138) * 5-288
DBSFL 32-bit data n bits left shift (FUN 229) * 5-310
DBSFR 32-bit data n bits right shift (FUN 226) * 5-304
DBSRL 32-bit data n bits right-left shift (FUN 232) 5-316
DCP 32-bit data comparison (FUN 211) 5-284
DDEC 32-bit data binary decrement (FUN 198) 5-237
DDECP 8-digit BCD decrement (FUN 204) 5-240
DDIV 32-bit data delivery (FUN123) * 5-156
DDOWN 32-bit data lower-digit direction shift (FUN 258) 5-326
DEC Byte data binary decrement (FUN 197) 5-235
DECO 4 to 16 decoder (FUN 50) 5-268
DECP 2-digit BCD decrement (FUN 202) 5-238
Deduction of hexadecimal 2-digit constant (FUN 329) PC3J 5-432
DFIFR 32-bit data FIFO read (FUN 165) 5-336
DFIFW 32-bit data FIFO write (FUN 162) 5-330
D-H Deduction of hexadecimal 8-digit constant (FUN 331) PC3J 5-434
D-HP Addition of BCD 8-digit constant (FUN 334) PC3J 5-437
DI Interrupt inhibit (FUN 276) % 5-376
DINC 32-bit data binary increment (FUN 196) 5-231
DINCP 8-digit BCD increment (FUN 201) 5-234
DIV Byte data delivery (FUN5) 5-154
DMAX 32-bit data maximum value retrieve (FUN 376) PC3J 5-461
DMIN 32-bit data minimum value retrieve (FUN 379) PC3J 5-462
DMOV 8-digit Hex constant transfer (FUN102) 5-125
DMOVE 4-byte data direct transfer (FUN111) 5-139
DMOVF 4-byte data indirect transfer 1 (FUN113) * 5-142
DMOVG 4-byte data indirect transfer 2 (FUN115) * 5-145
DMOVH 4-byte data indirect transfer 3 (FUN117) * 5-148
DMOVJ 4-byte transfer from register to file register (FUN 146) %& 5-185
DMOVK 4-byte transfer from file register to register (FUN 149) %& 5-188
DMOVP 8-digit BCD constant transfer (FUN104) 5-128
DMOVQ 11-digit octal transfer (FUN108) 5-134
DMOVR 10-digit decimal constant transfer (FUN106) 5-131
DNOT 32-bit data inversion (FUN 192) 5-224
DOR 32-bit data logical sum(OR) (FUN 190) 5-221
DORH Logical sum (OR) of hexadecimal 8-digit constant (FUN 352) PC3J 5-455
DOWN Byte data lower-digit direction shift (FUN 256) 5-324
D-P 8-digit BCD subtraction (FUN 180) 5-201
DPUP 32-bit data extraction (FUN125) * 5-161
DRL 32-bit data left rotate without carry (FUN 247) * 5-354
DRLC 32-bit data left rotate with carry (FUN 238) * 5-351
DRLR 32-bit data right-left rotate without carry (FUN 250) 5-360
DRLRC 32-bit data right-left rotate with carry (FUN 241) 5-357
DRR 32-bit data right rotate without carry (FUN 244) * 5-348
DRRC 32-bit data right rotate with carry (FUN 235) * 5-345
DSFL 32-bit data 1 bit left shift (FUN 220) * 5-307
DSFR 32-bit data 1 bit right shift (FUN 218) * 5-301
DSRH 32-bit data Search (FUN 214) 5-250
DSRL 32-bit data 1 bit right-left shift (FUN 223) * 5-313
DSTI1 32-bit data sum (FUN 364) PC3J 5-459
DSUM 32-bit data ON-bit count (FUN 210) 5-297
DUP 32-bit data upper-digit direction shift (FUN 254) 5-321
DXCH 32-bit data exchange(FUN133) * 5-167
DXOR 32-bit data exclusive logical sum(XOR) (FUN 194) 5-227
DXORH Exclusive logical sum (XOR) of hexadecimal 8-digit constant (FUN 355) PC3J 5-458
MAX Byte data maximum value retrieve (FUN 374) PC3J 5-461
MC Master control set (FUN 440) 5-369
MCR Master control reset (FUN 444) 5-370
MIN Byte data minimum value retrieve (FUN 377) PC3J 5-462
MKP1 Odd parity composition (FUN 83) 5-253
MKP2 Even parity composition (FUN 81) 5-254
MOV 2-digit Hex constant transfer (FUN100) 5-123
MOVAD Address Constant Transfer (Move) (FUN 320) PC3J 5-425
MOVE 1-byte data direct transfer (FUN90) 5-137
MOVF 1-byte data indirect transfer 1 (FUN74) 5-140
MOVG 1-byte data indirect transfer 2 (FUN75) 5-143
MOVH 1-byte data indirect transfer 3 (FUN76) 5-146
MOVJ 1-byte transfer from register to file register (FUN 144) %& 5-183
MOVK 1-byte transfer from file register to register (FUN 147) %& 5-186
MOVP 2-digit BCD constant transfer (FUN103) 5-126
MOVQ 3-digit octal transfer (FUN107) 5-132
MOVR 3-digit decimal constant transfer (FUN105) 5-129
MOVT 2-digit Hex constant transfer to two places (FUN62) 5-135
MSET Output of the message for DLNK-M2 (FUN 302) PC3JG 5-469
NEXT End of repetition (FUN 480) # 5-367
NOP 5-19
NOT 5-18
NOT Byte data inversion (FUN 9) 5-222
OR Byte data logical sum(OR) (FUN 14) 5-219
OR STR 5-10
OR, OR NOT 5-8
ORH Logical sum (OR) of hexadecimal 2-digit constant (FUN 350) PC3J 5-453
OUT 5-11
REF External input transfer (FUN 283) !# 5-181
REFO External output transfer (FUN 284) !# 5-182
RET Return from subroutine (FUN 464) 5-364
RETI Return from interrupt routine (FUN 468) % 5-380
RI Input refresh (FUN 281) 5-373
RIO Input/output refresh (FUN 280) ! 5-372
RL Byte data left rotate without carry (FUN 245) * 5-352
RLC Byte data left rotate with carry (FUN 236) * 5-349
RLR Byte data right-left rotate without carry (FUN 248) 5-358
RLRC Byte data right-left rotate with carry (FUN 239) 5-355
RO Output refresh (FUN 282) 5-374
RR Byte data right rotate without carry (FUN 242) * 5-346
RRC Byte data right rotate with carry (FUN 233) * 5-343
RST 5-13
SDOWN 4 bit data lower-digit direction shift (FUN 255) 5-323
SEG 7-segment decode (FUN 52) 5-272
SET 5-12
SFIN Accumulation shift input (FUN 68) 5-338
SFL Byte data 1 bit left shift (FUN 219) * 5-305
SFOUT Accumulation shift output (FUN 69) 5-340
SFR Byte data 1 bit right shift (FUN 217) * 5-299
SPR Special module byte-data readout (for readout of file for the SIO module) (FUN 304) 5-387
SPW Special module byte-data write (for writing of file for the SIO module) (FUN 306) 5-389
SRH1 Byte data search 1 (FUN 88) 5-242
SRH2 Byte data search 2 (FUN 212) 5-246
SRL Byte data 1 bit right-left shift (FUN 221) * 5-311
START Main program start (FUN 448) 5-382
STI1 Byte data sum (FUN 362) PC3J 5-459
STOP Program stop (FUN 287) 5-416
STR, STR NOT 5-6
STURN 4bits inversion (FUN 259) PC3J 5-423
SUM Byte data ON-bit count (FUN 208) 5-295
SUP 4 bit data upper-digit direction shift (FUN 251) 5-317
SXCH 4-bit data exchange(FUN53) 5-164
SYS Applied command flag clear mode setting (FUN 300) PC3J 5-465
SYS Setting/resetting of I/O monitor error automatic indication 5-411
SYS Clock adjustment instruction (FUN 300) PC3J 5-479
UP1 Byte data upper-digit direction shift 1 (FUN 91) 5-318
UP2 Byte data upper-digit direction shift 2 (FUN 252) 5-319
USC User defined clock (FUN 293) 5-413
W- Word data binary subtraction (FUN 93) 5-197
W* Word data binary multiplication (FUN 94) 5-203
W*H Multiplication of hexadecimal 4-digit constant (FUN 336) PC3J 5-439
W*HP Multiplication of BCD 4-digit constant (FUN 339) PC3J 5-442
W*P 4-digit BCD multiplication (FUN 182) 5-206
W/ Word data binary division 2 (FUN 175) # 5-210
W/B Word data binary division 1 (FUN 95) 5-208
W/H Divide of hexadecimal 4-digit constant (FUN 342) PC3J 5-445
W/HP Divide of BCD 4-digit constant (FUN 345) PC3J 5-448
W/P 4-digit BCD division (FUN 185) 5-213
W+ Word data binary addition (FUN 92) 5-191
W+H Addition of hexadecimal 4-digit constant (FUN 324) PC3J 5-427
W+HP Addition of BCD 4-digit constant (FUN 327) PC3J 5-430
W+P 4-digit BCD addition (FUN 10) 5-194
W<=D 5-digit decimal constant comparison (<=) 5-99
W<=H 4-digit hexadecimal constant comparison (<=) 5-98
W<=N Word data comparison (<=) * 5-100
W<>D 5-digit decimal constant comparison (<>) 5-63
W<>H 4-digit hexadecimal constant comparison (<>) 5-62
W<>N Word data comparison (<>) 5-64
W<D 5-digit decimal constant comparison (<) 5-90
W<H 4-digit hexadecimal constant comparison (<) 5-89
W<N Word data comparison (<) * 5-91
W=D 5-digit decimal constant comparison (=) 5-54
W=H 4-digit hexadecimal constant comparison (=) 5-53
W=N Word data comparison (=) 5-55
W>=D 5-digit decimal constant comparison (>=) 5-81
W>=H 4-digit hexadecimal constant comparison (>=) 5-80
W>=N Word data comparison (>=) 5-82
W>D 5-digit decimal constant comparison (>) 5-72
W>H 4-digit hexadecimal constant comparison (>) 5-71
W>N Word data comparison (>) 5-73
WAND Word data logical product(AND) (FUN 187) 5-217
WANDH Logical product (AND) of hexadecimal 4-digit constant (FUN 348) PC3J 5-451
WAVE Word data average (FUN 381) PC3J 5-463
WBCD 16-bit binary to 4-bit BCD (FUN 4) 5-262
WBDIV Word data block delivery(FUN126) 5-158
WBIN 4-digit BCD to 16-bit binary (FUN 3) 5-259
WBMOV Word data block transfer (FUN119) * 5-151
WBMVI Word data indirect block transfer (FUN120) * 5-153
WBPU Word data bit extraction (FUN 142) 5-293
WBPUP Word data block extraction(FUN127) 5-163
WBR Data loading from the buffer register(EB) (FUN 372) PC3JG 5-467
WBRST Word data bit reset (FUN 140) 5-290
WBSET Word data set (FUN 137) 5-287
WBSFL Word data n bits left shift (FUN 228) * 5-309
WBSFR Word data n bits right shift (FUN 225) * 5-303
WBSRL Word data n bits right-left shift (FUN 231) 5-315
WBW Data saving to the buffer register(EB) (FUN 373) PC3JG 5-468
WBXCH Word data block exchange (FUN 135) 5-169
WCLR Matching data clearance (Word) (FUN 167) 5-180
WCMOV Word data transfer on clearance confirmation (FUN 166) 5-178
WCP Word data comparison (FUN 12) 5-283
WDEC Word data binary decrement (FUN 64) 5-236
WDECP 4-digit BCD decrement (FUN 203) 5-239
WDIV Word data delivery (FUN122) 5-155
WDOWN Word data lower-digit direction shift (FUN 257) 5-325
WDR Scan timer reset (FUN 46) 5-417
WFIFR Word data FIFO read (FUN 164) 5-334
WFIFW Word data FIFO write (FUN 161) 5-329
WFIL Word data fill (FUN 129) * 5-173
WFILI Word data indirect fill (FUN 131) * 5-176
W-H Deduction of hexadecimal 4-digit constant (FUN 330) PC3J 5-433
W-HP Addition of BCD 4-digit constant (FUN 333) PC3J 5-436
WINC Word data binary increment (FUN 63) 5-230
WINCP 4-digit BCD increment (FUN 200) 5-233
WMAX Word data maximum value retrieve (FUN 375) PC3J 5-461
WMIN Word data minimum value retrieve (FUN 378) PC3J 5-462
WMOV 4-digit Hex constant transfer (FUN101) 5-124
WMOVE 2-byte data direct transfer (FUN0) 5-138
WMOVF 2-byte data indirect transfer 1 (FUN112) 5-141
WMOVG 2-byte data indirect transfer 2 (FUN114) 5-144
WMOVH 2-byte data indirect transfer 3 (FUN116) 5-147
WMOVJ 2-byte transfer from register to file register (FUN 145) %& 5-184
WMOVK 2-byte transfer from file register to register (FUN 148) %& 5-187
WMOVP 4-digit BCD constant transfer (FUN1) 5-127
WMOVQ 6-digit octal transfer (FUN8) 5-133
WMOVR 5-digit decimal constant transfer (FUN7) 5-130
WMOVT 4-digit Hex constant transfer to two places (FUN 110) 5-136
WNOT Word data inversion (FUN 191) 5-223
WOR Word data logical sum(OR) (FUN 189) 5-220
WORH Logical sum (OR) of hexadecimal 4-digit constant (FUN 351) PC3J 5-454
W-P 4-digit BCD subtraction (FUN 11) 5-200
WPUP Word data extraction (FUN124) 5-160
WRL Word data left rotate without carry (FUN 246) * 5-353
WRLC Word data left rotate with carry (FUN 237) * 5-350
WRLR Word data right-left rotate without carry (FUN 249) 5-359
WRLRC Word data right-left rotate with carry (FUN 240) 5-356
WRR Word data right rotate without carry (FUN 243) * 5-347
WRRC Word data right rotate with carry (FUN 234) * 5-344
WSFL Word data 1 bit left shift (FUN 37) * 5-306
WSFR Word data 1 bit right shift (FUN 36) * 5-300
WSRH1 Word data search 1 (FUN 89) 5-244
WSRH2 Word data search 2 (FUN 213) 5-248
WSRL Word data 1 bit right-left shift (FUN 222) * 5-312
WSTI1 Word data sum (FUN 363) PC3J 5-459
WSUM Word data ON-bit count (FUN 209) 5-296
WTIM1 Hours, minutes, and seconds to seconds (FUN 158) 5-274
WTIM2 Seconds to hours, minutes and seconds (FUN 159) 5-276
WTURN 16bits inversion (FUN 261) PC3J 5-423
WUP Word data upper-digit direction shift (FUN 253) 5-320
WXCH 16-bit data exchange(FUN2) 5-166
WXOR Word data exclusive logical sum(XOR) (FUN 193) 5-226
WXORH Exclusive logical sum (XOR) of hexadecimal 4-digit constant (FUN 354) PC3J 5-457
XCH 8-bit data exchange(FUNl32) 5-165
XOR Byte data exclusive logical sum(XOR) (FUN 18) 5-225
XORH Exclusive logical sum (XOR) of hexadecimal 2-digit constant (FUN 353) PC3J 5-456
Note) The instructions marked with # can be used by the L2 but not by the PC2 of the version before
SCPU-3.01.
The instructions marked with * can not be use by the PC2 of the some versions.
The available versions are the following as.
CPU Version
PC2J Ver3.50 or later
PC2JS/JR Ver2.30 or later
PC2JF Ver3.50 or later
PC2F Ver4.30 or later
PC2FS Ver2.10 or later
PC2JC Ver3.20 or later
PC2J16 Ver2.10 or later
SUB-CPU Ver2.50 or later
PC2JNM/PC2JNF Ver2.00 or later
PC2JN Ver2.10 or later
The instructions marked with ! can not be used by the SUB-CPU.
The instructions marked with % can be used by the PC2/L2.
The instructions marked with $ can be used by the PC2/L2 of the Ver SCPU-4.10 or later.
The instructions marked with & can be used by the PC3J series.
1. MAKINK SEQUENCE CIRCUITS
1.1. Usage of TOYOPUC
1.1.1. Connection between I/O devices and TOYOPUC
The equipment is provided with limit switches (LS) which provide information on the location of
machine components and with pushbutton switches (PB) which give instructions to the machine.
The devices defining the conditions of action, generically called I/O devices, should be connected
to the input module on the TOYOPUC.
The equipment is also provide with solenoid valves (SOL) which drive and control, by hydraulic
medium, the cylinders used as actuator and with magnetic switches (MS) which turn on or off the
motors. These devices, generically called output devices, should be connected to the output
module on the TOYOPUC.
1.1.2. I/O address
First specify a terminal to which an input or output device is to be connected. Each terminal has its
proper number and this is called I/O address. In a sequence program, the I/O address specifies
the I/O device.
(1) I/O coding
I/O addresses are expressed by 3-digit hexadecimal numeral and are determined as follows:
1) Stating address of each base is specified. The starting address of the CPU base is “000”.
The upper 2 digits of starting address of an added I/O base are the value set by the I/O
address selector switch on the I/O power module for PC2/L2 and on the selector module for
PC2J/3J, and the lowest digit is “0”. (For example, setting the I/O address selector to “12”
results in the starting address of “120” for the added I/O base. )
When setting the I/O addresses for racks, take care not to use the same addresses for bases.
2) The allocation of addresses for each base starts from the leftmost slot with respect to the
starting address for that base.
1-1
3) The number of points assigned to a base is basically the number of input/output points on the
I/O module being installed in that slot and can be changed from the programmer. I/O
addresses equivalent of 32 points for PC2/L2 and 16 points for PC2J/3J are usually allocated
to a slot with no I/O module mounted.
The communication modules and special modules have a different number of allocation points.
(Refer to the instruction manual of each module.)
Note 1) Available I/O addresses for PC2/L2 range from 000 to 7FF.
Allocation of address 800 and higher will result in an address setting error and
display of message “RACK ADDR ERROR” on the I/O monitor. If this happens,
correct the address allocation.
Available I/O addresses for PC2J range from 000 to 1FF.
Available I/O addresses for PC3J range from 000 to 3FF.
Allocation of address exceeded the maximum address will result in an address
setting error and the PC2J/3J-CPU displays the error code “49”.
If this happens, correct the address allocation.
Note 2) Sharing the same address with more than base causes address overlapping and the
error message “I/O ADDRESS ERR” will appear on the I/O monitor of the PC2/L2 and
“46” for PC2J/3J.If this appears, correct the address allocation.
Note 3) If the total consumption memory capacity is 60K bytes or less, up to 8communication
modules can be installed. Each communication module has its own consumption
memory capacity. (Refer to the instruction manual of each module.)The
consumption memory capacity refers to the capacity of the memory used in data
exchange between the CPU and communication modules. It has no relation with the
user memory (Program, data memory, comment), that is, the user memory will not be
reduced.
(2) Specifying rack number
Specifying rack number is to distinguish a particular rack from the others. Set the rack number
in a hexadecimal number, using 1 to E (F must not be used.) , from the “R.NO.” switch on the
I/O power module of the PC2/L2 and the selector module of the PC2J/3J. The rack number of
CPU base is regarded as “0”.
Note 1) Sharing a rack with more than one base results in an I/O rack number overlap error,
displaying the error message “RACK NO.ERROR” on the I/O monitor. Correct the
duplicated rack number.
PC2J do not have the function detecting the overlap error. In case of the overlap
error for PC3J, the error message is displayed.
Note 2) Specifying “F” for a rack number results in an I/O rack No. specification error. The
error message “RACK NO F USED” is displayed on the I/O monitor of the PC2/L2
and “41” for PC2J/3J. Correct the rack No.