Toshiba TC7WBL125FK Technical data

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TOSHIBA CMO S Digital I ntegrat ed Circ uit Silicon Monolithic
TENTATIVE
TC7WBL125FK
Dual Low-Voltage Bus Switch
When output enable (OE) is at low level, the switch is on; when at high level, the switch is off.
P-MOS and N-MOS channel block also allows that the device is suitable for analog signal transmission.
All inputs are equipped with protection circuits to protect the device from static discharge.
Features
Weight: 0.01 g (typ.)
TC7WBL125FK
Operating voltage: V
High speed operation: t
Ultra-low on resistance: R
Electro-static discharge (ESD) performance: ±200 V or more (JEITA)
±2000 V or more (MIL)
High noise immunity: V
Power-down protection for inputs and I/O terminal.
Package: US8
Pin Assignment
VCC
OE2
8
7 6 5
W B L
1 2 5
1 2 3 4
OE1
A1 B2
= 2~3.6 V
CC
= 0.25 ns (max) @3 V
pd
= 5 (typ.) @3 V
ON
= V
NIH
NIL
(top view)
B1
A2
GND
= 28% VCC (min)
1
2001-10-16
Truth Table
TC7WBL125FK
Inputs
OE
L A port = B port
H Disconnect
Function
System Diagram
A1 B1
1OE
A2 B2
2OE
Maximum Ratings
Characteristics Symbol Rating Unit
Power supply voltage V Control pin input voltage V Switch terminal I/O voltage V Clump diode current IIK 50 mA Switch I/O current I Power dissipation P DC VCC/GND current ICC/I Storage temperature T
CC
IN
S
S
D GND
stg
0.5~7.0 V
0.5~7.0 V
0.5~7.0 V
128 mA 200 mW
±100 mA
65~150 °C
Recommended Operating Conditions
Characteristics Symbol Rating Unit
Power supply voltage V Control pin input voltage V Switch I/O voltage V Operating temperature T Control pin input rise/fall time dt/dv 0~10 ns/V
CC
IN
opr
S
2.0~3.6 V 0~5.5 V 0~5.5 V
40~85 °C
2
2001-10-16
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