TOSHIBA TC74VHC595F, TC74VHC595FN, TC74VHC595FT, TC74VHC595FK Technical data

TC74VHC595F/FN/FT/FK

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74VHC595F,TC74VHC595FN,TC74VHC595FT,TC74VHC595FK

8-Bit Shift Register/Latch (3-state)

The TC74VHC595 is an advanced high speed 8-BIT SHIFT

REGISTER/LATCH fabricated with silicon gate C

It achieves the high speed operation similar to equivalent Bipolar

Schottky TTL while maintaining the CMOS low power dissipation.

The TC74VHC595 contains an 8-bit static shift register which

feeds an 8-bit storage register.

Shift operation is accomplished on the positive going transition of
the SCK input. The output register is loaded with the contents of
the shift register on the positive going transition of the RCK input.
Since RCK and SCK signal are independent, parallel outputs can be
held stable during the shift operation. And, since the parallel
outputs are 3-state, it can be directly connected to 8-bit bus. This
register can be used in serial-to-parallel conversion, data receivers,
etc.

An input protection circuit ensures that 0 to 5.5 V can be applied
to the input pins without regard to the supply voltage. This device
can be used to interface 5 V to 3 V systems and two supply systems
such as battery back up. This circuit prevents device destruction
due to mismatched supply and input voltages.

2

MOS technology.

Features

Note: xxxFN (JEDEC SOP) is not available in

Japan.

TC74VHC595F

TC74VHC595FN

TC74VHC595FT

• High speed: f

• Low power dissipation: I

• High noise immunity: V

• Power down protection is provided on all inputs.

• Balanced propagation delays: t

• Wide operating voltage range: V

• Low noise: V

• Pin and function compatible with 74ALS595

= 185 MHz (typ.) at VCC = 5 V

max

= 4 μA (max) at Ta = 25°C

CC

= 1.0 V (max)

OLP

NIH

= V

= 28% VCC (min)

NIL

∼

t

−

pLH

(opr) = 2 V to 5.5 V

CC

pHL

TC74VHC595FK

Weight
SOP16-P-300-1.27A : 0.18 g (typ.)
SOL16-P-150-1.27 : 0.13 g (typ.)
TSSOP16-P-0044-0.65A : 0.06 g (typ.)
VSSOP16-P-0030-0.50 : 0.02 g (typ.)

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TC74VHC595F/FN/FT/FK

Pin Assignment IEC Logic Symbol

(13)

QB

QC

QD

16

15

14

VCC

QA

SI

1

2

3

G

SCLR

SCK

(12)

(10)

(11)

EN3

C

R

C/1

RCK

2

SRG8

QE

QF

QG

QH

GND

4

5

6

7

8

(top view)

13

12

10

9

G

RCK

SCK 11

SCLR

QH’

Truth Table

Inputs

SI SCK SCLR RCK G

X X X X H QA thru QH outputs disable

X X X X L QA thru QH outputs enable

X X L X X Shift register is cleared.

L

H H X X

X H X X State of S.R. is not changed.

X X X X S.R. data is stored into storage register.

X X X X Storage register stage is not changed.

H X X

First stage of S.R. becomes “L”. Other stages store the data of previous stage,
respectively.

First stage of S.R. becomes “H”. Other stages store the data of previous stage,
respectively.

SI

(14)

Function

1D

2D 3

2D 3

(15)

(1)

(2)

(3)

(4)

(5)

(6)

(7)

(9)

QA

QB

QC

QD

QE

QF

QG

QH

QH’

X: Don’t care

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Timing Chart

SCK

SI

RCK

SCLR

G

QA

QB

QC

QD

QE

TC74VHC595F/FN/FT/FK

QF

QG

QH

QH’

System Diagram

10

SCLR

14

SI

11

SCK

12

RCK

RR RRRRRR

D D

Q D

SCK

SCK

RCK

SCK

QD D D DD D D D DQ Q Q Q Q Q Q

RCK

SCK

RCK

D
D D D D DQ QQQQQQ

SCK

RCK

SCK

RCK

SCK

RCK

SCK

RCK

QH’

9

RCK

13

G

15

QA

1

QB

2

QC

3

QD

4

QE

5

QF

6

QG

7

QH

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TC74VHC595F/FN/FT/FK

Absolute Maximum Ratings (Note)

Characteristics Symbol Rating Unit

Supply voltage range VCC −0.5 to 7.0 V

DC input voltage VIN −0.5 to 7.0 V

DC output voltage V

Input diode current IIK −20 mA

Output diode current IOK ±20 mA

DC output current I

DC VCC/ground current ICC ±75 mA

Power dissipation PD 180 mW

Storage temperature T

Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or

even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).

Operating Ranges (Note)

−0.5 to VCC + 0.5 V

OUT

±25 mA

OUT

−65 to 150 °C

stg

Characteristics Symbol Rating Unit

Supply voltage V

Input voltage V

Output voltage V

Operating temperature T

Input rise and fall time dt/dv

CC

IN

OUT

opr

0 to 100 (V

2.0 to 5.5 V

0 to 5.5

0 to V

CC

−40 to 85 °C

= 3.3 ± 0.3 V)

CC

0 to 20 (V

= 5 ± 0.5 V)

CC

Note: The operating ranges must be maintained to ensure the normal operation of the device.

Unused inputs must be tied to either VCC or GND.

V

V

ns/V

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