TC74VHC273F/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC273F,TC74VHC273FT,TC74VHC273FK
Octal D-Type Flip-Flop with Clear
The TC74VHC273 is an advanced high speed CMOS OCTAL
D-TYPE FLIP FLOP fabricated with silicon gate C
technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
Information signals applied to D inputs are transferred to the
Q outputs on the positive going edge of the clock pulse.
When the
logic level independent of the other inputs.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
CLR
input is held “L”, the Q outputs are at a low
2
MOS
Features
TC74VHC273F
TC74VHC273FT
• High speed: f
• Low power dissipation: I
• High noise immunity: V
• Power down protection is provided on all inputs.
• Balanced propagation delays: t
• Wide operating voltage range: V
• Low noise: V
• Pin and function compatible with 74ALS273
= 165 MHz (typ.) at VCC = 5 V
max
= 4 μA (max) at Ta = 25°C
CC
= 0.9 V (max)
OLP
NIH
= V
= 28% VCC (min)
NIL
∼
t
−
pLH
pHL
CC (opr)
= 2 to 5.5 V
TC74VHC273FK
Weight
SOP20-P-300-1.27A : 0.22 g (typ.)
TSSOP20-P-0044-0.65A : 0.08 g (typ.)
VSSOP20-P-0030-0.50 : 0.03 g (typ.)
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TC74VHC273F/FT/FK
Pin Assignment IEC Logic Symbol
(1)
CLR
Q1
D1
D2
Q2
Q3
D3
D4
1
2
3
4
5
6
7
8
20
19
18
17
16
15
14
13
VCC
Q8
D8
D7
Q7
Q6
D6
D5
CLR
CK
D1 1D
D2
D3
D4
D5
D6
D7
D8
(11)
(3)
(4)
(7)
(8)
(13)
(14)
(17)
(18)
R
C1
(2)
(5)
(6)
(9)
(12)
(15)
(16)
(19)
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q4
9
GND
10 CK 11
(top view)
12
Q5
Truth Table
Inputs Output
D CK Q
CLR
L X X L Clear
H L L ―
H H H ―
H X Qn No Change
X: Don’t care
System Diagram
CLR
D1
1
3
D
D2 D3 D4 D7 D8
4
D
Function
7
D
D5
8
D
13
R
D
14
D6
17
R
D
D
18
RRRRR R
D
CK
11
CK Q
2
Q1
CK Q
5
Q2
CK Q
CK Q
6
Q3
CK Q
9
Q4
CK Q
12
Q5
CK Q
15
Q6
2
CK Q
16
Q7
2007-10-01
19
Q8
TC74VHC273F/FT/FK
Absolute Maximum Ratings (Note)
Characteristics Symbol Rating Unit
Supply voltage range VCC −0.5 to 7.0 V
DC input voltage VIN −0.5 to 7.0 V
DC output voltage V
Input diode current IIK −20 mA
Output diode current IOK ±20 mA
DC output current I
DC VCC/ground current ICC ±75 mA
Power dissipation PD 180 mW
Storage temperature T
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Operating Ranges (Note)
−0.5 to VCC + 0.5 V
OUT
±25 mA
OUT
−65 to 150 °C
stg
Characteristics Symbol Rating Unit
Supply voltage V
Input voltage V
Output voltage V
Operating temperature T
Input rise and fall time dt/dv
CC
IN
OUT
opr
0 to 100 (V
2.0 to 5.5 V
0 to 5.5
0 to V
CC
−40 to 85 °C
= 3.3 ± 0.3 V)
CC
0 to 20 (V
= 5 ± 0.5 V)
CC
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
V
V
ns/V
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Electrical Characteristics
DC Characteristics
Characteristics Symbol
High-level input
voltage
Low-level input
voltage
High-level output
voltage
Low-level output
voltage
Input leakage
current
Quiescent supply
current
V
V
V
V
I
I
CC
IH
IL
OH
OL
IN
V
IN
= V
IH
V
IN
= V
IH
VIN = 5.5 V or GND
VIN = VCC or GND 5.5 ⎯ ⎯ 4.0 ⎯ 40.0 μA
Timing Requirements
Characteristics Symbol
Minimum pulse width (CK)
Minimum pulse width ( CLR ) t
Minimum set-up time ts ⎯
Minimum hold time th ⎯
Minimum removal time ( CLR ) t
(input: tr = tf = 3 ns)
Test Condition Ta = 25°C
⎯
⎯
IOH = −50 μA
or V
IL
IOH = −4 mA
IOH = −8 mA
IOL = 50 μA
or V
IL
IOL = 4 mA
IOL = 8 mA
t
w (L)
t
w (H)
w (L)
rem
TC74VHC273F/FT/FK
−40 to 85°C
(V)
V
CC
2.0
3.0 to
5.5
2.0
3.0 to
5.5
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
0 to
5.5
Test Condition Ta = 25°C
V
⎯
⎯
⎯
Min Typ. Max Min Max
1.50
V
CC
0.7
⎯
⎯
1.9
2.9
4.4
2.58
3.94
⎯
⎯
⎯
⎯
⎯
⎯ ⎯ ±0.1 ⎯ ±1.0 μA
⎯
×
⎯
0.50
⎯
V
⎯
2.0
3.0
4.5
⎯
⎯
0.0
0.0
0.0
⎯
0.36
⎯
0.36
(V) Typ. Limit Limit
CC
± 0.3
3.3
5.0
± 0.5⎯ ⎯
± 0.3
3.3
5.0
± 0.5⎯ ⎯
± 0.3
3.3
5.0
± 0.5⎯ ⎯
± 0.3
3.3
5.0
± 0.5⎯ ⎯
± 0.3
3.3
5.0
± 0.5⎯ ⎯
⎯
⎯
CC
0.3
⎯
⎯
⎯
⎯
⎯
0.1
0.1
0.1
×
1.50
V
CC
0.7
1.9
2.9
4.4
2.48
3.80
5.5
5.0
5.0
5.0
5.5
4.5
1.0
1.0
2.5
2.0
⎯
⎯
⎯
⎯
⎯
⎯
⎯
×
Ta
=
⎯
⎯
0.50
V
CC
0.3
⎯
⎯
⎯
⎯
⎯
0.1
0.1
0.1
0.44
0.44
Ta
=
−40 to
85°C
6.5
5.0
6.0
5.0
6.5
4.5
1.0
1.0
2.5
2.0
×
Unit
V
V
V
V
Unit
ns
ns
ns
ns
ns
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TC74VHC273F/FT/FK
AC Characteristics
Characteristics Symbol
Propagation delay
time
(CK-Q)
Propagation delay
time
(
-Q)
CLR
Maximum clock
frequency
Output to output skew
Input capacitance CIN ⎯ ⎯ 4 10 ⎯ 10 pF
Power dissipation
capacitance
(input: tr = tf = 3 ns)
= −40 to
Test Condition Ta = 25°C
V
t
pLH
t
pHL
t
pHL
f
max
t
osLH
t
osHL
C
(Note 2) ⎯ 31 ⎯ ⎯ ⎯ pF
PD
⎯
⎯
⎯
(Note 1)
(V) CL (pF) Min Typ. Max Min Max
CC
3.3 ± 0.3
5.0
± 0.5
3.3 ± 0.3
± 0.5
5.0
3.3 ± 0.3
± 0.5
5.0
3.3 ± 0.3 50 ⎯ ⎯ 1.5 ⎯ 1.5
5.0
± 0.5 50 ⎯ ⎯ 1.0 ⎯ 1.0
15 ⎯ 8.7 13.6 1.0 16.0
50
15 ⎯ 5.8 9.0 1.0 10.5
50
15 ⎯ 8.9 13.6 1.0 16.0
50
15 ⎯ 5.2 8.5 1.0 10.0
50
15 75 120 ⎯ 65 ⎯
50 50 75
15 120 165 ⎯ 100 ⎯
50 80 110
⎯ 11.2 17.1 1.0 19.5
⎯ 7.3 11.0 1.0 12.5
⎯ 11.4 17.1 1.0 19.5
⎯ 6.7 10.5 1.0 12.0
⎯ 45 ⎯
⎯ 70 ⎯
Ta
85°C
Unit
ns
ns
MHz
ns
Note 1: Parameter guaranteed by design.
t
osLH
= |t
pLHm
− t
pLHn
|, t
osHL
= |t
pHLm
− t
pHLn
|
Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
= CPD·VCC·fIN + ICC/8 (per bit)
And the total CPD when n pcs.of flip flop operate can be gained by the following equation:
CPD (total) = 22 + 9·n
Noise Characteristics
Characteristics Symbol
Quiet output maximum dynamic VOL V
Quiet output minimum dynamic VOL V
Minimum high level dynamic input
voltage
Maximum low level dynamic input
voltage
(input: tr = tf = 3 ns)
OLP
OLV
V
IHD
V
ILD
Test Condition Ta = 25°C
V
CL = 50 pF 5.0 0.5 0.8 V
CL = 50 pF 5.0 −0.5 −0.8 V
CL = 50 pF 5.0 ⎯ 3.5 V
CL = 50 pF 5.0 ⎯ 1.5 V
(V) Typ. Max
CC
Unit
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2007-10-01
Input Equivalent Circuit
INPUT
TC74VHC273F/FT/FK
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2007-10-01
Package Dimensions
TC74VHC273F/FT/FK
Weight: 0.22 g (typ.)
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Package Dimensions
TC74VHC273F/FT/FK
Weight: 0.08 g (typ.)
8
2007-10-01
Package Dimensions
TC74VHC273F/FT/FK
Weight: 0.03 g (typ.)
9
2007-10-01
TC74VHC273F/FT/FK
RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively “Product”) without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with
TOSHIBA’s written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product’s quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before creating and producing designs and using, customers must
also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document,
the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the “TOSHIBA
Semiconductor Reliability Handbook” and (b) the instructions for the application that Product will be used with or for. Customers are
solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the
appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any
information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other
referenced documents; and (c) validating all operating parameters for such designs and applications.
LIABILITY FOR CUSTOMERS’ PRODUCT DESIGN OR APPLICATIONS.
• Product is intended for use in general electronics applications (e.g., computers, personal equipment, office equipment, measuring
equipment, industrial robots and home electronics appliances) or for specific applications as expressly stated in this document.
Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or
reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious
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technology products (mass destruction weapons). Product and related software and technology may be controlled under the
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TOSHIBA ASSUMES NO
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2007-10-01
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