TOSHIBA TC74VHC273F, TC74VHC273FT, TC74VHC273FK Technical data

TC74VHC273F/FT/FK

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74VHC273F,TC74VHC273FT,TC74VHC273FK

Octal D-Type Flip-Flop with Clear

The TC74VHC273 is an advanced high speed CMOS OCTAL
D-TYPE FLIP FLOP fabricated with silicon gate C
technology.

It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.

Information signals applied to D inputs are transferred to the
Q outputs on the positive going edge of the clock pulse.

When the
logic level independent of the other inputs.

An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.

CLR

input is held “L”, the Q outputs are at a low

2

MOS

Features

TC74VHC273F

TC74VHC273FT

• High speed: f

• Low power dissipation: I

• High noise immunity: V

• Power down protection is provided on all inputs.

• Balanced propagation delays: t

• Wide operating voltage range: V

• Low noise: V

• Pin and function compatible with 74ALS273

= 165 MHz (typ.) at VCC = 5 V

max

= 4 μA (max) at Ta = 25°C

CC

= 0.9 V (max)

OLP

NIH

= V

= 28% VCC (min)

NIL

∼

t

−

pLH

pHL

CC (opr)

= 2 to 5.5 V

TC74VHC273FK

Weight
SOP20-P-300-1.27A : 0.22 g (typ.)
TSSOP20-P-0044-0.65A : 0.08 g (typ.)
VSSOP20-P-0030-0.50 : 0.03 g (typ.)

1

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TC74VHC273F/FT/FK

Pin Assignment IEC Logic Symbol

(1)

CLR

Q1

D1

D2

Q2

Q3

D3

D4

1

2

3

4

5

6

7

8

20

19

18

17

16

15

14

13

VCC

Q8

D8

D7

Q7

Q6

D6

D5

CLR

CK

D1 1D

D2

D3

D4

D5

D6

D7

D8

(11)

(3)

(4)

(7)

(8)

(13)

(14)

(17)

(18)

R

C1

(2)

(5)

(6)

(9)

(12)

(15)

(16)

(19)

Q1

Q2

Q3

Q4

Q5

Q6

Q7

Q8

Q4

9

GND

10 CK 11

(top view)

12

Q5

Truth Table

Inputs Output

D CK Q

CLR

L X X L Clear

H L L ―

H H H ―

H X Qn No Change

X: Don’t care

System Diagram

CLR

D1

1

3

D

D2 D3 D4 D7 D8

4

D

Function

7

D

D5

8

D

13

R

D

14

D6

17

R

D

D

18

RRRRR R

D

CK

11

CK Q

2

Q1

CK Q

5

Q2

CK Q

CK Q

6

Q3

CK Q

9

Q4

CK Q

12

Q5

CK Q

15

Q6

2

CK Q

16

Q7

2007-10-01

19

Q8

TC74VHC273F/FT/FK

Absolute Maximum Ratings (Note)

Characteristics Symbol Rating Unit

Supply voltage range VCC −0.5 to 7.0 V

DC input voltage VIN −0.5 to 7.0 V

DC output voltage V

Input diode current IIK −20 mA

Output diode current IOK ±20 mA

DC output current I

DC VCC/ground current ICC ±75 mA

Power dissipation PD 180 mW

Storage temperature T

Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or

even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).

Operating Ranges (Note)

−0.5 to VCC + 0.5 V

OUT

±25 mA

OUT

−65 to 150 °C

stg

Characteristics Symbol Rating Unit

Supply voltage V

Input voltage V

Output voltage V

Operating temperature T

Input rise and fall time dt/dv

CC

IN

OUT

opr

0 to 100 (V

2.0 to 5.5 V

0 to 5.5

0 to V

CC

−40 to 85 °C

= 3.3 ± 0.3 V)

CC

0 to 20 (V

= 5 ± 0.5 V)

CC

Note: The operating ranges must be maintained to ensure the normal operation of the device.

Unused inputs must be tied to either VCC or GND.

V

V

ns/V

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2007-10-01