Toshiba T210 Schematics

A

1 1

B

C

D

E

NDU00/NDU10

Streamline-S 11.6”

2 2

Streamline-M 13.3”

LA-6031P Schematic

3 3

Intel Arrandale SFF/IBEX PEAK

REV 1.0

2010-04-12 Rev 1.0

4 4

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

1 45Monday, April 12, 2010

1 45Monday, April 12, 2010

1 45Monday, April 12, 2010

E

1.0

1.0

1.0

A

B

C

D

E

Compal Confidential

Model Name :NDU00/NDU10
File Name : LA-6031P

1 1

FDI X8

LCD Conn.

2 2

CRT (Sub-board)

HDMI Conn.

page 14

HDMI Level Shifter

page 12

page 13

page 14

3G

PCIe port 4

page 26

RTL8105E 10/100M

3 3

page 27

Cardreader conn.

PCIe port 1

CardReader JMB389

PCIe port 5

page 27

page 28page 28

LVDS-A

RGB

DDP-C

PCIe 1x

1.5V 2.5G Hz(250MB/s)

PCIe 1x

1.5V 2.5G Hz(250MB/s)

PCIe 1x

1.5V 2.5G Hz(250MB/s)

SPI

Mobile

Arrandale CPU

BGA 1288pins

page 5,6,7,8,9

DMI X4

Intel Ibex Peak

FCBGA1071

page 15~23

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 800/1066 MT/s

2.5GHz2.7GHz

3G Int. Camera

USB port 12

USB

5V 480MHz

page 26

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

USB/B

USB port 0,1

page 30

BT conn

USB port 5

page 25

USB port 11

page 12

PCIeMini Card

USB

5V 480MHz

PCIe 1x

1.5V 2.5G Hz(250MB/s)

SATA port 1

5V 3GHz(30 0MB/s)

WiMax

USB port 13

page 26

PCIeMini Card
WLAN

PCIe port 2

page 26

SATA HDD0

page 24

SATA port 5

5V 3GHz(30 0MB/s)

USB port 3

5V 480MHz

eSATARJ45+Transformer (Sub-board)

page 24

USB

USB port 3

page 24

Clock Generator

SLG8SP587VTR

page 11,10

page 12

HD Audio

3.3V 33 MHz

page 31

Int.KBD

page 25

C

LPC BUS

EC ROM

page 32

Compal Secret Data

Compal Secret Data

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

Compal Secret Data

Power/B

page 33

RTC CKT.

page 15

4 4

DC/DC Interface CKT.

page 34

SPI ROM

page 15

Power Circuit DC/DC

page 37~43

A

B

Debug Port

page 32

Touch Pad

page 33

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ENE KB926 E0

3.3V/1.5V 24MHz

Deciphered Date

Deciphered Date

Deciphered Date

HDA Codec

ALC259

page 29

Audio sub-board

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

page 30

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

SPK CONN

page 30

E

1.0

1.0

1.0

2 45Monday, April 12, 2010

2 45Monday, April 12, 2010

2 45Monday, April 12, 2010

5

NSWAA Liverpool Intel Arrandale
NTWAA Sunderland Intel Arrandale

B+

4

Ipeak=5A, Imax=3.5A, Iocp min=8.1

3

2

DESIGN CURRENT 5A

1

+5VALW

SUSP

D D

N-CHANNEL

DESIGN CURRENT 4A

+5VS

SI4800

TPS51125RGER

Ipeak=5A, Imax=3.5A, Iocp min=7.9

WOL_EN#

P-CHANNEL

AO-3413

SUSP

N-CHANNEL

SI4800

P-CHANNEL

C C

AO-3413

P-CHANNEL

AO-3413

DESIGN CURRENT 5A

DESIGN CURRENT 330mA

DESIGN CURRENT 4A

UMA_ENVDD

DESIGN CURRENT 1.5A

BT_PWR#

DESIGN CURRENT 180mA

+3VALW

+3V_LAN

+3VS

+LCD_VDD

+BT_VCC

+5VL

+3VL

VR_ON

ADP3211AMNR2G

GFXVR_EN

ADP3211AMNR2G

VTTP_EN

B B

APW7138NITRL

Ipeak=27A, Imax=18.9A, Iocp min=35

Ipeak=12A, Imax=8.4A, Iocp min=15.6

Ipeak=20A, Imax=14A, Iocp min=28.72

DESIGN CURRENT 48A

DESIGN CURRENT 15A

DESIGN CURRENT 18A

+CPU_CORE

+GFX_CORE

+VTT/+1.05VS

SYSON

Ipeak=7.5A, Imax=5.25A, Iocp min=9.67

DESIGN CURRENT 7.5A

+1.5V

RT8209BGQW

SUSP

SI4856ADY

SUSP

G2992F1U

SUSP

N-CHANNEL

A A

SUSP#

MP2121DQ-LF-Z

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SI4800BDY

Ipeak=1.7A, Imax=1.19A, Iocp min=3

Compal Secret Data

Compal Secret Data

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

3

Compal Secret Data

DESIGN CURRENT 3A

DESIGN CURRENT 1.5A

DESIGN CURRENT 1.2A

DESIGN CURRENT 1.5A

Deciphered Date

Deciphered Date

Deciphered Date

+1.5VS_CPU_VDDQ

+0.75VS

+1.5VS

+1.8VS

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Power Tree

Power Tree

Power Tree

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

3 45Monday, April 12, 2010

3 45Monday, April 12, 2010

3 45Monday, April 12, 2010

1

1.0

1.0

1.0

A

B

C

D

E

Voltage Rails

1 1

State

2 2

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

power
plane

S0

S1

S3

( O MEANS ON X MEANS OFF )

+RTCVCC

O

O

O

O

O

O

+B

+5VL

+3VL

O

O

O

O

O

X

+5VALW

+3VALW

+1.5V

+5VS

+3VS

+1.5VS

+GFX_CORE

+CPU_CORE

+VTT

+0.75VS

+1.8VS

+1.5VS_CPU_VDDQ

O

O

O

O

X

O

X X

X

X X X

BTO Option Table

Function

explain

BTO

Bluetooth

Bluetooth

BT@

OO

OO

X

HDMI

HDMI

IHDMI@

3G

Mini Card

3G

WIRELESS

3G@

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

WLAN@

SIGNAL

Mini Card

WIMAX

WIMAX@

SLP_S3# SLP_S4# SLP_S5#

HIGH HIGHHIGH

HIGH HIGHHIGH

LOW

LOW LOW

HIGH

LOW LOWLOW

main

R5F211B4D31SP

GSENSOR@

1STGSENSOR@

HIGH

HIGH

Gensor

2nd

R5F211B4D34SP

GSENSOR@

2NDGSENSOR@

2ND@1ST@

X

3 3

EC SM Bus1 address

+3VL

Device

EC KB926 D3

Smart Batte ry+3VL

Address Address

0001 011x b

EC SM Bus2 address

Device

PowerPower

EC KB926 D3

+3VS

+3VS Gensor

+3VS

PCH

0100 110x b

PCH SM Bus address

Power

+3VALW

+3VS

4 4

+3VS

+3VS

+3VS

Device

PCH

Clock Generator

DDR DIMM0

DDR DIMM1

WLAN/Wimax/3G

A

Address

1101 001x b

1001 000x b

1001 010x b

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

4 45Monday, April 12, 2010

4 45Monday, April 12, 2010

4 45Monday, April 12, 2010

E

1.0

1.0

1.0

5

Layout rule：10mil width
trace length < 0.5",
spacing 20mil

+VTT

D D

+VTT

+VTT

PS@

PS@

R33

R33
750_0402_1%

750_0402_1%

PLT_RST#19,26,27,28,31,32

H_PWRGOOD20

DRAMPWROK17

12/22 follow NWQAA

BUF_PLT_RST#19

Design guide

1.11update,PLTRST series
resittor 1.5K, PL
resistor 750 oh m

R15

R15
68_0402_5%

68_0402_5%

@

@

1 2

H_CPURST#

+1.5VS_CPU_VDDQ

C C

R30

R30

1.1K_0402_1%

1.1K_0402_1%

@

@

1 2

DRAMPWROK

R33

R33
3K_0402_1%

3K_0402_1%

@

@

1 2

XDP_RST#_R

PMSYNCH17

H_PWRGOOD

DRAMPWROK

VTTPWROK_CPU39

H_THERMTRIP#20

@

12

R190_0402_5%@R190_0402_5%

1 2

R1 20_0402_1%R1 20_0402_1%

1 2

R3 20_0402_1%R3 20_0402_1%

1 2

R4 49.9_0402_1%R4 49.9_0402_1%

1 2

R7 49.9_0402_1%R7 49.9_0402_1%

T1PAD T1PAD

1 2

R9 49.9_0402_1%R9 49 .9_0402_1%

PECI20

1 2

R11 68_0402_5%R11 68_0402_5%

1 2

R21 1K_0402_5%R21 1K_0402_5%

1 2

R23 0_0402_5%R23 0_0402_5%

12

12

12

VTTPWROK_CPU

TAPPWRGD

R321.5K_0402_1% R321.5K_0402_1%

750_0402_1%

750_0402_1%

H_PROCHOT#_D

H_CPURST#

H_PMSYNCH

H_PWRGOOD1_R

R260_0402_5% R260_0402_5%

H_PWRGOOD0_R

R280_0402_5% R280_0402_5%

DRAMPWROK_R

R310_0402_5% R310_0402_5%

R34

R34

H_COMP3

H_COMP2

H_COMP1

H_COMP0

TP_SKTOCC#

CATERR#

4

U1B

U1B

AD71

COMP3

AC70

COMP2

AD69

COMP1

AE66

COMP0

M71

PROC_DETECT

N61

CATERR#

N19

PECI

N67

PROCHOT#

N17

THERMTRIP#

N70

RESET_OBS#

M17

PM_SYNC

AM7

VCCPW RGOOD_1

Y67

VCCPW RGOOD_0

AM5

SM_DRAMPW ROK

H15

VTTPWR GOOD

Y70

TAPPWR GOOD

G3

RSTIN#

INTEL_ARRANDALE_1288

INTEL_ARRANDALE_1288

3

Misc

Misc

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

Clocks

Clocks

Thermal Power Management

Thermal Power Management

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PM_EXT_TS#[0]
PM_EXT_TS#[1]

DDR3

Misc

DDR3

Misc

JTAG & MBP

JTAG & MBP

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

PRDY#
PREQ#

TCK

TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

TDI

AK7
AK8

CLK_CPU_XDP_R

K71

CLK_CPU_XDP#_R

J70

L21
J21

Y2
W4

SM_DRAMRST#_CPU

BJ12

SM_RCOMP_0

BV33

SM_RCOMP_1

BP39

SM_RCOMP_2

BV40

PM_EXTTS#0

AV66

PM_EXTTS#_R

AV64

XDP_PRDY#

U71

XDP_PREQ#

U69

XDP_TCK

T67

XDP_TMS

N65

XDP_TRST#

P69

XDP_TDI_R

T69

XDP_TDO_R

T71

XDP_TDI_M

P71

XDP_TDO_M

T70

W71

XDP_BPM#0

J69

XDP_BPM#1

J67

XDP_BPM#2

J62

XDP_BPM#3

K65

XDP_BPM#4

K62

XDP_BPM#5

J64

XDP_BPM#6

K69

XDP_BPM#7

M69

CLK_CPU_BCLK 20
CLK_CPU_BCLK# 20

1 2

R5 0_0402_5%@R5 0_0402_5%@

1 2

R6 0_0402_5%@R6 0_0402_5%@

CLK_PEG 16
CLK_PEG# 16

R10 100_0402_1%R10 100_0402_1%

1 2

R12 24.9_0402_1%R12 24.9_0402_1%

1 2

R14 130_0402_1%R14 130_0402_1%

1 2

12

R18 0_0402_5%R18 0_0402_5%

Routed as a single daisy chain

12

R25 1K_0402_5%R25 1K_0402_5%

XDP_DBRESET# 17

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_BPM#6
XDP_BPM#7
XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_DBRESET#

CLK_CPU_XDP
CLK_CPU_XDP#

DDR3 Compensation Signals
Layout Note:Please these
resistors near Processor

PM_EXTTS# 10,11

+3VS

EMI reverse, close to CPU

R1431 0_0402_5%@R1431 0_0402_5%@
R1432 0_0402_5%@R1432 0_0402_5%@
R1433 0_0402_5%@R1433 0_0402_5%@
R1434 0_0402_5%@R1434 0_0402_5%@
R1435 0_0402_5%@R1435 0_0402_5%@
R1436 0_0402_5%@R1436 0_0402_5%@
R1437 0_0402_5%@R1437 0_0402_5%@
R1438 0_0402_5%@R1438 0_0402_5%@
R1439 0_0402_5%@R1439 0_0402_5%@
R1440 0_0402_5%@R1440 0_0402_5%@
R1441 0_0402_5%@R1441 0_0402_5%@
R1442 0_0402_5%@R1442 0_0402_5%@
R1443 0_0402_5%@R1443 0_0402_5%@

2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

XDP_BPM#0_R
XDP_BPM#1_R
XDP_BPM#2_R
XDP_BPM#3_R
XDP_BPM#4_R
XDP_BPM#5_R
XDP_BPM#6_R
XDP_BPM#7_R

XDP_PRDY#_R
XDP_PREQ#_R
XDP_TCK_R
XDP_TMS_R
XDP_DBRESET#_R

For S3 CPU power saving

R2 0_0402_5%@R2 0_0402_5%@

S

SM_DRAMRST#_CPU

100K_0402_5%

100K_0402_5%

S

12

G

R8

R8

PS@

PS@

G

2

1

C878

C878

0.1U_0402_10V6K

0.1U_0402_10V6K

2

PM_EXTTS#0

PM_EXTTS#_R

XDP_TDI_R XDP_TDI

XDP_TDO_M

XDP_TDI_M

XDP_TDO_R

R13 10K_0402_5%R13 10K_0402_5%

R17 10K_0402_5%R17 10K_0402_5%

12

R24

R24

0_0402_5%

0_0402_5%

JTAG MAPPING

Scan Chain
(Default)

CPU Only

GMCH Only

1

12

D

D

13

PS@

PS@

Q1

Q1

BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

R1484

R1484

0_0402_5%

0_0402_5%

PS@

PS@

1 2

R20 0_0402_5%R20 0_0402_5%

@

@

1 2

R22 0_0402_5%

R22 0_0402_5%

@

@

1 2

R27 0_0402_5%

R27 0_0402_5%

1 2

R29 0_0402_5%R29 0_0402_5%

SM_DRAMRST# 10,11

12

PS@

PS@

12

12

STUFF -> R20, R23, R27
NO STUFF -> R21, R26

STUFF -> R20, R21
NO STUFF -> R23, R26, R27

STUFF -> R26, R27
NO STUFF -> R20, R21, R23

RST_GATE 20

+VTT

XDP_TDO

XDP_PREQ#_R
XDP_PRDY#_R

XDP_BPM#0_R
XDP_BPM#1_R

XDP_BPM#2_R
XDP_BPM#3_R

XDP_BPM#4_R
XDP_BPM#5_R

XDP_BPM#6_R
XDP_BPM#7_R

T2PAD T2PAD
T3PAD T3PAD

XDP_TCK_R

Deciphered Date

Deciphered Date

Deciphered Date

+VTT

XDP Connector

JXDP1

JXDP1

1

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGO OD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A @

SAMTE_BSH-030-01-L-D-A @

2

2

GND1

4

OBSFN_C0

6

OBSFN_C1

8

GND3
OBSDATA_C0
OBSDATA_C1

OBSDATA_C2
OBSDATA_C3

OBSDATA_D0
OBSDATA_D1

OBSDATA_D2
OBSDATA_D3

ITPCLK/HOOK4

ITPCLK#/HOOK5

VCC_OBS_CD

RESET#/HOOK6

DBR#/HOOK7

10
12
14

GND5

16
18
20

GND7

22

OBSFN_D0

24

OBSFN_D1

26

GND9

28
30
32

GND11

34
36
38

GND13

GND15

TD0

TRST#

TDI

TMS

GND17

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

CLK_CPU_XDP

40

CLK_CPU_XDP#

42
44

XDP_RST#_R

46

XDP_DBRESET#_R

48
50

XDP_TDO

52

XDP_TRST#

54

XDP_TDI

56

XDP_TMS_R

58
60

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

CPU CLK/MISC/JTAG

CPU CLK/MISC/JTAG

CPU CLK/MISC/JTAG

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

1 2

12

1

R41

R41
51_0402_5%

51_0402_5%

+VTT

1

C12

0.1U_0402_10V6K

0.1U_0402_10V6K

2

5 45Monday, April 12, 2010

5 45Monday, April 12, 2010

5 45Monday, April 12, 2010

@C12

@

1.0

1.0

1.0

@

@

B B

VTTPWROK34,39

A A

For S3 CPU power saving

PMEG2010AEH_SOD123

PMEG2010AEH_SOD123

VTTPWROK

5

21

D1

D1

+3VALW

5

U2

PS@U2

PS@

1

P

IN1

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

SN74AHC1G08DCKR_SC70-5

3

@

12

R420_0402_5%@R420_0402_5%

+VTT

12

R36

R36
10K_0402_5%

10K_0402_5%

1 2

R1477 0_0402 _5%R1477 0_0402 _5%

12/22 follow NWQAA

PS@

PS@ R39 51_0402_5%R39 51_0402_5%

4

R40 1.5K_0402_1%

R40 1.5K_0402_1%

VTTPWROK_CPU

DRAMPWROK

4

PM_PBTN_OUT#17

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

H_PWRGOOD H_PWRGOOD_R

TAPPWRGD

R37 1K_040 2_5%@R37 1K_0402_5%@

1 2

1 2

R38 0_0402_5%@R38 0_0402_5%@

2010/04/12 2010/01/23

2010/04/12 2010/01/23

2010/04/12 2010/01/23

12

C11 0.1U_0402_10V6K

C11 0.1U_0402_10V6K

TAPPWRGD_R

Compal Secret Data

Compal Secret Data

Compal Secret Data

5

4

3

2

1

U1E

04/20 INTEL #418125 update

U1E

W66

RSVD32

W64

RSVD33

AC69

RSVD34

AC71

RSVD35

AA71

RSVD36

D D

DMI_PTX_C RX_N017
DMI_PTX_C RX_N117
DMI_PTX_C RX_N217
DMI_PTX_C RX_N317

DMI_PTX_C RX_P017
DMI_PTX_C RX_P117
DMI_PTX_C RX_P217
DMI_PTX_C RX_P317

DMI_CTX_P RX_N017
DMI_CTX_P RX_N117
DMI_CTX_P RX_N217
DMI_CTX_P RX_N317

DMI_CTX_P RX_P017
DMI_CTX_P RX_P117
DMI_CTX_P RX_P217
DMI_CTX_P RX_P317

C C

B B

FDI_CTX_P RX_N017
FDI_CTX_P RX_N117
FDI_CTX_P RX_N217
FDI_CTX_P RX_N317
FDI_CTX_P RX_N417
FDI_CTX_P RX_N517
FDI_CTX_P RX_N617
FDI_CTX_P RX_N717

FDI_CTX_P RX_P017
FDI_CTX_P RX_P117
FDI_CTX_P RX_P217
FDI_CTX_P RX_P317
FDI_CTX_P RX_P417
FDI_CTX_P RX_P517
FDI_CTX_P RX_P617
FDI_CTX_P RX_P717

FDI_FSYNC017
FDI_FSYNC117

FDI_INT17

FDI_LSYNC01 7
FDI_LSYNC11 7

H17
K15

F10

G17
M15
G13

N10

W10

AC7
AC9

AB5

AA1
AB2

F7
J8

K8

J4

F9

J6

K9

J2

J13

J11

L2
N7

M4

P1

R7
U7

W8

K1
N5
N2
R2
N9
R8
U6

U1A

U1A

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

FDI_FSYNC[0]
FDI_FSYNC[1]

FDI_INT

FDI_LSYNC[0]
FDI_LSYNC[1]

PEG_COM P

1 2

R43 49.9_0402_1 %R43 49.9_0 402_1%

PEG_RBIAS

1 2

R44 750_0402_ 1%R44 750_0402_1%

CFG Straps for PROCESSOR

CFG0

R93 3.01K_0402_ 1%@ R 93 3.01K_04 02_1%@

PCI-Express Configuration Select

CFG0

Not applicable for Clarksfield Processor

CFG3

CFG3-PCI Express Static Lane Reversal

CFG4

ES1 sample need negative voltage
ES2 sample contact to GND

CFG4-Display Port Presence

CFG4

1 2

1: Single PEG
0: Bifurcation enabled

R79 3.01K_0402_ 1%@R79 3.01K_0402_ 1%@

1 2

1: Normal Operation
0: Lane Numbers ReversedCFG3

15 -> 0, 14 ->1, .....

R272 3.01 K_0402_1%R272 3.01 K_0402_1%

1 2

1: Disabled; No Physical Display Port
attached to Embedded Display Port

0: Enabled; An external Display Port
device is connected to the Embedded
Display Port

T142P AD T142PAD
T141P AD T141PAD

T140P AD T140PAD
T139P AD T139PAD
T138P AD T138PAD
T136P AD T136PAD
T135P AD T135PAD
T134P AD T134PAD
T133P AD T133PAD
T132P AD T132PAD
T130PAD T 130PAD
T129P AD T129PAD
T128P AD T128PAD
T127P AD T127PAD
T126P AD T126PAD

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]

B12
A13
D12
B11

G40
G38
H34
P34
G28
H25
H24
D29
B26
D26
B23
D22
A20
D19
A17
B14

F40
J38
G34
M34
J28
G25
K24
B28
A27
B25
A24
B21
B19
B18
B16
D15

N40
L38
M32
D40
A38
G32
B33
B35
L30
A31
B32
L28
N26
M24
G21
J20

L40
N38
N32
B39
B37
H32
A34
D36
J30
B30
D33
N28
M25
N24
F21
L20

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX#[0]
PEG_RX#[1]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

DMI Intel(R) FDI

DMI Intel(R) FDI

CFG0

AL4

CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

T121P AD T121PAD

CFG[0]

AM2

CFG[1]

AK1

CFG[2]

AK2

CFG[3]

AK4

CFG[4]

AJ2

CFG[5]

AT2

CFG[6]

AG7

CFG[7]

AF4

CFG[8]

AG2

CFG[9]

AH1

CFG[10]

AC2

CFG[11]

AC4

CFG[12]

AE2

CFG[13]

AD1

CFG[14]

AF8

CFG[15]

AF6

CFG[16]

AB7

CFG[17]

AU1

RSVD_TP[0]

T4

RSVD15

T2

RSVD16

U1

RSVD17

V2

RSVD18

AV71

RSVD19

AW70

RSVD20

AY69

RSVD21

BB69

RSVD22

D8

RSVD23

B7

RSVD24

A10

RSVD26

B9

RSVD27

C5

RSVD_NCTF[7]

A6

RSVD_NCTF[8]

E3

RSVD_NCTF[6]

F1

RSVD_NCTF[5]

INTEL_ARR ANDALE_1288

INTEL_ARR ANDALE_1288

RESERVED

RESERVED

RSVD_NCTF[3]
RSVD_NCTF[4]

RSVD_NCTF[2]
RSVD_NCTF[1]

RSVD_TP[2]
RSVD_TP[1]

DC_TEST_BV71
DC_TEST_BV69
DC_TEST_BV68

DC_TEST_BV5
DC_TEST_BV3

DC_TEST_BV1
DC_TEST_BT71
DC_TEST_BT69

DC_TEST_BT3

DC_TEST_BT1
DC_TEST_BR71

DC_TEST_BR1

DC_TEST_E71

DC_TEST_E1
DC_TEST_C71
DC_TEST_C69

DC_TEST_C3
DC_TEST_A71
DC_TEST_A69
DC_TEST_A68

DC_TEST_A5

RSVD37

RSVD38
RSVD39

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD54
RSVD55
RSVD56
RSVD57
RSVD58

RSVD62
RSVD63

RSVD64
RSVD65

AA69

R66
R64

BT5
BR5

BV6
BV8

AV69
AK71
AN69
AP66
AH66
AK66
AR71
AM66
AK69
AU71
AT70
AR69
AU69
AT67

AP2
AN7

AV4
AU2

BE69
BE71

BV71
BV69
BV68
BV5
BV3
BV1
BT71
BT69
BT3
BT1
BR71
BR1
E71
E1
C71
C69
C3
A71
A69
A68
A5

T116 PADT 116 PAD
T117 PADT 117 PAD

T118 PADT 118 PAD

T119 PADT 119 PAD

T122 PADT 122 PAD

T124 PADT 124 PAD
T125 PADT 125 PAD

INTEL_ARR ANDALE_1288

INTEL_ARR ANDALE_1288

A A

Security Class ification

Security Class ification

Security Class ification

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/04/ 12 2010/01/ 23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

CPU DMI/FDI/PEG

CPU DMI/FDI/PEG

CPU DMI/FDI/PEG

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

6 45Monday, April 12, 2010

6 45Monday, April 12, 2010

6 45Monday, April 12, 2010

1

1.0

1.0

1.0

5

U1C

U1C

DDR_A_D [0..63]10

4

3

U1D

U1D

DDR_B_D [0..63]11

2

1

BM34

SA_CK[0]

BP35

SA_CK#[0]

BF20

DDR_A_D 0
DDR_A_D 1

D D

C C

B B

DDR_A_B S010
DDR_A_B S110
DDR_A_B S210

DDR_A_C AS#10
DDR_A_R AS#10

DDR_A_W E#10

DDR_A_D 2
DDR_A_D 3
DDR_A_D 4
DDR_A_D 5
DDR_A_D 6
DDR_A_D 7
DDR_A_D 8
DDR_A_D 9
DDR_A_D 10
DDR_A_D 11
DDR_A_D 12
DDR_A_D 13
DDR_A_D 14
DDR_A_D 15
DDR_A_D 16
DDR_A_D 17
DDR_A_D 18
DDR_A_D 19
DDR_A_D 20
DDR_A_D 21
DDR_A_D 22
DDR_A_D 23
DDR_A_D 24
DDR_A_D 25
DDR_A_D 26
DDR_A_D 27
DDR_A_D 28
DDR_A_D 29
DDR_A_D 30
DDR_A_D 31
DDR_A_D 32
DDR_A_D 33
DDR_A_D 34
DDR_A_D 35
DDR_A_D 36
DDR_A_D 37
DDR_A_D 38
DDR_A_D 39
DDR_A_D 40
DDR_A_D 41
DDR_A_D 42
DDR_A_D 43
DDR_A_D 44
DDR_A_D 45
DDR_A_D 46
DDR_A_D 47
DDR_A_D 48
DDR_A_D 49
DDR_A_D 50
DDR_A_D 51
DDR_A_D 52
DDR_A_D 53
DDR_A_D 54
DDR_A_D 55
DDR_A_D 56
DDR_A_D 57
DDR_A_D 58
DDR_A_D 59
DDR_A_D 60
DDR_A_D 61
DDR_A_D 62
DDR_A_D 63

AT8
AT6
BB5
BB9
AV7
AV6
BE6

BE8
BF11
BE11

BK5
BH13

BF9

BF6

BK7

BN8
BN11

BN9

BG17
BK15

BK9

BG15
BH17
BK17
BN20
BN17
BK25
BH25

BJ20

BH21
BG24
BG25

BJ40

BM43

BF47
BF48

BN40
BH43
BN44
BN47
BN48
BN51
BH53

BJ55

BH48

BJ48

BM53
BN55

BF55

BN57
BN65

BJ61
BF57
BJ57

BK64
BK61

BJ63
BF64

BB64
BB66

BJ66
BF65

AY64
BC70

BT38
BH38
BF21

BK43
BL38
BF38

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

SA_CKE[0]

BK36

SA_CK[1]

BH36

SA_CK#[1]

BK24

SA_CKE[1]

BH40

SA_CS#[0]

BJ47

SA_CS#[1]

BF43

SA_ODT[0]

BL47

SA_ODT[1]

DDR_A_D M0

BB10

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

BJ10
BM15
BN24
BG44
BG53
BN62
BH59

AY5
BJ7
BN13
BL21
BH44
BK51
BP58
BE62

AY7
BJ5
BL13
BN21
BK44
BH51
BM60
BE64

BT36
BP33
BV36
BG34
BG32
BN32
BK32
BJ30
BN30
BF28
BH34
BH30
BJ28
BF40
BN28
BN25

DDR_A_D M1
DDR_A_D M2
DDR_A_D M3
DDR_A_D M4
DDR_A_D M5
DDR_A_D M6
DDR_A_D M7

DDR_A_D QS#0
DDR_A_D QS#1
DDR_A_D QS#2
DDR_A_D QS#3
DDR_A_D QS#4
DDR_A_D QS#5
DDR_A_D QS#6
DDR_A_D QS#7

DDR_A_D QS0
DDR_A_D QS1
DDR_A_D QS2
DDR_A_D QS3
DDR_A_D QS4
DDR_A_D QS5
DDR_A_D QS6
DDR_A_D QS7

DDR_A_M A0
DDR_A_M A1
DDR_A_M A2
DDR_A_M A3
DDR_A_M A4
DDR_A_M A5
DDR_A_M A6
DDR_A_M A7
DDR_A_M A8

DDR_A_M A9
DDR_A_M A10
DDR_A_M A11
DDR_A_M A12
DDR_A_M A13
DDR_A_M A14
DDR_A_M A15

DDRA_CL K0 10 DDRB_CL K0 11
DDRA_CL K0# 10
DDRA_CK E0 10 DDRB_CKE0 11

DDRA_CL K1 10
DDRA_CL K1# 10
DDRA_CK E1 10

DDRA_SC S0# 10
DDRA_SC S1# 10 DDRB_SC S1# 11

DDRA_OD T0 10 DDRB_OD T0 11
DDRA_OD T1 10 DDRB_OD T1 11

DDR_A_D M[0..7] 10

DDR_A_D QS#[0..7] 1 0

DDR_A_D QS[0..7] 10

DDR_A_M A[0..15] 10

DDR_B_B S011
DDR_B_B S111
DDR_B_B S211

DDR_B_C AS#11
DDR_B_R AS#11

DDR_B_W E#11

DDR_B_D 0
DDR_B_D 1
DDR_B_D 2
DDR_B_D 3
DDR_B_D 4
DDR_B_D 5
DDR_B_D 6
DDR_B_D 7
DDR_B_D 8
DDR_B_D 9
DDR_B_D 10
DDR_B_D 11
DDR_B_D 12
DDR_B_D 13
DDR_B_D 14
DDR_B_D 15
DDR_B_D 16
DDR_B_D 17
DDR_B_D 18
DDR_B_D 19
DDR_B_D 20
DDR_B_D 21
DDR_B_D 22
DDR_B_D 23
DDR_B_D 24
DDR_B_D 25
DDR_B_D 26
DDR_B_D 27
DDR_B_D 28
DDR_B_D 29
DDR_B_D 30
DDR_B_D 31
DDR_B_D 32
DDR_B_D 33
DDR_B_D 34
DDR_B_D 35
DDR_B_D 36
DDR_B_D 37
DDR_B_D 38
DDR_B_D 39
DDR_B_D 40
DDR_B_D 41
DDR_B_D 42
DDR_B_D 43
DDR_B_D 44
DDR_B_D 45
DDR_B_D 46
DDR_B_D 47
DDR_B_D 48
DDR_B_D 49
DDR_B_D 50
DDR_B_D 51
DDR_B_D 52
DDR_B_D 53
DDR_B_D 54
DDR_B_D 55
DDR_B_D 56
DDR_B_D 57
DDR_B_D 58
DDR_B_D 59
DDR_B_D 60
DDR_B_D 61
DDR_B_D 62
DDR_B_D 63

BA2

AW2

BD1

BE4
AY1

BC2

BF2
BH2
BG4
BG1
BR6
BR8

BK2
BU9

BV10
BR10

BT12

BT15
BV15
BV12
BP12
BV17
BU16
BP15
BU19
BV22

BT22
BP19
BV19
BV20

BT20

BT48
BV48
BV50
BP49

BT47
BV52
BV54

BT54
BP53
BU53

BT59

BT57
BP56

BT55
BU60
BV59
BV61
BP60
BR66
BR64
BR62

BT61
BN68

BL69

BJ71

BF70
BG71
BC67
BK70
BK67
BD71
BD69

BV43
BV41
BV24

BU46

BT40

BT41

BJ4

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]

SB_DM[1]

SB_DM[2]

SB_DM[3]

SB_DM[4]

SB_DM[5]

SB_DM[6]

SB_DM[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]

SB_MA[1]

SB_MA[2]

SB_MA[3]

SB_MA[4]

SB_MA[5]

SB_MA[6]

SB_MA[7]

SB_MA[8]

SB_MA[9]

SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

BU33
BV34
BT26

BV38
BU39
BT24

BP46
BT43

BV45
BU49

BB4
BL4
BT13
BP22
BV47
BV57
BU65
BF67

BE2
BM3
BU12
BT19
BT52
BV55
BU63
BG69

BD4
BN4
BV13
BT17
BT50
BU56
BV62
BJ69

BT34
BP30
BV29
BU30
BV31
BT33
BT31
BP26
BV27
BT27
BU42
BU26
BT29
BT45
BV26
BU23

DDR_B_D M0
DDR_B_D M1
DDR_B_D M2
DDR_B_D M3
DDR_B_D M4
DDR_B_D M5
DDR_B_D M6
DDR_B_D M7

DDR_B_D QS#0
DDR_B_D QS#1
DDR_B_D QS#2
DDR_B_D QS#3
DDR_B_D QS#4
DDR_B_D QS#5
DDR_B_D QS#6
DDR_B_D QS#7

DDR_B_D QS0
DDR_B_D QS1
DDR_B_D QS2
DDR_B_D QS3
DDR_B_D QS4
DDR_B_D QS5
DDR_B_D QS6
DDR_B_D QS7

DDR_B_M A0
DDR_B_M A1
DDR_B_M A2
DDR_B_M A3
DDR_B_M A4
DDR_B_M A5
DDR_B_M A6
DDR_B_M A7
DDR_B_M A8

DDR_B_M A9
DDR_B_M A10
DDR_B_M A11
DDR_B_M A12
DDR_B_M A13
DDR_B_M A14
DDR_B_M A15

DDRB_CL K0# 11

DDRB_CL K1 11
DDRB_CL K1# 11
DDRB_CK E1 11

DDRB_SC S0# 11

DDR_B_D M[0..7] 11

DDR_B_D QS#[0..7] 1 1

DDR_B_D QS[0..7] 11

DDR_B_M A[0..15] 11

INTEL_ARR ANDALE_1288

INTEL_ARR ANDALE_1288

A A

Security Class ification

Security Class ification

Security Class ification

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/04/ 12 2010/01/ 23

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

INTEL_ARR ANDALE_1288

INTEL_ARR ANDALE_1288

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CPU DDRIII

CPU DDRIII

CPU DDRIII

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

7 45Monday, April 12, 2010

7 45Monday, April 12, 2010

7 45Monday, April 12, 2010

1

1.0

1.0

1.0

C20

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C19

C19

1

1

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

A A

C23

C23

1

1

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C27

C27

1

1

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C36

C36

1

1

2

2

0116 add

B B

+VTT

10U_0805_6.3V6M

10U_0805_6.3V6M

C43

C43

1

2

+VCAP2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C49

C49

C50

C50

1

2

0112 change size

C C

10U_0805_6.3V6M

10U_0805_6.3V6M

C62

C62

1

1

2

2

D D

+VTT

47P_0402_50V8J

47P_0402_50V8J

C103

C103

C102

C102

1

@

@

@

@

2

C17

C17

C18

10U_0805_6.3V6M

1

1

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C25

C25

C24

C24

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C29

C29

C28

C28

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C37

C37

C38

C38

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C44

C44

1

1

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C52

C52

C51

C51

1

1

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C63

C63

C64

C64

1

2

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

47P_0402_50V8J

C104

C104

1

1

@

@

2

2

09/22 update

1

1

+

+

+

+

2

2

330U_2.5V_M_R17

330U_2.5V_M_R17

330U_2.5V_M_R17

330U_2.5V_M_R17

AN32
AN30
AN28
AN26

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

C45

C45

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+VTT

C105

C105

1

@

@

2

AN24
AN23
AN21

C26

C26

AN19

AL32
AL30
AL28
AL26
AL24
AL23
AL21

AL19
AK14
AK12

C30

C30

AJ10
AH14
AH12

AF28

AF26

AF24

AF23

AF21

AF19

AF17

AF15

C39

C39

AF14
AD28
AD26
AD24
AD23
AD21
AD19
AD17

W21
W19

10U_0805_6.3V6M

10U_0805_6.3V6M

C46

C46

1

2

AK62

1U_0402_6.3V4Z

1U_0402_6.3V4Z

AK60

C53

C53

AK59

1

1

AH60
AH59

AF60

2

2

1

2

AF59
AD60
AD59
AB60
AB59
AA60
AA59

W60
W59

10U_0805_6.3V6M

10U_0805_6.3V6M

C65

C65

04/29 Change C55,C56,C57 from
@47P_0402 to 1UF_0402 by HP.

+CPU_CORE

1

C66

C66

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

+CPU_CORE

47P_0402_50V8J

47P_0402_50V8J

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C106

C106

C107

C107

1

2

1

U1G

U1G

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37

VTT1_1
VTT1_2

U21

VTT1_3

U19

VTT1_4

U17

VTT1_5

U15

VTT1_6

U14

VTT1_7

U12

VTT1_8

R21

VTT1_9

R19

VTT1_10

R17

VTT1_11

VCAP2_1
VCAP2_2
VCAP2_3
VCAP2_4
VCAP2_5
VCAP2_6
VCAP2_7
VCAP2_8
VCAP2_9
VCAP2_10
VCAP2_11
VCAP2_12
VCAP2_13
VCAP2_14
VCAP2_15

U60

VCAP2_16

U59

VCAP2_17

R60

VCAP2_18

R59

VCAP2_19

INTEL_ARRANDALE_1288

INTEL_ARRANDALE_1288

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C67

C67

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C108

C108

1

2

1

C68

C68

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C109

C109

1

2

C18

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

GRAPHICS

GRAPHICS

PEG & DMI

PEG & DMI

C69

C69

1

@

@

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C110

C110

C111

C111

1

1

2

2

Follow SCH check list

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

GRAPHICS VIDs

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30

POWER

POWER

47P_0402_50V8J

47P_0402_50V8J

1U_0402_6.3V4Z

1U_0402_6.3V4Z

VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

VTT0_DDR
VTT0_DDR[1]
VTT0_DDR[2]
VTT0_DDR[3]
VTT0_DDR[4]
VTT0_DDR[5]
VTT0_DDR[6]
VTT0_DDR[7]
VTT0_DDR[8]
VTT0_DDR[9]

VTT1_12
VTT1_13
VTT1_14
VTT1_15
VTT1_16
VTT1_17
VTT1_18
VTT1_19
VTT1_20
VTT1_21

+CPU_CORE

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C70

C70

C71

C71

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C112

C112

1

2

C114

C114

C113

C113

1

1

2

2

1

+GFX_CORE

C22

C22

C21

C21

C20

AF12
AF10

AF71
AG67
AG70
AH71
AN71
AM67
AM70

AH69
AL71
AL69

BU40
BU35
BU28
BN38
BM25
BL30
BJ38
BH32
BH28
BG43
BF16
BF15
BD35
BD33
BD32
BD30
BD28
BD26
BD24
BD23
BD21
BD19
BD17
BD15
BB35
BB33
BB32
BB30
BB28
BB26
BB24
BB23
BB21
BB19
BB17
BB15

AW32
AW30
AW28
AW26
AW24
AW23
AW21
AW19
AW17
AW15

AD15
AD14
AD12
AB12
AA12
W17
W15
W14
W12
R15

C72

C72

1

2

0116 add

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

@

@

C54

C54

C58

C58

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C73

C73

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C115

C115

1

2

2

GFXVR_EN

1 2

R46 4.7K_0402_5%R46 4.7K_0402_5%

VCC_AXG_SENSE 43
VSS_AXG_SENSE 43

GFX_VID0 43
GFX_VID1 43
GFX_VID2 43
GFX_VID3 43
GFXVID4 43
GFX_VID5 43
GFX_VID6 43

1 2

GFXVR_EN 39,43

GFX_DPRSLPVR

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C31

C31

C32

C32

1

1

2

2

330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

10U_0805_6.3V6M

10U_0805_6.3V6M

C40

C40

C41

C41

1

1

+

+

2

2

+VTT_DDR

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C55

C55

1

1

2

2

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

C59

C59

1

1

2

2

0116 add

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C74

C74

C75

C75

1

1

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C117

C117

C116

C116

1

1

2

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

C56

C56

C60

C60

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C118

C118

R474.7K_0402_5% @ R474.7K_0402_5% @

GFXVR_IMON 43

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C33

C33

1

2

C42

C42

0_0603_5%

0_0603_5%

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C76

C76

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C119

C119

1

2

+VTT

R1465 1K_0402_5%R1465 1K_0402_5%

+VTT

+1.5VS_CPU_VDDQ

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C35

C35

C34

C34

1

2

+VTT

12

L1

L1

+VTT

10U_0805_6.3V6M

10U_0805_6.3V6M

C61

C61

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C77

C77

1

1

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C120

C120

1

1

2

2

1 2

+CPU_CORE

AF57
AF55
AF53
AF51
AF50
AF48
AF46
AF44
AF42
AF41
AD55
AD51
AD48
AD44
AD41
AB55
AB51
AB48
AB44
AB41
AA55
AA51
AA48
AA44
AA41

W55
W51
W48
W44
W41

1U_0402_6.3V4Z

1U_0402_6.3V4Z

3

GFX_DPRSLPVR

Reserved_1203

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25

POWER

POWER

VCC_26
VCC_27
VCC_28
VCC_29
VCC_30

U55

VCC_31

U51

VCC_32

U48

VCC_33

U44

VCC_34

U41
R55
R51
R48
R44
R41
P60
N55
N51
N48
N44
N42
M60
M51
M44
L55
K60
K51
K44

J55
H60
H51
H44
G60
G55
G51
G44
F55
E60
E57
E53
E50
E46
E42
D59
D57
D55
D54
D52
D50
D48
D47
D45
D43
B60
B56
B53
B49
B46
B42
A57
A54
A50
A47
A43

CPU CORE SUPPLY

CPU CORE SUPPLY

VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89

+VCAP0 +VCAP1

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C79

C79

C78

C78

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

R1466 1K_0402_5%

R1466 1K_0402_5%

1 2

@

@

U1H

U1H

+VCAP0

BD55

VCAP0_1

BD51

VCAP0_2

BD48

VCAP0_3

BB55

VCAP0_4

BB51

VCAP0_5

BB48

VCAP0_6

AY57

VCAP0_7

AY53

VCAP0_8

AY50

VCAP0_9

AW57

VCAP0_10

AW53

VCAP0_11

AW50

VCAP0_12

AU55

VCAP0_13

AU51

VCAP0_14

AU48

VCAP0_15

AR55

VCAP0_16

AR51

VCAP0_17

AR48

VCAP0_18

AN57

VCAP0_19

AN53

VCAP0_20

AN50

VCAP0_21

AL57

VCAP0_22

AL53

VCAP0_23

AL50

VCAP0_24

AK57

VCAP0_25

AK53

VCAP0_26

AK50

VCAP0_27

+VCAP1

BD44

VCAP1_1

BD41

VCAP1_2

BD37

VCAP1_3

BB44

VCAP1_4

BB41

VCAP1_5

BB37

VCAP1_6

AY46

VCAP1_7

AY42

VCAP1_8

AY39

VCAP1_9

AW46

VCAP1_10

AW42

VCAP1_11

AW39

VCAP1_12

AU44

VCAP1_13

AU41

VCAP1_14

AU37

VCAP1_15

AR44

VCAP1_16

AR41

VCAP1_17

AR37

VCAP1_18

AN46

VCAP1_19

AN42

VCAP1_20

AN39

VCAP1_21

AL46

VCAP1_22

AL42

VCAP1_23

AL39

VCAP1_24

AK46

VCAP1_25

AK42

VCAP1_26

AK39

VCAP1_27

INTEL_ARRANDALE_1288

INTEL_ARRANDALE_1288

0112 add 7pcs Caps to follow Design guide 0112 add 7pcs Caps to follow Design guide

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C80

C80

2

3

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C82

C82

C81

C81

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C83

C83

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C84

C84

2

+VTT

R1460 1K_0402_5%@R1460 1K_0402_5%@

1 2

R1461 1K_0402_5%R1461 1K_0402_5%

1 2

Add pull high_1130 Reserved pull low_1203

H_VTTVID1 = Low, 1.1V

H_VTTVID1 = High, 1.05V

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C87

C87

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

VCCSENSE

VSSSENSE

VCCSENSE

VSSSENSE

1

C88

C88

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

VCCSENSE42

VSSSENSE42

1

1

C86

C86

C85

C85

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2010/04/12 2010/12/31

2010/04/12 2010/12/31

2010/04/12 2010/12/31

CPU_VID[0..6]42

H_VTTSELECT

R49

R49
R50

R50

VTT_SENSE39

VSS_SENSE_VTT39

Close to CPU

1 2

R51 100_0402_1%

R51 100_0402_1%

1 2

R52 100_0402_1%R52 100_0402_1%

+1.8VS

+1.5VS_CPU_VDDQ

0_0603_5%

0_0603_5%

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C89

C89

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

Deciphered Date

Deciphered Date

Deciphered Date

4

IMVP_IMON42

4

T9PAD T9PAD
T8PAD T8PAD

0_0402_5%

0_0402_5%

1 2
1 2

0_0402_5%

0_0402_5%

10U_0805_6.3V6M

10U_0805_6.3V6M

1

2

L2

L2

12

C57

C57

C90

C90

H_PSI#

H_DPRSLPVR

H_DPRSLPVR

VCCSENSE_R
VSSSENSE_R

+CPU_CORE

1

C474.7U_0603_6.3V6K C474.7U_0603_6.3V6K

2

+VDDQ_CK

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

R1463 1K_0402_5%R1463 1K_0402_5%

1 2

R1464 1K_0402_5% @R1464 1K_0402_5% @

1 2

U1F

U1F

H_PSI#

F68

A61
D61
D62
A62
B63
D64
D66

AN1

F66

A41

F64
F63

N13

R12

W39
W37

U37
R39
R37

BB14
BB12

1

C91

C91

C92

C92

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VTT_SELECT[1]

PROC_DPRSLPVR

ISENSE

VCC_SENSE
VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

VCCPLL1
VCCPLL2
VCCPLL3
VCCPLL4
VCCPLL5

VDDQ_CK[1]
VDDQ_CK[2]

INTEL_ARRANDALE_1288

INTEL_ARRANDALE_1288

VTT0_72
VTT0_73

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C93

C93

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

C48

C48

1

2

5

+VTT

AW14

VTT0_11

AW12

VTT0_12

AU60

VTT0_13

AU59

VTT0_14

AU12

VTT0_15

AR60

VTT0_16

AR59

VTT0_17

AR12

VTT0_18

AN60

VTT0_19

AN59

VTT0_20

AN35

VTT0_21

AN33

VTT0_22

AN17

VTT0_23

AN15

VTT0_24

AN14

VTT0_25

AN12

VTT0_26

AM10

VTT0_27

AL60

VTT0_28

AL59

VTT0_29

AL17

VTT0_30

AL15

VTT0_31

AL14

VTT0_32

AL12

VTT0_33

AK35

VTT0_34

1

C98

C98

2

5

VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8

VTT0_9
VTT0_10
VTT0_43
VTT0_44
VTT0_45
VTT0_46
VTT0_47
VTT0_48
VTT0_49
VTT0_50
VTT0_51
VTT0_52
VTT0_53
VTT0_54
VTT0_55
VTT0_56
VTT0_57
VTT0_58
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT0_63
VTT0_64
VTT0_65
VTT0_66
VTT0_67
VTT0_68
VTT0_69
VTT0_70
VTT0_71
VTT0_72
VTT0_73

+VTT

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C99

C99

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

AK33
AF39
AF37
AF35
AF33
AF32
AF30
AD39
BF60
BF59
BD60
BD59
BB60
BB59
AY60
AW60
AW35
AW33
AD37
AD35
AD33
AD32
AD30
W35
W33
W32
W30
W28
W26
W24
W23
U35
U33
U32
U30
U28
U26
U24
U23
R35
R33
R32
R30
R28
R26
R24
R23
AY10
AN9

1

2

VTT0_72
VTT0_73

C100

C100

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C101

C101

2

8 45Monday, April 12, 2010

8 45Monday, April 12, 2010

8 45Monday, April 12, 2010

SENSE LINESCPU VIDS

SENSE LINESCPU VIDS

1.1V RAIL POWER

1.1V RAIL POWER

1.8V

1.8V

POWER

POWER

R53 0_0402_5%

R53 0_0402_5%

1 2

R54 0_0402_5%

R54 0_0402_5%

1 2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C94

C94

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

2

1

C96

C96

C95

C95

1U_0402_6.3V4Z

1U_0402_6.3V4Z

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

C97

C97

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Auburndale(4/5)-PWR

Auburndale(4/5)-PWR

Auburndale(4/5)-PWR

1.0

1.0

1.0

1

2

3

4

5

U1I

U1I

BU62

VSS1

BU58

VSS2

BU55

VSS3

BU51

VSS4

BU48

VSS5

BU44

VSS6

BU37

VSS7

BU32

A A

B B

C C

D D

VSS8

BU25

VSS9

BU21

VSS10

BU18

VSS11

BU14

VSS12

BU11

VSS13

BU7

VSS14

BP42

VSS15

BN64

VSS16

BN6

VSS17

BM70

VSS18

BM51

VSS19

BM44

VSS20

BM32

VSS21

BM24

VSS22

BM17

VSS23

BL57

VSS24

BL55

VSS25

BL48

VSS26

BL40

VSS27

BL28

VSS28

BL20

VSS29

BK63

VSS30

BK60

VSS31

BK53

VSS32

BK34

VSS33

BK10

VSS34

BJ64

VSS35

BJ21

VSS36

BJ9

VSS37

BJ1

VSS38

BH70

VSS39

BH57

VSS40

BH55

VSS41

BH47

VSS42

BH24

VSS43

BH20

VSS44

BH15

VSS45

BG51

VSS46

BG36

VSS47

BF62

VSS48

BF30

VSS49

BF13

VSS50

BF8

VSS51

BE70

VSS52

BE65

VSS53

BE9

VSS54

BE1

VSS55

BD57

VSS56

BD53

VSS57

BD50

VSS58

BD46

VSS59

BD42

VSS60

BD39

VSS61

BD14

VSS62

BB71

VSS63

BB62

VSS64

BB57

VSS65

BB53

VSS66

BB50

VSS67

BB46

VSS68

BB42

VSS69

BB39

VSS70

BB7

VSS71

BB1

VSS72

BA70

VSS73

AY71

VSS74

AY66

VSS75

AY62

VSS76

AY59

VSS77

AY55

VSS78

AY51

VSS79

AY48

VSS80

AR42

VSS140

AR39

VSS141

AR35

VSS142

AR33

VSS143

AR32

VSS144

AR30

VSS145

AR28

VSS146

AR26

VSS147

AR24

VSS148

AR23

VSS149

AR21

VSS150

AR19

VSS151

AR17

VSS152

AR15

VSS153

AR14

VSS154

AR4

VSS155

AR1

VSS156

AP70

VSS157

AP64

VSS158

AN62

VSS159

AN55

VSS160

AY44

VSS81

AY41

VSS82

AY37

VSS83

AY35

VSS84

AY33

VSS85

AY32

VSS86

AY30

VSS87

AY28

VSS88

AY26

VSS89

INTEL_ARRANDALE_1288

INTEL_ARRANDALE_1288

VSS

VSS

1

VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220

AY24
AY23
AY21
AY19
AY17
AY15
AY14
AY12
AY8
AY4
AW67
AW62
AW59
AW55
AW51
AW48
AW44
AW41
AW37
AV9
AV1
AU70
AU62
AU57
AU53
AU50
AU46
AU42
AU39
AU35
AU33
AU32
AU30
AU28
AU26
AU24
AU23
AU21
AU19
AU17
AU15
AU14
AU4
AT64
AT10
AR62
AR57
AR53
AR50
AR46
AN51
AN48
AN44
AN41
AN37
AN5
AN4
AM64
AM8
AL62
AL55
AL51
AL48
AL44
AL41
AL37
AL35
AL33
AL1
AK70
AK64
AK55
AK51
AK48
AK44
AK41
AK37
AK32
AK30
AK28
AK26
AK24
AK23
AK21
AK19
AK17
AK15
AJ70
AH62
AH57
AH55
BV66
BV64
BT68
BR69
BR68
BR3
BN71
BN1
BL71
BL1
R14
H71
F71
E69
E68
A66
A64
E5
C68

U1J

U1J

AH53

VSS202

AH51

VSS203

AH50

VSS204

AH48

VSS205

AH46

VSS206

AH44

VSS207

AH42

VSS208

AH41

VSS209

AH39

VSS210

AH37

VSS211

AH35

VSS212

AH33

VSS213

AH32

VSS214

AH30

VSS215

AH28

VSS216

AH26

VSS217

AH24

VSS218

AH23

VSS219

AH21

VSS220

AH19

VSS221

AH17

VSS222

AH15

VSS223

AH4

VSS224

AG64

VSS225

AG9

VSS226

AG6

VSS227

AF69

VSS228

AF62

VSS229

AF1

VSS230

AE70

VSS231

AE64

VSS232

AD62

VSS233

AD57

VSS234

AD53

VSS235

AD50

VSS236

AD46

VSS237

AD42

VSS238

AD4

VSS239

AC67

VSS240

AC64

VSS241

AC10

VSS242

AC5

VSS243

AC1

VSS244

AB70

VSS245

AB62

VSS246

AB57

VSS247

AB53

VSS248

AB50

VSS249

AB46

VSS250

AB42

VSS251

AB39

VSS252

AB37

VSS253

AB35

VSS254

AB33

VSS255

AB32

VSS256

AB30

VSS257

AB28

VSS258

AB26

VSS259

AB24

VSS260

AB23

VSS261

AB21

VSS262

AB19

VSS263

AB17

VSS264

AB15

VSS265

AB14

VSS266

AB9

VSS267

AA66

VSS268

AA64

VSS269

AA62

VSS270

AA57

VSS271

AA53

VSS272

AA50

VSS273

AA46

VSS274

AA42

VSS275

AA39

VSS276

AA37

VSS277

AA35

VSS278

AA33

VSS279

AA32

VSS280

AA30

VSS281

AA28

VSS282

AA26

VSS283

AA24

VSS284

AA23

VSS285

AA21

VSS286

AA19

VSS287

F20

VSS374

F4

VSS375

E37

VSS376

E33

VSS377

E30

VSS378

E16

VSS379

E12

VSS380

D41

VSS381

D38

VSS382

D34

VSS383

D31

VSS384

D27

VSS385

D24

VSS386

D20

VSS387

D17

VSS388

D13

VSS389

D10

VSS390

D6

VSS391

B65

VSS392

B40

VSS415

INTEL_ARRANDALE_1288

INTEL_ARRANDALE_1288

VSS

VSS

2

VSS404
VSS405
VSS406
VSS407
VSS408
VSS409
VSS410
VSS411
VSS412
VSS413
VSS393
VSS394
VSS395
VSS396
VSS397
VSS398
VSS399
VSS400
VSS401
VSS402
VSS403
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360
VSS361
VSS362
VSS363
VSS364
VSS365
VSS366
VSS367
VSS368
VSS369
VSS370
VSS371
VSS372
VSS373

A40
A36
A33
A29
A26
A22
A19
A15
A12
A8
B62
B58
B55
B51
B48
B44
A59
A55
A52
A48
A45
AA17
AA15
AA14
AA4
W69
W62
W57
W53
W50
W46
W42
W6
W1
V70
U64
U62
U57
U53
U50
U46
U42
U39
U9
U4
T1
R70
R62
R57
R53
R50
R46
R42
R5
P4
N63
N57
N53
N50
N46
N30
N21
N15
M53
M42
M36
M1
L70
L57
L48
L47
L13
K64
K53
K43
K36
K34
K32
K25
K17
K11
K6
K4
J65
J57
J48
J47
J40
J9
H53
H43
H36
H1
G70
G57
G53
G48
G47
G43
G30
G24
G20
G15
F61
F48
F47
F28

+VTT

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0112 Add to follow design guide

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C121

C121

2

1

C139

C139

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C122

C122

C123

C123

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C140

C140

C141

C141

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C151

C149

C149

1

2

C151

C150

C150

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C165

C165

C166

C166

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C124

C124

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C142

C142

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C152

C152

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C168

C168

C167

C167

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C125

C125

C126

C126

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C144

C144

C143

C143

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C153

C153

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C169

C169

2

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

EN_DFAN131

CPU CORE

+CPU_CORE

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C127

C127

C128

C128

1

1

1

2

2

2

Inside cavity

330U_D2_2VM_R9M

330U_D2_2VM_R9M

330U_D2_2VM_R9M

330U_D2_2VM_R9M

C145

C145

C146

C146

1

+

+

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

C172

PS@ C172

PS@

8
7
6
5

22U_0805_6.3V6M

22U_0805_6.3V6M

C156

C156

1

2

PS@

PS@

1

S

2

S

3

S

4

G

SI4856ADY_SO8

SI4856ADY_SO8

1

2

0.1U_0402_25V6

0.1U_0402_25V6

2

C13

C13

1

1

+

+

2

C157

C157

1

+

+

2

C154

C154

1

2

C170

C170

22U_0805_6.3V6M

22U_0805_6.3V6M

C155

C155

1

2

For S3 CPU power saving

R55

R55

470_0805_5%

470_0805_5%

PS@

PS@

Q3B

Q3B

PS@

PS@

5

+FAN1

10mil

2010/04/12 2010/12/31

2010/04/12 2010/12/31

2010/04/12 2010/12/31

1 2

3

4

+5VS

1A

1

C15

C15
10U_0805_10V4Z

10U_0805_10V4Z

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

1

C171

C171

10U_0805_10V4K

10U_0805_10V4K

2

PS@

PS@

FAN Control Circuit

10U_0805_10V4Z

10U_0805_10V4Z

U3

U3

1

EN

GND

2

VIN

GND

3

VOUT

GND

4

VSET

GND

APL5607KI-TRG_SO8

APL5607KI-TRG_SO8

Deciphered Date

Deciphered Date

Deciphered Date

4

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C130

C130

C129

C129

1

2

330U_D2_2VM_R9M

330U_D2_2VM_R9M

330U_D2_2VM_R9M

330U_D2_2VM_R9M

C147

C147

C148

C148

1

+

+

2

L

Under cavity

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C158

C158

1

1

2

2

Under cavity

+1.5V+1.5VS_CPU_VDDQ

Q2

Q2

8

D

7

D

6

D

5

D

12

R57

R57
820K_0402_5%

820K_0402_5%

PS@

PS@

1SS355_SOD323-2

1SS355_SOD323-2

12

D2

D2

@

@

12

2

D3

D3

@

@

BAS16_SOT23-3

BAS16_SOT23-3

1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C132

C132

C131

C131

1

1

2

2

05/06 update to change
C95,C96,C97,C98 from
SGA00002X00(330U_7mR) to
SGA00004200(470U_4.5mR)

1- SV BGA 4x470uF bulk on C95,C96,C97,C98
2- LV BGA 3x330uF 9mR (SGA20331E10) bulk on C96,C97,C98

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C159

C159

61

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+FAN1

C14

C14
1000P_0402_25V8J@

1000P_0402_25V8J@

22U_0805_6.3V6M

C160

C160

1

1

2

2

R56

R56

1 2

220K_0402_5%

220K_0402_5%

PS@

PS@

Q3A

PS@Q3A

PS@

SUSPSUSP

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C134

C134

C133

C133

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C161

C161

C162

C162

1

1

2

2

+VSB

SUSP 34,41

JFAN1

JFAN1

1

1

2

2

3

3

4

GND

5

GND

ACES_88231-03041_3P

ACES_88231-03041_3P

@

@

R45 10K_0402_5%R45 10K_0402_5%

12

2

1

Auburndale(5/5)-GND/Bypass

Auburndale(5/5)-GND/Bypass

Auburndale(5/5)-GND/Bypass

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

FAN_SPEED1 31

C16

C16

0.01U_0402_16V7K

0.01U_0402_16V7K

@

@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C136

C136

C135

C135

1

1

2

C163

C163

1

2

+3VS

5

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

C164

C164

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C137

C137

C138

C138

1

2

1.0

1.0

9 45Monday, April 12, 2010

9 45Monday, April 12, 2010

9 45Monday, April 12, 2010

1.0

5

+VREF_D QA

1

C174

C174

C173

C173

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

D D

close to JDDRL.1

DDR_A_D 0
DDR_A_D 1

1

DDR_A_D M0

2

DDR_A_D 2
DDR_A_D 3

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

DDR_A_D 8
DDR_A_D 9

DDR_A_D QS#1
DDR_A_D QS1

DDR_A_D 10
DDR_A_D 11

DDR_A_D 16
DDR_A_D 17

DDR_A_D QS#2
DDR_A_D QS2

DDR_A_D 18
DDR_A_D 19

DDR_A_D 24
DDR_A_D 25

DDR_A_D M3

DDR_A_D 26
DDR_A_D 27

+1.5V +1.5V

JDDRL1

JDDRL1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1

29

DQS1

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25

61

VSS22

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

DQ4
DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

RESET#

VSS12

DQ14
DQ15

VSS14

DQ20
DQ21

VSS16

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS#3

DQS3

VSS24

DQ30
DQ31

VSS26

4

2

DDR_A_D 4

4

DDR_A_D 5

6
8

DDR_A_D QS#0

10

DDR_A_D QS0

12
14

DDR_A_D 6

16

DDR_A_D 7

18
20

DDR_A_D 12

22

DDR_A_D 13

24
26

DDR_A_D M1

28
30
32

DDR_A_D 14

34

DDR_A_D 15

36
38

DDR_A_D 20

40

DDR_A_D 21

42
44

DDR_A_D M2

46
48

DDR_A_D 22

50

DDR_A_D 23

52
54

DDR_A_D 28

56

DDR_A_D 29

58
60

DDR_A_D QS#3

62

DDR_A_D QS3

64
66

DDR_A_D 30

68

DDR_A_D 31

70
72

DDR3 SO-DIMM A
Standard Type

+1.5V

12

R60

R60

1K_0402 _1%

1K_0402 _1%

PS@

PS@

For S3 CPU power saving

SM_DRAM RST# 5,11

3

DDR_A_D QS[0..7]7

DDR_A_D QS#[0..7]7

DDR_A_D [0..63]7

DDR_A_D M[0..7]7

DDR_A_M A[0..15]7

M1 Circuit

1K_0402 _1%

1K_0402 _1%

1K_0402 _1%

1K_0402 _1%

R59

R59

R62

R62

+1.5V

2

12

+V_DDR3 _DIMM_REF

12

12

R58 0_ 0402_5%R58 0_ 0402_5%

12

R61 0_0402_5%R61 0_0402_5%

1

+VREF_D QB

+VREF_D QA

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0 A626-U4SG-7H@

FOX_AS0 A626-U4SG-7H@

+3VS

C194

C194

DDRA_CK E07

DDR_A_B S27

DDRA_CL K07
DDRA_CL K0#7

DDR_A_B S07

DDR_A_W E#7

DDR_A_C AS#7

DDRA_SC S1#7

1

C195

C195

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

2

DDR_A_M A12
DDR_A_M A9

DDR_A_MA8
DDR_A_M A5

DDR_A_M A3
DDR_A_M A1

DDR_A_M A10

DDR_A_M A13

DDR_A_D 32
DDR_A_D 33

DDR_A_D QS#4
DDR_A_D QS4

DDR_A_D 34
DDR_A_D 35

DDR_A_D 40
DDR_A_D 41

DDR_A_D M5

DDR_A_D 42
DDR_A_D 43

DDR_A_D 48
DDR_A_D 49

DDR_A_D QS#6
DDR_A_D QS6

DDR_A_D 50
DDR_A_D 51

DDR_A_D 56
DDR_A_D 57

DDR_A_D M7

DDR_A_D 58
DDR_A_D 59

R64

R64
10K_040 2_5%

10K_040 2_5%

R65

R65

10K_0402_5%

10K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

5

1 2

12

C C

B B

A A

CKE1

VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

SCL

VTT2

A15
A14

A11

S0#

74
76

DDR_A_M A15

78

DDR_A_M A14

80
82

DDR_A_MA11

84

DDR_A_M A7

86

A7

88

DDR_A_MA6

90

A6
A4

A2
A0

G2

DDR_A_M A4

92
94

DDR_A_M A2

96

DDR_A_M A0

98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

+DDR_VR EF_CA_DIMMA

DDR_A_D 36
DDR_A_D 37

DDR_A_D M4

DDR_A_D 38
DDR_A_D 39

DDR_A_D 44
DDR_A_D 45

DDR_A_D QS#5
DDR_A_D QS5

DDR_A_D 46
DDR_A_D 47

DDR_A_D 52
DDR_A_D 53

DDR_A_D M6

DDR_A_D 54
DDR_A_D 55

DDR_A_D 60
DDR_A_D 61

DDR_A_D QS#7
DDR_A_D QS7

DDR_A_D 62
DDR_A_D 63

+0.75VS+0.75VS

4

DDRA_CK E1 7

DDRA_CL K1 7
DDRA_CL K1# 7

DDR_A_B S1 7
DDR_A_R AS# 7

DDRA_SC S0# 7
DDRA_OD T0 7

DDRA_OD T1 7

1

C175

C175

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

close to JDDRL.126

PM_EXTT S# 5,11

PM_SMBD ATA 11,12,16,26
PM_SMBC LK 11,12,16,26

Security Class ification

Security Class ification

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+V_DDR3 _DIMM_REF

R63

R63

1 2

0_0402_ 5%

0_0402_ 5%

1

C176

C176

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Reserve for cost down

+1.5V

1

+

+

C192

C192

330U_2.5 V_M_R17

330U_2.5 V_M_R17

Issued Date

Issued Date

Issued Date

2

Layout Note:
Place near JDDRL

+1.5V

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

3

@

@

+

+

C177 330U_B2 _2.5VM_R15M

C177 330U_B2 _2.5VM_R15M

1 2

C180 10 U_0805_6.3V6MC180 10 U_0805_6.3V6M

1 2

C182 10 U_0805_6.3V6MC182 10 U_0805_6.3V6M

1 2

C185 10 U_0805_6.3V6MC185 10 U_0805_6.3V6M

1 2

C188 10 U_0805_6.3V6MC188 10 U_0805_6.3V6M

1 2

C190 10 U_0805_6.3V6MC190 10 U_0805_6.3V6M

1 2

C193 10 U_0805_6.3V6MC193 10 U_0805_6.3V6M

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Layout Note: Place these 4 Caps near
Command and Control signals of DIMMA

+1.5V +0.75VS

C178 0.1 U_0402_16V4ZC178 0.1 U_0402_16V4Z

C181 0.1 U_0402_16V4ZC181 0.1 U_0402_16V4Z

C184 0.1 U_0402_16V4ZC184 0.1 U_0402_16V4Z

C187 0.1 U_0402_16V4ZC187 0.1 U_0402_16V4Z

1 2

1 2

1 2

1 2

2

Layout Note:
Place near JDDRL1.203 and 204

C179 10 U_0805_6.3V6MC179 10 U_0805_6.3V6M

1 2

C183 1U _0402_6.3V4ZC1 83 1U _0402_6.3V4Z

12

C186 1U _0402_6.3V4ZC1 86 1U _0402_6.3V4Z

12

C189 1U _0402_6.3V4ZC1 89 1U _0402_6.3V4Z

12

C191 1U _0402_6.3V4ZC1 91 1U _0402_6.3V4Z

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM0

DDRIII-SODIMM0

DDRIII-SODIMM0

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

10 45Monday, April 12, 20 10

10 45Monday, April 12, 20 10

10 45Monday, April 12, 20 10

1

1.0

1.0

1.0

A

JDDRH1

+VREF_D QB

1

2

C196

C196

2.2U_0603_6.3V4Z

1 1

2.2U_0603_6.3V4Z

close to JDDRH.1

DDR_B_D 0
DDR_B_D 1

DDR_B_D M0

1

DDR_B_D 2
DDR_B_D 3

2

DDR_B_D 8

C197

C197

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_B_D 9

DDR_B_D QS#1
DDR_B_D QS1

DDR_B_D 10
DDR_B_D 11

DDR_B_D 16
DDR_B_D 17

DDR_B_D QS#2
DDR_B_D QS2

DDR_B_D 18
DDR_B_D 19

DDR_B_D 24
DDR_B_D 25

DDR_B_D M3

DDR_B_D 26
DDR_B_D 27

JDDRH1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1

29

DQS1

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25

61

VSS22

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

DQ4

DQ5
VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7
VSS8
DQ12
DQ13

VSS10

DM1

RESET#

VSS12

DQ14
DQ15

VSS14

DQ20
DQ21

VSS16

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS#3

DQS3

VSS24

DQ30
DQ31

VSS26

B

+1.5V+1.5V

2

DDR_B_D 4

4

DDR_B_D 5

6
8

DDR_B_D QS#0

10

DDR_B_D QS0

12
14

DDR_B_D 6

16

DDR_B_D 7

18
20

DDR_B_D 12

22

DDR_B_D 13

24
26

DDR_B_D M1

28
30
32

DDR_B_D 14

34

DDR_B_D 15

36
38

DDR_B_D 20

40

DDR_B_D 21

42
44

DDR_B_D M2

46
48

DDR_B_D 22

50

DDR_B_D 23

52
54

DDR_B_D 28

56

DDR_B_D 29

58
60

DDR_B_D QS#3

62

DDR_B_D QS3

64
66

DDR_B_D 30

68

DDR_B_D 31

70
72

SM_DRAM RST# 5,10

Standard Type
DDR3 SO-DIMM B

C

DDR_B_D QS#[0..7]7

DDR_B_D QS[0..7]7

DDR_B_D [0..63]7

DDR_B_D M[0..7]7

DDR_B_M A[0..15]7

D

E

2 2

3 3

4 4

DDRB_CK E07

DDR_B_B S27

DDRB_CL K07
DDRB_CL K0#7

DDR_B_B S07

DDR_B_W E#7

DDRB_SC S1#7

+3VS

2.2U_060 3_6.3V4Z

2.2U_060 3_6.3V4Z

1

C216

C216

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

10K_040 2_5%

10K_040 2_5%

C217

C217

2

R67

R67

1 2

10K_040 2_5%

10K_040 2_5%

R68

R68

1 2

A

DDR_B_M A12
DDR_B_M A9

DDR_B_MA8
DDR_B_M A5

DDR_B_M A3
DDR_B_M A1

DDR_B_M A10

DDR_B_M A13

DDR_B_D 32
DDR_B_D 33

DDR_B_D QS#4
DDR_B_D QS4

DDR_B_D 34
DDR_B_D 35

DDR_B_D 40
DDR_B_D 41

DDR_B_D M5

DDR_B_D 42
DDR_B_D 43

DDR_B_D 48
DDR_B_D 49

DDR_B_D QS#6
DDR_B_D QS6

DDR_B_D 50
DDR_B_D 51

DDR_B_D 56
DDR_B_D 57

DDR_B_D M7

DDR_B_D 58
DDR_B_D 59

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0 A626-U4RN-7F@

FOX_AS0 A626-U4RN-7F@

CKE1

VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

SDA

SCL

VTT2

A15
A14

A11

S0#

74
76

DDR_B_M A15

78

DDR_B_M A14

80
82

DDR_B_MA11

84

DDR_B_M A7

86

A7

88

DDR_B_MA6

90

A6
A4

A2
A0

G2

92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

DDR_B_M A4

DDR_B_M A2
DDR_B_M A0

+DDR_VR EF_CA_DIMMB

DDR_B_D 36
DDR_B_D 37

DDR_B_D M4

DDR_B_D 38
DDR_B_D 39

DDR_B_D 44
DDR_B_D 45

DDR_B_D QS#5
DDR_B_D QS5

DDR_B_D 46
DDR_B_D 47

DDR_B_D 52
DDR_B_D 53

DDR_B_D M6

DDR_B_D 54
DDR_B_D 55

DDR_B_D 60
DDR_B_D 61

DDR_B_D QS#7
DDR_B_D QS7

DDR_B_D 62
DDR_B_D 63

PM_EXTT S# 5,10

PM_SMBD ATA 10,12,16,26
PM_SMBC LK 10,12,16,26

+0.75VS+0.75VS

B

DDRB_CK E1 7

DDRB_CL K1 7
DDRB_CL K1# 7

DDR_B_B S1 7
DDR_B_R AS# 7

DDRB_SC S0# 7
DDRB_OD T0 7DDR_B_C AS#7

DDRB_OD T1 7

R66

R66

1

2

C198

C198

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

close to JDDRH.126

Security Class ification

Security Class ification

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

1

2

C199

C199

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Issued Date

Issued Date

Issued Date

+V_DDR3 _DIMM_REF

0_0402_ 5%

0_0402_ 5%

Layout Note:
Place near JDDRH

+1.5V

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

C

@

@

+

+

C200 330U_B2 _2.5VM_R15M

C200 330U_B2 _2.5VM_R15M

1 2

C203 10 U_0805_6.3V6MC203 10 U_0805_6.3V6M

1 2

C205 10 U_0805_6.3V6MC205 10 U_0805_6.3V6M

1 2

C208 10 U_0805_6.3V6MC208 10 U_0805_6.3V6M

1 2

C211 10 U_0805_6.3V6MC211 10 U_0805_6.3V6M

1 2

C213 10 U_0805_6.3V6MC213 10 U_0805_6.3V6M

1 2

C215 10 U_0805_6.3V6MC215 10 U_0805_6.3V6M

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Layout Note: Place these 4 Caps near
Command and Control signals of DIMMB

C201 0.1 U_0402_16V4ZC201 0.1 U_0402_16V4Z

C204 0.1 U_0402_16V4ZC204 0.1 U_0402_16V4Z

C207 0.1 U_0402_16V4ZC207 0.1 U_0402_16V4Z

C210 0.1 U_0402_16V4ZC210 0.1 U_0402_16V4Z

1 2

1 2

1 2

1 2

D

Layout Note:
Place near JDDRH.203 and 204

+0.75VS+1.5V

C202 10 U_0805_6.3V6MC202 10 U_0805_6.3V6M

1 2

C206 1U _0402_6.3V4ZC2 06 1U _0402_6.3V4Z

12

C209 1U _0402_6.3V4ZC2 09 1U _0402_6.3V4Z

12

C212 1U _0402_6.3V4ZC2 12 1U _0402_6.3V4Z

12

C214 1U _0402_6.3V4ZC2 14 1U _0402_6.3V4Z

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM1

DDRIII-SODIMM1

DDRIII-SODIMM1

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

11 45Monday, April 12, 20 10

11 45Monday, April 12, 20 10

11 45Monday, April 12, 20 10

E

1.0

1.0

1.0

A

Clock Generator

1 1

+1.5VS +1.5VS_C K505

R70 R73Clock gen R72

no-mountRTM mount

IDT

R75 0 _0402_5%R75 0_040 2_5%

CLK_DOT1 6
CLK_DOT #16

2 2

CLK_SAT A16
CLK_SAT A#16

PCH_CLK _DMI16

PCH_CLK _DMI#16

1 2

R77 0 _0402_5%R77 0_040 2_5%

1 2

R81 0 _0402_5%R81 0_040 2_5%

1 2

R83 0 _0402_5%R83 0_040 2_5%

1 2

R85 0 _0402_5%R85 0_040 2_5%

1 2

R86 0 _0402_5%R86 0_040 2_5%

1 2

B

C

D

E

F

For SED For SED

FBMH160 8HM601-T_0603

FBMH160 8HM601-T_0603

+3VS +3VS_CK 505 +1.05VS +1.05VS_ CK505

1 2

R70

R70

R72

0_0603_ 5%

0_0603_ 5%

FBMH160 8HM601-T_0603

FBMH160 8HM601-T_0603

1 2

R73

R73

For SED

+1.05VS_ CK505

+3VS_CK 505

CLK_DOT #_R

CLK_SAT A_R
CLK_SAT A#_R

PCH_CLK _DMI_R
PCH_CLK _DMI#_R

H_STP_C PU#

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C218

C218

C219

C219

@R72

@

2

10U_080 5_10V4Z

10U_080 5_10V4Z

1 2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C228

C228

C229

C229

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

+1.5VS_C K505

U5

U5

1

VDD_USB_48

2

VSS_48M

3

DOT_96

4

DOT_96#

5

VDD_27

6

27MHZ

7

27MHZ_SS

8

USB_48

9

VSS_27M

10

SATA

11

SATA#

12

VSS_SRC

13

SRC_1

14

SRC_1#

15

VDD_SRC_IO

16

CPU_STOP#

33

TGND

RTM890N -631-GRT_QFN32 _5X5

RTM890N -631-GRT_QFN32 _5X5

1

1

C220

C220

2

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

1

C230

C230

2

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z
1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

SA00002XY00

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C221

C221

For SED For SED

1

12

C222

C222
47P_040 2_50V8J

2

1

C904

C904

2

1U_0402 _6.3V4Z

1U_0402 _6.3V4Z

47P_040 2_50V8J

1

C905

C905

03/23 cap reserval.

2

SCL
SDA

REF_0/CPU_SEL

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

CKPWRGD/PD#

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_CPU_IO

VDD_SRC

+1.05VS_ CK505

+3VS_CK 505

32
31
30
29
28
27
26
25

24
23
22
21
20
19
18
17

FBMH160 8HM601-T_0603

FBMH160 8HM601-T_0603

CPU_SELCLK_DOT _R

1 2

CLK_XTA L_IN
CLK_XTA L_OUT

CK_PW RGD

CLK_BCL K_R
CLK_BCL K_R#

+1.5VS_C K505

1 2

R71

R71

R7633_0402_ 5% R7633_0 402_5%

R82 0_ 0402_5%R82 0_0402_5 %

1 2

R84 0_ 0402_5%R84 0_0402_5 %

1 2

10U_080 5_10V4Z

10U_080 5_10V4Z

1

C224

C224

C223

C223

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

PM_SMBC LK 10,11,16,26

PM_SMBD ATA 10,11,16,26

CLK_14M _PCH 16

CLK_XTA L_IN

C231

C231

22P_040 2_50V8J

22P_040 2_50V8J

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

1

C226

C226

C225

C225

2

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

CLK_BCL K 16
CLK_BCL K# 16

CLK_XTA L_OUT

Y1

Y1

1 2

2

14.318MH Z_16PF_7A143 00083

14.318MH Z_16PF_7A143 00083

1

1

2

12

C227

C227
47P_040 2_50V8J

47P_040 2_50V8J

CLK_14M _PCH

33P_040 2_50V8K

33P_040 2_50V8K

Routing the
trace at

2

least 10mil

C232

C232
22P_040 2_50V8J

22P_040 2_50V8J

1

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

2

C233

@C233

@

1

G

+3VS_CK 505

12

R69

R69
10K_040 2_5%

10K_040 2_5%

CK_PW RGD

04/12 Q25B repl ace Q5B.

3

Q25B

Q25B

IHDMI@

IHDMI@

5

4

Silego Have Int ernal Pull-Up

H_STP_C PU#

CPU_SEL

IDT Have Intern al Pull-Down

(Default)

0 133MHz

1

100MHz 100MHz

H

CLK_ENA BLE# 42

+3VS_CK 505

R7410 K_0402_5% R7410K_040 2_5%

12

R7810 K_0402_5% @ R7810K_040 2_5% @

12

+1.05VS

R8010 K_0402_5% R8010K_040 2_5%

12

CPU_1/1#CPU_SEL CPU_0/0#

133MHz

For SED

JLVDS1

LCD/PANEL BD. Conn.

+LCD_VD D

3 3

150_060 3_5%

150_060 3_5%

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

UMA_ENV DD18

R87

R87

Q4A

Q4A

R94

R94

100K_04 02_5%

100K_04 02_5%

12

100K_04 02_5%

100K_04 02_5%

61

Reserve for EMI requ est

4 4

USB20_P 1119

USB20_N 1119

A

+3VS

12

R88

R88

2

3

5

Q4B

Q4B
2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

4

1 2

R96 0_ 0402_5%R96 0_ 0402_5%

1 2

L5

@L5

@

1

1

4

4

WCM-2 012-900T_0805

WCM-2 012-900T_0805

R97 0_ 0402_5%R97 0_ 0402_5%

1 2

0.1U_040 2_16V7K

0.1U_040 2_16V7K

C237

C237

1 2

R92 47 K_0402_5%R92 47K_040 2_5%

0.01U_04 02_25V7K

0.01U_04 02_25V7K

2

3

C238

C238

USB20_P 11_R

2

USB20_N 11_R

3

B

+3VS

W=60mils

2

S

S

G

G

1

1

2

Q6

Q6

2

AO3413_ SOT23

AO3413_ SOT23

D

D

1 3

+LCD_VD D

1

2

W=60mils

C239

C239

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C

68P_040 2_50V8J

68P_040 2_50V8J

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+LCDVDD _R

+LCD_INV B+

1

C242

C242

2

L3

L3

0_0805_ 5%

0_0805_ 5%

1

C234

C234

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

Rated Current M AX:3000mA

L4

L4

FBMA-L11 -201209-221LMA 30T_0805

FBMA-L11 -201209-221LMA 30T_0805

1

C243

C243

0.1U_040 2_25V6

0.1U_040 2_25V6

2

Change to PCH contro l.

INVT_PW M31

PCH_PW M18

+3VS_LV DS_CAM

R89

R89

0_0603_ 5%

+3VS

D

0_0603_ 5%

1 2

W=20mils

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

12

@

1.5A

+LCD_VD D

1

C235

C235

4.7U_080 5_10V4Z

4.7U_080 5_10V4Z

2

12

INVT_PW M_R

12

R900_0402_5%@R900_0402_5%

12

R910_0402_5% R910_0402_5%

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1 2

C236

C236

Compal Secret Data

Compal Secret Data

Compal Secret Data

E

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

01/30 EMI reque st

1

C244

C244
680P_04 02_50V7K

680P_04 02_50V7K

2

Deciphered Date

Deciphered Date

Deciphered Date

C899

C899

+3VS

1

1

C241

C241

2

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

BKOFF#31

1

F

680P_04 02_50V7K

680P_04 02_50V7K

1

C240

C240

2

BKOFF#

12

R95

R95

10K_040 2_5%

10K_040 2_5%

D84

D84

PACDN04 2Y3R_SOT23-3

PACDN04 2Y3R_SOT23-3

INT_MIC_CLK

3

INT_MIC_DATA

2

+LCDVDD _R

LCD_EDID_ CLK18

LCD_EDID_ DATA18

LCD_TXO UT0-18
LCD_TXO UT0+18

LCD_TXO UT1-18
LCD_TXO UT1+18
LCD_TXO UT2-18
LCD_TXO UT2+18

LCD_TXC LK-18

LCD_TXC LK+18

INVT_PW M_R

+LCD_INV

+3VS_LV DS_CAM

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

USB20_N 11_R
USB20_P 11_R

INT_MIC_CLK29
INT_MIC_DATA29

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Clock Generator (CK505)/ LVDS CONN

Clock Generator (CK505)/ LVDS CONN

Clock Generator (CK505)/ LVDS CONN

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

G

JLVDS1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

03/04 Pin24 +LCD_INV-->NC

24

25

25

26

26

27

27

28

28

29

29

30

30

I-PEX_2014 3-030E-20F~D

I-PEX_2014 3-030E-20F~D

@

@

MGND4
MGND3

MGND2
MGND1

12 45Monday, April 12, 20 10

12 45Monday, April 12, 20 10

12 45Monday, April 12, 20 10

H

34
33

32
31

1.0

1.0

1.0

A

B

C

D

E

CRT CONNECTOR

12/14 Fine tune pin define JP1 Pin1 Pin2 Pin8-->GND
12/21 pin 2,3 to RJ45_GND
12/22 Fine tune JP4 pin define

1 1

12/21 transformer on board.

RJ45_MIDI1+27
RJ45_MIDI1-27

RJ45_MIDI0+27
RJ45_MIDI0-27

UMA_CRT _CLK18
UMA_CRT _DATA18
UMA_CRT _VSYNC18
UMA_CRT _HSYNC1 8

CRT_R18
CRT_G18
CRT_B18

+3VS
+5VS

C879

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C879

RJ45_GN D

12/17 EMI request.

2 2

02/08 update connector footprint.

JP1

JP1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9
10
11
12
13
14
15
16
17
18
19
20

01/28 EMI request. Change pin definition.

9
10
11
12
13
14
15
16
17
18

21

19

GND1

22

20

GND2

STARC_1 07K20-000000-G 4

STARC_1 07K20-000000-G 4

@

@

3 3

4 4

Security Class ification

Security Class ification

Security Class ification

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/04/ 12 2010/01/ 23

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT\TV\LVDS

CRT\TV\LVDS

CRT\TV\LVDS

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

13 45Monday, April 12, 20 10

13 45Monday, April 12, 20 10

13 45Monday, April 12, 20 10

E

1.0

1.0

1.0

5

ANALOG2 Function2 Function1 Swing Pre-Amp Slew-rate Note

LowLowLow 450

HighLowLow

D D

LowHighLow

HighHighLow

LowLowHigh

HighLowHigh

High High

High

C C

B B

High High

UMA_DVI_T XC-

UMA_DVI_T XC+

UMA_DVI_T XD0-

UMA_DVI_T XD0+

UMA_DVI_T XD1-

UMA_DVI_T XD1+

UMA_DVI_T XD2-

UMA_DVI_T XD2+

Low

1 2

L6

L6

1

1

4

4

1 2

1 2

L7

L7

1

1

4

4

1 2

1 2

L8

L8

1

1

4

4

WCM-2 012-900T_0805

WCM-2 012-900T_0805

1 2

1 2

L9

L9

1

1

4

4

WCM-2 012-900T_0805

WCM-2 012-900T_0805

1 2

HDMI Connector

JHDMI1

HDMI_R_D2 +

HDMI_R_D2 ­HDMI_R_D1 +

HDMI_R_D1 ­HDMI_R_D0 +

A A

+HDMI_5V_ OUT

HDMI_R_D0 ­HDMI_R_CK +

HDMI_R_CK -

HDMI_SCLK
HDMI_SDAT A

HDMI_HPD

JHDMI1

1

D2+

2

D2_shield

3

D2-

4

D1+

5

D1_shield

6

D1-

7

D0+

8

D0_shield

9

D0-

10

CK+

11

CK_shield

12

CK-

13

CEC

14

Reserved

15

SCL

16

SDA

17

DDC/CEC_GND

18

+5V

19

HP_DET

SUYIN_100042 GR019M23BZR

SUYIN_100042 GR019M23BZR

@

@

5

420

450

460

340

400

400

420

R104

R104

10_0402 _5%IHDMI@

10_0402 _5%IHDMI@

2

2

@

@

3

3

WCM-2 012-900T_0805

WCM-2 012-900T_0805

R115

R115

10_0402 _5%IHDMI@

10_0402 _5%IHDMI@

R116

R116

10_0402 _5%IHDMI@

10_0402 _5%IHDMI@

2

2

@

@

3

3

WCM-2 012-900T_0805

WCM-2 012-900T_0805

R118

R118

10_0402 _5%IHDMI@

10_0402 _5%IHDMI@

R119

R119

10_0402 _5%IHDMI@

10_0402 _5%IHDMI@

2

2

@

@

3

3

R120

R120

10_0402 _5%IHDMI@

10_0402 _5%IHDMI@

R121

R121

10_0402 _5%IHDMI@

10_0402 _5%IHDMI@

2

2

@

@

3

3

R122

R122

10_0402 _5%IHDMI@

10_0402 _5%IHDMI@

<01/27 update HDMI Connector >

20

GND0

21

GND1

22

GND2

23

GND3

0

0

0

0

0

2dB

0

HDMI_R_CK -

HDMI_R_CK +

HDMI_R_D0 -

HDMI_R_D0 +

HDMI_R_D1 -

HDMI_R_D1 +

HDMI_R_D2 -

HDMI_R_D2 +

4

0

-3dB Shortest trace

-3dB

-4dB

Shortest trace

Streamline PVT2 setting

0

0

0

Longest Trace

Longest Trace2dB

0

R106 0_0402_ 5%

R106 0_0402_ 5%

+3VS

03/17 change to 3.9K, common design
04/12 EMI sugge stion. 3.6K

12/15 Vendor re commend for de ep color mode.

4

1 2

R108 0_0402_ 5%

R108 0_0402_ 5%

1 2

R110 0_0402_ 5%@R110 0_0402_ 5%@

1 2

R112 0_0402_ 5%@R112 0_0402_ 5%@

1 2

PCH_HDM I_HPD18

UMA_HDM I_DATA18

UMA_HDM I_CLK18

1 2

+3VS

4.7K_040 2_5%

4.7K_040 2_5%

IHDMI@

IHDMI@

+3VS

PMEG201 0AEH_SOD123 IHDMI@

PMEG201 0AEH_SOD123 IHDMI@

2 1

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

10U_080 5_10V4Z

10U_080 5_10V4Z

3.6K_040 2_1% IHDMI@

3.6K_040 2_1% IHDMI@

R117

R117

0_0402_ 5%

0_0402_ 5%

12

D4

D4

3

+3VS

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C245

C245

IHDMI@

IHDMI@

2

U6

U6

+3VS

2
11
15
21
26
33
40

R98

R98

12

12

46

3

4

6

7

8

9

10

13
14

16
17

19
20

22
23

1

5
12
18
24
27
31
36
37
43

ASM1442 QFN_48P_7X7

ASM1442 QFN_48P_7X7

IHDMI@

IHDMI@

PCH_HDM I_HPD

1 2

IHDMI@

IHDMI@
IHDMI@

IHDMI@

R114

R114

@

@

R1472

R1472

UMA_DVI_T XC+
UMA_DVI_T XC-

UMA_DVI_T XD2+
UMA_DVI_T XD2-

UMA_DVI_T XD1+
UMA_DVI_T XD1-

UMA_DVI_T XD0+
UMA_DVI_T XD0-

10K_040 2_5%

10K_040 2_5%

@

@

12/15 Vendor re commend

1.1A_6V_ MINISMDC110F-2

1.1A_6V_ MINISMDC110F-2

2 1

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

2010/04/ 12 2010/01/ 23

3

1

C246

C246

IHDMI@

IHDMI@

2

VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V

FUNCTION1
FUCNTION2

ANALOG1(REXT)

HPD_SOURCE

SDA_SOURCE

SCL_SOURCE

ANALOG2

OUT_D4+
OUT_D4-

OUT_D3+
OUT_D3-

OUT_D2+
OUT_D2-

OUT_D1+
OUT_D1-

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

R99

R99
100K_04 02_5%

100K_04 02_5%

@

@

F1

IHDMI@F1

IHDMI@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C263

C263

IHDMI@

IHDMI@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

1

C247

C247

IHDMI@

IHDMI@

2

+HDMI_5V_ OUT+5VS

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C248

C248

IHDMI@

IHDMI@

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

C249

C249

IHDMI@

IHDMI@

1

C250

C250

IHDMI@

IHDMI@

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

OE*

SCL_SINK

SDA_SINK

HPD_SINK

DDC_EN

FUNCTION3
FUNCTION4

IN_D4+

IN_D4-

IN_D3+

IN_D3-

IN_D2+

IN_D2-

IN_D1+

IN_D1-

THERMAL_PAD

1

C251

C251

IHDMI@

IHDMI@

2

25

28

29

30

32

34
35

48
47

45
44

42
41

39
38

49

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

04/12 Q25B repl ace Q5B page 1 2.

2

1

C252

C252

IHDMI@

IHDMI@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

12/14 RV R100

OE#

@

@

12

R100 10 K_0402_5%

R100 10 K_0402_5%

HDMI_SCLK

HDMI_SDAT A

HDMI_HPD

R105 4.7K _0402_5%

R105 4.7K _0402_5%

R107 0_0 402_5% @R107 0_0402_5 % @
R109 0_0 402_5% @R109 0_0402_5 % @
R111 0_0 402_5% IHDMI@R111 0_0 402_5% IHDMI@
R113 0_0 402_5% @R113 0_0402_5 % @

IHDMI@

IHDMI@

1 2

R101 2.2K _0402_5%

R101 2.2K _0402_5%

IHDMI@

IHDMI@

1 2

R102 2.2K _0402_5%

R102 2.2K _0402_5%

@

@

12

R103 10 K_0402_5%

R103 10 K_0402_5%

1 2
1 2

IHDMI@

IHDMI@

12

12
12

12/15 Vendor re commend

R1473

R1473

@

@

2.2K_040 2_5%

2.2K_040 2_5%

1 2
1 2

IHDMI@

IHDMI@

1 2
1 2

IHDMI@

IHDMI@

1 2
1 2

IHDMI@

IHDMI@

1 2
1 2

IHDMI@

IHDMI@

+3VS

12

R124

R124
10K_040 2_5%

10K_040 2_5%

IHDMI@

IHDMI@

61

2

100K_04 02_5%

100K_04 02_5%

Title

Title

Title

Size Document N umber Rev

Size Document N umber Rev

Size Document N umber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

HDMI_TXC+
HDMI_TXC-

HDMI_TX2+
HDMI_TX2-

HDMI_TX1+
HDMI_TX1-

HDMI_TX0+
HDMI_TX0-

1 2

IHDMI@

IHDMI@

C253 0.1 U_0402_16V7K

C253 0.1 U_0402_16V7K
C254 0.1 U_0402_16V7K

C254 0.1 U_0402_16V7K

IHDMI@

IHDMI@

C255 0.1 U_0402_16V7K

C255 0.1 U_0402_16V7K
C256 0.1 U_0402_16V7K

C256 0.1 U_0402_16V7K

IHDMI@

IHDMI@

C257 0.1 U_0402_16V7K

C257 0.1 U_0402_16V7K
C258 0.1 U_0402_16V7K

C258 0.1 U_0402_16V7K

IHDMI@

IHDMI@

C259 0.1 U_0402_16V7K

C259 0.1 U_0402_16V7K
C260 0.1 U_0402_16V7K

C260 0.1 U_0402_16V7K

OE#

Q25A

Q25A

IHDMI@

IHDMI@

1

+HDMI_5V_ OUT

12/14 HDMI_HPD connect to U10 .30

+3VS

+3VS

+3VS

UMA_HDM I_TXC+ 18
UMA_HDM I_TXC- 18

UMA_HDM I_TX2+ 18
UMA_HDM I_TX2- 18

UMA_HDM I_TX1+ 18
UMA_HDM I_TX1- 18

UMA_HDM I_TX0+ 18
UMA_HDM I_TX0- 18

Add circuit to control
OE# pin for sav e power consum ption

12/14 modify HP D circuit.

04/12 R1476 rem ove.

HDMI_HPD

2

R123

R123

@

@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HDMI Connector

HDMI Connector

HDMI Connector

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

NDU00_LA-6031P M/B

1

1 2

C262

C262

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

14 45Monday, April 12, 20 10

14 45Monday, April 12, 20 10

14 45Monday, April 12, 20 10

1.0

1.0

1.0