Toshiba Satellite L500D, Compal LA-4971P KSWAE, Liverpool 10AR, Liverpool 10ARG Schematic

A

1 1

B

C

D

E

Compal confidential

2 2

Liverpool 10AR/10ARG

KSWAE LA-4971P Schematics Document

Mobile AMD S1G2 S1G3/ RS780MN & RS780MC & RX781 & RS880 /

3 3

SB700 & SB710

2009-04-22 Rev. 1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Cover Sheet

LA-4971P

E

1.0

1 45Wednesday, April 22, 2009

1.0

A

Compal Confidential

M o d e l N a m e : K S W A E / K T W A E

M o d e l N a m e : K S W A E / K T W A EM o d e l N a m e : K S W A E / K T W A E

F i l e N a m e : L A - 4 9 7 1 P

F i l e N a m e : L A - 4 9 7 1 PF i l e N a m e : L A - 4 9 7 1 P

G r i f f i n P l a t f o r m

G r i f f i n P l a t f o r mG r i f f i n P l a t f o r m

1 1

H D M I C E C C o n t r o l l e r

H D M I C E C C o n t r o l l e rH D M I C E C C o n t r o l l e r

EC SMBUS

2 2

R T L 8 1 0 3 E L L A N 1 0 / 1 0 0 M

R T L 8 1 0 3 E L L A N 1 0 / 1 0 0 MR T L 8 1 0 3 E L L A N 1 0 / 1 0 0 M

PCIe port 3

3 3

C l o c k G e n e r a t o r

C l o c k G e n e r a t o rC l o c k G e n e r a t o r

SLG8SP626VTR

R T C C K T .

R T C C K T .R T C C K T .

P o w e r O n / O f f C K T .

P o w e r O n / O f f C K T .P o w e r O n / O f f C K T .

D C / D C I n t e r f a c e C K T .

D C / D C I n t e r f a c e C K T .D C / D C I n t e r f a c e C K T .

P o w e r C i r c u i t D C / D C

P o w e r C i r c u i t D C / D CP o w e r C i r c u i t D C / D C

page 37,38,39,40 41,42,43,44

4 4

R J 4 5

R J 4 5R J 4 5

page 26

page 15

page 37

page 35

page 36

R5F211A4SP

page 26

page 32

page 35

U S B / B

U S B / BU S B / B

P o w e r / B

P o w e r / BP o w e r / B

S W / B

S W / BS W / B

page 18

P C I e M i n i C a r d W L A N

P C I e M i n i C a r d W L A NP C I e M i n i C a r d W L A N

PCIe Port 2

page 27

B

A T I M 9 2

A T I M 9 2A T I M 9 2

with VRAM

V G A M X M C o n n

V G A M X M C o n nV G A M X M C o n n

C R T

C R T C R T

page 16

L C D C o n n .

L C D C o n n .L C D C o n n .

page 17

H D M I C o n n .

H D M I C o n n .H D M I C o n n .

page 18

PCIe 4x

N E W C a r d

N E W C a r dN E W C a r d

USB port 11

PCIe port 0

USB port 2

SATA port 2

C a r d B u s C o n t r o l l e r

C a r d B u s C o n t r o l l e rC a r d B u s C o n t r o l l e r

OZ601

D e b u g P o r t

D e b u g P o r tD e b u g P o r t

page 33

G s e n s o r

G s e n s o rG s e n s o r

page 35

Page 19

1.5V 2.5GHz(250MB/s)

page 27

e S A T A

e S A T Ae S A T A

page 25

page 28

E N E K B 9 2 6 D 3

E N E K B 9 2 6 D 3E N E K B 9 2 6 D 3

T o u c h P a d

T o u c h P a dT o u c h P a d

page 35

H y p e r T r a n s p o r t L i n k 2 . 6 G H z

H y p e r T r a n s p o r t L i n k 2 . 6 G H zH y p e r T r a n s p o r t L i n k 2 . 6 G H z

A - L i n k E x p r e s s I I

A - L i n k E x p r e s s I IA - L i n k E x p r e s s I I 4 X P C I - E

4 X P C I - E

4 X P C I - E4 X P C I - E

5V 480MHzUSB

SATA 5V 1.5GHz(150MB/s)

5V 480MHzUSB

PCI BUS

3.3V 33 MHz

LPC BUS

3.3V 33 MHz

page 34

I n t . K B D

I n t . K B DI n t . K B D

page 33

C

A M D S 1 G 2 C P U

A M D S 1 G 2 C P UA M D S 1 G 2 C P U

uFCPGA-638 Package

1 6 X 1 6

1 6 X 1 61 6 X 1 6

A T I

A T IA T I

RS780MN

RS780MC

RX781

RS880

page 10,11,12,13,14

A T I

A T IA T I

SB700 SB710

page 20,21,22,23,24

S P I R O M

S P I R O MS P I R O M

page 33

page 4,5,6,7

HD Audio

ADM1032ARMZ

R i g h t U S B C o n n

R i g h t U S B C o n nR i g h t U S B C o n n

USB Port 0,1

USB 5x

5V 480MHz

USBPort 8

SATA

5V 1.5GHz(150MB/s)

SATA

5V 1.5GHz(150MB/s)

3.3V 24.576MHz/48Mhz

M D C 1 . 5

M D C 1 . 5 M D C 1 . 5

page 33

R J 1 1

R J 1 1R J 1 1

page 33

D

T h e r m a l S e n s o r

T h e r m a l S e n s o r F a n C o n t r o l

T h e r m a l S e n s o rT h e r m a l S e n s o r

page 6

2 0 0 p i n D D R I I - S O - D I M M X 2

2 0 0 p i n D D R I I - S O - D I M M X 22 0 0 p i n D D R I I - S O - D I M M X 2

BANK 0, 1, 2, 3

M e m o r y B U S ( D D R I I )

M e m o r y B U S ( D D R I I )M e m o r y B U S ( D D R I I ) D u a l C h a n n e l

D u a l C h a n n e l

D u a l C h a n n e lD u a l C h a n n e l 1 . 8 V D D R I I 6 6 7 / 8 0 0 M H Z

1 . 8 V D D R I I 6 6 7 / 8 0 0 M H Z

1 . 8 V D D R I I 6 6 7 / 8 0 0 M H Z1 . 8 V D D R I I 6 6 7 / 8 0 0 M H Z

I n t . C a m e r a

I n t . C a m e r aI n t . C a m e r a

page 32

USBPort 9

W L A N

W L A NW L A N

A M P L I F I E R

A M P L I F I E RA M P L I F I E R

TPA6017

S P K C O N N

S P K C O N NS P K C O N N

page 27

page 31

USBPort 7

S A T A H D D 1

S A T A H D D 1S A T A H D D 1

SATA port 0

S A T A O D D

S A T A O D DS A T A O D D

SATA port 3

H D A C o d e c

H D A C o d e cH D A C o d e c

ALC272

M I C C O N N

M I C C O N NM I C C O N N

F i n g e r P r i n t e r

F i n g e r P r i n t e rF i n g e r P r i n t e r

page 31

APL5607KI-TRG

page 8,9

page 32

page 27

page 25

page 30

F a n C o n t r o l

F a n C o n t r o lF a n C o n t r o l

I n t . M I C

I n t . M I C I n t . M I C

page 31

USBPort 6

R T S 5 1 5 9 E

R T S 5 1 5 9 ER T S 5 1 5 9 E

USBPort 4

page 4

B l u e t o o t h

B l u e t o o t hB l u e t o o t h

H P C O N N

H P C O N NH P C O N N

page 31

page 32

3IN1

page 29

E

3IN1

page 29

V o l u m e C o n t r o l

V o l u m e C o n t r o lV o l u m e C o n t r o l

page 31

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Block Diagram

LA-4971P

E

1.0

2 45Wednesday, April 22, 2009

1.0

A

Voltage Rails

O : ON

X : OFF

+5VS

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

State

S0

S1

S3

S5 S4/AC

power plane

+B

+3VL

+5VL

+RTCVCC

O

X

+3VALW

+1.2VALW

+3V_LAN

O

X

X X X

+3VS

+2.5VS

+1.8VS

+1.5VS

+1.1VS

+1.8V+5VALW

+VGA_CORE

+0.9V

+1.2V_HT

+0.9V

+CPU_CORE_NB

+CPU_CORE_0

+CPU_CORE_1

O

X X

X

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

3 3

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

HEX

A0

D2

ADDRESS

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4

1 1 0 1 0 0 1 0

EC SM Bus1 address

Device Address

Smart Battery

HDMI-CEC 34H

EC KB926D2

HEX

16H

0001 011X b

0011 010X b

B

Symbol Note :

@ : just reserve , no build

DEBUG@ : reserve for debug.

Layout Notes

L

UMA@: means for RS780M.

: Digital Ground

: Analog Ground

C

Platform

PUMA@

Platform

TIGRIS@

D

NB

GM@

PM@+GPM@

PM@+PM1@ SB700

GM@

PM@+GPM@

PM@+PM1@ SB710

S1G2

RS780MC NA

S1G2

RS780MN

S1G2

RX781

Item CPU SB

S1G3

RS880MC NA

S1G3

RS880M

S1G3

RX881

VGA

NA

MXMRS780MN

MXM

NB

VGA

NA

MXMRS880M

MXM

SB700

SB710

E

CommentItem CPU SB

Comment

BTO (Build-To-Order) Option Table

( B )

BT@

AMD(UMA)

IHDMI@

SOURCE

KB926

RS780M

SB700

RJ11

( R )

MDC@

SSD

( S )

SSD@

HDMI

(Y)

ATI VGA/B

HDMI@

SATA ODD

16" 17"

16inch@

COMMON

H@

BATTINVERTER

VVV

17inch@

LVDS wireset

Cost down

LVDSSET@

HDMI CEC

( H )

Half - size

WLAN@ WIMAX@

16inch_45@ 17inch_45@

CPU

THERMAL

SENSOR

WiFi

SODIMM

I / II

First Second

G@ + G_1st@ G@ + G_2nd@

DC-IN

CLK

WLAN

GEN

VV

G- sensor

CHIPSET

PUMA@ TIGRIS@

LCD DDC ROM

V

HDMI DDC ROM

V

3 in 1 card reader

NEW CARD

V

RTS5159

CARD@

MXM Thermal Sensor

V

Function

Description

Explain

OO

X

BTO

Function

Description

Explain

BTO

X

Express card / PCMCIA

( E / A )

EXPCARD@ / PCMCIA@

FP@

CAMERA & MIC

( F )

CAMERA MIC

CAM@ MIC@

FingerPrinter

SMBUS Control Table

BLUE TOOTH

(X)

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

EC_SMB_DA2

I2C_CLK

I2C_DATA

DDC_CLK0

DDC_DATA0

DDC_CLK1

DDC_DATA1

SCL0

SDA0

SCL1

SDA1

SCL2

SDA2

SCL3

SDA3

4 4

EC SM Bus2 address

Device

ADI1032-1 CPU

ADI1032-2 VGA

EC KB926D2

Ext. VGA/B

CS/B

HEX Address

1001 100X b

98H

1001 101X b

9AH

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Notes List

LA-4971P

E

1.0

3 45Wednesday, April 22, 2009

1.0

A

B

C

D

E

< C1, C2 and C7 must be replaced to 10-uF for Caspian compatibility >

+1.2V_HT

250 mil

1

PUMA@

C1

4.7U_0805_10V4Z

2

1 1

TIGRIS@

C1

C1 10U_0805_10V6K

10U_0805_10V6K

1

PUMA@

C2

4.7U_0805_10V4Z

2

TIGRIS@

C2

C2 10U_0805_10V6K

10U_0805_10V6K

Near CPU SocketVLDT CAP.

1

2

C3

0.22U_0603_16V4Z

1

C4

0.22U_0603_16V4Z

2

1

C5

180P_0402_50V8J

2

1

C6

180P_0402_50V8J

2

H_CADIP[0..15]10

2 2

3 3

H_CADIP[0..15]

H_CADIN[0..15]

VLDT=500mA

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

H_CLKIP010 H_CLKIN010 H_CLKIP110 H_CLKIN110

H_CTLIP010 H_CTLIN010 H_CTLIP110 H_CTLIN110

+1.2V_HT

JCPUA

D1

HT LINK

VLDT_A0

D2

VLDT_A1

D3

VLDT_A2

D4

VLDT_A3

E3

L0_CADIN_H0

E2

L0_CADIN_L0

E1

L0_CADIN_H1

F1

L0_CADIN_L1

G3

L0_CADIN_H2

G2

L0_CADIN_L2

G1

L0_CADIN_H3

H1

L0_CADIN_L3

J1

L0_CADIN_H4

K1

L0_CADIN_L4

L3

L0_CADIN_H5

L2

L0_CADIN_L5

L1

L0_CADIN_H6

M1

L0_CADIN_L6

N3

L0_CADIN_H7

N2

L0_CADIN_L7

E5

L0_CADIN_H8

F5

L0_CADIN_L8

F3

L0_CADIN_H9

F4

L0_CADIN_L9

G5

L0_CADIN_H10

H5

L0_CADIN_L10

H3

L0_CADIN_H11

H4

L0_CADIN_L11

K3

L0_CADIN_H12

K4

L0_CADIN_L12

L5

L0_CADIN_H13

M5

L0_CADIN_L13

M3

L0_CADIN_H14

M4

L0_CADIN_L14

N5

L0_CADIN_H15

P5

L0_CADIN_L15

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

FOX_PZ63823-284S-41F_638P@

< FAN Control Circuit : Vout = 1.6 x Vset >

+5VS

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0 L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1

1A

+FAN1

1

C192

10U_0805_10V4Z

2

< From EC >

4 4

EN_DFAN134

A

10U_0805_10V4Z

U6

1

EN

2

VIN

3

VOUT

4

VSET

APL5607KI-TRG_SO8

C183

8

GND

7

GND

6

GND

5

GND

B

H_CADOP[0..15]

H_CADON[0..15]

+VLDT_B

AE2 AE3 AE4 AE5

H_CADOP0

AD1

H_CADON0

AC1

H_CADOP1

AC2

H_CADON1

AC3

H_CADOP2

AB1

H_CADON2

AA1

H_CADOP3

AA2

H_CADON3

AA3

H_CADOP4

W2

H_CADON4

W3

H_CADOP5

V1

H_CADON5

U1

H_CADOP6

U2

H_CADON6

U3

H_CADOP7

T1

H_CADON7

R1

H_CADOP8

AD4

H_CADON8

AD3

H_CADOP9

AD5

H_CADON9

AC5

H_CADOP10

AB4

H_CADON10

AB3

H_CADOP11

AB5

H_CADON11

AA5

H_CADOP12

Y5

H_CADON12

W5

H_CADOP13

V4

H_CADON13

V3

H_CADOP14

V5

H_CADON14

U5

H_CADOP15

T4

H_CADON15

T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

12

D1

@

2

1

@

1SS355_SOD323-2

12

D2

BAS16_SOT23-3

< To NB >< From NB >

H_CLKOP0 10 H_CLKON0 10 H_CLKOP1 10 H_CLKON1 10

H_CTLOP0 10 H_CTLON0 10 H_CTLOP1 10 H_CTLON1 10

@

H_CADOP[0..15] 10

H_CADON[0..15] 10H_CADIN[0..15]10

PUMA@

C7

4.7U_0805_10V4Z

1 2

TIGRIS@

C7

C7 10U_0805_10V6K

10U_0805_10V6K

2

C9

1000P_0402_25V8J

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

< VLDT_A & VLDT_B : HyperTransport I/O ring power >

JFAN

+FAN1

1

2

3

4

GND

5

GND

ACES_85204-0300N_3P@

2008-09-25 2009-09-25

C

+3VS

12

R12

10K_0402_5%

2

C8

@

0.01U_0402_25V7K

1

Compal Secret Data

Deciphered Date

FAN_SPEED1 34

D

< To EC >

Compal Electronics, Inc.

Title

AMD CPU S1G2 HT I/F

Size Document Number Rev

Custom

Date: Sheet of

LA-4971P

E

4 45Wednesday, April 22, 2009

1.0

A

< DDR2 VREF is 0.5 ratio >

+1.8V

R1

1K_0402_1%R11K_0402_1%

1 2

R2

1 1

1K_0402_1%R21K_0402_1%

1 2

2 2

< To SO_DIMMA >

3 3

< To SO_DIMMA >

+MCH_REF

1

C12

0.1U_0402_16V7K

2

1

C13

1000P_0402_25V8J

2

Place them close to CPU within 1"

R4 39.2_0402_1%R4 39.2_0402_1%

1 2

R3 39.2_0402_1%R3 39.2_0402_1%

1 2

+1.8V

T2 PADT2 PAD

DDR_A_ODT09 DDR_A_ODT19

DDR_CS0_DIMMA#9 DDR_CS1_DIMMA#9 DDR_CS0_DIMMB# 8

DDR_CKE0_DIMMA9 DDR_CKE1_DIMMA9

DDR_A_CLK09 DDR_A_CLK#09 DDR_A_CLK19 DDR_A_CLK#19

DDR_A_MA[15..0]9

DDR_A_BS#09 DDR_A_BS#19 DDR_A_BS#29

DDR_A_RAS#9 DDR_A_CAS#9 DDR_A_WE#9

< PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH >

DDR_A_CLK0

1

C10

1.5P_0402_50V9C

2

DDR_A_CLK#0

DDR_A_CLK1

1

C11

1.5P_0402_50V9C

2

DDR_A_CLK#1

JCPUB

D10

VTT1

C10

VTT2

B10

VTT3

AD10

MEM_P MEM_N VTT_SENSE

DDR_A_ODT0 DDR_A_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB#

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

VTT4

AF10

MEMZP

AE10

MEMZN

H16

RSVD_M1

T19

MA0_ODT0

V22

MA0_ODT1

U21

MA1_ODT0

V19

MA1_ODT1

T20

MA0_CS_L0

U19

MA0_CS_L1

U20

MA1_CS_L0

V20

MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_H0

N20

MA_CLK_L0

E16

MA_CLK_H1

F16

MA_CLK_L1

Y16

MA_CLK_H2

AA16

MA_CLK_L2

P19

MA_CLK_H3

P20

MA_CLK_L3

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD10

L22

MA_ADD11

K20

MA_ADD12

V24

MA_ADD13

K24

MA_ADD14

K19

MA_ADD15

R20

MA_BANK0

R23

MA_BANK1

J21

MA_BANK2

R19

MA_RAS_L

T22

MA_CAS_L

T24

MA_WE_L

@ FOX_PZ63823-284S-41F_638P

MEM:CMD/CTRL/CLK

VTT_SENSE

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1 MB_CLK_H2 MB_CLK_L2 MB_CLK_H3 MB_CLK_L3

B

DDR_B_CLK0

DDR_B_CLK#0

DDR_B_CLK1

DDR_B_CLK#1

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB_CKE0 MB_CKE1

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C

D

E

< Processor DDR2 Memory Interface >

1

C14

1.5P_0402_50V9C

2

1

C15

1.5P_0402_50V9C

2

+0.9V+0.9V

W10

VTT5

AC10

VTT6

AB10

VTT7

AA10

VTT8

A10

VTT9

Y10

+MCH_REF

W17

B18

DDR_B_ODT0

W26

DDR_B_ODT1

W23 Y26

V26

DDR_CS1_DIMMB#

W25 U22

DDR_CKE0_DIMMB

J25

DDR_CKE1_DIMMB

H26

P22 R22

DDR_B_CLK0

A17

DDR_B_CLK#0

A18

DDR_B_CLK1

AF18

DDR_B_CLK#1DDR_A_CLK#1

AF17 R26 R25

DDR_B_MA0

P24

DDR_B_MA1

N24

DDR_B_MA2

P26

DDR_B_MA3

N23

DDR_B_MA4

N26

DDR_B_MA5

L23

DDR_B_MA6

N25

DDR_B_MA7

L24

DDR_B_MA8

M26

DDR_B_MA9

K26

DDR_B_MA10

T26

DDR_B_MA11

L26

DDR_B_MA12

L25

DDR_B_MA13

W24

DDR_B_MA14

J23

DDR_B_MA15

J24

DDR_B_BS#0

R24

DDR_B_BS#1

U26

DDR_B_BS#2

J26

DDR_B_RAS#

U25

DDR_B_CAS#

U24

DDR_B_WE#

U23

T1PAD T1PAD

T3PAD T3PAD

DDR_B_ODT0 8 DDR_B_ODT1 8

DDR_CS1_DIMMB# 8

DDR_CKE0_DIMMB 8 DDR_CKE1_DIMMB 8

DDR_B_CLK0 8 DDR_B_CLK#0 8 DDR_B_CLK1 8 DDR_B_CLK#1 8

DDR_B_MA[15..0] 8

DDR_B_BS#0 8 DDR_B_BS#1 8 DDR_B_BS#2 8

DDR_B_RAS# 8 DDR_B_CAS# 8 DDR_B_WE# 8

< VTT regulator voltage >

< To SO_DIMMB >

DDR_B_D[63..0]8

< From/To SO_DIMMB >

DDR_B_DM[7..0]8 DDR_A_DM[7..0] 9

< To SO_DIMMB > < To SO_DIMMA >

DDR_B_DQS08 DDR_B_DQS#08 DDR_B_DQS18 DDR_B_DQS#18 DDR_B_DQS28 DDR_B_DQS#28 DDR_B_DQS38 DDR_B_DQS#38 DDR_B_DQS48 DDR_B_DQS#48 DDR_B_DQS58 DDR_B_DQS#58 DDR_B_DQS68 DDR_B_DQS#68 DDR_B_DQS78 DDR_B_DQS#78

< From/To SO_DIMMB > < From/To SO_DIMMA >

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0

DDR_B_DQS#0

DDR_B_DQS1

DDR_B_DQS#1

DDR_B_DQS2

DDR_B_DQS#2

DDR_B_DQS3

DDR_B_DQS#3

DDR_B_DQS4

DDR_B_DQS#4

DDR_B_DQS5

DDR_B_DQS#5

DDR_B_DQS6

DDR_B_DQS#6

DDR_B_DQS7

DDR_B_DQS#7

JCPUC

MEM:DATA

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

FOX_PZ63823-284S-41F_638P@

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23

G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

Y11 AE14 AF14 AF11 AD11

A12

B16

A22

E25 AB26 AE22 AC16 AD12

C12

B12

D16

C16

A24

A23

F26

E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24 AC24 Y19 AB16 Y13

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9

DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

DDR_A_D[63..0] 9

< From/To SO_DIMMA >

DDR_A_DQS0 9 DDR_A_DQS#0 9 DDR_A_DQS1 9 DDR_A_DQS#1 9 DDR_A_DQS2 9 DDR_A_DQS#2 9 DDR_A_DQS3 9 DDR_A_DQS#3 9 DDR_A_DQS4 9 DDR_A_DQS#4 9 DDR_A_DQS5 9 DDR_A_DQS#5 9 DDR_A_DQS6 9 DDR_A_DQS#6 9 DDR_A_DQS7 9 DDR_A_DQS#7 9

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

AMD CPU S1G2 DDRII I/F

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

LA-4971P

E

5 45Wednesday, April 22, 2009

1.0

A

+CPU_CORE_0

+CPU_CORE_1

1 1

< Close to CPU >

R487

R487 10_0402_5%

10_0402_5%

1 2

R486

R486 10_0402_5%

10_0402_5%

1 2

Un-Mount R489 For Caspian

R489

R489 10_0402_5%PUMA@

10_0402_5%PUMA@

1 2

R488

R488 10_0402_5%PUMA@

10_0402_5%PUMA@

1 2

CPU_VDD0_RUN_FB_H

CPU_VDD0_RUN_FB_L

CPU_VDD1_RUN_FB_H

CPU_VDD1_RUN_FB_L

Change R488 to 10K For Caspian

< 200-MHz PLL Reference Clock >

CLK_CPU_BCLK15

CLK_CPU_BCLK#15

C20

C20 3900P_0402_50V7K

3900P_0402_50V7K

1 2

C21

C21 3900P_0402_50V7K

3900P_0402_50V7K

1 2

Address:100_1100 Place close to CPU wihtin 1.5"

12

R8

169_0402_1%R8169_0402_1%

CPU_CLKIN_SC_P

CPU_CLKIN_SC_N

< Filtered PLL Supply Voltage >

2 2

L1 FBM_L11_201209_300L_0805L1 FBM_L11_201209_300L_0805

1 2

1

@+C16

@

2

+

C16

100U_D2_6.3VM

1

C17

4.7U_0805_10V4Z

2

1

2

VDDA=300mA

C18

3300P_0402_50V7K

+2.5VDDA+2.5VS

1

2

+2.5VDDA

C19

0.22U_0603_16V4Z

B

< Differential feedback for VDDNB >

+VDDNB

< Sideband-Temperature Sensor Interface Clock & Data>

< Sideband-Temperature Sensor Interface interrupt >

< Compensation Resistor to VSS >

< Compensation Resistor to VLDT >

R484

R484 10_0402_5%

10_0402_5%

12

R485

R485 10_0402_5%

10_0402_5%

12

Close to CPU

CPU_VDDNB_RUN_FB_H

CPU_VDDNB_RUN_FB_L

+1.2V_HT

R13 44.2_0402_1%R13 44.2_0402_1%

1 2

R14 44.2_0402_1%R14 44.2_0402_1%

1 2

CPU_VDD0_RUN_FB_H43 CPU_VDD0_RUN_FB_L43

CPU_VDD1_RUN_FB_H43 CPU_VDD1_RUN_FB_L43

< Debug ready >

< JTAG debug port >

T9 PADT9 PAD T10 PADT10 PAD T11 PADT11 PAD T12 PADT12 PAD T19 PADT19 PAD

C

+2.5VDDA

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

LDT_RST# H_PWRGD LDT_STOP# CPU_LDT_REQ_R#

CPU_HTREF0 CPU_HTREF1

CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L

CPU_VDD1_RUN_FB_H CPU_VDD1_RUN_FB_L

CPU_TEST23_TSTUPD

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L

CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1

1 2

R25

R25 0_0402_5%

0_0402_5%

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC THERMDA

VDDIO_FB_H VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

DBREQ_L

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

D

M11

KEY1

W18

KEY2

A6

SVC

A4

SVD

AF6 AC7 AA8

W7 W8

W9 Y9

H6 G6

E10

AE9

TDO

J7 H8

D7 E7 F7 C7

C3 K8

C4

C9 C8

H18 H19 AA7 D5 C5

CPU_SVC CPU_SVD

CPU_THERMTRIP#_R CPU_PROCHOT#_1.8

R42

12

300_0402_5%

THERMDC_CPU THERMDA_CPU

+1.8V sense no support

CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L

CPU_DBREQ#

CPU_TEST28_H_PLLCHRZ_P CPU_TEST28_L_PLLCHRZ_N

CPU_TEST17_BP3 CPU_TEST16_BP2

CPU_TEST10_ANALOGOUT

CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N

CPU_SVC 43 CPU_SVD 43

+1.8V

T22PAD T22PAD T21PAD T21PAD

CPU_VDDNB_RUN_FB_H 43 CPU_VDDNB_RUN_FB_L 43

T20PAD T20PAD

T5PAD T5PAD T6PAD T6PAD

T7PAD T7PAD T8PAD T8PAD

R32

@R32

@

300_0402_5%

12

Add R32 at PVT

T13PAD T13PAD T14PAD T14PAD

JCPUD

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

C6

LDTREQ_L

AF4

SIC

AF5

SID

AE6

ALERT_L

R6

HT_REF0

P6

HT_REF1

F6

VDD0_FB_H

E6

VDD0_FB_L

Y6

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

G9

TEST19

E9

TEST25_H

E8

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

C2

TEST9

AA6

TEST6

A3

RSVD1

A5

RSVD2

B3

RSVD3

B5

RSVD4

C1

RSVD5

FOX_PZ63823-284S-41F_638P@

E

< Serial VID Interface clock & data >

< Thermal Sensor Trip output > < HTC-active state indication or command >

< Thermal diode cathode & anode >

< Differential feedback for VDDIO > < VDDIO : DDR SDRAM I/O ring power supply> < Differential feedback for VDDNB > < Northbridge power supply >

< Debug request >

route as differential as short as possible testpoint under package

+1.2V_HT

< Serial VID Interface clock & data >

+1.8VS

3 3

LDT_RST#20

H_PWRGD20,43

4 4

CPU_LDT_REQ#11,20

0718 AMD --> 1K ohm

R22

R22 1K_0402_5%

1K_0402_5%

12

R23

R23 1K_0402_5%

1K_0402_5%

12

+1.8VS

R15

300_0402_5%

1 2

1

C22

@

0.01U_0402_25V7K

2

+1.8VS +1.8VS

R21

300_0402_5%

1 2

H_PWRGD LDT_STOP#

1

C23

0.1U_0402_16V7K

2

300_0402_5%

CPU_LDT_REQ#

0.01U_0402_25V7K

LDT_RST#

A

CPU_SVC

CPU_SVD

LDT_STOP#11,20

+1.8VS

R30

1 2

1

C24

@

2

R36

300_0402_5%

1 2

1

C25

@

0.01U_0402_25V7K

2

PUMA@

R27

CPU_LDT_REQ_R#

0_0402_5%

Un-Mount R27 For Caspian

Add R497 and R498 at PVT

1 2

R10

R10 10K_0402_5%

10K_0402_5%

1 2

+1.8V

CPU_PROCHOT#_1.8

Add R29 and R31 at PVT

1 2

B

1 2

CPU_THERMTRIP#_R

R9 300_0402_5%R9300_0402_5%

1 2

TIGRIS@

R31

R31 300_0402_5%

300_0402_5%

12

TIGRIS@

R29

R29 300_0402_5%

300_0402_5%

R26

R26 300_0402_5%

300_0402_5%

12

R28

R28 300_0402_5%

300_0402_5%

R5 300_0402_5%R5300_0402_5%

R497

CPU_TEST25_H_BYPASSCLK_H

510_0402_5%TIGRIS@

R499

CPU_TEST25_L_BYPASSCLK_L

510_0402_5%@

B

2

Q3

E

3 1

C

MMBT3904_NL_SOT23-3

@ R11

@

1 2

CPU_TEST20_SCANCLK2

CPU_TEST23_TSTUPD

CPU_TEST21_SCANEN

CPU_TEST24_SCANCLK1

+1.8V

R498

R498 510_0402_5%@

510_0402_5%@

1 2

R500

R500 510_0402_5%TIGRIS@

510_0402_5%TIGRIS@

1 2

D12

@D12

@

CH751H-40PT_SOD323-2

21

D20

@D20

@

CH751H-40PT_SOD323-2

21

D16

D16 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

21

R11 0_0402_5%

0_0402_5%

< To SB700 CPU block>

H_PROCHOT# 20

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

< To power circuitry>

ENTRIP2 38,40

< To power circuitry>

EN0 37,40

< To SB700 ACPI block>

H_THERMTRIP# 21

0.1U_0402_16V7K

Compal Secret Data

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

+1.8V

T23 PADT23 PAD

+1.8V

T24 PADT24 PAD

+3VS

1

C26

2

< R41 Close to CPU >

CPU_DBREQ#

R41 300_0402_5%R41 300_0402_5%

1 2

R40 220_0402_5%@ R40 220_0402_5%@

1 2

R39 220_0402_5%@ R39 220_0402_5%@

1 2

R38 220_0402_5%@ R38 220_0402_5%@

1 2

R37 220_0402_5%@ R37 220_0402_5%@

1 2

THERMDA_CPU

THERMDC_CPU

C27

1 2

2200P_0402_50V7K

< noise filter cap >

D

< HDT Connector >

JP3

< R494 Close to CPU >

1 2

+1.8V

NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.

< Thermal Sensor >

U2

1

VDD

SCLK

2

D+

SDATA

3

ALERT#

D-

THERM#4GND

ADM1032ARM-1 ZREEL_MSOP8

Compal Electronics, Inc.

Title

AMD CPU S1G2 CTRL

Size Document Number Rev

Custom

Date: Sheet of

R494

R494 0_0402_5%@

0_0402_5%@

8

7

6

5

EC_SMB_CK2

EC_SMB_DA2

JP3

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

2423 26

SAMTEC_ASP-68200-07

@ SAMTEC_ASP-68200-07

@

LA-4971P

E

< From EC >

EC_SMB_CK2 19,34,35

EC_SMB_DA2 19,34,35

6 45Wednesday, April 22, 2009

LDT_RST#

1.0

A

VDD decoupling : +CPU_CORE

+CPU_CORE_0

1

+

C30

330U_X_2VM_R6M

2

Near CPU Socket

1 1

+CPU_CORE_1 +CPU_CORE_1 +CPU_CORE_1

1

+

C31

330U_X_2VM_R6M

2

Near CPU Socket

VDDIO decoupling : DDR SDRAM I/O ring power

+1.8V

1

C46

22U_0805_6.3V6M

2

Under CPU Socket

+1.8V

2 2

1

C55

0.22U_0603_16V4Z

2

Between CPU Socket and DIMM

+1.8V

1

C60

0.01U_0402_25V7K

2

Between CPU Socket and DIMM

+1.8V

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

1

C62

180P_0402_50V8J

2

Between CPU Socket and DIMM

+1.8V

3 3

1

C74

4.7U_0805_10V4Z

2

Between CPU Socket and DIMM

+0.9V

VTT decoupling.

1

C66

4.7U_0805_10V4Z

2

Near CPU Socket Right side

+0.9V

1

C79

4.7U_0805_10V4Z

2

Near CPU Socket Left side

4 4

+VDDNB decoupling : Northbridge power

+VDDNB

1

C52

22U_0805_6.3V6M

2

1

2

1

2

1

C47

22U_0805_6.3V6M

2

1

C56

0.22U_0603_16V4Z

2

1

C63

180P_0402_50V8J

2

1

C75

4.7U_0805_10V4Z

2

1

C67

4.7U_0805_10V4Z

2

1

C80

4.7U_0805_10V4Z

2

1

C53

22U_0805_6.3V6M

2

+CPU_CORE_0 +CPU_CORE_0

+

C28

330U_X_2VM_R6M

+

C29

330U_X_2VM_R6M

A

1

2

Under CPU Socket Under CPU Socket

1

2

Under CPU Socket Under CPU Socket

1

C48

0.22U_0603_16V4Z

2

1

C57

0.22U_0603_16V4Z

2

1

C61

0.01U_0402_25V7K

2

1

C64

180P_0402_50V8J

2

1

C76

4.7U_0805_10V4Z

2

1

C68

0.22U_0603_16V4Z

2

1

C81

0.22U_0603_16V4Z

2

TIGRIS@

1

C54

22U_0805_6.3V6M

2

C32

22U_0805_6.3V6M

C36

22U_0805_6.3V6M

1

2

1

2

1

2

1

2

1

C69

0.22U_0603_16V4Z

2

1

C82

0.22U_0603_16V4Z

2

1

C33

22U_0805_6.3V6M

2

1

C37

22U_0805_6.3V6M

2

C49

0.22U_0603_16V4Z

C58

0.22U_0603_16V4Z

C65

180P_0402_50V8J

C77

4.7U_0805_10V4Z

1

C34

22U_0805_6.3V6M

2

1

C38

22U_0805_6.3V6M

2

1

C50

180P_0402_50V8J

2

Change to B2 size

1

+

C78

@+C78

@

220U_B2_4VM_R45M

2

1

C70

1000P_0402_25V8J

2

1

C83

C83 1000P_0402_25V8J

1000P_0402_25V8J

2

B

1

C51

180P_0402_50V8J

2

1

C71

1000P_0402_25V8J

2

1

C84

C84 1000P_0402_25V8J

1000P_0402_25V8J

2

B

1

C35

22U_0805_6.3V6M

2

1

C39

22U_0805_6.3V6M

2

1

C72

180P_0402_50V8J

2

1

C85

C85 180P_0402_50V8J

180P_0402_50V8J

2

1

C40

0.22U_0603_16V4Z

2

1

C43

0.22U_0603_16V4Z

2

C

+0.9V

1. Near Power Supply

1

2. Change to B2 size

+

C59

C59 220U_B2_4VM_R45M

220U_B2_4VM_R45M

2

C

1

C42

180P_0402_50V8J

2

1

C45

180P_0402_50V8J

2

Compal Secret Data

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

+VDDNB

+1.8V

1

C41

0.01U_0402_25V7K

2

1

C44

0.01U_0402_25V7K

2

1

C73

180P_0402_50V8J

2

1

C86

C86 180P_0402_50V8J

180P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

+CPU_CORE_0

AA11 AA13 AA15 AA17 AA19

AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21

AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

D

LA-4971P

E

1.0

7 45Wednesday, April 22, 2009

E

1.0

JCPUE

G4

VDD0_1

H2

VDD0_2

J9

VDD0_3

J11

VDD0_4

J13

VDD0_5

J15

VDD0_6

K6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

L4

VDD0_11

L7

VDD0_12

L9

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

M2

VDD0_17

M6

VDD0_18

M8

VDD0_19

M10

VDD0_20

N7

VDD0_21

N9

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

FOX_PZ63823-284S-41F_638P@

JCPUF

AA4

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17

AD6

VSS18

AD8

VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

FOX_PZ63823-284S-41F_638P@

+CPU_CORE_1

P8

VDD1_1

P10

VDD1_2

R4

VDD1_3

R7

VDD1_4

R9

VDD1_5

R11

VDD1_6

T2

VDD1_7

T6

VDD1_8

T8

VDD1_9

T10

VDD1_10

T12

VDD1_11

T14

VDD1_12

U7

VDD1_13

U9

VDD1_14

U11

VDD1_15

U13

VDD1_16

U15

VDD1_17

V6

VDD1_18

V8

VDD1_19

V10

VDD1_20

V12

VDD1_21

V14

VDD1_22

W4

VDD1_23

Y2

VDD1_24

AC4

VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

+1.8V

AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

Athlon 64 S1 Processor Socket

J6

VSS66

J8

VSS67

J10

VSS68

J12

VSS69

J14

VSS70

J16

VSS71

J18

VSS72

K2

VSS73

K7

VSS74

K9

VSS75

K11

VSS76

K13

VSS77

K15

VSS78

K17

VSS79

L6

VSS80

L8

VSS81

L10

VSS82

L12

VSS83

L14

VSS84

L16

VSS85

L18

VSS86

M7

VSS87

M9

VSS88

AC6

VSS89

M17

VSS90

N4

VSS91

N8

VSS92

N10

VSS93

N16

VSS94

N18

VSS95

P2

VSS96

P7

VSS97

P9

VSS98

P11

VSS99

P17

VSS100

R8

VSS101

R10

VSS102

R16

VSS103

R18

VSS104

T7

VSS105

T9

VSS106

T11

VSS107

T13

VSS108

T15

VSS109

T17

VSS110

U4

VSS111

U6

VSS112

U8

VSS113

U10

VSS114

U12

VSS115

U14

VSS116

U16

VSS117

U18

VSS118

V2

VSS119

V7

VSS120

V9

VSS121

V11

VSS122

V13

VSS123

V15

VSS124

V17

VSS125

W6

VSS126

Y21

VSS127

Y23

VSS128

N6

VSS129

Athlon 64 S1 Processor Socket

Compal Electronics, Inc.

Title

AMD CPU S1G2 PWR & GND

Size Document Number Rev

Custom

Date: Sheet of

A

C1600.1U_0402_16V7K C1600.1U_0402_16V7K

1 2

+V_DDR_MCH_REF9

1 1

2 2

3 3

4 4

A

1

C104

C104 1000P_0402_25V8J

1000P_0402_25V8J

2

DDR_CKE0_DIMMB5

DDR_B_BS#25

DDR_B_BS#05 DDR_B_WE#5

DDR_B_CAS#5 DDR_CS1_DIMMB#5

DDR_B_ODT15

SMB_CK_DAT09,15,21,27

SMB_CK_CLK09,15,21,27

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D22 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB

DDR_B_BS#2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_B_ODT0 DDR_CS1_DIMMB#

DDR_B_ODT1

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43 DDR_B_D47

DDR_B_D48 DDR_B_D49 DDR_B_D53

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

+3VS

1

C119

0.1U_0402_16V7K

2

DIMM0 STD H:9.2mm (Bot)

B

+1.8V+1.8V

< EMI require >< EMI require >

C155 0.1U_0402_16V7KC155 0.1U_0402_16V7K

JDDRH

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

201

VSS

FOX_AS0A426-N8RN-7F_200P@

2

VSS

4

DQ4

6

DQ5

8

VSS

10

DM0

12

VSS

14

DQ6

16

DQ7

18

VSS

20

DQ12

22

DQ13

24

VSS

26

DM1

28

VSS

30

CK0

32

CK0#

34

VSS

36

DQ14

38

DQ15

40

VSS

42

VSS

44

DQ20

46

DQ21

48

VSS

50

NC

52

DM2

54

VSS

56

DQ22

58

DQ23

60

VSS

62

DQ28

64

DQ29

66

VSS

68

DQS3#

70

DQS3

72

VSS

74

DQ30

76

DQ31

78

VSS

80

NC/CKE1

82

VDD

84

NC/A15

86

NC/A14

88

VDD

90

A11

92

A7

94

A6

96

VDD

98

A4

100

A2

102

A0

104

VDD

106

BA1

108

RAS#

110

S0#

112

VDD

114

ODT0

116

NC/A13

118

VDD

120

NC

122

VSS

124

DQ36

126

DQ37

128

VSS

130

DM4

132

VSS

134

DQ38

136

DQ39

138

VSS

140

DQ44

142

DQ45

144

VSS

146

DQS5#

148

DQS5

150

VSS

152

DQ46

154

DQ47

156

VSS

158

DQ52

160

DQ53

162

VSS

164

CK1

166

CK1#

168

VSS

170

DM6

172

VSS

174

DQ54

176

DQ55

178

VSS

180

DQ60

182

DQ61

184

VSS

186

DQS7#

188

DQS7

190

VSS

192

DQ62

194

DQ63

196

VSS

198

SAO

200

SA1

202

VSS

B

12

DDR_B_D4 DDR_B_D5

DDR_B_DM0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE1_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7 DDR_B_MA6DDR_B_MA8

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB#

DDR_B_MA13

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46

DDR_B_D52

DDR_B_DM6

DDR_B_D54

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

DDR_B_CLK0 5 DDR_B_CLK#0 5

DDR_CKE1_DIMMB 5

DDR_B_BS#1 5 DDR_B_RAS# 5 DDR_CS0_DIMMB# 5

DDR_B_ODT0 5

DDR_B_CLK1 5 DDR_B_CLK#1 5

+3VS

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

C

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 DDR_B_RAS#

DDR_B_MA14 DDR_B_MA11 DDR_B_MA7 DDR_B_MA6

DDR_CKE0_DIMMB DDR_B_BS#2 DDR_B_MA15 DDR_CKE1_DIMMB

DDR_B_MA3 DDR_B_MA8 DDR_B_MA12 DDR_B_MA9

DDR_B_BS#0 DDR_B_MA10 DDR_B_MA1 DDR_B_MA5

DDR_CS1_DIMMB# DDR_B_ODT1 DDR_B_CAS# DDR_B_WE#

DDR_B_BS#1 DDR_CS0_DIMMB# DDR_B_MA13 DDR_B_ODT0

Compal Secret Data

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

RP8

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP9

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP10

47_0804_8P4R_5%

RP11

47_0804_8P4R_5%

RP12

47_0804_8P4R_5%

RP13

47_0804_8P4R_5%

RP14

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

D

+0.9V

C105 0.1U_0402_16V7KC105 0.1U_0402_16V7K

C106 0.1U_0402_16V7KC106 0.1U_0402_16V7K

C108 0.1U_0402_16V7KC108 0.1U_0402_16V7K

C107 0.1U_0402_16V7KC107 0.1U_0402_16V7K

C109 0.1U_0402_16V7KC109 0.1U_0402_16V7K

18 27

C110 0.1U_0402_16V7KC110 0.1U_0402_16V7K

36 45

C111 0.1U_0402_16V7KC111 0.1U_0402_16V7K

18 27

C112 0.1U_0402_16V7KC112 0.1U_0402_16V7K

36 45

C114 0.1U_0402_16V7KC114 0.1U_0402_16V7K

18 27

C113 0.1U_0402_16V7KC113 0.1U_0402_16V7K

36 45

C116 0.1U_0402_16V7KC116 0.1U_0402_16V7K

18 27

C115 0.1U_0402_16V7KC115 0.1U_0402_16V7K

36 45

C118 0.1U_0402_16V7KC118 0.1U_0402_16V7K

C117 0.1U_0402_16V7KC117 0.1U_0402_16V7K

DDR_B_D[0..63]

DDR_B_DM[0..7]

DDR_B_DQS[0..7]

DDR_B_MA[0..15]

DDR_B_DQS#[0..7]

D

E

+1.8V

12

DDR_B_D[0..63] 5

DDR_B_DM[0..7] 5

DDR_B_DQS[0..7] 5

DDR_B_MA[0..15] 5

DDR_B_DQS#[0..7] 5

Compal Electronics, Inc.

Title

DDRII SO-DIMM 0

Size Document Number Rev

Custom

Date: Sheet of

LA-4971P

E

1.0

8 45Wednesday, April 22, 2009

1.0

A

+1.8V

R43

R43 1K_0402_1%

1K_0402_1%

+V_DDR_MCH_REF8

1 1

2 2

3 3

4 4

1 2

R44

R44 1K_0402_1%

1K_0402_1%

1 2

A

1

C96

0.1U_0402_16V7K

2

DDR_CKE0_DIMMA5

DDR_A_BS#25

DDR_A_BS#05 DDR_A_WE#5

DDR_A_CAS#5 DDR_CS1_DIMMA#5

DDR_A_ODT15

SMB_CK_DAT08,15,21,27

SMB_CK_CLK08,15,21,27

+V_DDR_MCH_REF

1

C95

C95 1000P_0402_25V8J

1000P_0402_25V8J

2

DDR_A_D0 DDR_A_D1

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D20 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2

DDR_A_MA12 DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_MA0

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_A_ODT0 DDR_CS1_DIMMA#

DDR_A_ODT1

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

+3VS

B

JDDRL

C1930.1U_0402_16V7K C1930.1U_0402_16V7K

1 2

1

C103

0.1U_0402_16V7K

2

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

203

VSS

DIMM0 STD H:5.2mm (Bot)

B

C

+1.8V+1.8V

< EMI require >< EMI require >

C161 0.1U_0402_16V7KC161 0.1U_0402_16V7K

2

VSS

4

DQ4

6

DQ5

8

VSS

10

DM0

12

VSS

14

DQ6

16

DQ7

18

VSS

20

DQ12

22

DQ13

24

VSS

26

DM1

28

VSS

30

CK0

32

CK0#

34

VSS

36

DQ14

38

DQ15

40

VSS

42

VSS

44

DQ20

46

DQ21

48

VSS

50

NC

52

DM2

54

VSS

56

DQ22

58

DQ23

60

VSS

62

DQ28

64

DQ29

66

VSS

68

DQS3#

70

DQS3

72

VSS

74

DQ30

76

DQ31

78

VSS

80

NC/CKE1

82

VDD

84

NC/A15

86

NC/A14

88

VDD

90

A11

92

A7

94

A6

96

VDD

98

A4

100

A2

102

A0

104

VDD

106

BA1

108

RAS#

110

S0#

112

VDD

114

ODT0

116

NC/A13

118

VDD

120

NC

122

VSS

124

DQ36

126

DQ37

128

VSS

130

DM4

132

VSS

134

DQ38

136

DQ39

138

VSS

140

DQ44

142

DQ45

144

VSS

146

DQS5#

148

DQS5

150

VSS

152

DQ46

154

DQ47

156

VSS

158

DQ52

160

DQ53

162

VSS

164

CK1

166

CK1#

168

VSS

170

DM6

172

VSS

174

DQ54

176

DQ55

178

VSS

180

DQ60

182

DQ61

184

VSS

186

DQS7#

188

DQS7

190

VSS

192

DQ62

194

DQ63

196

VSS

198

SAO

200

SA1

204

VSS

FOX_AS0A426-M4R-TR_200P@

12

DDR_A_D4 DDR_A_D5

DDR_A_DM0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1

DDR_A_D14 DDR_A_D15

DDR_A_D21

DDR_A_DM2

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#

DDR_A_MA13

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

DDR_A_CLK0 5 DDR_A_CLK#0 5

DDR_CKE1_DIMMA 5

DDR_A_BS#1 5 DDR_A_RAS# 5 DDR_CS0_DIMMA# 5

DDR_A_ODT0 5

DDR_A_CLK1 5 DDR_A_CLK#1 5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

DDR_A_D[0..63]

DDR_A_DM[0..7]

DDR_A_DQS[0..7]

DDR_A_MA[0..15]

DDR_A_DQS#[0..7]

DDR_A_MA6 DDR_A_MA14 DDR_A_MA7 DDR_A_MA11

DDR_CKE0_DIMMA DDR_A_BS#2 DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_BS#1 DDR_A_MA2 DDR_A_MA0 DDR_A_MA4

DDR_A_MA5 DDR_A_MA8 DDR_A_MA9 DDR_A_MA12

DDR_A_BS#0 DDR_A_MA10 DDR_A_MA3 DDR_A_MA1

DDR_A_ODT1 DDR_CS1_DIMMA# DDR_A_CAS# DDR_A_WE#

DDR_A_MA13 DDR_A_ODT0 DDR_A_RAS# DDR_CS0_DIMMA#

D

47_0804_8P4R_5%

DDR_A_D[0..63] 5

DDR_A_DM[0..7] 5

DDR_A_DQS[0..7] 5

DDR_A_MA[0..15] 5

DDR_A_DQS#[0..7] 5

+0.9V

RP1

1 8 2 7 3 6 4 5

RP2

18 27 36 45

RP3

1 8 2 7 3 6 4 5

RP4

18 27 36 45

RP5

18 27 36 45

RP6

18 27 36 45

RP7

1 8 2 7 3 6 4 5

E

C87 0.1U_0402_16V7KC87 0.1U_0402_16V7K

1 2

C88 0.1U_0402_16V7KC88 0.1U_0402_16V7K

1 2

C90 0.1U_0402_16V7KC90 0.1U_0402_16V7K

1 2

C89 0.1U_0402_16V7KC89 0.1U_0402_16V7K

1 2

C91 0.1U_0402_16V7KC91 0.1U_0402_16V7K

1 2

C92 0.1U_0402_16V7KC92 0.1U_0402_16V7K

1 2

C93 0.1U_0402_16V7KC93 0.1U_0402_16V7K

1 2

C94 0.1U_0402_16V7KC94 0.1U_0402_16V7K

1 2

C98 0.1U_0402_16V7KC98 0.1U_0402_16V7K

1 2

C97 0.1U_0402_16V7KC97 0.1U_0402_16V7K

1 2

C100 0.1U_0402_16V7KC100 0.1U_0402_16V7K

1 2

C99 0.1U_0402_16V7KC99 0.1U_0402_16V7K

1 2

C102 0.1U_0402_16V7KC102 0.1U_0402_16V7K

1 2

C101 0.1U_0402_16V7KC101 0.1U_0402_16V7K

1 2

Title

Size Document Number Rev

Custom

Date: Sheet of

+1.8V

Compal Electronics, Inc.

DDRII SO-DIMM 1

LA-4971P

9 45Wednesday, April 22, 2009

E

1.0

A

PCIE_GTX_C_MRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15]

1 1

PCIE_GTX_C_MRX_P[0..15] 19

PCIE_GTX_C_MRX_N[0..15] 19

< To New Card >

< To WLAN >

< To LAN >

2 2

H_CADON[0..15]

3 3

4 4

< From S1G2 CPU : x16 HT> < To S1G2 CPU : x16 HT>

H_CADOP[0..15] 4

H_CADON[0..15] 4

Polarity inversion

PCIE_PTX_C_IRX_P027 PCIE_PTX_C_IRX_N027

PCIE_PTX_C_IRX_P227 PCIE_PTX_C_IRX_N227 PCIE_PTX_C_IRX_P326 PCIE_PTX_C_IRX_N326

SB_RX0P20 SB_RX0N20 SB_RX1P20 SB_RX1N20 SB_RX2P20 SB_RX2N20 SB_RX3P20 SB_RX3N20

0718 Place within 1" layout 1:2

H_CLKOP04

H_CLKON04

H_CLKOP14

H_CLKON14

H_CTLOP04 H_CTLON04

H_CTLON14

1 2

B

PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N15 PCIE_GTX_C_MRX_P15

RS780MCR3@

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1

HT_RXCALP

R57301_0402_1% R57301_0402_1%

HT_RXCALN

U3B

GM : RS780MN & RS780MC, PM : RX781

D4

GFX_RX0P

C4 A3 B3 C2 C1 E5 F5 G5 G6 H5 H6 J6 J5 J7 J8 L5 L6

M8

L8 P7

M7

P5

M5

R8 P8 R6 R5 P4 P3 T4 T3

AE3 AD4 AE2 AD3 AD1 AD2

V5

W6

U5 U6 U8 U7

AA8

Y8

AA7

Y7 AA5 AA6

W5

Y5

Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

AC24 AC25 AB25 AB24 AA24 AA25

Y22

Y23 W21 W20

V21

V20

U20

U21

U19

U18

T22

T23

AB23 AA22

M22 M23

R21

R20

C23

A24

PART 2 OF 6

GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N

GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P

PCIE I/F GPP

GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N

SB_RX0P SB_RX0N SB_RX1P SB_RX1N

PCIE I/F SB

SB_RX2P SB_RX2N SB_RX3P SB_RX3N

RS780M_FCBGA528

U3A

HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

RS780M_FCBGA528RS780MCR3@

NEED CHECK R57 & R58 WITH AMD

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

PART 1 OF 6

C

PCIE_MTX_GRX_P0

A5

GFX_TX0P

PCIE_MTX_GRX_N0

B5

GFX_TX0N

PCIE_MTX_GRX_P1

A4

GFX_TX1P

PCIE_MTX_GRX_N1

B4

GFX_TX1N

PCIE_MTX_GRX_P2

C3

GFX_TX2P

PCIE_MTX_GRX_N2

B2

GFX_TX2N

PCIE_MTX_GRX_P3

D1

GFX_TX3P

D2

GFX_TX3N

PCIE_MTX_GRX_P4

E2

GFX_TX4P

PCIE_MTX_GRX_N4

E1

GFX_TX4N

PCIE_MTX_GRX_P5

F4

GFX_TX5P

F3

GFX_TX5N

PCIE_MTX_GRX_P6

F1

GFX_TX6P

PCIE_MTX_GRX_N6

F2

GFX_TX6N

PCIE_MTX_GRX_P7

H4

GFX_TX7P

PCIE_MTX_GRX_N7

H3

GFX_TX7N

PCIE_MTX_GRX_P8

H1

GFX_TX8P

H2

GFX_TX8N

PCIE_MTX_GRX_P9

J2

GFX_TX9P

PCIE_MTX_GRX_N9

J1

GFX_TX9N

K4

GFX_TX10P

PCIE_MTX_GRX_N10

K3

GFX_TX10N

PCIE_MTX_GRX_P11

K1

GFX_TX11P

PCIE_MTX_GRX_N11

K2

GFX_TX11N

PCIE_MTX_GRX_P12

M4

GFX_TX12P

PCIE_MTX_GRX_N12

M3

GFX_TX12N

PCIE_MTX_GRX_P13

M1

GFX_TX13P

M2

GFX_TX13N

PCIE_MTX_GRX_P14

N2

GFX_TX14P

PCIE_MTX_GRX_N14

N1

GFX_TX14N

PCIE_MTX_GRX_P15

P1

GFX_TX15P

P2

GFX_TX15N

PCIE I/F GFX

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALN

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

HT_TXCALP

PCIE_ITX_PRX_P0

AC1

PCIE_ITX_PRX_N0

AC2 AB4 AB3

PCIE_ITX_PRX_P2

AA2

PCIE_ITX_PRX_N2

AA1

PCIE_ITX_PRX_P3

Y1

PCIE_ITX_PRX_N3

Y2 Y4 Y3 V1 V2

SB_TX0P_C

AD7

SB_TX0N_C

AE7

SB_TX1P_C

AE6

SB_TX1N_C

AD6

SB_TX2P_C

AB6

SB_TX2N_C

AC6

SB_TX3P_C

AD5

SB_TX3N_C

AE5

PCIE_CALRP

AC8

PCIE_CALRN

AB8

H_CADIP0

D24

H_CADIN0

D25

H_CADIP1

E24

H_CADIN1

E25

H_CADIP2

F24

H_CADIN2

F25

H_CADIP3

F23

H_CADIN3

F22

H_CADIP4

H23

H_CADIN4

H22

H_CADIP5

J25

H_CADIN5

J24

H_CADIP6

K24

H_CADIN6

K25

H_CADIP7

K23

H_CADIN7

K22

H_CADIP8

F21

H_CADIN8

G21

H_CADIP9

G20

H_CADIN9

H21

H_CADIP10

J20

H_CADIN10

J21

H_CADIP11

J18

H_CADIN11

K17

H_CADIP12

L19

H_CADIN12

J19

H_CADIP13

M19

H_CADIN13

L18

H_CADIP14

M21

H_CADIN14

P21

H_CADIP15

P18

H_CADIN15

M18

H24 H25 L21 L20

H_CTLIP0

M24

H_CTLIN0

M25

H_CTLIP1

P19

H_CTLIN1

R18

HT_TXCALP

B24

HT_TXCALN

B25

0718 Place within 1" layout 1:2

C120 0.1U_0402_16V7KPM@ C120 0.1U_0402_16V7KPM@

1 2

C121 0.1U_0402_16V7KPM@ C121 0.1U_0402_16V7KPM@

1 2

C122 0.1U_0402_16V7KPM@ C122 0.1U_0402_16V7KPM@

1 2

C123 0.1U_0402_16V7KPM@ C123 0.1U_0402_16V7KPM@

1 2

C124 0.1U_0402_16V7KPM@ C124 0.1U_0402_16V7KPM@

1 2

C125 0.1U_0402_16V7KPM@ C125 0.1U_0402_16V7KPM@

1 2

C126 0.1U_0402_16V7KPM@ C126 0.1U_0402_16V7KPM@

1 2

C127 0.1U_0402_16V7KPM@ C127 0.1U_0402_16V7KPM@

1 2

C128 0.1U_0402_16V7KPM@ C128 0.1U_0402_16V7KPM@

1 2

C129 0.1U_0402_16V7KPM@ C129 0.1U_0402_16V7KPM@

1 2

C130 0.1U_0402_16V7KPM@ C130 0.1U_0402_16V7KPM@

1 2

C131 0.1U_0402_16V7KPM@ C131 0.1U_0402_16V7KPM@

1 2

C132 0.1U_0402_16V7KPM@ C132 0.1U_0402_16V7KPM@

1 2

C133 0.1U_0402_16V7KPM@ C133 0.1U_0402_16V7KPM@

1 2

C134 0.1U_0402_16V7KPM@ C134 0.1U_0402_16V7KPM@

1 2

C135 0.1U_0402_16V7KPM@ C135 0.1U_0402_16V7KPM@

1 2

C136 0.1U_0402_16V7KPM@ C136 0.1U_0402_16V7KPM@

1 2

C137 0.1U_0402_16V7KPM@ C137 0.1U_0402_16V7KPM@

1 2

C138 0.1U_0402_16V7KPM@ C138 0.1U_0402_16V7KPM@

1 2

C139 0.1U_0402_16V7KPM@ C139 0.1U_0402_16V7KPM@

1 2

C140 0.1U_0402_16V7KPM@ C140 0.1U_0402_16V7KPM@

1 2

C141 0.1U_0402_16V7KPM@ C141 0.1U_0402_16V7KPM@

1 2

C142 0.1U_0402_16V7KPM@ C142 0.1U_0402_16V7KPM@

1 2

C143 0.1U_0402_16V7KPM@ C143 0.1U_0402_16V7KPM@

1 2

C144 0.1U_0402_16V7KPM@ C144 0.1U_0402_16V7KPM@

1 2

C145 0.1U_0402_16V7KPM@ C145 0.1U_0402_16V7KPM@

1 2

C146 0.1U_0402_16V7KPM@ C146 0.1U_0402_16V7KPM@

1 2

C147 0.1U_0402_16V7KPM@ C147 0.1U_0402_16V7KPM@

1 2

C148 0.1U_0402_16V7KPM@ C148 0.1U_0402_16V7KPM@

1 2

C149 0.1U_0402_16V7KPM@ C149 0.1U_0402_16V7KPM@

1 2

C150 0.1U_0402_16V7KPM@ C150 0.1U_0402_16V7KPM@

1 2

C151 0.1U_0402_16V7KPM@ C151 0.1U_0402_16V7KPM@

1 2

C152 0.1U_0402_16V7KC152 0.1U_0402_16V7K

1 2

C153 0.1U_0402_16V7KC153 0.1U_0402_16V7K

1 2

C156 0.1U_0402_16V7KWLAN@ C156 0.1U_0402_16V7KWLAN@

1 2

C157 0.1U_0402_16V7KWLAN@ C157 0.1U_0402_16V7KWLAN@

1 2

C158 0.1U_0402_16V7KC158 0.1U_0402_16V7K

1 2

C159 0.1U_0402_16V7KC159 0.1U_0402_16V7K

1 2

C162 0.1U_0402_16V7KC162 0.1U_0402_16V7K

1 2

C163 0.1U_0402_16V7KC163 0.1U_0402_16V7K

1 2

C164 0.1U_0402_16V7KC164 0.1U_0402_16V7K

1 2

C165 0.1U_0402_16V7KC165 0.1U_0402_16V7K

1 2

C166 0.1U_0402_16V7KC166 0.1U_0402_16V7K

1 2

C168 0.1U_0402_16V7KC168 0.1U_0402_16V7K

1 2

C169 0.1U_0402_16V7KC169 0.1U_0402_16V7K

1 2

C167 0.1U_0402_16V7KC167 0.1U_0402_16V7K

1 2

R55 1.27K_0402_1%R55 1.27K_0402_1%

1 2

R56 2K_0402_1%R56 2K_0402_1%

1 2

H_CADIP[0..15]H_CADOP[0..15]

H_CADIN[0..15]

H_CLKIP0 4

H_CLKIN0 4

H_CLKIP1 4

H_CLKIN1 4

H_CTLIP0 4 H_CTLIN0 4 H_CTLIP1 4H_CTLOP14 H_CTLIN1 4

R58 301_0402_1%R58 301_0402_1%

1 2

H_CADIP[0..15] 4

H_CADIN[0..15] 4

< Transmitter Calibration Resistor to HT_TXCALN >

D

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3PCIE_MTX_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8PCIE_MTX_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15PCIE_MTX_GRX_N15

Polarity inversion

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

Polarity inversion

< To MXM VGA board >< From MXM VGA board >

Polarity inversion

PCIE_ITX_C_PRX_P0 27 PCIE_ITX_C_PRX_N0 27

PCIE_ITX_C_PRX_P2 27 PCIE_ITX_C_PRX_N2 27 PCIE_ITX_C_PRX_P3 26 PCIE_ITX_C_PRX_N3 26

SB_TX0P 20 SB_TX0N 20 SB_TX1P 20 SB_TX1N 20 SB_TX2P 20 SB_TX2N 20 SB_TX3P 20 SB_TX3N 20

+1.1VS

RS780M Display Port Support (muxed on GFX)

< To New Card >

< To WLAN >

< To LAN >

< To SB700 : x4 PCEI A-link>< From SB700 : x4 PCIE A-link >

< TX Impedance Calibration. Connect to GND > < RX Impedance Calibration. Connect to VDDPCIE >

DP0

GFX_TX0,TX1,TX2 and TX3

DP1

GFX_TX4,TX5,TX6 and TX7

< If integrated GFX is used, some PCIE pairs are used as HDMI signal pairs >

PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1

PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3

R74 0_0402_5%IHDMI@ R74 0_0402_5%IHDMI@ R75 0_0402_5%IHDMI@ R75 0_0402_5%IHDMI@ R76 0_0402_5%IHDMI@ R76 0_0402_5%IHDMI@ R81 0_0402_5%IHDMI@ R81 0_0402_5%IHDMI@

R82 0_0402_5%IHDMI@ R82 0_0402_5%IHDMI@ R83 0_0402_5%IHDMI@ R83 0_0402_5%IHDMI@ R84 0_0402_5%IHDMI@ R84 0_0402_5%IHDMI@ R85 0_0402_5%IHDMI@ R85 0_0402_5%IHDMI@

1 2 1 2 1 2 1 2

E

PCIE_MTX_C_GRX_P[0..15] 19

PCIE_MTX_C_GRX_N[0..15] 19

AUX0 and HPD0

AUX1 and HPD1

HDMI_TXD2+ 18,19 HDMI_TXD2- 18,19 HDMI_TXD1+ 18,19 HDMI_TXD1- 18,19

HDMI_TXD0+ 18,19 HDMI_TXD0- 18,19 HDMI_CLK0+ 18,19 HDMI_CLK0- 18,19

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

RS780M&RX781-HT/PCIE

LA-4971P

10 45Wednesday, April 22, 2009

E

1.0Custom

A

UMA_CRT_R16

1 1

< DAC internal reference to set full scale DAC current >

+1.1VS

R71

4.7K_0402_5%

1 2

12

2 2

R72

4.7K_0402_5%

UMA_CRT_G16

UMA_CRT_B16

UMA_CRT_HSYNC14,16 UMA_CRT_VSYNC14,16 UMA_CRT_CLK16 UMA_CRT_DATA16

PLT_RST#14,19,20,26,27,33,34

NB_PWRGD21 LDT_STOP#6,20 CPU_LDT_REQ#6,20

NB_OSC_14.318M15

NBGFX_CLK15 NBGFX_CLK#15

CLK_SBLINK_BCLK15 CLK_SBLINK_BCLK#15

UMA_LCD_DDC_CLK17

UMA_LCD_DDC_DAT17

HDMIDAT_UMA18 HDMICLK_UMA18

Strap pin

< Dedicated power for the DAC which can affect display quality > < Dedicated power for the DAC which can affect display quality >

GPM@

+3VS +1.8VS

3 3

< DAC Bandgap Reference Voltage >

+1.8VS

< IO power for HyperTransport PLL >

+1.8VS +VDDA18HTPLL

4 4

A

< 1.8V IO power for PCI-E PLLs >

+1.8VS

1 2

GPM@

1 2

L10 BLM18PG121SN1D_0603L10 BLM18PG121SN1D_0603

1 2

L11 BLM18PG121SN1D_0603L11 BLM18PG121SN1D_0603

1 2

+NB_PLLVDD

+NB_HTPVDD

+VDDA18HTPLL

+VDDA18PCIEPLL

CLK_NBHT15 CLK_NBHT#15

AUX_CAL14

L2

L2 0_0603_5%

0_0603_5%

L2

L2 BLM18PG121SN1D_0603GM@

BLM18PG121SN1D_0603GM@

L6

L6 0_0603_5%

0_0603_5%

L6

L6 BLM18PG121SN1D_0603GM@

BLM18PG121SN1D_0603GM@

B

+AVDD1

+AVDD2

+AVDDQ

UMA_CRT_R

UMA_CRT_G

UMA_CRT_B

R67 0_0402_5%R67 0_0402_5%

1 2

+3VS

1

2

1

2

B

R65 715_0402_1%GPM@ R65 715_0402_1%GPM@ R65 715_0402_1%GM@ R65 715_0402_1%GM@

1 2

R88 10K_0402_5%@ R88 10K_0402_5%@

PM1@ C170

PM1@

1

GM@

2

PM1@ C175

PM1@

1

GM@

2

C179

2.2U_0603_6.3V4Z

+VDDA18PCIEPLL

C180

2.2U_0603_6.3V4Z

AVDD=100mA

UMA_CRT_HSYNC UMA_CRT_VSYNC

12

C170 0_0603_5%

0_0603_5%

C170

2.2U_0603_6.3V4Z

C175 0_0603_5%

0_0603_5%

C175

2.2U_0603_6.3V4Z

U3C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

+NB_PLLVDD +NB_HTPVDD

NB_RESET# NB_PWRGD

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DATA0/AUX0N(NC)

A8

DDC_CLK0/AUX0P(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS780MCR3@

RS780M_FCBGA528

+AVDD1 +AVDD2

+AVDDQ

/

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

GPM@ L4

GPM@

< 1.8V power for system PLLs >

GPM@

+1.8VS

< 1.1V Power for system PLLs >

GPM@

+1.1VS

Issued Date

C

A22

TXOUT_L0P(NC)

PART 3 OF 6

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)

TXCLK_UP(PCIE_RESET_GPIO4)

TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

CLOCKs PL L PWR

MIS.

SUS_STAT#(PWM_GPIO5)

THERMALDIODE_P THERMALDIODE_N

PM1@ C172

PM1@

L4 0_0603_5%

0_0603_5%

L4 0_0603_5%GM@L40_0603_5%GM@

GM@

L7

L7 0_0603_5%

0_0603_5%

L7

L7 BLM18PG121SN1D_0603GM@

BLM18PG121SN1D_0603GM@

1 2

L9

L9 0_0603_5%

0_0603_5%

L9

L9 BLM18PG121SN1D_0603GM@

BLM18PG121SN1D_0603GM@

1 2

2008-09-25 2009-09-25

TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L3P(NC)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

TESTMODE

C172 0_0603_5%

0_0603_5%

1

C172

2.2U_0603_6.3V4Z

2

Compal Secret Data

B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12

AE8 AD8

D13

PM1@ C198

PM1@

GM@

C176

PM1@ C176

PM1@

0_0603_5%

1

C176

GM@

2.2U_0603_6.3V4Z

2

C178

PM1@ C178

PM1@

0_0603_5%

1

C178

GM@

2.2U_0603_6.3V4Z

2

Deciphered Date

T17PAD T17PAD

R80 1.8K_0402_5%R80 1.8K_0402_5%

1

C198

0.1U_0402_16V7K

2

+VDDLTP18

+VDDLT18

R79 0_0402_5%GM@ R79 0_0402_5%GM@

1 2

R78 0_0402_5%GPM@ R78 0_0402_5%GPM@ R78 0_0402_5%GM@ R78 0_0402_5%GM@

1 2

C198 0_0402_5%

0_0402_5%

D

R73 100K_0402_5%GPM@ R73 100K_0402_5%GPM@ R73 100K_0402_5%GM@ R73 100K_0402_5%GM@

12

< Power for integrated DVI/HDMI PLL macro >

+1.8VS

+NB_HTPVDD

< 1.8V IO power for the integrated DVI/HDMI interface >

+1.8VS

+NB_PLLVDD

D

UMA_LCD_TXOUT0_A0+ 17 UMA_LCD_TXOUT0_A0- 17 UMA_LCD_TXOUT0_A1+ 17 UMA_LCD_TXOUT0_A1- 17 UMA_LCD_TXOUT0_A2+ 17 UMA_LCD_TXOUT0_A2- 17

UMA_LCD_TZOUT0_B0+ 17 UMA_LCD_TZOUT0_B0- 17 UMA_LCD_TZOUT0_B1+ 17 UMA_LCD_TZOUT0_B1- 17 UMA_LCD_TZOUT0_B2+ 17 UMA_LCD_TZOUT0_B2- 17

UMA_LCD_TXCLK_ACLK+ 17 UMA_LCD_TXCLK_ACLK- 17 UMA_LCD_TZCLK_BCLK+ 17 UMA_LCD_TZCLK_BCLK- 17

UMA_ENVDD 17 UMA_ENBKL 34

HPD 18,19,21

+1.8VS

SUS_STAT# 14,21

R371 300_0402_5%R371 300_0402_5%

1 2

< LVDS dual channel : channel 1 >

< LVDS dual channel : channel 2 >

< LVDS digital power enable >

< LVDS backlight enable >

< HDMI hot-plug detection >

< Strap option pin or gate side-port memory IO >

NB_PWRGD

RS780 use 140 ohm, check RS880 use what value

R62 140_0402_1%GM@ R62 140_0402_1%GM@

1 2

R63 150_0402_1%GM@ R63 150_0402_1%GM@

1 2

R64 150_0402_1%GM@ R64 150_0402_1%GM@

1 2

GPM@

GPM@ L5

GPM@

GM@ L5

GM@

L3

L3 0_0603_5%

0_0603_5%

L3

L3 BLM18PG121SN1D_0603GM@

BLM18PG121SN1D_0603GM@

12

L5 0_0603_5%

0_0603_5%

L5 BLM18PG121SN1D_0603

BLM18PG121SN1D_0603

12

GM@

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

UMA_CRT_R

UMA_CRT_G

UMA_CRT_B

PM1@ C171

PM1@

GM@

1

C174

4.7U_0805_10V4Z

2

RS780 VEDIO/CLK GEN

LA-4971P

E

1

C171

2.2U_0603_6.3V4Z

2

PM1@ C173

PM1@

GM@

E

C171 0_0603_5%

0_0603_5%

1

2

+VDDLTP18

C173 0_0402_5%

0_0402_5%

+VDDLT18

C173

0.1U_0402_16V7K

11 45Wednesday, April 22, 2009

1.0

2

B B

U3D

PAR 4 OF 6

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

RS780M_FCBGA528RS780MCR3@

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)

MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC)

MEM_DQ9/DVO_D5(NC) MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ13/DVO_D9(NC)

MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

MEM_DQ4(NC)

MEM_DQ12(NC)

MEM_DQS1P(NC) MEM_DQS1N(NC)

MEM_DM0(NC)

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23

+1.8VS

AE24

+1.1VS

AD23

AE18

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14

AD16 AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

1

A A

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

RS780M&RX781 SIDE PORT

Size Document Number Rev

Custom

Date: Sheet of

1

LA-4971P

1.0

12 45Wednesday, April 22, 2009

1.0

A

2A

L16 0_0805_5%L16 0_0805_5%

+1.1VS

1 1

+1.2V_HT

+1.8VS

2 2

+1.8VS

3 3

4 4

12

1

C209

4.7U_0805_10V4Z

2

2A < IO power for HyperTransport receive interface >

L18 0_0805_5%L18 0_0805_5%

12

C215

10U_0805_10V4Z

2A < IO power for HyperTransport transmit interface >

L19 0_0805_5%L19 0_0805_5%

12

1

C225

4.7U_0805_10V4Z

2

2A < 1.8V IO power for PCI-E graphics, SB, and GPP interfaces >

L22 0_0805_5%L22 0_0805_5%

12

1

C235

4.7U_0805_10V4Z

2

1

C251

+1.8VS

1U_0402_6.3V4Z

2

1

C206

0.1U_0402_16V7K

2

1

C214

0.1U_0402_16V7K

2

1

C226

0.1U_0402_16V7K

2

1

C246

4.7U_0805_10V4Z

2

L89 0_0603_5%GM@ L89 0_0603_5%GM@

1 2

L89 0_0603_5%GPM@ L89 0_0603_5%GPM@

A

< Digital IO power for HyperTransport interface >

1

C207

0.1U_0402_16V7K

2

1

C216

0.1U_0402_16V7K

2

1

C227

0.1U_0402_16V7K

2

1

C236

0.1U_0402_16V7K

2

< 1.8V IO transform power >

< 1.8V power for side-port memory interface >

GM@

PM1@ C252

PM1@

1

C208

0.1U_0402_16V7K

2

1

C217

0.1U_0402_16V7K

2

1

C228

0.1U_0402_16V7K

2

1

C237

0.1U_0402_16V7K

2

1

C252

1U_0402_6.3V4Z

2

C252 0_0402_5%

0_0402_5%

B

1

C210

0.1U_0402_16V7K

2

1

C218

0.1U_0402_16V7K

2

1

C229

0.1U_0402_16V7K

2

1

C238

0.1U_0402_16V7K

2

1

C239

0.1U_0402_16V7K

2

C

U3E

+VDDHT

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

+VDDHTRX

+VDDHTTX

+VDDA18PCIE

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y20

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDD18_1

G9

VDD18_2

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

RS780M_FCBGA528RS780MCR3@

U3F

A25

VSSAHT1

D23

VSSAHT2

E22

VSSAHT3

G22

VSSAHT4

G24

VSSAHT5

G25

VSSAHT6

H19

VSSAHT7

J22

VSSAHT8

L17

VSSAHT9

L22

VSSAHT10

L24

VSSAHT11

L25

VSSAHT12

M20

VSSAHT13

N22

VSSAHT14

P20

VSSAHT15

R19

VSSAHT16

R22

VSSAHT17

R24

VSSAHT18

R25

VSSAHT19

H20

VSSAHT20

U22

VSSAHT21

V19

VSSAHT22

W22

VSSAHT23

W24

VSSAHT24

W25

VSSAHT25

Y21

VSSAHT26

AD25

VSSAHT27

L12

VSS11

M14

VSS12

N13

VSS13

P12

VSS14

P15

VSS15

R11

VSS16

R14

VSS17

T12

VSS18

U14

VSS19

U11

VSS20

U15

VSS21

V12

VSS22

W11

VSS23

W15

VSS24

AC12

VSS25

AA14

VSS26

Y18

VSS27

AB11

VSS28

AB15

VSS29

AB17

VSS30

AB19

VSS31

AE20

VSS32

AB21

VSS33

K11

VSS34

RS780M_FCBGA528

RS780MCR3@

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

VDDPCIE_1

PART 5/6

VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

POWER

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

VSSAPCIE1

PART 6/6

VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30

GROUND

VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

2008-09-25 2009-09-25

< Main IO power for PCI-E graphics, SB, and GPP interfaces >

+VDDA11PCIE

A6 B6 C6

VDDA_12=2.5A

D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12

VDDC_1

J14

VDDC_2

U16

VDDC_3

J11

VDDC_4

K15

VDDC_5

M12

VDDC_6

L14

VDDC_7

L11

VDDC_8

M13

VDDC_9

M15

VDDC_10

N12

VDDC_11

N14

VDDC_12

P11

VDDC_13

P13

VDDC_14

P14

VDDC_15

R12

VDDC_16

R15

VDDC_17

T11

VDDC_18

T15

VDDC_19

U12

VDDC_20

T14

VDDC_21

J16

VDDC_22

AE10 AA11

< Isolated power for side-port memory interface >

Y11 AD10 AB10 AC10

< 3.3V IO power >

H11 H12

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14

VSS1

D11

VSS2

G8

VSS3

E14

VSS4

E15

VSS5

J15

VSS6

J12

VSS7

K14

VSS8

M11

VSS9

L15

VSS10

Compal Secret Data

Deciphered Date

D

GM@

C2191U_0402_6.3V4Z C2191U_0402_6.3V4Z

C2201U_0402_6.3V4Z C2201U_0402_6.3V4Z

1

2

C2400.1U_0402_16V7K C2400.1U_0402_16V7K

C2470.1U_0402_16V7K C2470.1U_0402_16V7K

2

1

C250

0.1U_0402_16V4Z

2

C2221U_0402_6.3V4Z C2221U_0402_6.3V4Z

C2211U_0402_6.3V4Z C2211U_0402_6.3V4Z

1

2

C21210U_0805_10V4Z C21210U_0805_10V4Z

C2240.1U_0402_16V7K C2240.1U_0402_16V7K

2

1

+NB_CORE

C21110U_0805_10V4Z C21110U_0805_10V4Z

C2230.1U_0402_16V7K C2230.1U_0402_16V7K

VDD_CORE:GM=5A/PM=10A< Core power >

C2420.1U_0402_16V7K C2420.1U_0402_16V7K

C2410.1U_0402_16V7K C2410.1U_0402_16V7K

2

1

C2320.1U_0402_16V7K C2320.1U_0402_16V7K

C2300.1U_0402_16V7K C2300.1U_0402_16V7K

C2430.1U_0402_16V7K C2430.1U_0402_16V7K

C2310.1U_0402_16V7K C2310.1U_0402_16V7K

C2440.1U_0402_16V7K C2440.1U_0402_16V7K

2

1

Compal Electronics, Inc.

Title

RS780M&RX781 PWR/GND

Size Document Number Rev

Date: Sheet of

1

C24510U_0805_10V4Z C24510U_0805_10V4Z

C23310U_0805_10V4Z C23310U_0805_10V4Z

2

1

GM@

2

LA-4971P

E

1 2

PJP9

PAD-OPEN 4x4m

+

C234

C234 470U_D2E_2.5VM_R9M

470U_D2E_2.5VM_R9M

DVT change to B size

C253

0.1U_0402_16V4Z

13 45Wednesday, April 22, 2009

E

L17FBMA-L11-201209-221LMA30T_0805 L17FBMA-L11-201209-221LMA30T_0805

+1.1VS

12

+1.1VS

+3VS

1.0Custom

A

B

C

D

E

< RS780 DFT_GPIO5 mux at CRT_VSYNC pull High to 3K >

SI2: Change to 3K pull high

R101

R101 3K_0402_5%

3K_0402_5%

UMA_CRT_VSYNC11,16

1 1

12

R102

R102 3K_0402_5%@

3K_0402_5%@

12

< RS780 use register to control PCI-E configure >

< RS780 DFT_GPIO1 >

R104

R104 150_0402_1%@

150_0402_1%@

D4

D4 CH751H-40PT_SOD323-2@

CH751H-40PT_SOD323-2@

1 2

PLT_RST# 11,19,20,26,27,33,34

2 2

AUX_CAL11

SUS_STAT#11,21

2 1

< RS780 use HSYNC to enable SIDE PORT (internal pull high) >

R125

R125 3K_0402_5%

3K_0402_5%

UMA_CRT_HSYNC11,16

12

< DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb >

Enables the Test Debug Bus using GPIO.

1 : Enable (RX780, RS780)

+3VS

0 : Disable (RX780, RS780)

PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#

< DFT_GPIO[4:2] : STRAP_PCIE_GPP_CFG[2:0] >

These pin straps are used to configure PCI-E GPP mode. 000 : 00001 001 : 00010 010 : 01011 011 : 00100 100 : 01010 101 : 01100 111 : 01011

< DFT_GPIO1 : LOAD_EEPROM_STRAPS >

Selects Loading of STRAPS from EPROM

1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

< DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb >

RX780: Enables the Test Debug Bus using PCIE bus

1 : Disable ( Can still be enabled using nbcfg register access )

+3VS

0 : Enable

RS780: Enables Side port memory ( RS780 use HSYNC#)

1. Disable (RS780) 0 : Enable (RS780)

3 3

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

RS780M&RX781 STRAPS

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

LA-4971P

14 45Wednesday, April 22, 2009

E

1.0Custom

A

+1.2V_HT

R168 0_0805_5%R168 0_0805_5%

1 2

+3VS_CLK

1 1

2 2

3 3

8.2K_0402_5%@

8.2K_0402_5%

SEL_SATA

4 4

+VDDCLK_IO

1

2

1

C458

0.1U_0402_16V4Z

2

+3VS_CLK

R179

1 2

R181

1 2

1*0configure as SATA output

configure as normal SRC(SRC_6) output

* default

C452

C452 22U_0805_6.3V6M

22U_0805_6.3V6M

1

C459

0.1U_0402_16V4Z

2

SEL_SATA

1

C453

0.1U_0402_16V4Z

2

1

C460

0.1U_0402_16V4Z

2

1

C454

0.1U_0402_16V4Z

2

1

C461

0.1U_0402_16V4Z

2

+3VS_CLK

1 2

27M_SEL

CLK_SBLINK_BCLK#11

CLK_PCIE_MCARD2#27

CLK_PCIE_MCARD227

R180

8.2K_0402_5%

27M_SEL

SB LINK SB SRC

WLAN

B

1

C455

0.1U_0402_16V4Z

2

C464

22P_0402_50V8J

1

2

Y2

12

14.31818MHZ_20P_L8430

1

2

C456

0.1U_0402_16V4Z

CLK_XTAL_OUT

CLK_XTAL_IN

C465

22P_0402_50V8J

+3VS

1

C457

0.1U_0402_16V4Z

2

Routing the trace at least 10mil

72

73

U10

GND

VSS_48

1

SMB_CK_CLK08,9,21,27 SMB_CK_DAT08,9,21,27

CLK_SBLINK_BCLK11 CLK_SBSRC_BCLK# 20

1 *

0 configure as SRC_7 output * default

+3VS_CLK

+VDDCLK_IO

+3VS_CLK

+VDDCLK_IO

configure as 27M and 27M_SS output

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18

SCL SDA VDD_DOT SRC_7#/27M SRC_7/27M_SS VSS_DOT SRC_5# SRC_5 SRC_4# SRC_4 VSS_SRC VDD_SRC_IO SRC_3# SRC_3 SRC_2# SRC_2 VDD_SRC VDD_SRC_IO

VSS_SRC19SRC_1#20SRC_121SRC_0#22SRC_023CLKREQ_0#

C

1 2

CLK_XTAL_OUT

CLK_XTAL_IN

66

67

68

VDD_48

XTAL_IN

XTAL_OUT

ATIGCLK_2#25ATIGCLK_2

24

26

27M_SEL

SEL_SATA

64

63

65

VSS_REF

REF_1/SEL_SATA

REF_0/SEL_HTT66

VSS_ATIG27VDD_ATIG_IO28VDD_ATIG

29

+VDDCLK_IO

+3VS_CLK

CLK_48M

CLK_48M_CRUSB

NB_OSC_14.318M_R

+3VS_CLK

62

61

60

VDD_HTT

VDD_REF

HTT_0/66M_0

REF_2/SEL_27

ATIGCLK_1#30ATIGCLK_131ATIGCLK_0#

32

+3VS_CLK

CLKREQ_LAN

R167 0_0805_5%R167 0_0805_5%

+3VS_CLK

69

71

48MHz_17048MHz_0

59

HTT_0#/66M_1

ATIGCLK_0

33

58

57

56

PD#

VSS_HTT

34

1

2

55

CPU_K8_0

CPU_K8_0#

SB_SRC_SLOW#

VDD_SB_SRC_IO

VSS_SB_SRC36SB_SRC_135SB_SRC_1#

C444

C444 22U_0805_6.3V6M

22U_0805_6.3V6M

SRC_6#/SATA#

1

2

R185 33_0402_5%R185 33_0402_5%

R170 33_0402_5%R170 33_0402_5%

R379 158_0402_1%R379 158_0402_1%

R187 33_0402_5%TIGRIS@ R187 33_0402_5%TIGRIS@

R174 8.2K_0402_5%R174 8.2K_0402_5%

C629 1U_0402_6.3V4ZC629 1U_0402_6.3V4Z

CLK_CPU_BCLK_R

CLK_CPU_BCLK_R#

54

VDD_CPU

53

VDD_CPU_I/O

52

VSS_CPU

51

CLKREQ_1#

50

CLKREQ_2#

49

VDD_A

48

VSS_A

47

VSS_SATA

46

SRC_6/SATA

45 44

VDD_SATA

43

CLKREQ_3#

42

CLKREQ_4#

41 40

SB_SRC_0

39

SB_SRC_0#

38

VDD_SB_SRC

37

SLG8SP626VTR_QFN72_10x10

NBGFX_CLK 11 NBGFX_CLK# 11

CLK_PCIE_VGA 19

CLK_PCIE_VGA# 19

CLKREQ_LAN 26 CLK_PCIE_LAN 26 CLK_PCIE_LAN# 26

CLK_PCIE_NCARD 27 CLK_PCIE_NCARD# 27

D

1

C446

C445

0.1U_0402_16V7K

1 2

R372 10K_0402_5%R372 10K_0402_5%

C446

0.1U_0402_16V7K

2

R380 90.9_0402_1%R380 90.9_0402_1%

R946 0_0402_5%R946 0_0402_5%

1 2

R945 0_0402_5%R945 0_0402_5%

1 2

+3VS_CLK +VDDCLK_IO

CLKREQ_NCARD# CLKREQ_MCARD2#

+3VS_CLK

1 2

+3VS_CLK +VDDCLK_IO

1 2

NB GFX

10/23 Delete for MiniCard1

MiniCard_1

GLAN

New Card

1

C447

0.1U_0402_16V7K

2

@

1 2

CLKREQ_NCARD# 27 CLKREQ_MCARD2# 27

CLK_SBSRC_BCLK 20

+3VS_CLK

R186

261_0402_1%

+3VS_CLK

1

C449

0.1U_0402_16V7K

2

CLK_48M_CR 29

CLK_48M_USB 21

NB_OSC_14.318M 11

SB_14.318M 20

CLK_NBHT 11

CLK_NBHT# 11

CLK_CPU_BCLK 6

1

C450

0.1U_0402_16V7K

2

< To Card Reader >

< To SB700 USB host >

< To RS780 Clock block >

1

C448

0.1U_0402_16V7K

2

< To CPU >

CLK_CPU_BCLK# 6

CLKREQ_NCARD#

CLKREQ_MCARD2#

CLKREQ_LAN

OSC_14M_NB

RS780 1.1V 158R/90.9R

NB CLOCK INPUT TABLE

NB CLOCKS

HT_REFCLKP

HT_REFCLKN

REFCLK_P

REFCLK_N

GFX_REFCLK

GPP_REFCLK

GPPSB_REFCLK 100M DIFF 100M DIFF

100M DIFF 100M DIFF

14M SE (1.8V) 14M SE (1.1V) NC vref

100M DIFF

1 2

R324 8.2K_0402_5%R324 8.2K_0402_5%

1 2

R325 8.2K_0402_5%R325 8.2K_0402_5%

1 2

R390 8.2K_0402_5%R390 8.2K_0402_5%

RX780 RS780

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

E

1

C451

C451 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+3VS_CLK

Use voltage divider resistor R379 & R380 to pull low

NB_OSC_14.318M

configure as single-ended 66MHz output1

*0 configure as differential 100MHz output

* default

A

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Clock Generator

LA-4971P

E

1.0Custom

15 45Wednesday, April 22, 2009

1.0Custom

A

R662

R662 0_0402_5%GM@

0_0402_5%GM@

UMA_CRT_R11

VGA_CRT_R19

UMA_CRT_G11

1 1

VGA_CRT_G19

UMA_CRT_B11

VGA_CRT_B19

1 2

R666

R666 0_0402_5%PM@

0_0402_5%PM@

R664

R664 0_0402_5%GM@

0_0402_5%GM@

R663

R663 0_0402_5%PM@

0_0402_5%PM@

R665

R665 0_0402_5%GM@

0_0402_5%GM@

R661

R661 0_0402_5%PM@

0_0402_5%PM@

PM@ R214

PM@

R214 150_0402_1%

150_0402_1%

12

R214

R214 140_0402_1%GM@

140_0402_1%GM@

R211

R211 150_0402_1%

150_0402_1%

12

R217

R217 150_0402_1%

150_0402_1%

B

< CRT CONNECTOR >

RED

GREEN

BLUE

1

C471

C471 6P_0402_50V8D

6P_0402_50V8D

2

C859

C859 6P_0402_50V8D

6P_0402_50V8D

2

1

2

1 2

C469

C469 6P_0402_50V8D

6P_0402_50V8D

C

L47

L47 NBQ100505T-800Y_0402

NBQ100505T-800Y_0402

L48

L48 NBQ100505T-800Y_0402

NBQ100505T-800Y_0402

L49

L49 NBQ100505T-800Y_0402

NBQ100505T-800Y_0402

1

C858

C858 6P_0402_50V8D

6P_0402_50V8D

2

D

+5VS

D36

2

3

RB491D_SOT23-3

1

D35

DAN217_SC59@

2

3

1

C476

C476 6P_0402_50V8D

6P_0402_50V8D

2

1

D37

DAN217_SC59@

2

3

1

C472

C472 6P_0402_50V8D

6P_0402_50V8D

2

+R_CRT_VCC

1

D34

DAN217_SC59@

+3VS

2

3

RED_L

GREEN_L

+CRT_VCC

BLUE_L

C706

220P_0402_50V7K

F2

1.1A_6V_MINISMDC110F-2

21

RED_L

D_DDCDATA GREEN_L

HSYNC BLUE_L

VSYNC

D_DDCCLK

1

2

E

+CRT_VCC

1

C475

0.1U_0402_16V4Z

2

JCRT

6

11

1

7

12

2

8

13

3

9

14

16

14

G

4

17

4

G

10

15

5

ALLTO_C10532-11505-L_15P@

RS780 use 140 ohm, check RS880 use what value

2 2

R673

R673 0_0402_5%GM@

0_0402_5%GM@

UMA_CRT_HSYNC11,14

VGA_CRT_HSYNC19

UMA_CRT_VSYNC11,14

VGA_CRT_VSYNC19

3 3

UMA_CRT_DATA11

VGA_CRT_DATA19

UMA_CRT_CLK11

VGA_CRT_CLK19

1 2

R674

R674 0_0402_5%PM@

0_0402_5%PM@

R676

R676 0_0402_5%GM@

0_0402_5%GM@

R675

R675 0_0402_5%PM@

0_0402_5%PM@

PM:VGA Board have pull high

R672

CRT_DATA

0_0402_5%GM@

R670

R670 0_0402_5%PM@

0_0402_5%PM@

R669

R669 0_0402_5%GM@

0_0402_5%GM@

R671

R671 0_0402_5%PM@

0_0402_5%PM@

CRT_CLK

12

C177

C177 33P_0402_50V8K@

33P_0402_50V8K@

12

C181

C181 33P_0402_50V8K@

33P_0402_50V8K@

R_HSYNC

R_VSYNC

C473 0.1U_0402_16V4ZC473 0.1U_0402_16V4Z

1 2

C477 0.1U_0402_16V4ZC477 0.1U_0402_16V4Z

1 2

+3VS

12

R237

4.7K_0402_5%GM@

RS780 DAC_SCL & SDA is 5V tolerance

4 4

A

FOR EMI

B

+CRT_VCC

R238

4.7K_0402_5%GM@

1 2

/

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

1

5

P

4

OE#

A2Y

G

U14

U14 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

1 2

1

5

P

4

OE#

A2Y

G

U13

U13 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

+3VS

5

4

+3VS

2

Issued Date

R370

R370 10K_0402_5%

10K_0402_5%

D_HSYNC

R381

R381 10K_0402_5%

10K_0402_5%

D_VSYNC

Q10B

Q10B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

3

Q10A

Q10A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

61

2008-09-25 2009-09-25

C

L84 10_0402_5%L84 10_0402_5%

1 2

L83 10_0402_5%L83 10_0402_5%

1 2

+CRT_VCC

R100

PM@ R100

PM@

2K_0402_1%

R100

6.8K_0402_5%GM@

1

C857

C857 470P_0402_50V8J@

470P_0402_50V8J@

2

Compal Secret Data

Deciphered Date

PM@ R218

PM@

1

2

1

C474

C474 10P_0402_50V8J@

10P_0402_50V8J@

2

R218 2K_0402_1%

2K_0402_1%

R218

6.8K_0402_5%GM@

C856

C856 470P_0402_50V8J@

470P_0402_50V8J@

D

1

C470

C470 10P_0402_50V8J@

10P_0402_50V8J@

2

D_DDCDATA

HSYNC

VSYNC

< SYNC SIGNAL >

< Display Data Channel >

D_DDCCLK

Compal Electronics, Inc.

Title

CRT/TV-OUT Connector

Size Document Number Rev

Date: Sheet of

LA-4971P

E

1.0Custom

16 45Wednesday, April 22, 2009

1.0Custom

A

R543 0_0402_5%GM@ R543 0_0402_5%GM@

UMA_LCD_TXOUT0_A0+11

LCD_TXOUT0+19

UMA_LCD_TXOUT0_A0-11

LCD_TXOUT0-19

UMA_LCD_TXOUT0_A1+11

1 1

LCD_TXOUT1+19

UMA_LCD_TXOUT0_A1-11

LCD_TXOUT1-19

UMA_LCD_TXOUT0_A2+11

LCD_TXOUT2+19

UMA_LCD_TXOUT0_A2-11

LCD_TXOUT2-19

UMA_LCD_TXCLK_ACLK+11

LCD_TXCLK+19

UMA_LCD_TXCLK_ACLK-11

LCD_TXCLK-19

UMA_LCD_TZOUT0_B0+11

LCD_TZOUT0+19

2 2

UMA_LCD_TZOUT0_B0-11

LCD_TZOUT0-19

UMA_LCD_TZOUT0_B1+11

LCD_TZOUT1+19

UMA_LCD_TZOUT0_B1-11

LCD_TZOUT1-19

UMA_LCD_TZOUT0_B2+11

LCD_TZOUT2+19

UMA_LCD_TZOUT0_B2-11

LCD_TZOUT2-19

UMA_LCD_TZCLK_BCLK+11

LCD_TZCLK+19

UMA_LCD_TZCLK_BCLK-11

3 3

LCD_TZCLK-19

UMA_LCD_DDC_CLK11

LCD_EDID_CLK19

UMA_LCD_DDC_DAT11

LCD_EDID_DATA19

1 2

R580 0_0402_5%GM@ R580 0_0402_5%GM@

1 2

R566 0_0402_5%GM@ R566 0_0402_5%GM@

1 2

R578 0_0402_5%GM@ R578 0_0402_5%GM@

1 2

R573 0_0402_5%GM@ R573 0_0402_5%GM@

1 2

R574 0_0402_5%GM@ R574 0_0402_5%GM@

1 2

R540 0_0402_5%GM@ R540 0_0402_5%GM@

1 2

R559 0_0402_5%GM@ R559 0_0402_5%GM@

1 2

R590 0_0402_5%GM@ R590 0_0402_5%GM@

1 2

R681 0_0402_5%GM@ R681 0_0402_5%GM@

1 2

R631 0_0402_5%GM@ R631 0_0402_5%GM@

1 2

R680 0_0402_5%GM@ R680 0_0402_5%GM@

1 2

R660 0_0402_5%GM@ R660 0_0402_5%GM@

1 2

R677 0_0402_5%GM@ R677 0_0402_5%GM@

1 2

R591 0_0402_5%GM@ R591 0_0402_5%GM@

1 2

R594 0_0402_5%GM@ R594 0_0402_5%GM@

1 2

R555 0_0402_5%GM@ R555 0_0402_5%GM@

1 2

R586 0_0402_5%GM@ R586 0_0402_5%GM@

1 2

B

LCD_TXOUT0+

LCD_TXOUT0-

LCD_TXOUT1+

LCD_TXOUT1-

LCD_TXOUT2+

LCD_TXOUT2-

R668 0_0402_5%GM@ R668 0_0402_5%GM@

R667 0_0402_5%PM@ R667 0_0402_5%PM@

R968

@R968

@

0_0603_5%

R967

R967 0_0603_5%

0_0603_5%

1 2

+5V_LVDS_CAM

LCD_TXOUT0+ LCD_TXOUT0LCD_TXOUT1+ LCD_TXOUT1LCD_TXOUT2+ LCD_TXOUT2-

LCD_TZOUT0+ LCD_TZOUT0LCD_TZOUT1+ LCD_TZOUT1LCD_TZOUT2+ LCD_TZOUT2-

BKOFF#

BKOFF#34

+5VALW

+5VS

UMA_ENVDD11

VGA_ENVDD19

1 2

USB20_P9_R_CAM32 USB20_N9_R_CAM32

INT_MIC_R31

LCD_TXCLK+

LCD_TXCLK-

LCD_TZOUT0+

LCD_TZOUT0-

LCD_TZOUT1+

LCD_TZOUT1-

LCD_TZOUT2+

LCD_TZOUT2-

LCD_TZCLK+

LCD_TZCLK-

LCD_EDID_CLK +LCDVDD_R

LCD_EDID_DATA

C

2N7002DW-T/R7_SOT363-6

1 2

C205

@C205

@

0.1U_0402_16V7K

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42

R146

R146 10K_0402_5%

10K_0402_5%

1 2

1

C265

0.1U_0402_16V7K

2

+LCD_VDD

12

R142 150_0603_5%R142 150_0603_5%

61

Q1A

2

12

R144 100K_0402_5%R144 100K_0402_5%

JLVDS

2

112

4

334

6

556

8

778

9910 111112 131314

15

16

171718

19

20

212122 232324 252526 272728 292930 313132 333334 353536 373738 393940

GMD41GND

ACES_87242-4001-09_40P@

1.5A

L8 0_0805_5%L8 0_0805_5%

12

D

LCD/PANEL BD. Conn.

+3VS

12

R143

R143 100K_0402_5%

100K_0402_5%

R140

R140 47K_0402_5%

47K_0402_5%

1 2

3

Q1B

ENVDD

5

2N7002DW-T/R7_SOT363-6

4

LCD_TXCLK+ LCD_TXCLK-

LCD_TZCLK+ LCD_TZCLK-

LCD_EDID_CLK LCD_EDID_DATA

+LCDVDD_R

1

C266

4.7U_0805_10V4Z

2

+LCD_INV

1

C268

68P_0402_50V8J

2

+LCD_VDD

DAC_BRIG 34 INVT_PWM 34

L12 FBMA-L11-201209-221LMA30T_0805L12 FBMA-L11-201209-221LMA30T_0805

1

C269

0.1U_0402_25V4Z

2

C262

0.1U_0402_16V7K

1

2

Rated Current MAX:3000mA

12

C195

0.01U_0402_25V7K

G

2

C263 4.7U_0805_10V4Z@ C263 4.7U_0805_10V4Z@

1

2

+3VS

W=60mils

S

Q2

D

AO3413_SOT23

1 3

Inrush current = 0A

1

2

C875

680P_0402_50V7K

< EMI require >

B+

1

C874

680P_0402_50V7K

2

< EMI require >

E

+LCD_VDD

W=60mils

1

C264

0.1U_0402_16V7K

2

+3VS

1

C267

0.1U_0402_16V7K

2

+3VS

R68 4.7K_0402_5%GM@ R68 4.7K_0402_5%GM@

1 2

R69 4.7K_0402_5%GM@ R69 4.7K_0402_5%GM@

1 2

4 4

A

UMA_LCD_DDC_CLK

UMA_LCD_DDC_DAT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

LCD CONN.

LA-4971P

E

1.0

17 45Wednesday, April 22, 2009

1.0

A

+3VL

1 2

1 1

1 2

1

C256

@

0.1U_0402_16V7K

2

SI:Add R616~R624 for EMI requset

HDMI_TXD0+10,19 HDMI_TXD0-10,19 HDMI_TXD1+10,19 HDMI_TXD1-10,19 HDMI_TXD2+10,19 HDMI_TXD2-10,19

2 2

HDMI_CLK0+10,19 HDMI_CLK0-10,19

EC_SMB_CK1

R182

4.7K_0402_5%@

12

R178

CEC_XOUT

47K_0402_5%@

R177

CEC_XIN

47K_0402_5%@

R183

4.7K_0402_5%@

12

HDMI_CECIN HDMI_HPD_R

HDMI_CECOUT

C189 0.1U_0402_16V7KH@ C189 0.1U_0402_16V7KH@

1 2

C188 0.1U_0402_16V7KH@ C188 0.1U_0402_16V7KH@

1 2

C190 0.1U_0402_16V7KH@ C190 0.1U_0402_16V7KH@

1 2

C184 0.1U_0402_16V7KH@ C184 0.1U_0402_16V7KH@

1 2

C187 0.1U_0402_16V7KH@ C187 0.1U_0402_16V7KH@

1 2

C191 0.1U_0402_16V7KH@ C191 0.1U_0402_16V7KH@

1 2

C185 0.1U_0402_16V7KH@ C185 0.1U_0402_16V7KH@

1 2

C186 0.1U_0402_16V7KH@ C186 0.1U_0402_16V7KH@

1 2

< HDMI CEC Controller >

U8

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211B4D33SP-PLSP0020JB-A@U8R5F211B4D33SP-PLSP0020JB-A@

HDMI_TX0+ HDMI_TX0HDMI_TX1+ HDMI_TX1HDMI_TX2+

HDMI_TX2-

HDMI_CLK+ HDMI_CLK-

< EMI solution >

R616

HDMI_CLK-

HDMI_TX0-

3 3

HDMI_TX0+

HDMI_TX1-

HDMI_TX1+

4 4

HDMI_TX2+

1 2

L85

H@ L85

H@

1

4

WCM2012F2SF-900T04_0805

1 2

WCM2012F2SF-900T04_0805

H@

4

1

L86

1 2

L87

H@ L87

H@

1

4

WCM2012F2SF-900T04_0805

1 2

WCM2012F2SF-900T04_0805

H@

4

1

L88

1 2

A

2

3

2

3

2

HDMI_R_CK-

0_0402_5%@

2

3

HDMI_R_CK+HDMI_CLK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-HDMI_TX2-

HDMI_R_D2+

< Termination resistor >

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2+

HDMI_R_D2-

R617

R617 0_0402_5%@

0_0402_5%@

R618

R618 0_0402_5%@

0_0402_5%@

3

2

R619

R619 0_0402_5%@

0_0402_5%@

R620

R620 0_0402_5%@

0_0402_5%@

2

3

R621

R621 0_0402_5%@

0_0402_5%@

R623

R623 0_0402_5%@

0_0402_5%@

3

2

R624

R624 0_0402_5%@

0_0402_5%@

B

P1_6/CLK0/SSI01

P1_5/RXD0/CNTR01/INT11#

P1_4/TXD0

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P4_2/VREF

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

HDMI_HPD

+HDMI_5V_OUT

HDMI_SDATA HDMI_SCLK

HDMI_CEC HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

R307 499_0402_1%HDMI@ R307 499_0402_1%HDMI@ R307 715_0402_1%IHDMI@ R307 715_0402_1%IHDMI@

1 2

R315 715_0402_1%IHDMI@ R315 715_0402_1%IHDMI@ R315 499_0402_1%HDMI@ R315 499_0402_1%HDMI@

R304 499_0402_1%HDMI@ R304 499_0402_1%HDMI@ R304 715_0402_1%IHDMI@ R304 715_0402_1%IHDMI@

1 2

R172 715_0402_1%IHDMI@ R172 715_0402_1%IHDMI@ R172 499_0402_1%HDMI@ R172 499_0402_1%HDMI@

R297 499_0402_1%HDMI@ R297 499_0402_1%HDMI@ R297 715_0402_1%IHDMI@ R297 715_0402_1%IHDMI@

1 2

R173 715_0402_1%IHDMI@ R173 715_0402_1%IHDMI@ R173 499_0402_1%HDMI@ R173 499_0402_1%HDMI@

R141 499_0402_1%HDMI@ R141 499_0402_1%HDMI@ R141 715_0402_1%IHDMI@ R141 715_0402_1%IHDMI@

1 2

R139 715_0402_1%IHDMI@ R139 715_0402_1%IHDMI@ R139 499_0402_1%HDMI@ R139 499_0402_1%HDMI@

B

11

CEC_TEST

12

CEC_FSHUPDCEC_RST#

13

CEC_FSHUPD (Pin13) Low= Force to update flash.

14

15

16

HDMI_CLK_CEC

17

HDMI_DATA_CEC

18

19

EC_SMB_DA1

20

< HDMI Connector >

19 18 17 16 15 14 13 12 11 10

1 2

JHDMI

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

TAITW_PDVBR5-19FLBS4NN4N_19P-T@

6 1

354

6 1

354

C

< Power, reset and crystal >

CEC_INT# 34EC_SMB_CK134,38

R169

@ R169

@

4.7K_0402_5%

1 2

C543

C543 1U_0402_6.3V4Z@

1U_0402_6.3V4Z@ C257

C257

0.1U_0402_16V7K@

GND GND GND GND

2

@ R171

@

H@ Q136A

H@

2N7002DW-7-F_SOT363-6

H@ Q136B

H@

2N7002DW-7-F_SOT363-6

H@ Q137A

H@

2N7002DW-7-F_SOT363-6

H@ Q137B

H@

2N7002DW-7-F_SOT363-6

+3VL

R171

4.7K_0402_5%

+3VL

EC_SMB_DA1 34,38

20 21 22 23

Q136A

+5VS

Q136B

Q137A

+5VS

Q137B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+5VL

+5VS

< HDMI DDC channel to device >

HDMI_DATA_CEC

HDMI_CLK_CEC

HDMIDAT_UMA11

HDMIDAT_VGA19

HDMICLK_UMA11

HDMICLK_VGA19

< Hot-plug detection & level shift >

2

H@

1

+3VL

2008-09-25 2009-09-25

C

2 1

@

R210

R210 10K_0402_5%

10K_0402_5%

C851

0.1U_0402_16V4Z

HDMI_HPD_R

H@

D18

D18 RB161M-20_SOD123-2

RB161M-20_SOD123-2

H@

D19

D19 RB161M-20_SOD123-2

RB161M-20_SOD123-2

+3VL

@

R236

R236 10K_0402_5%

10K_0402_5%

1 2

R298

R298 0_0402_5%IHDMI@

0_0402_5%IHDMI@

1 2

R299

R299 0_0402_5%HDMI@

0_0402_5%HDMI@

1 2

R301

R301 0_0402_5%IHDMI@

0_0402_5%IHDMI@

1 2

R302

R302 0_0402_5%HDMI@

0_0402_5%HDMI@

1 2

+5VL

1

5

P

OE#

A2Y

G

3

R589

R589 100K_0402_5%H@

100K_0402_5%H@

12

Compal Secret Data

Deciphered Date

D

+HDMI_5V_OUT_M

IHDMI@

R176

4.7K_0402_5%

HDMI_HPD_R

4

U39

H@ U39

H@

SN74AHCT1G125GW_SOT353-5

D

Inrush current = 0A

H@ F3

H@

2

3 1

SGD

12

IHDMI@

R209

4.7K_0402_5%

1 2

H@

1 2

D57

D57 CH751H-40PT_SOD323-2H@

CH751H-40PT_SOD323-2H@

21

+HDMI_5V_OUT

F3

1.1A_6V_MINISMDC110F-2

21

1

H@

2

< HDMI_CEC level shift >

@ R157

@

HDMI_CECIN

Q149

@

Q149

@

2N7002_SOT23-3

@ R163

@

HDMI_CECOUT

1 2

+3VL

H@

R188

@

Q33

Q33 BSH111_SOT23-3

BSH111_SOT23-3

R628

100K_0402_5%

R188

2.2K_0402_5%

2

@

Q34

Q34 BSH111_SOT23-3

BSH111_SOT23-3

3 1

SGD

2

H@

Q139

Q139 BSH111_SOT23-3

BSH111_SOT23-3

3 1

SGD

HDMI_HPD

2

C850

H@

0.1U_0402_16V4Z

1

R588

2.2K_0402_5%H@

12

R86

R86 100K_0402_5%

100K_0402_5%

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

E

Vgs = 10V Id = 6A Rds_on = 35m ohm

C258

0.1U_0402_16V7K

< Place MOSFET close to HDMI connector >

12

R157

10K_0402_5%

13

D

2

G

S

R163 27K_0402_5%

27K_0402_5%

12

R165

@ R165

@

100K_0402_5%

< Place MOSFET close to HDMI connector >

+HDMI_5V_OUT

1 2

< Place MOSFET close to HDMI connector >

+3VS+3VS

2

H@

Q140

Q140 BSH111_SOT23-3

BSH111_SOT23-3

3 1

SGD

+3VS

HPD 11,19,21

HDMI/CEC

LA-4971P

E

+3VL+3VL

21

@ D13

@

12

@ R583

@

13

D

2

G

S

H@

R212

2.2K_0402_5%

D13 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

R583 27K_0402_5%

27K_0402_5%

HDMI_CEC

Q150

@

Q150

@

2N7002_SOT23-3

HDMI_SDATA

HDMI_SCLK

HDMI_SDATA

HDMI_SCLK

18 45Wednesday, April 22, 2009

1.0Custom

5

PCIE_GTX_C_MRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15]

D D

C C

B B

1

C868

PM@

680P_0402_50V7K

2

PCIE_GTX_C_MRX_P[0..15] 10

PCIE_GTX_C_MRX_N[0..15] 10

JMXMA

L90 0_0805_5%PM@ L90 0_0805_5%PM@

L91 0_0805_5%PM@ L91 0_0805_5%PM@

1

PWR_SRC

3

PWR_SRC

5

PWR_SRC

7

PWR_SRC

9

PWR_SRC

11

PWR_SRC

13

PWR_SRC

15

PWR_SRC

17

GND

19

GND

21

GND

23

GND

25

PEX_RX15#

27

PEX_RX15

29

GND

31

PEX_RX14#

33

PEX_RX14

35

GND

37

PEX_RX13#

39

PEX_RX13

41

GND

43

PEX_RX12#

45

PEX_RX12

47

GND

49

PEX_RX11#

51

PEX_RX11

53

GND

55

PEX_RX10#

57

PEX_RX10

59

GND

61

PEX_RX9#

63

PEX_RX9

65

GND

67

PEX_RX8#

69

PEX_RX8

71

GND

73

PEX_RX7#

75

PEX_RX7

77

GND

79

PEX_RX6#

81

PEX_RX6

83

GND

85

PEX_RX5#

87

PEX_RX5

89

GND

91

PEX_RX4#

93

PEX_RX4

95

GND

97

PEX_RX3#

99

PEX_RX3

101

GND

103

PEX_RX2#

105

PEX_RX2

107

GND

@

QUASA_CA0330-230N20

12

+MXM_B+ +1.8VS

PCIE_GTX_C_MRX_N15 PCIE_GTX_C_MRX_P15

PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P14

PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P13

PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P12

PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P11

PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P10

PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P9

PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P8

PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P7

PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P6

PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P5

PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P4

PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P3

PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P2

+MXM_B+

160mil(4A)

1

C869

PM@

68P_0402_50V8J

2

4

1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN

RUNPWROK

5VRUN

PRSNT2#

PEX_TX15#

PEX_TX15

PEX_TX14#

PEX_TX14

PEX_TX13#

PEX_TX13

PEX_TX12#

PEX_TX12

PEX_TX11#

PEX_TX11

PEX_TX10#

PEX_TX10

PEX_TX9#

PEX_TX9

PEX_TX8#

PEX_TX8

PEX_TX7#

PEX_TX7

PEX_TX6#

PEX_TX6

PEX_TX5#

PEX_TX5

PEX_TX4#

PEX_TX4

PEX_TX3#

PEX_TX3

PEX_TX2#

PEX_TX2

2 4 6 8 10 12 14 16 18 20

GND

22

GND

24

GND

26 28 30 32

GND

34 36 38

GND

40 42 44

GND

46 48 50

GND

52 54 56

GND

58 60 62

GND

64 66 68

GND

70 72 74

GND

76 78 80

GND

82 84 86

GND

88 90 92

GND

94 96 98

GND

100 102 104

GND

106 108

160mil(4A)

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

140mil(3.5A)

PM@

PCIE_MTX_C_GRX_N15 PCIE_MTX_C_GRX_P15

PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14

PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P13

PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12

PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P11

PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P10

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P9

PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P2

2

C867

680P_0402_50V7K

1

SUSP#

B+

1

C865

0.1U_0402_16V4Z

2

PCIE_MTX_C_GRX_P[0..15] 10

PCIE_MTX_C_GRX_N[0..15] 10

SUSP# 27,30,34,36,39,41

+5VALW

< From NB > < To NB >

3

PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P1

PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P0

CLK_PCIE_VGA#15 CLK_PCIE_VGA15

EC_SMB_DA26,34,35 EC_SMB_CK26,34,35

VGA_CRT_HSYNC16 VGA_CRT_VSYNC16 VGA_CRT_CLK16 VGA_CRT_DATA16

CLK_PCIE_VGA# CLK_PCIE_VGA

PLT_RST#

PLT_RST#11,14,20,26,27,33,34

EC_SMB_DA2 EC_SMB_CK2

VGA_CRT_VSYNC VGA_CRT_CLK VGA_CRT_DATA

HPD

HPD11,18,21

VGA_HDMI_CLKVGA_HDMI_CLK+

VGA_HDMI_TXD2VGA_HDMI_TXD2+

VGA_HDMI_TXD1VGA_HDMI_TXD1+

VGA_HDMI_TXD0VGA_HDMI_TXD0+

JMXMB

109

PEX_RX1#

111

PEX_RX1

113

GND

115

PEX_RX0#

117

PEX_RX0

119

GND

121

PEX_REFCLK#

123

PEX_REFCLK

125

CLK_REQ#

127

PEX_RST#

129

RSVD

131

RSVD

133

SMB_DAT

135

SMB_CLK

137

THERM#

139

VGA_HSYNC

141

VGA_VSYNC

143

DDCA_CLK

145

DDCA_DAT

147

IGP_UCLK#

149

IGP_UCLK

151

GND

153

RSVD

155

RSVD

157

RSVD

159

IGP_UTX2#

161

IGP_UTX2

163

GND

165

IGP_UTX1#

167

IGP_UTX1

169

GND

171

IGP_UTX0#

173

IGP_UTX0

175

GND

177

IGP_LCLK#/DVI_B_CLK#

179

IGP_LCLK/DVI_B_CLK

181

DVI_B_HPD/GND

183

RSVD

185

RSVD

187

GND

189

IGP_LTX2#/DVI_B_TX2#

191

IGP_LTX2/DVI_B_TX2

193

GND

195

IGP_LTX1#/DVI_B_TX1#

197

IGP_LTX1/DVI_B_TX1

199

GND

201

IGP_LTX0#/DVI_B_TX0#

203

IGP_LTX0/DVI_B_TX0

205

DVI_A_HPD

207

DVI_A_CLK#

209

DVI_A_CLK

211

GND

213

DVI_A_TX2#

215

DVI_A_TX2

217

GND

219

DVI_A_TX1#

221

DVI_A_TX1

223

GND

225

DVI_A_TX0#

227

DVI_A_TX0

229

GND

231

FIX PIN

QUASA_CA0330-230N20@

VGA_HDMI_TXD2+ VGA_HDMI_TXD2VGA_HDMI_TXD1+ VGA_HDMI_TXD1-

VGA_HDMI_TXD0+ VGA_HDMI_TXD0VGA_HDMI_CLK+ VGA_HDMI_CLK-

2

110

GND

PCIE_MTX_C_GRX_N1

112

R951 0_0402_5%HDMI@ R951 0_0402_5%HDMI@ R955 0_0402_5%HDMI@ R955 0_0402_5%HDMI@ R952 0_0402_5%HDMI@ R952 0_0402_5%HDMI@ R953 0_0402_5%HDMI@ R953 0_0402_5%HDMI@

R956 0_0402_5%HDMI@ R956 0_0402_5%HDMI@ R957 0_0402_5%HDMI@ R957 0_0402_5%HDMI@ R958 0_0402_5%HDMI@ R958 0_0402_5%HDMI@ R954 0_0402_5%HDMI@ R954 0_0402_5%HDMI@

1 2 1 2 1 2 1 2

PEX_TX1#

PEX_TX1

PEX_TX0#

PEX_TX0 PRSNT1#

TV_C/HDTV_Pr

TV_Y/HDTV_Y

TV_CVBS/HDTV_Pb

VGA_RED

VGA_GRN

VGA_BLU

LVDS_UCLK#

LVDS_UCLK

LVDS_UTX3#

LVDS_UTX3

LVDS_UTX2#

LVDS_UTX2

LVDS_UTX1#

LVDS_UTX1

LVDS_UTX0#

LVDS_UTX0

LVDS_LCLK#

LVDS_LCLK

LVDS_LTX3#

LVDS_LTX3

LVDS_LTX2#

LVDS_LTX2

LVDS_LTX1#

LVDS_LTX1

LVDS_LTX0#

LVDS_LTX0

DDCC_DAT DDCC_CLK

LVDS_PPEN

LVDS_BL_BRGHT

LVDS_BLEN

DDCB_DAT DDCB_CLK

2V5RUN

3V3RUN 3V3RUN 3V3RUN

FIX PIN

PCIE_MTX_C_GRX_P1

114 116

GND

PCIE_MTX_C_GRX_N0

118

PCIE_MTX_C_GRX_P0

120 122 124 126

GND

128 130

GND

132 134

GND

VGA_CRT_R

136 138

GND

VGA_CRT_GVGA_CRT_HSYNC

140 142

GND

VGA_CRT_B

144 146

GND

LCD_TZCLK-

148

LCD_TZCLK+

150 152

GND

154 156 158

GND

LCD_TZOUT2-

160

LCD_TZOUT2+

162 164

GND

LCD_TZOUT1-

166

LCD_TZOUT1+

168 170

GND

LCD_TZOUT0-

172

LCD_TZOUT0+

174 176

GND

LCD_TXCLK-

178

LCD_TXCLK+

180 182

GND

184 186 188

GND

LCD_TXOUT2-

190

LCD_TXOUT2+

192 194

GND

LCD_TXOUT1-

196

LCD_TXOUT1+

198 200

GND

LCD_TXOUT0-

202

LCD_TXOUT0+

204 206

GND

LCD_EDID_DATA

208

LCD_EDID_CLK

210

VGA_ENVDD

212 214

VGA_ENBKL

216

HDMIDAT_VGA

218

HDMICLK_VGA

220 222 224

GND

226 228 230 232

HDMI_TXD2+ 10,18 HDMI_TXD2- 10,18 HDMI_TXD1+ 10,18 HDMI_TXD1- 10,18

HDMI_TXD0+ 10,18 HDMI_TXD0- 10,18 HDMI_CLK0+ 10,18 HDMI_CLK0- 10,18

+3VS

1

VGA_CRT_R 16

VGA_CRT_G 16

VGA_CRT_B 16

LCD_TZCLK- 17 LCD_TZCLK+ 17

LCD_TZOUT2- 17 LCD_TZOUT2+ 17

LCD_TZOUT1- 17 LCD_TZOUT1+ 17

LCD_TZOUT0- 17 LCD_TZOUT0+ 17

LCD_TXCLK- 17 LCD_TXCLK+ 17

LCD_TXOUT2- 17 LCD_TXOUT2+ 17

LCD_TXOUT1- 17 LCD_TXOUT1+ 17

LCD_TXOUT0- 17 LCD_TXOUT0+ 17

LCD_EDID_DATA 17 LCD_EDID_CLK 17 VGA_ENVDD 17

VGA_ENBKL 34

HDMIDAT_VGA 18 HDMICLK_VGA 18

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

LA-4971P

MXM Connector

1

1.0

19 45Wednesday, April 22, 2009

1.0

A

1 1

< x4 PCIE A-link To NB >

< x4 PCIE A-link from NB >

2 2

3 3

R319 10K_0402_5%R319 10K_0402_5%

2

JUMP_43X39@J1JUMP_43X39@

1

1 2

J1

12

R317

R317 120_0402_5%

120_0402_5%

+3VS

4 4

1

C509

0.1U_0402_16V7K

2

+SB_VBAT

1 2

1

C510

C510 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

R316

R316 120_0402_5%

120_0402_5%

W=20mils

A

1 2

H_PROCHOT#

+RTCVCC

B

CLK_SBSRC_BCLK15 CLK_SBSRC_BCLK#15

C643

C643 18P_0402_50V8J

18P_0402_50V8J

C652

C652 18P_0402_50V8J

18P_0402_50V8J

R184

R184 1K_0402_5%

1K_0402_5%

12

0.1U_0402_16V7K

B

CPU_LDT_REQ#6,11 H_PROCHOT#6

H_PWRGD6,43

LDT_STOP#6,11

LDT_RST#6

SB_RX0P10

SB_RX0N10

SB_RX1P10

SB_RX1N10

SB_RX2P10

SB_RX2N10

SB_RX3P10

SB_RX3N10

SB_TX0P10 SB_TX0N10 SB_TX1P10 SB_TX1N10 SB_TX2P10 SB_TX2N10 SB_TX3P10 SB_TX3N10

+PCIE_VDDR

L53 BLM18PG121SN1D_0603L53 BLM18PG121SN1D_0603

+1.2V_HT

SB_14.318M15

12

R389

R389 20M_0603_5%

20M_0603_5%

3

1

C297

2

+3VALW

C506

0.1U_0402_16V4Z

12

NB_RST#_R

1 2

5

2

B

1

A

3

C492 0.1U_0402_16V7KC492 0.1U_0402_16V7K

1 2

C493 0.1U_0402_16V7KC493 0.1U_0402_16V7K

1 2

C494 0.1U_0402_16V7KC494 0.1U_0402_16V7K

1 2

C495 0.1U_0402_16V7KC495 0.1U_0402_16V7K

1 2

C496 0.1U_0402_16V7KC496 0.1U_0402_16V7K

1 2

C497 0.1U_0402_16V7KC497 0.1U_0402_16V7K

1 2

C498 0.1U_0402_16V7KC498 0.1U_0402_16V7K

1 2

C499 0.1U_0402_16V7KC499 0.1U_0402_16V7K

1 2

R305 562_0402_1%R305 562_0402_1% R306 2.05K_0402_1%R306 2.05K_0402_1%

1

C504

2.2U_0603_6.3V4Z

2

Close to SB

Y3

4

OUT

1

IN

32.768KHZ_12.5P_1TJS125BJ4A421P

+RTCBATT

D10

1

BAS40-04_SOT23-3

+CHGRTC

C

U16

U16 NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

P

PLT_RST#

4

Y

G

R312

R312 33_0402_5%@

33_0402_5%@

12

12 12

3

NC

2

NC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SB_RX0P_C SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C

+SB_PCIEVDD

SB_32KHI

SB_32KHO

CPU_LDT_REQ# H_PROCHOT# H_PWRGD

SB700R3@

C

PLT_RST# 11,14,19,26,27,33,34

U15A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

218S7EALA11FG_BGA528_SB700

2008-09-25 2009-09-25

SB700

Part 1 of 5

PCI EXPRESS INTERFACE

RTC XTAL

CPU

Compal Secret Data

Deciphered Date

CLOCK GENERATOR

LPC

RTC

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4

PCICLK5/GPIO41

PCI CLKS

PCIRST#

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PCI INTERFACE

STOP# PERR# SERR# REQ0# REQ1# REQ2#

REQ3#/GPIO70 REQ4#/GPIO71

GNT0#

GNT1#

GNT2#

GNT3#/GPIO72 GNT4#/GPIO73

CLKRUN#

LOCK#

INTE#/GPIO33 INTF#/GPIO34

INTG#/GPIO35

INTH#/GPIO36

LPCCLK0 LPCCLK1

LFRAME#

LDRQ0#

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

SERIRQ

RTCCLK

INTRUDER_ALERT#

D

PCI_REQ#0

CLK_PCI_EC

CLK_PCI_SIO2

P4 P3 P1 P2 T4 T3

N1

U2

AD0

P7

AD1

V4

AD2

T1

AD3

V3

AD4

U1

AD5

V1

AD6

V2

AD7

T2

AD8

W1

AD9

PCI_AD10

T9

AD10

PCI_AD11

R6

AD11

PCI_AD12

R7

AD12

PCI_AD13

R5

AD13

PCI_AD14

U8

AD14

PCI_AD15

U5

AD15

PCI_AD16

Y7

AD16

PCI_AD17

W8

AD17

PCI_AD18

V9

AD18

PCI_AD19

Y8

AD19

PCI_AD20

AA8

AD20

PCI_AD21

Y4

AD21

PCI_AD22

Y3

AD22

PCI_AD23

Y2

AD23

PCI_AD24

AA2

AD24

PCI_AD25

AB4

AD25

PCI_AD26

AA1

AD26

PCI_AD27

AB3

AD27

PCI_AD28

AB2

AD28

PCI_AD29

AC1

AD29

PCI_AD30

AC2

AD30

PCI_AD31

AD1

AD31

PCI_CBE#0

W2

PCI_CBE#1

U7

PCI_CBE#2

AA7

PCI_CBE#3

Y1 AA6 W5 AA5 Y5 U6

PAR

W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5

AD3 AC4 AE2 AE3

CLK_PCI_EC1 CLK_PCI_EC

G22

CLK_PCI_SIOC

E22 H24

LAD0

H23

LAD1

J25

LAD2

J24

LAD3

H25 H22 AB8 AD7 V15

C3 C2 B2

VBAT

D

R175

8.2K_0402_5%@

1 2

R303

R303 100_0402_5%@

100_0402_5%@

1 2

R369

R369 100_0402_5%@

100_0402_5%@

1 2

R309

R309 22_0402_5%

22_0402_5%

1 2

R313

R313 33_0402_5%

33_0402_5%

12

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9

R308 22_0402_5%R308 22_0402_5%

1 2

R310 22_0402_5%R310 22_0402_5%

1 2

+SB_VBAT

Title

Size Document Number Rev

Custom

Date: Sheet of

CLK_PCI_PCM 28

PCI_CLK2 24 PCI_CLK3 24 PCI_CLK4 24 PCI_CLK5 24

PCI_RST# 28

PCI_AD[0..31] 24,28

PCI_CBE#0 28 PCI_CBE#1 28 PCI_CBE#2 28 PCI_CBE#3 28 PCI_FRAME# 28 PCI_DEVSEL# 28 PCI_IRDY# 28 PCI_TRDY# 28 PCI_PAR 28 PCI_STOP# 28

PCI_REQ#0 28

T15PAD T15PAD

PCI_GNT#0 28

T16PAD T16PAD

CLKRUN# 28

PCI_PIRQA# 28

LPC_AD0 33,34 LPC_AD1 33,34 LPC_AD2 33,34 LPC_AD3 33,34

1 2

SERIRQ 28,33,34 RTC_CLK 24

EC & TPM &Debug

D17

D17 CH751H-40PT_SOD323-2PUMA@

CH751H-40PT_SOD323-2PUMA@

21

R966

R966 0_0402_5%TIGRIS@

0_0402_5%TIGRIS@

Compal Electronics, Inc.

SB700-PCIE/PCI/ACPI/LPC/RTC

E

C501

C501 100P_0402_50V8J@

100P_0402_50V8J@

1 2

C503

C503 100P_0402_50V8J@

100P_0402_50V8J@

1 2

STRAP PIN

LA-4971P

E

+3VS

CLK_PCI_EC 24,34 CLK_PCI_SIO2 24,33

R965

PUMA@ R965

PUMA@

300_0402_5%

12

LPC_FRAME# 33,34

20 45Wednesday, April 22, 2009

+3VS

1.0

12

A

R320

2.2K_0402_5%@

R321

2.2K_0402_5%@

R322

2.2K_0402_5%@

R561

R561 1K_0402_5%

1K_0402_5%

R328

1.2K_0402_5%

R329

1.2K_0402_5%

R331

2.2K_0402_5%

R332

2.2K_0402_5%

R327

R327 100K_0402_5%

100K_0402_5%

R388

4.7K_0402_5%

SB_TEST2

SB_TEST1

SB_TEST0

EC_SWI_R#

SMB_CK_CLK0

SMB_CK_DAT0

SMB_CK_CLK1

SMB_CK_DAT1

EC_RSMRST#

SUS_STAT#

<S0>

< S0~ S5 ASF only >

+3VALW

1 2

+3VS

1 1

1 2

+3VALW

1 2

+3VS

2 2

3 3

STRAP PIN

B

PM_SLP_S3#34 PM_SLP_S5#34 PBTN_OUT#34 SB_PWRGD34,43 SUS_STAT#11,14

GATEA2034 KB_RST#34 EC_SCI#34 EC_SMI#34

EC_SWI_R#27,34

H_THERMTRIP#6 NB_PWRGD11

EC_RSMRST#34

SB_SPKR30 SMB_CK_CLK08,9,15,27 SMB_CK_DAT08,9,15,27

SMB_CK_CLK127

SMB_CK_DAT127

R400

4.7K_0402_5%@

1 2

+3VS

HPD11,18,19

HDA_BITCLK_CODEC30 HDA_BITCLK_MDC33 HDA_SDOUT_MDC33 HDA_SDOUT_CODEC30 HDA_SDIN030 HDA_SDIN133

HDA_SYNC_MDC33 HDA_SYNC_CODEC30

HDA_RST#_CODEC30 HDA_RST#_MDC33 HDARST#24

R16

R16 0_0402_5%

0_0402_5%

1 2

EC_LID_OUT#34

EXP_CPPE#27

USB_OC#225,34 USB_OC#032,34

R333 33_0402_5%R333 33_0402_5%

1 2

R334 33_0402_5%R334 33_0402_5%

1 2

R335 33_0402_5%R335 33_0402_5%

1 2

R336 33_0402_5%R336 33_0402_5%

1 2

R337 33_0402_5%R337 33_0402_5%

1 2

R338 33_0402_5%R338 33_0402_5%

1 2

R339 33_0402_5%R339 33_0402_5%

1 2

R340 33_0402_5%R340 33_0402_5%

1 2

C

demo circuit LID use RI#

SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0

EC_SWI_R#

H_THERMTRIP#

EC_RSMRST#

SMB_CK_CLK0 SMB_CK_DAT0 SMB_CK_CLK1 SMB_CK_DAT1

HDA_BITCLK

HDA_SDOUT HDA_SDIN0 HDA_SDIN1

HDA_SYNC

HDARST#

U15D

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT1/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SMARTVOLT2/SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

218S7EALA11FG_BGA528_SB700SB700R3@

USB OC

HD AUDIO

SB700

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

INTEGRATED uC

D

Part 4 of 5

USB_RCOMP

USB_FSD13P

USB MISC

USB_FSD13N

USB_FSD12P USB_FSD12N

USB 1.1

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P

USB 2.0

USB_HSD4N

USB_HSD3P USB_HSD3N

GPIO

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

IMC_GPIO8 IMC_GPIO9

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11

SDA2/IMC_GPIO12 SCL3_LV/IMC_GPIO13 SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25

IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41

Reserve for EMI request

1 2

C8

USB_RCOMP

G8

E6 E7

F7 E8

H11 J10

E11 F11

USB20_P9

A11

USB20_N9

B11

USB20_P8

C10

USB20_N8

D10

USB20_P7

G11

USB20_N7

H12

USB20_P6

E12

USB20_N6

E14

USB20_P5

C12

USB20_N5

D12

USB20_P4

B12

USB20_N4

A12

G12 G14

USB20_P2

H14

USB20_N2

H15

USB20_P1

A13

USB20_N1

B13

USB20_P0

B14

USB20_N0

A14

A18 B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

R311

R311 100_0402_5%

100_0402_5%

1 2

USB20_P9 32 USB20_N9 32

USB20_P8 27 USB20_N8 27

USB20_P7 32 USB20_N7 32

USB20_P6 32 USB20_N6 32

USB20_P5 27 USB20_N5 27

USB20_P4 29 USB20_N4 29

USB20_P2 25 USB20_N2 25

USB20_P1 32 USB20_N1 32

USB20_P0 32 USB20_N0 32

GPIO16 24 GPIO17 24

E

C617

C617 100P_0402_50V8J

100P_0402_50V8J

1 2

R323

11.8K_0402_1%

USB-9 Int Camera

USB-8 WLAN

USB-7 FP

USB-6 Bluetooth

USB-5 New Card

USB-4 Card Reader (3 IN 1)

USB-2 USB/eSATA

USB-1 Right side

USB-0 Right side

STRAP PIN STRAP PIN

CLK_48M_USB 15

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

SB700 USB/AC97

LA-4971P

E

1.0Custom

21 45Wednesday, April 22, 2009

1.0Custom

A

1 1

2 2

C516

10P_0402_50V8J

C517

10P_0402_50V8J

3 3

12

Y4

25MHz_20pF_6X25000017

12

SATA_X1

SATA_X2

12

R341

10M_0402_5%

HDD1

eSATA

ODD

+1.2V_HT

+3VS

B

BLM18PG121SN1D_0603

C

U15B

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_CAL

SATA_X1

SATA_X2

SB700R3@

AE10 AD10

AD11 AE11

AB12 AC12

AE12 AD12

AD13 AE13

AB14 AC14

AE14 AD14

AD15 AE15

AB16 AC16

AE16 AD16

V12

Y12

AA12

W11

AA11

W12

SATA_RX0P

SATA_TX1P SATA_TX1N

SATA_RX1N SATA_RX1P

SATA_TX2P SATA_TX2N

SATA_RX2N SATA_RX2P

SATA_TX3P SATA_TX3N

SATA_RX3N SATA_RX3P

SATA_TX4P SATA_TX4N

SATA_RX4N SATA_RX4P

SATA_TX5P SATA_TX5N

SATA_RX5N SATA_RX5P

SATA_CAL

SATA_X1

SATA_X2

SATA_ACT#/GPIO67

PLLVDD_SATA

XTLVDD_SATA

218S7EALA11FG_BGA528_SB700

1 2

1U_0402_6.3V4Z

C524

12

C522

12

R342

R342 1K_0402_1%

1K_0402_1%

R343

R343 10K_0402_5%

10K_0402_5%

SATA_STX_DRX_P1 SATA_STX_DRX_N1

SATA_STX_DRX_P2 SATA_STX_DRX_N2

SATA_STX_DRX_P3 SATA_STX_DRX_N3

+PLLVDD_SATA

2

C523

1U_0402_6.3V4Z

1

+XTLVDD_SATA

1

2

C625

@ C625

@

0.1U_0402_16V4Z

2

1

SATA_STX_DRX_P125 SATA_STX_DRX_N125

SATA_RXN1_C25 SATA_RXP1_C25

SATA_STX_DRX_P225 SATA_STX_DRX_N225

SATA_RXN2_C25 SATA_RXP2_C25

SATA_STX_DRX_P325 SATA_STX_DRX_N325

SATA_RXN3_C25 SATA_RXP3_C25

+3VS

SATA_LED#35

L54

L55

1U_0402_6.3V4Z

SB700

Part 2 of 5

SATA PWR SERIAL ATA

ATA 66/100/133

IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS1#/GPIO32

LAN_RST#/GPIO13

SPI ROM

ROM_RST#/GPIO14

FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49

TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

HW MONITOR

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23 IDE_D9/GPIO24

SPI_DO/GPIO11

FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52

IDE_IORDY

IDE_IRQ

IDE_A0 IDE_A1 IDE_A2

IDE_DACK#

IDE_DRQ

IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3#

SPI_DI/GPIO12

TEMP_COMM

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

AVDD

AVSS

D

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

G6 D2 D1 F4 F3

U15 J1

M8 M5 M7

P5 P8 R8

C6 B6 A6

SPK_SEL

A5 B5

A4

BT_DET#

B4 C4 D4 D5 D6 A7 B7

+SB_AVDD

F6

G7

1

C525

0.1U_0402_16V4Z

2

SLP_CHG#

SLP_CHG_M3

SLP_CHG_M4

SPK_SEL 30 EC_THERM# 34

BT_DET# 32

SLP_CHG# 25 SLP_CHG_M3 25 SLP_CHG_M4 25

1

2

1 2

C526

2.2U_0603_6.3V4Z

2 1

1 2

+3VALW

R571

R571 100K_0402_5%

100K_0402_5%

R572

R572 100K_0402_5%

100K_0402_5%

R582

R582 100K_0402_5%

100K_0402_5%

D41

D41 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

R562

R562 150K_0402_5%

150K_0402_5%

L56

L56 0_0603_5%

0_0603_5%

12

E

ACIN 34,35,37

+3VALW

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

SB700 SATA/IDE/SPI

LA-4971P

22 45Wednesday, April 22, 2009

E

1.0

A

+3VS

1 1

+3VS

+1.2V_HT

2 2

+1.2V_HT

+3VALW

3 3

C528 22U_0805_6.3V6M@ C528 22U_0805_6.3V6M@

12

C531 1U_0402_6.3V4Z@C531 1U_0402_6.3V4Z@

1 2

C530 1U_0402_6.3V4Z@C530 1U_0402_6.3V4Z@

1 2

C533 1U_0402_6.3V4Z@C533 1U_0402_6.3V4Z@

1 2

C536 1U_0402_6.3V4Z@C536 1U_0402_6.3V4Z@

1 2

C535 1U_0402_6.3V4Z@C535 1U_0402_6.3V4Z@

1 2

C539 0.1U_0402_16V4Z@ C539 0.1U_0402_16V4Z@

1 2

C541 0.1U_0402_16V4Z@ C541 0.1U_0402_16V4Z@

1 2

C542 0.1U_0402_16V4Z@ C542 0.1U_0402_16V4Z@

1 2

No IDE device unmount CAP

L61

L61 0_0805_5%

0_0805_5%

12

C552 4.7U_0805_10V6KC552 4.7U_0805_10V6K

12

C553 1U_0402_6.3V4Z@C553 1U_0402_6.3V4Z@

1 2

C555 1U_0402_6.3V4ZC555 1U_0402_6.3V4Z

1 2

C554 1U_0402_6.3V4ZC554 1U_0402_6.3V4Z

1 2

C558 1U_0402_6.3V4ZC558 1U_0402_6.3V4Z

1 2

C557 0.1U_0402_16V4ZC557 0.1U_0402_16V4Z

1 2

C560 0.1U_0402_16V4ZC560 0.1U_0402_16V4Z

1 2

L63

L63 0_0805_5%

0_0805_5%

12

C566 22U_0805_6.3V6MC566 22U_0805_6.3V6M

C567 1U_0402_6.3V4ZC567 1U_0402_6.3V4Z

1 2

C568 1U_0402_6.3V4ZC568 1U_0402_6.3V4Z

1 2

C571 0.1U_0402_16V4ZC571 0.1U_0402_16V4Z

1 2

C572 0.1U_0402_16V4ZC572 0.1U_0402_16V4Z

1 2

L66

L66 0_0805_5%

0_0805_5%

12

C576 10U_0805_10V4ZC576 10U_0805_10V4Z

1 2

C577 10U_0805_10V4ZC577 10U_0805_10V4Z

1 2

C580 1U_0402_6.3V4ZC580 1U_0402_6.3V4Z

1 2

C581 1U_0402_6.3V4ZC581 1U_0402_6.3V4Z

1 2

C583 0.1U_0402_16V4ZC583 0.1U_0402_16V4Z

1 2

C582 0.1U_0402_16V4ZC582 0.1U_0402_16V4Z

1 2

C584 0.1U_0402_16V4ZC584 0.1U_0402_16V4Z

1 2

+PCIE_VDDR

+1.2V_SATA

+AVDD_USB

B

T15

U16 U17

AA4 AB5

AB21

Y20 AA21 AA22 AE25

P18

P19

P20

P21

R22

R24

R25

AA14 AB18 AA15 AA17 AC18 AD17 AE17

A16

B16

C16

D16

D17

E17

F15

F17

F18

G15

G17

G18

L9

M9

U9

V8 W7

Y6

U15C

VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12

VDD33_18_1 VDD33_18_2 VDD33_18_3 VDD33_18_4

PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7

AVDD_SATA_1 AVDD_SATA_4 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7

AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDTX_5 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4 AVDDRX_5

218S7EALA11FG_BGA528_SB700SB700R3@

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

SATA I/O

PLL CLKGEN I/O

USB I/O

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

CORE S0

VDD_9

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

3.3V_S5 I/OCORE S5

S5_1.2V_1 S5_1.2V_2

USB_PHY_1.2V_1 USB_PHY_1.2V_2

V5_VREF

AVDDCK_3.3V

AVDDCK_1.2V

AVDDC

L15 M12 M14 N13 P12 P14 R11 R15 T16

L21 L22 L24 L25

A17 A24 B17 J4 J5 L1 L2

G2 G4

A10 B10

AE7

J16

K17

E9

+1.2V_HT_R

+1.2V_HT

+S5_3V

+S5_1.2V

+1.2_USB

+V5_VREF

+AVDDCK_3.3V

+AVDDCK_1.2V

+AVDDC

C

R593

R593 0_0805_5%

0_0805_5%

1 2

2

1

1 2

R564

R564 0_0805_5%

0_0805_5%

1 2

L64

L64 0_0603_5%

0_0603_5%

L65

L65 0_0603_5%

0_0603_5%

1 2

C578

0.1U_0402_16V4Z

L67

L67 0_0603_5%

0_0603_5%

12

12 12 12 12

12 12

12

12 12 12

12 12

12

C52910U_0805_6.3V6M C52910U_0805_6.3V6M

C5321U_0402_6.3V4Z C5321U_0402_6.3V4Z C5341U_0402_6.3V4Z C5341U_0402_6.3V4Z C5381U_0402_6.3V4Z C5381U_0402_6.3V4Z C5371U_0402_6.3V4Z C5371U_0402_6.3V4Z

C5270.1U_0402_16V4Z C5270.1U_0402_16V4Z C5400.1U_0402_16V4Z C5400.1U_0402_16V4Z

C55622U_0805_6.3V6M @ C55622U_0805_6.3V6M @

C5592.2U_0603_6.3V4Z C5592.2U_0603_6.3V4Z C5612.2U_0603_6.3V4Z C5612.2U_0603_6.3V4Z

C5621U_0402_6.3V4Z C5621U_0402_6.3V4Z

C5630.1U_0402_16V4Z C5630.1U_0402_16V4Z C5640.1U_0402_16V4Z C5640.1U_0402_16V4Z C5650.1U_0402_16V4Z C5650.1U_0402_16V4Z

C5691U_0402_6.3V4Z C5691U_0402_6.3V4Z C5701U_0402_6.3V4Z C5701U_0402_6.3V4Z

C57310U_0805_10V4Z @ C57310U_0805_10V4Z @

C5741U_0402_6.3V4Z C5741U_0402_6.3V4Z

C5750.1U_0402_16V4Z C5750.1U_0402_16V4Z

2

C579

1U_0603_10V4Z

1

C5852.2U_0603_6.3V4Z C5852.2U_0603_6.3V4Z

C5860.1U_0402_16V4Z C5860.1U_0402_16V4Z

+1.2V_HT

+3VALW

+1.2VALW

+3VALW

D

R346

R346 1K_0402_5%

1K_0402_5%

12

D14

D14 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

21

E

U15E

SB700

T10

AVSS_SATA_1

U10

AVSS_SATA_2

U11

AVSS_SATA_3

U12

AVSS_SATA_4

V11

AVSS_SATA_5

V14

AVSS_SATA_6

W9

AVSS_SATA_7

Y9

AVSS_SATA_8

Y11

AVSS_SATA_9

Y14

AVSS_SATA_10

Y17

AVSS_SATA_11

AA9

AVSS_SATA_12

AB9

AVSS_SATA_13

AB11

AVSS_SATA_14

AB13

AVSS_SATA_15

AB15

AVSS_SATA_16

AB17

AVSS_SATA_17

AC8

AVSS_SATA_18

AD8

AVSS_SATA_19

AE8

AVSS_SATA_20

A15

AVSS_USB_1

B15

AVSS_USB_2

C14

AVSS_USB_3

D8

AVSS_USB_4

D9

AVSS_USB_5

D11

AVSS_USB_6

D13

AVSS_USB_7

D14

AVSS_USB_8

D15

AVSS_USB_9

E15

AVSS_USB_10

F12

AVSS_USB_11

F14

AVSS_USB_12

G9

AVSS_USB_13

H9

AVSS_USB_14

H17

AVSS_USB_15

J9

AVSS_USB_16

J11

AVSS_USB_17

J12

AVSS_USB_18

J14

AVSS_USB_19

J15

AVSS_USB_20

K10

AVSS_USB_21

K12

AVSS_USB_22

K14

AVSS_USB_23

K15

AVSS_USB_24

SB700R3@

H18

J17

J22 K25 M16 M17 M21 P16

F9

PCIE_CK_VSS_1 PCIE_CK_VSS_2 PCIE_CK_VSS_3 PCIE_CK_VSS_4 PCIE_CK_VSS_5 PCIE_CK_VSS_6 PCIE_CK_VSS_7 PCIE_CK_VSS_8

AVSSC

Part 5 of 5

218S7EALA11FG_BGA528_SB700

+5VS

+3VS

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42

GROUND

VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

AVSSCK

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

L68

+AVDDCK_1.2V

+AVDDCK_3.3V

4 4

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

L68 0_0603_5%

0_0603_5%

12

C5872.2U_0603_6.3V4Z C5872.2U_0603_6.3V4Z

12

C5880.1U_0402_16V4Z C5880.1U_0402_16V4Z

12

L69

L69 0_0603_5%

0_0603_5%

12

C5892.2U_0603_6.3V4Z C5892.2U_0603_6.3V4Z

12

C5900.1U_0402_16V4Z C5900.1U_0402_16V4Z

12

Compal Secret Data

Deciphered Date

+1.2V_HT

+3VS

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

SB700 Power/GND

LA-4971P

E

1.0Custom

23 45Wednesday, April 22, 2009

1.0Custom

A

B

C

D

E

REQUIRED STRAPS

PCI_CLK3

BOOTFAIL

PULL

TIMER

HIGH

PULL LOW

@

ENABLED

BOOTFAIL TIMER DISABLED

DEFAULT

12

R348

10K_0402_5%

12

R358

10K_0402_5%

@

@ R359

@

1 1

+3VS +3VS +3VS +3VS

12

R347

@

10K_0402_5%

PCI_CLK220 PCI_CLK320 PCI_CLK420 PCI_CLK520 CLK_PCI_EC20,34 CLK_PCI_SIO220,33 RTC_CLK20 HDARST#21

2 2

GPIO1721 GPIO1621

12

R357

10K_0402_5%

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

12

R349

10K_0402_5%

12

R359

10K_0402_5%

PCI_CLK4 PCI_CLK5

RESERVED

12

R350

@

10K_0402_5%

12

R360

@ R360

@

10K_0402_5%

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

@

RTC_CLKLPC_CLK1

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1, apply 32KHz to RTC_CLK)

12

R353

10K_0402_5%

12

R363

2.2K_0402_5%

AZ_RST_CD#

EC ENABLED

EC DISABLED

DEFAULT

12

R354

@

10K_0402_5%

12

R364

10K_0402_5%

GP17

GP16PCI_CLK2

Internal pull up

H,H = Reserved

H,L = SPI ROM

L,H = LPC ROM (Default)

L,L = FWH ROM

12

R355

@

2.2K_0402_5%

12

R365

2.2K_0402_5%

LPC_CLK0

ENABLE PCI MEM BOOT

DISABLE PCI MEM BOOT

DEFAULT

@

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

12

R352

10K_0402_5%

12

R362

10K_0402_5%

RESERVED

+3VALW +3VALW+3VALW +3VALW +3VALW +3VALW

12

R351

@

10K_0402_5%

12

R361

10K_0402_5%

12

R356

2.2K_0402_5%

SI2: mount 2.2K

12

R366

@

2.2K_0402_5%

Need to confirm if SB SPI ROM will mount

DEBUG STRAPS

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

USE ACPI BCLK

DEFAULT

BYPASS ACPI BCLK

PCI_AD25 PCI_AD24

USE DEFAULT

USE IDE

PCIE STRAPS

PLL

DEFAULT

USE EEPROM

BYPASS IDE

PCIE STRAPS

PLL

PCI_AD23

RESERVED

PCI_AD27 PCI_AD26

PCI_AD28

USE LONG RESET

DEFAULT

USE SHORT RESET

USE PCI PLL

DEFAULT

BYPASS PCI PLL

PULL

3 3

HIGH

PULL LOW

PCI_AD2820,28 PCI_AD2720,28 PCI_AD2620,28 PCI_AD2520,28 PCI_AD2420,28 PCI_AD2320,28

4 4

A

@

12

R373

2.2K_0402_5%

12

R374

@

2.2K_0402_5%

B

@

12

R375

2.2K_0402_5%

12

R376

@

2.2K_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

R377

@

2.2K_0402_5%

C

12

R378

@

2.2K_0402_5%

Compal Secret Data

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

SB700 STRAPS

LA-4971P

E

1.0

24 45Wednesday, April 22, 2009

1.0

A

< SATA HDD1 Conn >

JHDD

1

GND

SATA_TXP1

2

A+

SATA_TXN1

3

A-

4

GND

SATA_IRX_DTX_N1

5

B-

SATA_IRX_DTX_P1

6

B+

7

GND

8

1 1

+5VS

1

C387

C387 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VS

2 2

1

@

C336

C336 10U_0805_10V4Z

10U_0805_10V4Z

2

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

24 23

1.2A Place closely JHDD0 SATA CONN.

21

V12

GND

22

V12

GND

SANTA_19A202-1_22P_RV-T@

1

C388

0.1U_0402_16V7K

2

1

C337

@

0.1U_0402_16V7K

2

+3VS

+5VS

1

C389

0.1U_0402_16V7K

2

+3VS rail reserve for SSDSSD HDD need 400mA for 3V(PHISON)

1

C338

@

0.1U_0402_16V7K

2

C512 0.01U_0402_25V7KC512 0.01U_0402_25V7K

1 2

C513 0.01U_0402_25V7KC513 0.01U_0402_25V7K

1 2

C410 0.01U_0402_25V7KC410 0.01U_0402_25V7K

1 2

C412 0.01U_0402_25V7KC412 0.01U_0402_25V7K

1 2

1

C390

0.1U_0402_16V7K

2

1

C339

@

0.1U_0402_16V7K

2

B

SATA_STX_DRX_P1 22 SATA_STX_DRX_N1 22

SATA_RXN1_C 22 SATA_RXP1_C 22

< 16" SATA ODD Conn >

JODD

15 14

< 17" SATA ODD Conn >

JODDB

E-T_6905-E12N-00R_12P@

1

GND

SATA_STX_DRX_P3_16

2

A+

SATA_STX_DRX_N3_16

3

A-

4

GND

SATA_RXN3_C_16

5

B-

SATA_RXP3_C_16

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND

13

GND

SANTA_206401-1_13P_RV@

+5VS

1

2

3

4

5

6

SATA_IRX_DTX_P3

7

SATA_IRX_DTX_N3

8

9

SATA_TXN3

10

SATA_TXP3

11

12

13

GND

14

GND

C

C427 0.01U_0402_25V7K16inch@ C427 0.01U_0402_25V7K16inch@

1 2

C426 0.01U_0402_25V7K16inch@ C426 0.01U_0402_25V7K16inch@

1 2

C545 0.01U_0402_25V7K16inch@ C545 0.01U_0402_25V7K16inch@

1 2

C544 0.01U_0402_25V7K16inch@ C544 0.01U_0402_25V7K16inch@

1 2

+5VS

C425 0.01U_0402_25V7K17inch@ C425 0.01U_0402_25V7K17inch@

1 2

C424 0.01U_0402_25V7K17inch@ C424 0.01U_0402_25V7K17inch@

1 2

C519 0.01U_0402_25V7K17inch@ C519 0.01U_0402_25V7K17inch@

1 2

C518 0.01U_0402_25V7K17inch@ C518 0.01U_0402_25V7K17inch@

1 2

SATA_STX_DRX_P3

SATA_STX_DRX_N3

SATA_RXP3_C 22 SATA_RXN3_C 22

SATA_STX_DRX_N3 22 SATA_STX_DRX_P3 22

SATA_RXN3_C SATA_RXP3_C

D

+5VS

1.1A

1

C414

C414 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C415

C415 10U_0805_10V4Z

10U_0805_10V4Z

2

Place component's closely ODD CONN.

1

@

C416

C416 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

E

1

C417

0.1U_0402_16V7K

2

1

C418

0.1U_0402_16V7K

2

< eSATA/USB >

SLP_CHG_M322

SLP_CHG_M422

+USB_VCCB

3 3

USB20_P221

USB20_N221

4 4

SLP_CHG_M3

Mode 3

Mode 4

HIGH

LOW HIGH

10/22 Add for USB Sleep & Charge M3/M4

@

U47

1

1OE#

4

2OE#

10

3OE#

13

USB20_P2_R_U USB20_P2_S_O USB20_N2_R_U

2

C872 0.1U_0402_16V4Z@ C872 0.1U_0402_16V4Z@

1

USB20_P2_R_U

USB20_N2_R_U

USB20_P2

USB20_N2

4OE#

1A21B 2A52B

9

3B

3A

12

4B

4A

14

GND

VCC

SN74CBT3125CPWR_TSSOP14P

U48

@ U48

@

1

VCC

1D+

2

1D-

3

D+

2D+

4

D-

2D-

GND5OE#

TS3USB221RSER_QFN10_2x1P5~D

R97 0_0402_5%R97 0_0402_5%

1 2

R98 0_0402_5%R98 0_0402_5%

1 2

SLP_CHG_M4

LOW

S

3 6 8 11

7

10

9

8

7

6

USB20_N2_S_O

R962 100_0402_5%@ R962 100_0402_5%@

1 2

+3VALW

SLP_CHG#

LOW

HIGH

A

1 2

SLP_CHG#

USB20_P2_R

USB20_N2_R

USB20_P2_R

USB20_N2_R

C873

0.1U_0402_16V4Z@

FUNCTION

+USB_VCCB +USB_VCCB

12

R960

@ R960

@

75K_0402_1%

12

R963

@ R963

@

51K_0402_1%

SLP_CHG# 22

D=1D

D=2D

B

12

@ R961

@

12

@ R964

@

R961 43K_0402_1%

43K_0402_1%

R964 51K_0402_1%

51K_0402_1%

USB_CHG_EN#34

Reserve for EMI request

R96 0_0402_5%

@

1 2

L46

USB20_P2_R USB20_P2_R_S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

L46

4

1

R95 0_0402_5%@R95 0_0402_5%@

C

3

4

1

WCM-2012-900T_0805

1 2

USB20_N2_R_SUSB20_N2_R

2

2008-09-25 2009-09-25

SATA_STX_DRX_P222 SATA_STX_DRX_N222

Compal Secret Data

Deciphered Date

SATA_RXN2_C22 SATA_RXP2_C22

+5VALW

USB20_N2_R_S USB20_P2_R_S

C520 0.01U_0402_25V7KC520 0.01U_0402_25V7K

1 2

C521 0.01U_0402_25V7KC521 0.01U_0402_25V7K

1 2

C361 0.01U_0402_25V7KC361 0.01U_0402_25V7K C357 0.01U_0402_25V7KC357 0.01U_0402_25V7K

D

1 2 3 4

D15

@D15

@

1

PJDLC05_SOT23-3

12 12

+USB_VCCB

1.4A

U19

GND IN IN EN#

G528_SO8

8

OUT

7

OUT

6

OUT

5

FLG

W=60mils

C367 4.7U_0805_10V4Z@C367 4.7U_0805_10V4Z@

1 2

R584 0_0402_5%R584 0_0402_5%

1 2

eSATA/USB Conn

+USB_VCCB

W=60mils

1

+

2

3

+

2

SATA_TXP2 SATA_TXN2

SATA_RXN2 SATA_RXP2

Compal Electronics, Inc.

Title

SATA HDD/ODD/ESATA_USB

Size Document Number Rev

Date: Sheet of

C352

C350

0.1U_0402_16V7K

220U_6.3V_M

2

JESATA

USB

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

ESATA

7

A-

8

9 10 11

12

GND

SHIELD

13

B-

SHIELD

14

B+

SHIELD

15

GND

SHIELD

@

FOX_3Q318111-RB133A-8F_11P-T

LA-4971P

E

USB_OC#2 21,34

1

C351

1000P_0402_50V7K

2

25 45Wednesday, April 22, 2009

1.0Custom

A

Place Close to Chip

CL9 0.1U_0402_16V7KCL9 0.1U_0402_16V7K

PCIE_PTX_C_IRX_P310

PCIE_PTX_C_IRX_N310

PCIE_ITX_C_PRX_P310

PCIE_ITX_C_PRX_N310

CLK_PCIE_LAN15 CLK_PCIE_LAN#15

1 2

ISOLATEB

RL4

@RL4

@

10K_0402_5%

CLKREQ_LAN15

PLT_RST#11,14,19,20,27,33,34

LAN_WAKE_R#34

LAN_WAKE_R#

1 1

+3V_LAN

+3VS

12

RL5

1K_0402_1%

2 2

RL6

15K_0402_5%

1 2

CL8 0.1U_0402_16V7KCL8 0.1U_0402_16V7K

1 2

RL3

2.49K_0402_1%

1 2

PCIE_PTX_IRX_P3

PCIE_PTX_IRX_N3

LAN_WAKE_R# ISOLATEB

LAN_X1 LAN_X2

27P_0402_50V8J

B

UL2

20

HSOP

21

HSON

15

HSIP

16

HSIN

17

REFCLK_P

18

REFCLK_M

25

CLKREQB

27

PERSTB

46

RSET

26

LANWAKEB

28

ISOLATEB

41

CKXTAL1

42

CKXTAL2

23

NC

24

NC

7

GND

14

GND

31

GND

47

GND

22

GNDTX

RTL8103EL-GR_LQFP48_7X7

1

CL17

2

LED2/EEDI/AUX

RTL8103EL-GR

YL1

12

25MHz_20pF_6X25000017

LED3/EEDO

LED1/EESK

EECS

MDIP0 MDIN0 MDIP1 MDIN1

VCTRL12A

VDDTX DVDD12 DVDD12 DVDD12 DVDD12

VCTRL12D

VDD33

AVDD33

LAN_X2LAN_X1

LED0

NC NC NC NC

NC

NC NC

1

2

LAN_DO

33

LAN_DI

34

LAN_SK_LAN_LINK#

35

LAN_CS

32

LAN_ACTIVITY#

38

LAN_MDI0+

2

LAN_MDI0-

3

LAN_MDI1+

5

LAN_MDI1-

6 8 9 11 12

4

VCTRL12

48

19 30 36 13 10

39

44 45

29 37

1 40 43

CL18

27P_0402_50V8J

C

RL1 3.6K_0402_5%RL1 3.6K_0402_5%

1 2

RL2 1K_0402_5%RL2 1K_0402_5%

+EVDD12 +LAN_VDD12

+LAN_VDD12

+3V_LAN

D

T25 PADT25 PAD

12

+3V_LAN

Close to Pin10,13,30,36

2

CL2

0.1U_0402_16V4Z

1

2

CL3

0.1U_0402_16V4Z

1

Close to Pin1,37,29

2

CL10

0.1U_0402_16V4Z

1

VCTRL12

E

2

CL4

0.1U_0402_16V4Z

1

Close to Pin45

Close to Pin19

2

CL13

1U_0402_6.3V4Z

1

2

CL11

0.1U_0402_16V4Z

1

Close to Pin48

1

CL6

@

10U_0805_10V4Z

2

+LAN_VDD12

2

1

+LAN_VDD12

2

1

+EVDD12

2

1

+3V_LAN

2

1

2

1

CL5

0.1U_0402_16V4Z

CL15

0.1U_0402_16V4Z

CL14

1U_0402_6.3V4Z

CL12

0.1U_0402_16V4Z

CL7

0.1U_0402_16V4Z

Place these components colsed to LAN chip

CL20

0.01U_0402_25V7K

12

CL21

0.01U_0402_25V7K

12

Add RL11, RL12 for customer request Change RL7, RL10 from 300 to 150

3 3

4 4

LAN_ACTIVITY#

+3V_LAN

LAN_SK_LAN_LINK#

+3V_LAN

LAN_MDI0+ LAN_MDI0-

LAN_MDI1+ LAN_MDI1-

A

UL3

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

LFE8456E-R

68P_0402_50V8J

RL7

RL7 150_0402_1%

150_0402_1%

12

RL11

RL11 150_0402_1%

150_0402_1%

12

68P_0402_50V8J

RL10

RL10 150_0402_1%

150_0402_1%

12

RL12

RL12 150_0402_1%

150_0402_1%

12

RJ45_GND LANGND

CL19

CL22

1 2

TX+ TX-

CT NC NC CT

RX+

2

1

2

1

RJ45_MIDI0+

16

RJ45_MIDI0-

15 14 13 12 11

RJ45_MIDI1+

10

RJ45_MIDI1-

9

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

CL23

CL23 1000P_1808_3KV7K

1000P_1808_3KV7K

< LAN Conn >

JLAN

12

11

8

7

6

5

4

3

2

1

10

9

TYCO_2068888-1_12P-T@

1

CL24

0.1U_0402_16V4Z

2

B

10/21 Add CL26, CL27 for customer request

CL26

CL26 1000P_0402_50V8-J

1000P_0402_50V8-J

1 2

CL27

CL27 1000P_0402_50V8-J

1000P_0402_50V8-J

1 2

Yellow LED-

Yellow LED+

PR4-

PR4+

PR2-

PR3-

PR3+

PR2+

PR1-

SHLD2

PR1+

SHLD1

Green LED-

Green LED+

1

CL25

4.7U_0603_6.3V6K

2

RL8

RL8 75_0402_1%

75_0402_1%

1 2

RL9

RJ45_GND

75_0402_1%

1 2

14

13

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

RTL8103EL 10/100 LAN

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

LA-4971P

26 45Wednesday, April 22, 2009

E

1.0

A

< PCIe Mini Card for WLAN >

B

C

D

E

WLAN@

JWLAN

1 3 5 7 9

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

+3VS

1

CM17

0.01U_0402_25V7K

2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

FOX_AS0B226-S40N-7F_52P@

CLKREQ_NCARD# 15

B

+1.5VS

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

WLAN@

+3VS

PLT_RST#

SMB_CK_CLK1 SMB_CK_DAT1

USB20_N8 USB20_P8

1

CM18

0.1U_0402_16V4Z

2

1

CM19

WLAN@

4.7U_0805_10V4Z

2

WL_OFF# 34

PLT_RST# 11,14,19,20,26,33,34

SMB_CK_CLK1 21

SMB_CK_DAT1 21

USB20_N8 21 USB20_P8 21

UN1

12

1.5Vin

14

1.5Vin

+3VS +3VS_CARD

+3VALW

SYSON34,36,42

SUSP#19,30,34,36,39,41

USB20_N521 USB20_P521

SMB_CK_CLK08,9,15,21

SMB_CK_DAT08,9,15,21

+1.5VS_CARD

EC_SWI_R#21,34

+3VALW_CARD

+3VS_CARD

EXP_CPPE#21 CLK_PCIE_NCARD#15 CLK_PCIE_NCARD15

PCIE_PTX_C_IRX_N010 PCIE_PTX_C_IRX_P010

PCIE_ITX_C_PRX_N010 PCIE_ITX_C_PRX_P010

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

3.3Vin

4

3.3Vin

AUX_IN17AUX_OUT

PLT_RST#

6

SYSRST#

20

SHDN#

1

STBY#

EXP_CPPE#

10

CPPE#

CP_USB#

9

CPUSB#

RCLKEN

CP_USB#

SMB_CK_CLK0 SMB_CK_DAT0

EC_SWI_R#

PERST#

CLKREQ# EXP_CPPE#

C

Thermal_Pad

18

RCLKEN

TPS2231MRGPR-2EXPCARD@

JEXP

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

SANTA_130812-3_LT

@

2008-09-25 2009-09-25

11

1.5Vout

13

1.5Vout

3

3.3Vout

5

3.3Vout

15

19

OC#

8

PERST#

16

NC

7

GND

21

31

GND

32

GND

29

GND

30

GND

Compal Secret Data

60mils

40mils

PERST#

Deciphered Date

+1.5VS_CARD+1.5VS

+3VALW_CARD

+1.5VS_CARD

EXPCARD@

+3VS_CARD

EXPCARD@

+3VALW_CARD

EXPCARD@

Compal Electronics, Inc.

Title

NEW CARD/WLAN/KS

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

1

CN5

10U_0805_10V4Z

2

1

CN3

10U_0805_10V4Z

2

1

CN1

10U_0805_10V4Z

2

LA-4971P

Imax = 0.75A

EXPCARD@

Imax = 1.35A

EXPCARD@

Imax = 0.275A

EXPCARD@

E

1

2

1

2

1

2

27 45Wednesday, April 22, 2009

CN6

0.1U_0402_16V4Z

CN4

0.1U_0402_16V4Z

CN2

0.1U_0402_16V4Z

1.0

+1.5VS

1

CM20

WLAN@

0.01U_0402_25V7K

2

1 1

E51_TXD34

2 2

3 3

4 4

E51_RXD34

+3VALW

+3VS +3VS +3VS

12

RN5

@ RN5

@

10K_0402_5%

13

D

@

RCLKEN

@

2

Q21

G

2N7002_SOT23-3

S

< Reserve for test >

EXPCARD@ RN6

EXPCARD@

1

CM21

WLAN@

0.1U_0402_16V4Z

2

CLKREQ_MCARD2#15

CLK_PCIE_MCARD2#15 CLK_PCIE_MCARD215

PCIE_PTX_C_IRX_N210 PCIE_PTX_C_IRX_P210

PCIE_ITX_C_PRX_N210

PCIE_ITX_C_PRX_P210

RM6 0_0402_5%RM6 0_0402_5%

E51_RXD E51_RXD_R

RM7 0_0402_5%RM7 0_0402_5%

12

R969

R969 100K_0402_5%

100K_0402_5%

RN1 100K_0402_5%EXPCARD@ RN1 100K_0402_5%EXPCARD@

1 2

RN2 100K_0402_5%EXPCARD@ RN2 100K_0402_5%EXPCARD@

1 2

RN3 100K_0402_5%EXPCARD@ RN3 100K_0402_5%EXPCARD@

1 2

12

RN4

@ RN4

@

10K_0402_5%

CLKREQ#

RN6

CLKREQ_NCARD#CLKREQ#

0_0402_5%

1 2

A

1 2 1 2

2

B

1

A

WLAN@

+3VS

CP_USB#

EXP_CPPE#

PLT_RST#

5

@

Vcc

Y

G

UN2

UN2 NC7SZ32P5X_NL_SC70-5

NC7SZ32P5X_NL_SC70-5

3

1

CM22

4.7U_0805_10V4Z

2

E51_TXD_RE51_TXD

share with USB OC PIN need always pull high

1

CN7

@

0.1U_0402_16V4Z

2

CLKREQ_NCARD#

4

A

1

CB5

CB5 10U_0805_10V4Z

10U_0805_10V4Z

PCMCIA@

2

1

CB9

CB9 10U_0805_10V4Z

10U_0805_10V4Z

PCMCIA@

2

PCI_AD[0..31]

PCI_CBE#[0..3]

1

CB6

0.1U_0402_16V4Z

PCMCIA@

2

1

CB10

0.1U_0402_16V4Z

PCMCIA@

2

22K TO 47K PULL-UPS MUST BE PLACED ON INTA#, PME#, SERIRQ# & CLKRUN#.

+3VS

RB22

CLKRUN#

33K_0402_5%

1 2

RB23

SERIRQ

33K_0402_5%

1 2

RB24

1 2

For EMI

@ RB21

@

@ CB14

@

RB21

10_0402_5%

1 2 1

CB14

10P_0402_50V8J

2

RB24 33K_0402_5%

33K_0402_5%

PCI_PIRQA#

CLK_PCI_PCM

1 1

PCI_AD[0..31]20,24

PCI_CBE#[0..3]20

+3VS

NOTE: IDSEL SELECTION!

THIS DEVICE UTILIZES A "SELECTABLE IDSEL" SCHEME.

IDSEL CAN BE CONNECTED INTERNALLY TO ONE OF THREE PCI AD LINES OR EXTERNAL IDSEL SIGNAL.

2 2

22K TO 47K PULL-UP & PULL-DOWN RESISTORS ARE REQUIRED TO BE CONNECTED TO PINS 123 & 124 TO SELECT ONE OF THE 4 POSSIBLE IDSEL CONNECTIONS.

THE TABLE BELOW SHOWS THE 4 POSSIBLE COMBINATIONS.

CONFIGURING IDSEL TO BE INTERNALLY CONNECTED ALLOWS FOR A FULL PARALLEL POWER MODE. IF AN EXTERNALLY CONNECTED IDSEL IS REQUIRED THEN AN INVERTER MUST BE CONNECTED TO VPP_PGM TO CREATE VPP_VCC.

VCC5#

VPP_PGM

(124)

DOWN

IDSEL SELECT

(123)

DOWN AD18

PCI_AD20

DOWN UP AD20

3 3

UP DOWN AD25

UP UP PIN 127 ball F4

must check IDSEL, PCI_PIRQ#,

CLKRUN#20

4 4

CLKRUN#

B

1

CB7

0.1U_0402_16V4Z

PCMCIA@

2

1

CB13

0.1U_0402_16V4Z

PCMCIA@

2

1 2

CLK_PCI_PCM20

PCI_DEVSEL#20 PCI_FRAME#20 PCI_IRDY#20

PCI_TRDY#20

PCI_STOP#20 PCI_PAR20

PCM_SPK#30

PCI_REQ#020

PCI_GNT#020

PCI_RST#20

SERIRQ20,33,34 PCI_PIRQA#20

1

CB8

0.1U_0402_16V4Z

PCMCIA@

2

RB19

RB19 100_0402_5%PCMCIA@

100_0402_5%PCMCIA@

RB20

RB20 0_0402_5%@

0_0402_5%@

12

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0 IDSEL PCI_CBE#3 PCI_CBE#2 PCI_CBE#1 PCI_CBE#0

PCM_SPK#

+S1_VCC

1

CB11

0.1U_0402_16V4Z

PCMCIA@

2

IDSEL SELECT POWER-ON-STRAPPING (SEE NOTE & TABLE FOR OPTIONS)

RB16 33K_0402_5%PCMCIA@ RB16 33K_0402_5%PCMCIA@

UB1

64

CORE_VCC

77

CORE_VCC

97

CORE_VCC

115

CORE_VCC

1

PCI_VCC

20

PCI_VCC

33

PCI_VCC

4

AD31

5

AD30

6

AD29

7

AD28

8

AD27

9

AD26

10

AD25

13

AD24

14

AD23

15

AD22

16

AD21

17

AD20

18

AD19

19

AD18

21

AD17

22

AD16

28

AD15

29

AD14

30

AD13

31

AD12

34

AD11

35

AD10

36

AD9

37

AD8

38

AD7

39

AD6

40

AD5

41

AD4

42

AD3

43

AD2

44

AD1

46

AD0

127

VPP_VCC/VPPD1/IDSEL

11

C/BE3#

12

C/BE2#

49

C/BE1#

50

C/BE0#

26

PCI_CLK

27

DEVSEL#

23

FRAME#

24

IRDY#

25

TRDY#

47

STOP#

48

PAR

51

PERR#/SPKR_OUT

2

REQ#

3

GNT#

126

RST#

120

PME#/RI_OUT#

55

MF6

54

MF4

53

MF3

52

MF0

RB17 33K_0402_5%PCMCIA@ RB17 33K_0402_5%PCMCIA@

BVD1/STSCHG#/RI#/CSTSCHG

GND32GND45GND65GND96GND

128

C

1

CB12

4.7U_0805_10V4Z

PCMCIA@

2

1 2

VCC5#/VCCD0#/SDATA

VCC3#/VCCD1#/SCLK

VPP_PGM/VPPD0/SLATCH

D10/CAD31

A25/CAD19

A24/CAD17 A17/CAD16

IOW#/CAD15

IORD#/CAD13

A11/CAD12

OE#/CAD11

CE2#/CAD10

A23/CFRAME#

A15/CIRDY#

A22/CTRDY#

A21/CDEVSEL#

A20/CSTOP#

A13/CPAR

A14/CPERR#

WAIT#/CSERR#

INPACK#/CREQ#

WE#/CGNT#

RDY/IREQ#/CINT#

A19/CBLOCK#

WP/CCLKRUN#

RESET/CRST#

VS1/CVS1

VS2/CVS2 CD1#/CCD1# CD2#/CCD2#

BVD2/LED/CAUDIO

REG#CCBE3#

A12/CCBE2#

A8/CCBE1#

CE1/CCBE0#

OZ601TN_TQFP128~DPCMCIA@

D9/CAD30 D1/CAD29 D8/CAD28 D0/CAD27 A0/CAD26 A1/CAD25 A2/CAD24 A3/CAD23 A4/CAD22 A5/CAD21 A6/CAD20

A7/CAD18

A9/CAD14

A10/CAD9 D15/CAD8

D7/CAD7

D13/CAD6

D6/CAD5

D12/CAD4

D5/CAD3

D11/CAD2

D4/CAD1 D3/CAD0

A16/CCLK

D2/RFU D14/RFU A18/RFU

124 125 123

103 102 101 100 99 110 109 108 106 105 104 118 95 94 93 75 73 74 71 72 70 69 68 85 84 82 83 80 81 78 79 76

107 114 117 116 113 61 58 60 91 89 62 88 59 87 119 98 86 63 57 121 56 122 92 90

111 112 66 67

1

CB1

0.1U_0402_16V4Z

PCMCIA@

2

+S1_VCC

S1_D10 S1_D9 S1_D1 S1_D8 S1_D0 S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A25 S1_A7 S1_A24 S1_A17 S1_IOWR# S1_A9 S1_IORD# S1_A11 S1_OE# S1_CE2# S1_A10 S1_D15 S1_D7 S1_D13 S1_D6 S1_D12 S1_D5 S1_D11 S1_D4 S1_D3

S1_A16 S1_A23 S1_A15 S1_A22 S1_A21 S1_A20 S1_A13 S1_A14 S1_WAIT# S1_INPACK# S1_WE# S1_RDY# S1_A19 S1_WP S1_RST S1_D2 S1_D14 S1_A18 S1_VS1 S1_VS2 S1_CD1# S1_CD2# S1_BVD2 S1_BVD1

S1_REG# S1_A12 S1_A8 S1_CE1#

1

2

UB2

5

VCC/VPP

6

VCC/VPP VCC5#7+5V

8

VCC3#

OZ2210GN-B1_SO8

PCMCIA@

CB2

4.7U_0805_10V4Z

PCMCIA@

1

+3.3V

2

+3.3V

3 4

GND

1 2

RB18

RB18 33_0402_5%PCMCIA@

33_0402_5%PCMCIA@

D

+5VS+3VS

1

CB3

4.7U_0805_10V4Z

PCMCIA@

2

S1_D3 S1_CD1# S1_D4 S1_D11 S1_D5 S1_D12 S1_D6 S1_D13 S1_D7 S1_D14 S1_CE1# S1_D15 S1_A10 S1_CE2# S1_OE# S1_VS1 S1_A11 S1_IORD# S1_A9 S1_IOWR# S1_A8 S1_A17 S1_A13 S1_A18 S1_A14 S1_A19 S1_WE# S1_A20 S1_RDY# S1_A21

+S1_VCC

S1_A16_R S1_A22 S1_A15 S1_A23 S1_A12 S1_A24 S1_A7 S1_A25 S1_A6 S1_VS2 S1_A5 S1_RST S1_A4 S1_WAIT# S1_A3 S1_INPACK# S1_A2 S1_REG# S1_A1 S1_BVD2 S1_A0 S1_BVD1 S1_D0 S1_D8 S1_D1 S1_D9 S1_D2 S1_D10 S1_WP S1_CD2#

1

CB4

0.1U_0402_16V4Z

PCMCIA@

2

PCMCIA Socket

JPCM

1

GND

35

GND

2

DATA3

36

CD1#

3

DATA4

37

DATA11

4

DATA5

38

DATA12

5

DATA6

39

DATA13

6

DATA7

40

DATA14

7

CE1#

41

DATA15

8

ADD10

42

CE2#

9

OE#

43

VS1#

10

ADD11

44

IORD#

11

ADD9

45

IOWR#

12

ADD8

46

ADD17

13

ADD13

47

ADD18

14

ADD14

48

ADD19

15

WE#

49

ADD20

16

READY

50

ADD21

17

VCC

51

VCC

18

VPP

52

VPP

19

ADD16

53

ADD22

20

ADD15

54

ADD23

21

ADD12

55

ADD24

22

ADD7

56

ADD25

23

ADD6

57

VS2#

24

ADD5

58

RESET

25

ADD4

59

WAIT#

26

ADD3

60

INPACK#

27

ADD2

61

REG#

28

ADD1

62

BVD2

29

ADD0

63

BVD1

30

DATA0

64

DATA8

31

DATA1

65

DATA9

GND

32

DATA2

GND

66

DATA10

GND

33

WP

GND

67

CD2#

34

GND

68

GND

SANTA_130625-3_LT

@SANTA_130625-3_LT

@

69 70 71 72

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2008-09-25 2009-09-25

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

CardBus O2 OZ601

Custom

LA-4971P

D

28 45Wednesday, April 22, 2009

1.0

5

RC2

RC2 0_0603_5%CARD@

0_0603_5%CARD@

1 2

+3VS

D D

+3VALW

1 2

RC4

RC4 0_0603_5%@

0_0603_5%@

CARD@

confirm that whether can be removed

+3VS_CR

RC8

CARD@

100K_0402_5%

1 2

RST# RST#_R

1

CC8

CARD@

1U_0402_6.3V4Z

2

1

CC13

C C

0.1U_0402_16V4Z@

2

CARD@

12

RC10

RC10 0_0402_5%CARD@

0_0402_5%CARD@

RC16

RC16 0_0402_5%

0_0402_5%

MODE SEL

+3VS_CR

1

CC1

0.1U_0402_16V4Z

2

4

+VCC_3IN1

USB20_N421 USB20_P421

RC14

6.19K_0402_1%

CARD@

1 2

1

CC5

1U_0402_6.3V4Z

2

CARD@

11 33

44 45 47 48

14

12 32

46

1 3 7 9

8

4 5

2

6

3

UC2

AV_PLL NC NC CARD_3V3 D3V3 D3V3

3V3_IN RST# MODE_SEL XTLO XTLI

DM DP GPIO0

RREF

DGND DGND

AGND AGND

RTS5159-VDD-GRCARD@

RC7

RC7 0_0402_5%CARD@

0_0402_5%CARD@

12

MS_D4

XD_CLE_SP19 XD_CE#_SP18 XD_ALE_SP17

SD_DAT2/XD_RE#_SP16

SD_DAT3/XD_WE#_SP15

XD_RDY_SP14

SD_DAT4/XD_WP#/MS_D7_SP13

SD_DAT5/XD_D0/MS_D6_SP12

SD_CLK/XD_D1/MS_CLK_SP11

SD_DAT6/XD_D7/MS_D3_SP10

MS_INS#_SP9 SD_DAT7/XD_D2/MS_D2_SP8 SD_DAT0/XD_D6/MS_D0_SP7 SD_DAT1/XD_D3/MS_D1_SP6

XD_D5_SP5

XD_D4/SD_DAT1_SP4

SD_CD#_SP3

SD_WP_SP2

XD_CD#_SP1

XTAL_CTR

MS_D5

SD_CMD

VREG

EEDO EECS EESK

10 22 30

NC

43 42 41 40 39 38 37 35 34 31 29 28 27 26 25 23 21 20 19 18

EEDI

13 24

15 16 17 36

CC6

0.1U_0402_16V4ZCARD@

12

CC4

0.1U_0402_16V4ZCARD@

12

+3VS_CR

RST#_R MODE SEL XTLO XTLI

USB20_N4 USB20_P4 CR_LED#

RC15

0_0402_5%

1 2

CARD@

SD_DATA2 SD_DATA3

SD_MS_CLK MS_DATA3_SD_DATA6 MSCD# MS_DATA2_SD_DATA7 SD_MS_DATA0 MS_DATA1 MSBS SD_DATA1 SDCD# SDWP#

XTAL_CTR

SDCMD

2

1

CC7

CC7 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1 2

1

RC18

RC11

SDCLK

22_0402_5%CARD@

RC12

MSCLK

22_0402_5%CARD@

1 2

RC18 10_0402_5%@

10_0402_5%@

RC17

RC17 10_0402_5%@

10_0402_5%@

CC15

CC15 10P_0402_50V8J@

10P_0402_50V8J@

CC14

CC14 10P_0402_50V8J@

10P_0402_50V8J@

< Card Reader LED >

+3VS

12

RC13

CARD@

120_0402_5%

21

DC1

DC1 HT-110UYG-CT_YEL/GRNCARD@

HT-110UYG-CT_YEL/GRNCARD@

CR_LED#

B B

CR_LED: Low when card reader is being accessed.

Vf=2.0V(typ),2.4V(max)

< 3 in 1 Card Reader >

JREAD

SD-WP SD-DAT1 SD-DAT0

SD-GND

MS-GND

MS-BS

SD-CLK MS-DAT1 MS-DAT0

SD-VCC

MS-DAT2

SD-GND

MS-INS MS-DAT3 SD-CMD

MS-SCLK

MS-VCC SD-DAT3 MS-GND

22

SD-DAT2

GND1

23

SD-CD

GND2

TAITW_R009-125-LR_RV@

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

SDWP# SD_DATA1 SD_MS_DATA0

MSBS SDCLK MS_DATA1 SD_MS_DATA0

MS_DATA2_SD_DATA7

MSCD# MS_DATA3_SD_DATA6 SDCMD MSCLK

SD_DATA3

SD_DATA2 SDCD#

CARD@

1

CC11

0.1U_0402_16V4Z

2

+VCC_3IN1

CARD@

1

CC10

1U_0402_6.3V4Z

2

< 48MHz >

Cost-down option

RC19

RC19 0_0402_5%CARD@

0_0402_5%CARD@

CLK_48M_CR15

+3VS_CR

1 2

RC20

RC20 0_0402_5%CARD@

0_0402_5%CARD@

XTLI

XTAL_CTR

< 12MHz >

CC9

A A

CC9 6P_0402_50V8D@

6P_0402_50V8D@

12

@ YC1

@

CC12

CC12 6P_0402_50V8D@

6P_0402_50V8D@

5

YC1 12MHZ_16P_6X12000012

12MHZ_16P_6X12000012

XTLO

XTLI

4

RNCC

USB AUTO DE-LINK

0

47P

NC

680P

NC

10K

180P

10K

680P

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

NC

Issued Date

YES

3

MS FORMATTER

YES

Compal Secret Data

2008-09-25 2009-09-25

Compal Secret Data

Description

Recommended

Compatible with RTS5158E

LED ON

Deciphered Date

2

Compal Electronics, Inc.

Title

RTS5159 Card Reader

Size Document Number Rev

Custom

Date: Sheet of

LA-4971P

29 45Wednesday, April 22, 2009

1

1.0

A

+5VALW

UA1

2

CA9

@

1U_0402_6.3V4Z

1

1 1

SUSP#19,27,34,36,39,41

UA1

1

VIN

VOUT

2

GND

3

SHDN#

BP

APL5151-475BC-TRL_SOT23-5@

Int. Mic

Ext. Mic

HDA_BITCLK_CODEC21

2 2

HDA_RST#_CODEC21

3 3

4.75V

5

4

MIC2_L31

MIC2_R31

MIC1_C_L31

MIC1_C_R31

< EMI require >

+5VS

2

@ J2

@

2

1

CA11

@CA11

@

0.22U_0402_10V4Z

12

J2

JUMP_43X39

1 2

@

1 2

1

@

2

+3VS

12

@ RA37

@

2

@

1

RA31

10_0402_5%

CA34

10P_0402_50V8J

RA37

4.7K_0402_5%

CA42

0.01U_0402_25V7K

< SENSE_A & SENSE_B, place close to chip >

RA18

SENSE_A

20K_0402_1%

MIC_SENSE31

SENSE A

4 4

SENSE B

1 2

RA16

SENSE_B

5.1K_0402_1%

1 2

NBA_PLUG31

RA17

RA17 20K_0402_1%MIC@

20K_0402_1%MIC@

1 2

ImpedanceSense Pin

39.2K

20K

Codec Signals

PORT-A (PIN 39, 41)

PORT-B (PIN 21, 22)

10K PORT-C (PIN 23, 24)

5.1K

PORT-D (PIN 35, 36)

39.2K

PORT-E (PIN 14, 15)

20K

PORT-F (PIN 16, 17)

10K

PORT-H (PIN 37)

5.1K

PORT-I (PIN 32, 33)

A

Function

Ext. MIC

FM tuner

SPK out

Int. MIC

Headphone out

+VDDA

2

CA10

@ CA10

@

1

1U_0402_6.3V4Z

CA14

CA14 100P_0402_50V8J

100P_0402_50V8J

B

RA3

RA3 0_0603_5%

0_0603_5%

12

1

CA3

10U_0805_10V4Z

2

HDA_SDOUT_CODEC21

HDA_SYNC_CODEC21

GPIO0-->SPK_SEL HIGH: HARMAN LOW: NO-BRAND

1

2

HDA_SDIN021

CA4

10U_0805_10V4Z

CA45 100P_0402_50V8JCA45 100P_0402_50V8J

CA46 100P_0402_50V8JCA46 100P_0402_50V8J

CA47 100P_0402_50V8JCA47 100P_0402_50V8J

CA48 100P_0402_50V8JCA48 100P_0402_50V8J

SPK_SEL22

SENSE_A

SENSE_B

MUTE#31

1

CA5

0.1U_0402_16V4Z

2

1 2

MUTE#

C

1

CA6

0.1U_0402_16V4Z

2

MONO_IN

RA7

HDA_SDIN0_R

33_0402_5%

12

RA4 0_0402_5%RA4 0_0402_5%

1 2

DGND

+AVDD +3VS_DVDD

40mil

2

CA53

100P_0402_50V8J

1

38

UA2

AVDD125AVDD2

14

LINE2-L

15

LINE2-R

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

21

MIC1_L

22

MIC1_R

12

BEEP_IN

6

BITCLK

5

SDATA_OUT

8

SDATA_IN

11

RESET#

10

SYNC

2

GPIO0/DMIC_DATA1/2

3

GPIO1/DMIC_DATA3/4

13

SENSE A

34

SENSE B

47

EAPD

43

NC

4

DVSS

7

DVSS

ALC272-GR_LQFP48

need to re-link ALC272

A2 version

CA54 0.1U_0603_50V7KCA54 0.1U_0603_50V7K

CA55 0.1U_0603_50V7KCA55 0.1U_0603_50V7K

CA56 0.1U_0603_50V7KCA56 0.1U_0603_50V7K

CA57 0.1U_0603_50V7KCA57 0.1U_0603_50V7K

RA15 0_0603_5%RA15 0_0603_5%

1 2

1

9

DVDD

DMIC_CLK1/2

DMIC_CLK3/4

LINE2_VREFO

LINE1_VREFO

MIC1_VREFO

MIC2_VREFO

DVDD_IO

LOUT1_L

LOUT1_R

LOUT2_L

LOUT2_R

SPDIFO1

SPDIFO2

HPOUT_L

HPOUT_R

MONO_OUT

CPVREF

VREF

JDREF

AVSS1 AVSS2

30mil

1

CA1

0.1U_0402_16V4Z

2

1

CA7

0.1U_0402_16V4Z

2

35

36

39

41

48

45

33

32

37

46

44

20

18

28

19

31

27

40

30

CBN

29

CBP

26 42

D

1

CA2

10U_0805_10V4Z

2

1

CA8

10U_0805_10V4Z

2

HPL

RA5 63.4_0402_1%RA5 63.4_0402_1%

1 2

HPR

RA6 63.4_0402_1%RA6 63.4_0402_1%

1 2

10mil 10mil

1 2

AC_VREF

AC_JDREF

CA17

1 2

2.2U_0603_6.3V6K

AGND

2

1

CA51

CA51 1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

CA12

CA12 1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

CA16

2.2U_0603_6.3V6K

12

RA10

20K_0402_1%

CA52

100P_0402_50V8J

2

CA49

1

100P_0402_50V8J

RA1

RA1 0_0603_5%

0_0603_5%

12

AMP_SPK_L 31

AMP_SPK_R 31

HP_L 31

HP_R 31

+MIC1_VREFO

+MIC2_VREFO

1

CA18

10U_0805_10V4Z

2

+3VS

1

2

CA19

0.1U_0402_16V4Z

E

2

CA50

100P_0402_50V8J

1

< MONO_IN SOURCE >

RA8

RA8 47K_0402_5%

47K_0402_5%

EC Beep

EC_BEEP34

PCI Beep

CardBus Beep

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

SB_SPKR21

PCM_SPK#28

Compal Secret Data

Deciphered Date

1 2

D

RA9

RA9 47K_0402_5%

47K_0402_5%

RA19

RA19 47K_0402_5%PCMCIA@

47K_0402_5%PCMCIA@

CA15

MONO_IN

0.1U_0402_16V4Z

1 2

12

1

CA20

RA11

RA11 10K_0402_5%

10K_0402_5%

CA20

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Title

HD Audio ALC272 Codec

Size Document Number Rev

Date: Sheet of

LA-4971P

E

1.0Custom

30 45Wednesday, April 22, 2009

1.0Custom

15.6

21.6

A

+5VS

16

15

UA3

CA29

0.033U_0402_16V7K

CA30

0.033U_0402_16V7K

CA31

0.033U_0402_16V7K

CA32

0.033U_0402_16V7K

Rin(ohm)

6

90K

10

70K

45K

25K

LINE_C_OUTR

17

LINE_C_OUTL

MUTE#30

19

7

9

5

RIN+

RIN-

LIN+

LIN-

SHUTDOWN

VDD

GND5

20

21

< TPA6017 Medium Range Amplifier >

1 1

AMP_SPK_R30

AMP_SPK_L30

2 2

GAIN0 GAIN1 Av(db)

0

0 1

1

0

1 1

< Volume Control >

3 3

SW2

SW_XRE094_3P

4 4

+3VS

12

5

DIP

2

A

1

COM

3

B

DIP

4

A

RA33

10K_0402_5%

RA34

10K_0402_5%

1 2

0.01U_0402_25V7K

RA35

RA35 10K_0402_5%

10K_0402_5%

RA36

RA36 10K_0402_5%

10K_0402_5%

CA37

+3VS

1

2

6

PVDD1

PVDD2

GAIN0

GAIN1

ROUT+

ROUT-

LOUT+

LOUT-

NC

BYPASS

GND41GND311GND213GND1

TPA6017A2_TSSOP20

1 2

5NC1

P

A2Y

G

3

1

CA38

0.01U_0402_25V7K

2

B

1

CA23

10U_0805_10V4Z

2

3

SPKR+

18

SPKR-

14

SPKL+

4

SPKL-

8

12

Keep 10 mil width

AMP_BYPASS

10

CA35

0.1U_0402_16V4Z

UA4

4

74LVC1G14GW_SOT353-5

B

1

CA24

0.1U_0402_16V4Z

2

CA33

0.47U_0603_10V7K

1

+3VS

12

RA32

100K_0402_5%

1

2

12

@ RA29

@

CA36

0.1U_0402_16V4Z

UA5

1

CD1#

2

D1

3

CP1

4

SD1#

5

Q1

6

Q1#

7

GND

74LCX74MTC_TSSOP14

ENCODER_DIR 34 ENCODER_PULSE 34

C

< Ext. Mic >

CA21 4.7U_0805_10V4ZCA21 4.7U_0805_10V4Z

1

CA25

0.1U_0402_16V4Z

2

10 dB

RA27

100K_0402_5%

RA29

100K_0402_5%

@

+5VS

12

RA28

100K_0402_5%

12

RA30

100K_0402_5%

MIC1_C_L30

MIC1_C_R30

< Int. Mic >

MIC2_L30

MIC2_R30

12

CA22 4.7U_0805_10V4ZCA22 4.7U_0805_10V4Z

12

MIC@

CA26

CA26 1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

1U_0402_6.3V4Z

12

CA28

MIC@

< Speaker Connector >

SPKL+

LA3 FBMA-L11-160808-800LMT_0603LA3 FBMA-L11-160808-800LMT_0603

1 2

SPKL-

LA4 FBMA-L11-160808-800LMT_0603LA4 FBMA-L11-160808-800LMT_0603

1 2

SPKR+

LA5 FBMA-L11-160808-800LMT_0603LA5 FBMA-L11-160808-800LMT_0603

1 2

SPKR-

LA6 FBMA-L11-160808-800LMT_0603LA6 FBMA-L11-160808-800LMT_0603

1 2

< HeadPhone JACK >

NBA_PLUG30

HP_R30

HP_L30

+3VS

14

VCC

13

CD2#

12

D2

11

CP2

10

SD2#

09

Q2

08

Q2#

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

< Ext.MIC/LINE IN JACK >

1

CA39

0.1U_0402_16V4Z

2

C

MIC_SENSE30

MIC1_R

2008-09-25 2009-09-25

LA7 KC FBM-L11-160808-121LMT 0603LA7 KC FBM-L11-160808-121LMT 0603

1 2

LA8 KC FBM-L11-160808-121LMT 0603LA8 KC FBM-L11-160808-121LMT 0603

1 2

LA9 KC FBM-L11-160808-121LMT 0603LA9 KC FBM-L11-160808-121LMT 0603

1 2

LA10 KC FBM-L11-160808-121LMT 0603LA10 KC FBM-L11-160808-121LMT 0603

1 2

Compal Secret Data

Deciphered Date

D

RA21

RA21 1K_0402_5%

1K_0402_5%

12

1K_0402_5%

12

RA22

MIC@

RA25

RA25 1K_0402_5%

1K_0402_5%

12

1K_0402_5%

12

RA26

MIC@

DA4

DA4 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

1

DA5

DA5 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

3

1

2

DA7

@DA7

@

PACDN042Y3R_SOT23-3

D

CA27

CA27 220P_0402_50V7K

220P_0402_50V7K

1 2

2

3

SPK_L1 SPK_L2 SPK_R1 SPK_R2

3

2

CA43 0.1U_0402_16V4ZCA43 0.1U_0402_16V4Z

1

@DA6

@

1

CA44 0.1U_0402_16V4ZCA44 0.1U_0402_16V4Z

< EMI require >

2

1

2

E

DA1

RA20

4.7K_0402_5%

12

RA23

4.7K_0402_5%

12

RA24 4.7K_0402_5%MIC@ RA24 4.7K_0402_5%MIC@

JSPK

1 2 3 4

ACES_85204-0400N_4P@

1

< EMI require >

2

3

2

DA6 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

CA40

CA40 100P_0402_50V8J@

100P_0402_50V8J@

Title

AMP/Audio Jack/HP/SPEAKER/VR

Size Document Number Rev

Date: Sheet of

DA1 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

21

12

1 2

INT_MIC

J3

@J3

@

2

112

JUMP_43X39

close to Codec

1 2 3 4

HP_R_L

HP_L_L

MIC1_L_R

MIC1_L_LMIC1_L

1

CA41

CA41 100P_0402_50V8J@

100P_0402_50V8J@

2

Compal Electronics, Inc.

LA-4971P

DA2

DA2 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

LVDSSET@

RA38

RA38 0_0402_5%

0_0402_5%

close to JMIC

DA3

DA3 PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

3

2

JMIC

@JMIC

@

1

NC1

2

NC2

ACES_85204-0200N_2P

JLINE

5

4

3 6 2 1

FOX_JA6333L-B3T0-7F@

JEXMIC

5

4

3 6 2 1

FOX_JA6333L-B3T0-7F@

E

MIC1_L

MIC1_R

31 45Wednesday, April 22, 2009

1

3 4

+MIC1_VREFO

+MIC2_VREFO

INT_MIC_R 17

1.0Custom

A

< USB Right-side Board, USB port 0,1 >

+5VALW +USB_VCCA

USB_EN#

USB_EN#34

1 1

< R e s e r v e f o r E M I r e q u e s t >

< R e s e r v e f o r E M I r e q u e s t >< R e s e r v e f o r E M I r e q u e s t >

L50

USB20_N021

USB20_P021

2 2

USB20_N121

USB20_P121

1

4

WCM-2012-900T_0805

L51

1

4

WCM-2012-900T_0805

1 2

1

4

1 2

1

4

1 2

1 2 3 4

U25

GND IN IN EN#

G528_SO8

R107

@R107

@

0_0402_5%

2

3

R108

@R108

@

0_0402_5%

R109

@R109

@

0_0402_5%

2

3

R110

@R110

@

0_0402_5%

1.4A

8

OUT

7

OUT

6

OUT

5

FLG

W=60mils

C438 4.7U_0805_10V4ZC438 4.7U_0805_10V4Z

1 2

R422 0_0402_5%R422 0_0402_5%

1 2

+USB_VCCA

W=60mils

2

3

2

3

USB20_N0_R USB20_P0_R

USB20_N1_R USB20_P1_R

B

C

D

E

< BlueTooth Interface, USB port6 >

C481

0.1U_0402_16V7K

C196

0.01U_0402_25V7K

Inrush current = 0A

USB20_P621 USB20_N621

BT_DET#22

2

BT@

+3VS

G

S

BT@

Q25

D

AO3413_SOT23

1 3

USB20_P6 USB20_N6

+3VS

C479

0.1U_0402_16V4Z

BT@

R437 0_0402_5%BT@ R437 0_0402_5%BT@

R438 4.7K_0402_5%@ R438 4.7K_0402_5%@

C482

0.1U_0402_16V4Z

+BT_VCC

1 2

BT@ R439

BT@

1 2

R439

4.7K_0402_5%

JBT

12

GND2

11

GND1

10

9

8

7

6

5

4

3

2

1

ACES_87213-1000G_10P@

+3VS

R432

BT@

100K_0402_5%

R440

R440 0_0402_5%BT@

0_0402_5%BT@

100K_0402_5%

1 2

@

1 2

BT_RESET#

C480

0.1U_0402_16V4Z

+BT_VCC

USB_OC#0 21,34

JUSBB

1

2

3

4

5

6

7

8

9

10

11

12

13

GND

14

GND

E-T_6905-E12N-00R_12P@

< Bluetooth Connector >

BT_RST#34

BT_PWR#34

1 2

2

BT@

1

R441

R441 47K_0402_5%BT@

47K_0402_5%BT@

1

2

(MAX=200mA)

1

C483

BT@

4.7U_0805_10V4Z

2

< Int. Camera, USB port 9 >

+5VS

+5VALW

3 3

1 2

R430

R430 0_0603_5%CAM@

0_0603_5%CAM@

R428

R428 0_0603_5%@

0_0603_5%@

CAM@ C744

CAM@

W=20mils

+CAM_VDD

1

C744

0.1U_0402_16V4Z

2

JCAM

GND1 GND2

ACES_88266-05001_5P@

R20 close to JCAM

LVDSSET@

R20

R20 0_0402_5%

0_0402_5%

1 2

1

1 2 3 4 5

USB20_N9_R

2

USB20_P9_R

3 4 5 6 7

1 2

LVDSSET@

< EMI require >

R103 0_0402_5%@ R103 0_0402_5%@

1 2

L60

CAM@ L60

CAM@

1

4

WCM-2012-900T_0805

R99 0_0402_5%@ R99 0_0402_5%@

1 2

R18

R18 0_0402_5%

0_0402_5%

R18 close to JCAM

2

3

2

3

USB20_N9_R_CAM 17

USB20_N9 21 USB20_P9 21

USB20_P9_R_CAM 17

< Finger Printer, USB port 7 >

C468

R119

+3VS_FP

0_0603_5%FP@

+3VS

4 4

USB20_N721 USB20_P721

1 2

USB20_N7 USB20_P7

R118 0_0603_5%FP@ R118 0_0603_5%FP@

1 2

A

C468

0.1U_0402_16V4ZFP@

1 2

JFP

1

2

3

5

3

GND

4

6

4

GND

ACES_85201-04051@

B

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

USB/BT/FingerPrint

LA-4971P

E

32 45Wednesday, April 22, 2009

1.0Custom

< S P I F l a s h 8 M b * 1 >

A

< S P I F l a s h 8 M b * 1 >< S P I F l a s h 8 M b * 1 >

B

C

D

E

< MDC 1.5 Conn >

+3VL

1

C786

0.1U_0402_16V4Z

2

1 1

SERIRQ20,28,34

2 2

LPC_FRAME#20,34

1

C607

@

10P_0402_50V8J

2

SERIRQ

LPC_AD3

LPC_AD320,34

LPC_AD1

LPC_AD120,34

LPC_FRAME#

1

C608

@

10P_0402_50V8J

2

< LPC Debug Port >

Please place the PAD under DDR DIMM.

+3VS

H1

R622

R622 0_0402_5%

0_0402_5%

1 2

7

8

9

10

DEBUG_PAD@H1DEBUG_PAD@

20mils

SPI_CS#34

SPI_CLK34

EC_SPICLK

SPI_CS#

EC_SPICLK

1 2

56

4

3

2

1

8

3

7

1

6

5

MX25L8005M2C-15G

R518

R518 10_0402_5%

10_0402_5%

PLT_RST#

LPC_AD2

LPC_AD0

R634

22_0402_5%

1 2

2

C639

22P_0402_50V8J

1

U46

4

VCC

VSS

W

HOLD

S

C

2

Q

D

1 2

PLT_RST# 11,14,19,20,26,27,34

LPC_AD2 20,34

LPC_AD0 20,34

CLK_PCI_SIO2 20,24

C606

C606 10P_0402_50V8J

10P_0402_50V8J

EC_SI_SPI_SO 34EC_SO_SPI_SI34

HDA_SDOUT_MDC21

HDA_SYNC_MDC21

HDA_SDIN121

HDA_RST#_MDC21

R495 33_0402_5%MDC@ R495 33_0402_5%MDC@

1 2

HDA_SDOUT_MDC

HDA_SYNC_MDC HDA_SDIN1_MDC

JMDC

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

1

MDC@

C778

C778 1000P_0402_50V7K

1000P_0402_50V7K

2

GND13GND14GND15GND16GND17GND

+3VALW

1

2

RES0 RES1

3.3V GND3 GND4

IAC_BITCLK

ACES_88018-124G_12P@

18

MDC@

C779

0.1U_0402_16V4Z

2

+3VALW 4 6

+3VALW 8 10 12

12

R496

@

10_0402_5%

2

C777

@

10P_0402_50V8J

1

MDC@

C780

4.7U_0805_10V4Z

2

HDA_BITCLK_MDC 21

< KEYBOARD CONN 16" >

JKB1

34

KSO16

33 32

KSO17

31

3 3

30 29

KSO2

28

KSO1

27

KSO0

26

KSO4

25

KSO3

24

KSO5

23

KSO14

22

KSO6

21

KSO7

20

KSO13

19

KSO8

18

KSO9

17

KSO10

16

KSO11

15

KSO12

14

KSO15

13

KSI7

12

KSI2

11

KSI3

10

KSI4

9

KSI0

8

KSI5

7

KSI6

6

KSI1

5 4

CAPS_LED# 34

3 2

NUM_LED# 34

1

ACES_88170-3400_34P@

4 4

KSI[0..7]

KSI[0..7] 34,35

KSO[0..17]

KSO[0..17] 34,35

R502

1 2

300_0402_5%

1

C781

0.1U_0402_16V4Z

2

1

C782

0.1U_0402_16V4Z

2

< For EMI >

R509

12

+3VS

300_0402_5%

A

B

< KEYBOARD CONN 17" > < For EMI >

KSO2 KSO1 KSO0 KSO4 KSO3 KSO5

KSO14

KSO6 KSO7

KSO13

KSO8

KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 CAPS_LED# NUM_LED#

KSO16 KSO17

1

C783

0.1U_0402_16V4Z

2

JKB2

+3VS

JKB2

34

KSO16

33 32

KSO17

31 30 29

KSO2

28

KSO1

27

KSO0

26

KSO4

25

KSO3

24

KSO5

23

KSO14

22

KSO6

21

KSO7

20

KSO13

19

KSO8

18

KSO9

17

KSO10

16

KSO11

15

KSO12

14

KSO15

13

KSI7

12

KSI2

11

KSI3

10

KSI4

9

KSI0

8

KSI5

7

KSI6

6

KSI1

5 4

CAPS_LED#

3 2

NUM_LED#

1

ACES_88170-3400_34P@

/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008-09-25 2009-09-25

C

Compal Secret Data

Deciphered Date

C725 100P_0402_50V8JC725 100P_0402_50V8J C717 100P_0402_50V8JC717 100P_0402_50V8J C721 100P_0402_50V8JC721 100P_0402_50V8J C609 100P_0402_50V8JC609 100P_0402_50V8J C724 100P_0402_50V8JC724 100P_0402_50V8J C728 100P_0402_50V8JC728 100P_0402_50V8J C730 100P_0402_50V8JC730 100P_0402_50V8J C715 100P_0402_50V8JC715 100P_0402_50V8J C732 100P_0402_50V8JC732 100P_0402_50V8J C733 100P_0402_50V8JC733 100P_0402_50V8J C740 100P_0402_50V8JC740 100P_0402_50V8J C737 100P_0402_50V8JC737 100P_0402_50V8J C729 100P_0402_50V8JC729 100P_0402_50V8J C738 100P_0402_50V8JC738 100P_0402_50V8J C718 100P_0402_50V8JC718 100P_0402_50V8J C736 100P_0402_50V8JC736 100P_0402_50V8J C716 100P_0402_50V8JC716 100P_0402_50V8J C741 100P_0402_50V8JC741 100P_0402_50V8J C726 100P_0402_50V8JC726 100P_0402_50V8J C723 100P_0402_50V8JC723 100P_0402_50V8J C731 100P_0402_50V8JC731 100P_0402_50V8J C739 100P_0402_50V8JC739 100P_0402_50V8J C735 100P_0402_50V8JC735 100P_0402_50V8J C734 100P_0402_50V8JC734 100P_0402_50V8J C722 100P_0402_50V8JC722 100P_0402_50V8J C714 100P_0402_50V8JC714 100P_0402_50V8J

C870 100P_0402_50V8JC870 100P_0402_50V8J C871 100P_0402_50V8JC871 100P_0402_50V8J

D

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2

Compal Electronics, Inc.

Title

SPI/LPC/PS2/MDC/FM/CIR

Size Document Number Rev

Date: Sheet of

LA-4971P

1.0Custom

33 45Wednesday, April 22, 2009

E

1.0Custom

A

CLK_PCI_EC20,24

1 2

Reserve for EMI request

1 2

R533 47K_0402_5%R533 47K_0402_5%

+3VL

C811 0.1U_0402_16V4ZC811 0.1U_0402_16V4Z

12

C810

@C810

@

15P_0402_50V8J

1 2

+3VS

+3VL

+5VS

+3VALW

+3VL

R530

@R530

@

33_0402_5%

1 2

12

1 1

2 2

EC_SMB_DA2

R330 2.2K_0402_5%R330 2.2K_0402_5%

EC_SMB_CK2

R326 2.2K_0402_5%R326 2.2K_0402_5%

EC_SMB_DA1

R70 2.2K_0402_5%R70 2.2K_0402_5%

EC_SMB_CK1

R77 2.2K_0402_5%R77 2.2K_0402_5%

CEC_INT#

R563 100K_0402_5%R563 100K_0402_5%

TP_CLK

R534 4.7K_0402_5%R534 4.7K_0402_5%

TP_DATA

R535 4.7K_0402_5%R535 4.7K_0402_5%

SYSON

SUSP#

LID_SW#

ON/OFFBTN#

R513 100K_0402_5%R513 100K_0402_5%

KSO1

R947 47K_0402_5%R947 47K_0402_5%

KSO2

R948 47K_0402_5%R948 47K_0402_5%

R539 10K_0402_5%R539 10K_0402_5%

R536 10K_0402_5%R536 10K_0402_5%

R538 100K_0402_5%R538 100K_0402_5%

3 3

Add for KB926D2 issue. Please refer to KB926D-AN1-100 for detail

R684

1 2

2 1

R684 0_0402_5%GM@

0_0402_5%GM@

R683

R683 0_0402_5%PM@

0_0402_5%PM@

R560

R560 150K_0402_5%

150K_0402_5%

D33

D33 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

C326

C326 100P_0402_50V8J

100P_0402_50V8J

12

A

UMA_ENBKL 11

VGA_ENBKL 19

+3VL

ACIN 22,35,37

ENBKL

4 4

ACIN_D

KSI[0..7]33,35

KSO[0..17]33,35

PWR_SUSP_LED#35

C813

C813 15P_0402_50V8J

15P_0402_50V8J

1 2

Y7

2

OSC

NC

3

OSC

NC

32.768KHZ_12.5PF_9H03200413

32.768KHZ_12.5PF_9H03200413 C815

C815 15P_0402_50V8J

15P_0402_50V8J

1 2

B

GATEA2021 KB_RST#21

SERIRQ20,28,33

LPC_FRAME#20,33

LPC_AD320,33 LPC_AD220,33 LPC_AD120,33 LPC_AD020,33

PLT_RST#11,14,19,20,26,27,33

EC_SCI#21

WL_BT_LED#35

KSI[0..7]

KSO[0..17]

EC_SMB_CK118,38 EC_SMB_DA118,38 EC_SMB_CK26,19,35 EC_SMB_DA26,19,35

PM_SLP_S3#21 PM_SLP_S5#21 EC_LID_OUT# 21 EC_SMI#21 LID_SW#35

BT_PWR#32

FAN_SPEED14 VLDT_EN36 E51_TXD27 E51_RXD27

ON/OFFBTN#35

NUM_LED#33

1

4

B

12

@ R545

@

+3VL_EC

+EC_AVCC

GATEA20 KB_RST# SERIRQ LPC_LFRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# ECRST# EC_SCI# WL_BT_LED#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# LID_SW#

BT_PWR#

FAN_SPEED1

E51_TXD E51_RXD ON/OFFBTN# PWR_SUSP_LED# NUM_LED#

CRY1

R545 20M_0402_5%

20M_0402_5%

CRY2

L80 0_0603_5%L80 0_0603_5%

1 2

+3VL_EC

1

C805

0.1U_0402_16V4Z

2

+3VL +3VL_EC

U33

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

1

C806

0.1U_0402_16V4Z

2

/

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

L25

L25 0_0603_5%

0_0603_5%

12

LPC & MISC

Int. K/B

Int. K/B Matrix

Matrix

1 2

Issued Date

C

9

22

33

VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SM Bus

GPIO

GND

11

24

C816

0.1U_0402_16V4Z

1

C807

C807 1000P_0402_50V7K

1000P_0402_50V7K

2

C

+EC_AVCC

67

96

111

125

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD Input

SPI Flash ROM

GPIO

GND

35

94

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPI

GND

AGND

KB926QFD3_LQFP128_14X14

69

113

ECAGND

L81 0_0603_5%L81 0_0603_5%

1

C808

0.1U_0402_16V4Z

2

2008-09-25 2009-09-25

SPIDI/RD#

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

12

Compal Secret Data

INVT_PWM

21 23 26

ACOFF

27

BATT_TEMPA

63 64 65 66 75 76

68

EN_DFAN1

70

IREF

71

CHGVADJ

72

83 84

ENCODER_DIR

85

ENCODER_PULSE

86

TP_CLK

87

TP_DATA

88

BT_RST#

97

WOL_EN#

98

USB_OC#2

99 109

119 120 126 128

73

CEC_INT#

74

FSTCHG

89

BATT_FULL_LED#

90 91

BATT_LOW_LED#

92

PWR_ON_LED#

93

SYSON

95

VR_ON

121

ACIN_D

127

EC_RSMRST#

100 101 102

EC_SWI#

103

SB_PWRGD

104

BKOFF#

105

WL_OFF#

106 107 108

110

ENBKL

112

HDPLOC

114 115

SUSP#

116

PBTN_OUT#

117

LAN_WAKE#

118

C814 4.7U_0805_10V4ZC814 4.7U_0805_10V4Z

12

124

1

C809

C809 1000P_0402_50V7K

1000P_0402_50V7K

2

Deciphered Date

D

INVT_PWM 17 EC_BEEP 30

ACOFF 39

BATT_TEMPA 38

ADP_V 39

DAC_BRIG 17 EN_DFAN1 4 IREF 39 CHGVADJ 39

USB_CHG_EN# 25

USB_EN# 32 ENCODER_DIR 31 ENCODER_PULSE 31

TP_CLK 35

TP_DATA 35

BT_RST# 32

WOL_EN# 36

USB_OC#2 21,25 VGATE 43

EC_SI_SPI_SO 33 EC_SO_SPI_SI 33 SPI_CLK 33 SPI_CS# 33

CEC_INT# 18 FSTCHG 39 BATT_FULL_LED# 35 CAPS_LED# 33 BATT_LOW_LED# 35 PWR_ON_LED# 35

SYSON 27,36,42

EC_RSMRST# 21

EC_ON 35,36

SB_PWRGD 21,43 BKOFF# 17 WL_OFF# 27 HDPINT 35

HDPACT 35

HDPLOC 35 EC_THERM# 22

SUSP# 19,27,30,36,39,41 PBTN_OUT# 21

LAN_WAKE# LAN_WAKE_R#

EC_SWI# EC_SWI_R#

LAN_WAKE_R# EC_SWI_R#

LAN_WAKE#

D

1 2

E

C812

ECAGND

100P_0402_50V8J

R145

R145 100K_0402_5%

100K_0402_5%

C154

0.22U_0603_16V4Z

R541

R541 10K_0402_5%

10K_0402_5%

12

1 2

Size Document Number Rev

Date: Sheet of

ADP_I 39

VR_ON 43

R24

@R24

@

0_0402_5%

R33

@R33

@

0_0402_5%

R34

R34 0_0402_5%

0_0402_5%

R35

R35 0_0402_5%

0_0402_5%

Compal Electronics, Inc.

Title

ENE KB926C

LA-4971P

LAN_WAKE_R# 26

EC_SWI_R# 21,27

USB_OC#0 21,32

E

1.0Custom

34 45Wednesday, April 22, 2009

1.0Custom

< Power Button for Debug >

A

debug phase using

SW5

@ SW5

@

TOP side

1 1

1

2

SMT1-05-A_4P

5

6

EC_ON34,36

10K_0402_5%

R514

< DC-IN LED >

2 2

+3VALW

R515

R515 120_0402_5%

120_0402_5%

1 2

Vf=2.0V (typ), 2.4 V (max), If = 30mA (max)

3

4

2

G

1 2

2 1

HT-110UYG-CT_YEL/GRN

ON/OFFBTN#

13

D

Q19

2N7002_SOT23-3

S

D54

ON/OFFBTN# 34

51_ON# 37

2

G

1 3

D

S

D

S

2N7002_SOT23-3

2N7002_SOT23-3 Q20

Q20

ACIN 22,34,37

Remove WiMAX LED control circuit

3 3

< HDD LED >

R546

R546 10K_0402_5%

10K_0402_5%

1 2

+3VS

+3VALW

12

R548

R548 120_0402_5%

120_0402_5%

2 1

D46

D46 HT-110UYG-CT_YEL/GRN

HT-110UYG-CT_YEL/GRN

R550

R550 120_0402_5%WLAN@

120_0402_5%WLAN@

1 2

R770 120_0402_5%R770 120_0402_5%

1 2

A

354

D50

WLAN@ D50

WLAN@

12

HT-110UD_1204_AMBER

D68

1

HT-210UD/UYG_AMB/GRN

+3VS

< WL&BT LED >

< POWER-ON & SUSPEND LED >

4 4

2

6 1

Q18A

Q18A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

Q18B

Q18B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

< Ultra Bright Amber >

3

2

< Ultra Bright Yellow Green >

SATA_LED# 22

WL_BT_LED# 34

PWR_ON_LED# 34

PWR_SUSP_LED# 34

B

< Screw Hole >

H16

H15

1

H21

1

H27

1

H33

1

H39

1

MDC: H30, H31 VGA: H38, H39 CPU: H32, H33, H34, H35 Mini Card : H36, H37 Others: H15, H16, H17, H18, H19, H20, H21, H22, H23, H24, H25, H26, H27, H28, H29, H40, H47

< LID Switch >

+3VALW

1

C645

0.1U_0402_16V4Z

2

+3VALW

1

C646

0.1U_0402_16V4Z

2

H_3P0

@

H_3P0

@

H_3P0

@

H_3P7

@

H_3P7

@

17inch@ U34

17inch@

17inch@C645

17inch@

16inch@ U36

16inch@

16inch@C646

16inch@

H22

H28

H34

H40

H17

H_3P0

1

@

H23

H_3P0

1

@

H29

H_3P1N

H_3P0

1

@

H35

H_3P7

1

@

H_3P1X4P1N

1

@

U34 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

VDD2VOUT

GND

1

10P_0402_50V8J

U36 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

VDD2VOUT

GND

1

10P_0402_50V8J

< EMI reserve >

C199 0.22U_0603_16V4ZC199 0.22U_0603_16V4Z

+5VALW

1 2

C200 0.22U_0603_16V4ZC200 0.22U_0603_16V4Z

1 2

C201 0.22U_0603_16V4ZC201 0.22U_0603_16V4Z

1 2

C202 0.22U_0603_16V4ZC202 0.22U_0603_16V4Z

1 2

C203 0.22U_0603_16V4ZC203 0.22U_0603_16V4Z

1 2

< BATT CHARGE/FULL LED >

1 2

+3VALW

Vf=1.9V(typ),2.4V(max) for amber Vf=2.0V(typ),2.4V(max) for green If=30mA(max)

B

C

< G - Sensor >

H20

H19

H18

H_3P0

1

H24

1

H30

1

H36

1

H41

1

@

3

17inch@ C647

17inch@

3

16inch@ C648

16inch@

R773

R773 120_0402_5%

120_0402_5%

@

H_3P0

@

H_3P2

@

H_3P7

@

H_3P0N

@

FD1@FD1

C647

C648

PCB Fedical Mark PAD

1

@

H26

H25

H_3P0

1

@

H32

H31

H_3P7

H_3P2

1

@

H38

H37

H_3P7

1

@

H42

H47

H_3P0

1

@

FD2@FD2

FD3@FD3

@

1

2

1

2

FD4@FD4

@

1

LID_SW# 34

+3VS_HDP

1

2

1.C199 : U19

2.C200 : PU5

3.Top side of PU12 for noise bounce.

4.C202 : U25

5.C203 : PU9

1.U25

2.Botton side of JWLAN for keep noise return path.

3.Top side of PU12 for noise bounce.

4.Top side of PU5 for noise bounce.

5.U19

< Ultra Bright Amber >

D70

3

1

2

< Ultra Bright Yellow Green >

HT-210UD/UYG_AMB/GRN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1

G@

CG7

0.1U_0402_16V4Z

2

HDPINT34

BATT_FULL_LED# 34

BATT_LOW_LED# 34

2008-09-25 2009-09-25

+5VS +3VS_HDP

2

CG12

G@

1U_0402_6.3V4Z

1

CG649 0.1U_0402_16V4ZG_2nd@ CG649 0.1U_0402_16V4ZG_2nd@

12

CG642 0.1U_0402_16V4ZG_2nd@ CG642 0.1U_0402_16V4ZG_2nd@

12

CG641 0.1U_0402_16V4ZG_2nd@ CG641 0.1U_0402_16V4ZG_2nd@

12

+3VS_HDP

EC_SMB_CK26,19,34

SELF_TEST

G@ RG3

G@

G@ RG4

G@

G@ RG5

G@

CG8

0.1U_0402_16V4Z

HDPINT

G@ RG6

G@

G@ RG7

G@

< Touch/B Connector >

< SW/B Connector >

Compal Secret Data

Deciphered Date

RG3

4.7K_0402_5%

12

RG4

4.7K_0402_5%

12

RG5

4.7K_0402_5%

12

RG6

4.7K_0402_5%

12

RG7 1K_0402_5%

1K_0402_5%

12

TP_CLK34

TP_DATA34

JPOWER

10 GND GND

ACES_85201-1005N_10P@

+3VS_HDP

1

2

3

4

5

6

7

8

9

10 11 12

+5VS

D

G_1st@ UG1

G_1st@

SELF_TEST

G_2nd@ UG4

G_2nd@

VOUTX

VOUTY

VOUTZ

SELF_TEST

UG2

G@ UG2

G@

1

P3_5/SSCK/SCL/CMP1_2

2

P3_7/CNTR0#/SSO/TXD1

3

RESET#

4

XOUT/P4_7

5

VSS/AVSS

6

XIN/P4_6

7

VCC/AVCC

8

MODE

9

P4_5/INT0#/RXD1

10

P1_7/CNTR00/INT10#

R5F211B4D31SP-PLSP0020JB-A

+5VS

ON/OFFBTN# KSO0 EC_PLAYBTN# EC_REVBTN# EC_FRDBTN# EC_MUTEBTN#

D

R689 0_0603_5%@R689 0_0603_5%@

G@

UG3

1

IN

2

GND

SHDN#3BYP

G9191-330T1U_SOT23-5

UG1

Vdd12Voutx

12

Vdd2

4

ST

6

PD

8

FS

9

Rev

TSH35TR_LGA16

UG4

2

XOUT

3

YOUT

4

ZOUT

9

0G-DET

7

SLEEP#

10

G-SELECT

13

ST

MMA7360LR2_LGA14

JTOUCH

1

2

3

4

ACES_85201-0405N_4P@

KSO0 33,34 KSI1 33,34 KSI3 33,34 KSI5 33,34 KSI2 33,34

12

DG1

DG1 CH751H-40PT_SOD323-2G@

CH751H-40PT_SOD323-2G@

21

5

OUT

4

VOUTX

3

VOUTY

5

Vouty

VOUTZ

7

Voutz

10

NC1

11

NC2

14

NC3

15

NC4

16

NC5

1

GND1

13

GND2

6

+3VS_HDP

VDD

1

NC

8

NC

11

NC

12

NC

14

NC

5

VSS

P1_6/CLK0/SSI01

P1_5/RXD0/CNTR01/INT11#

P1_3/KI3#/AN11/TZOUT

P1_2/KI2#/AN10/CMP0_2

P4_2/VREF

P1_1/KI1#/AN9/CMP0_1

P1_0/KI0#/AN8/CMP0_0

P3_3/TCIN/INT3#/SSI00/CMP1_0

P3_4/SCS#/SDA/CMP1_1

JPWR1

ON/OFFBTN#

1

KSO0

2

EC_PLAYBTN#

3

EC_REVBTN#

4

EC_FRDBTN#

5

EC_MUTEBTN#

6

7

8

9

10

11

GND

12

GND

ACES_88514-104N@

Compal Electronics, Inc.

Title

LED/LID/PB/FB/SCREW HOLE

Size Document Number Rev

Custom

Date: Sheet of

+3VS_HDP+3VS

CG14

0.22U_0402_10V4Z@

12

CG1 0.033U_0402_16V7KG_1st@ CG1 0.033U_0402_16V7KG_1st@ CG2 0.033U_0402_16V7KG_1st@ CG2 0.033U_0402_16V7KG_1st@ CG3 0.033U_0402_16V7KG_1st@ CG3 0.033U_0402_16V7KG_1st@

11

12

13

P1_4/TXD0

14

15

16

17

18

19

20

< For EMI >

ON/OFFBTN#

EC_REVBTN#

EC_FRDBTN#

EC_PLAYBTN#

EC_MUTEBTN#

LA-4971P

E

G@

VOUTZ

VOUTX

VOUTY

1 2 1 2 1 2

2

CG13

1U_0402_6.3V4Z

1

G@ RG9

G@

G@ RG10

G@

G@ CG6

G@

1 2

35 45Wednesday, April 22, 2009

1 2

1

2

EC_SMB_DA2 6,19,34

C686

C686 220P_0402_50V7K@

220P_0402_50V7K@

C699

C699 220P_0402_50V7K@

220P_0402_50V7K@

C702

C702 220P_0402_50V7K@

220P_0402_50V7K@

C705

C705 220P_0402_50V7K@

220P_0402_50V7K@

C708

C708 220P_0402_50V7K@

220P_0402_50V7K@

HDPACT 34

RG9 47K_0402_5%

47K_0402_5%

HDPLOC 34

RG10 47K_0402_5%

47K_0402_5%

+3VS_HDP

CG6

0.1U_0402_16V4Z

1.0

< +5VALW TO +5VS >

A

+5VALW

Q35

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

D

1

SI4800BDY_SO8

C864

1 1

4.7U_0805_10V4Z

2

RUNON

+5VS

Inrush current = 0A

1

C833

1U_0402_6.3V4Z

2

1

C835

4.7U_0805_10V4Z

2

< +3VALW TO +3VS >

+3VALW +3VS

Q14

8

D

7

D

6

D

5

D

1

C840

SI4800BDY_SO8

4.7U_0805_10V4Z

2 2

SI4800BDY_SO8

2

< +3VALW TO +3V_LAN >

WOL_EN#

WOL_EN#34

3 3

Inrush current = 0A

1

S

2

1

S

3

S

4

G

2

RUNON

1

C834

0.01U_0402_25V7K

2

+3VALW +3VALW +3V_LAN

R17

100K_0402_5%

1 2

C839

1U_0402_6.3V4Z

R19

R19 47K_0402_5%

47K_0402_5%

12

@ R556

@

1

C838

4.7U_0805_10V4Z

2

R556

10M_0402_5%

2

C194

0.1U_0402_16V7K

1

C182

0.01U_0402_25V7K

2

13

D

Q17

S

2N7002_SOT23-3

2

G

2

B

< close to PQ20, must EMI confirm >

SUSP

R152

R152 750K_0402_1%

750K_0402_1%

12

+5VALW

+3VS

1

2

1

2

C204

0.1U_0402_16V7K

C197

0.1U_0402_16V7K

+VSB

Vgs=-4.5V, Id=3A

Rds<97m ohm

2

PJ29

@ PJ29

@

2

JUMP_43X79

1

Inrush current = 0A

1

C680

1U_0402_6.3V4Z

2

1 3

1

@

2

S

Q38

D

AO3413_SOT23

C679

4.7U_0805_10V4Z

< +1.8V TO +1.8VS >

C

+1.8V

1

2

C842

4.7U_0805_10V4Z

Q4

IRF8736TRPBF_SO8

8 7

5

4

1.8VS_ENABLE

12

R809

10M_0402_5%

1 2 36

< +1.2VALW TO +1.2V_HT >

+1.2VALW

1

2

C847

4.7U_0805_10V4Z

@ R367

@

12

R367

1K_0402_5%

Q11

IRF8736TRPBF_SO8

8 7

5

< Inversion of SYSON, SUSP#, VLDT_EN, EC_ON >

+5VL+5VL +5VL

12

R596

3

4

R596

100K_0402_5%

61

Q142A

Q142A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2

R595

100K_0402_5%

SYSON# SUSP EC_ON#

SYSON#42

Q142B

2N7002DW-7-F_SOT363-6

5

+1.8VS

4

12

SUSP 42

SUSP# 19,27,30,34,39,41SYSON27,34,42

D

Inrush current = 0A

1

C848

1U_0402_6.3V4Z

2

1

C849

0.01U_0402_25V7K

2

1 2 36

R808

10M_0402_5%

2

C841

10U_0805_10V4Z

1

13

D

S

+1.2V_HT

Inrush current = 0A

1

C846

1U_0402_6.3V4Z

2

1

C837

0.01U_0402_25V7K

2

VLDT_EN34

1 2

SUSP

2

G

Q13

Q13 2N7002_SOT23-3

2N7002_SOT23-3

2N7002DW-7-F_SOT363-6

R138

R138 750K_0402_1%

750K_0402_1%

1

C862

4.7U_0805_10V4Z

2

61

100K_0402_5%

VLDT_EN#

VLDT_EN

+VSB

1

+

C876

C876 470U_D2E_2.5VM_R9M

470U_D2E_2.5VM_R9M

2

R233

R233 330K_0402_5%

330K_0402_5%

12

VLDT_EN#

2

Q12A

Q12A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+5VL

12

R597

61

2

Q143A

E

+VSB

12

R598

R598 100K_0402_5%

100K_0402_5%

3

Q143B

2N7002DW-7-F_SOT363-6

5

4

EC_ON 34,35

< Discharge circuit >

+5VS +3VS

R239

470_0805_5%

1 2

13

D

SUSP SUSP SUSP SUSPVLDT_EN# SYSON# SUSP

Q46

2

G

2N7002_SOT23-3

S

4 4

+1.8VS +0.9V

R279

470_0805_5%

1 2

13

D

Q48

2

G

2N7002_SOT23-3

S

A

+1.2V_HT +1.8V

R280

470_0805_5%

1 2 3

Q12B

2N7002DW-T/R7_SOT363-6

5

4

B

+1.2VALW

R368

R284

470_0805_5%

1 2

13

D

Q41

2

G

2N7002_SOT23-3

S

R368

@

2

G

Issued Date

1 2

13

D

S

@

Q42

@

Q42

@

2N7002_SOT23-3

2008-09-25 2009-09-25

C

470_0805_5%

EC_ON# SYSON#

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R288

470_0805_5%

1 2

13

D

Q47

2

G

2N7002_SOT23-3

S

Compal Secret Data

Deciphered Date

R292

470_0805_5%

1 2

13

D

Q49

2

G

2N7002_SOT23-3

S

D

+1.5VS

R293

470_0805_5%

1 2

13

D

Q50

2

G

2N7002_SOT23-3

S

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

+1.1VS

R294

470_0805_5%

1 2

13

D

Q52

2

G

2N7002_SOT23-3

S

DC/DC Circuits

LA-4971P

E

36 45Wednesday, April 22, 2009

1.0

A

PF1

DC301001M80

PJP1

1

+

2

+

PJ1

2

JUMP_43X118@

PJ5

2

JUMP_43X118@

PJ8

2

JUMP_43X39@

PJ11

2

JUMP_43X79@

SINGA_2DW-0005-B03@

PR21

560_0603_5%

1 2

112

3

-

4

-

BATT+

CHGRTCP

51_ON#35

PR22

560_0603_5%

1 2

A

1 1

2 2

+CHGRTC

3 3

+3VALWP +3VALW

(5A,200mils ,Via NO.= 10)

OCP(min) = 7.7A

+5VALWP

(5A,200mils ,Via NO.= 10)

OCP(min) = 7.9A

+VSBP +VSB

4 4

(120mA,40mils ,Via NO.= 1)

(2A,80mils ,Via NO.= 4)

PF1

DC_IN_S1

10A_125V_451010MRL

PD3

12

RLS4148_LL34-2

PR11

200_0603_5%

1 2

PR13

100K_0402_1%

1 2

PR15

22K_0402_1%

RTCVREF

3.3V

12

PC9

PC9 10U_0805_10V4Z

10U_0805_10V4Z

+5VALW

+1.2VALWP +1.2VALW

+0.9V+0.9VP

DC_IN_S2

21

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

N1

12

PC7

0.22U_1206_25V7K

PU2 G920AT24U_SOT89-3

3

IN

OUT

GND

1

2

+1.8VP +1.8V

(8A,320mils ,Via NO.= 16)

OCP(min) = 8.87A

2

( 7A, 280mils , Via NO.=14 )

OCP(min) = 8.45A

2

(5A,200mils ,Via NO.=10)

OCP(min) = 8.51A

2

(2A,80mils ,Via NO.=4)

PQ1

PQ1 TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

N2

2

PJ2

112

JUMP_43X118@

JUMP_43X118@ PJ3

PJ3

112

JUMP_43X118@

PJ6

112

JUMP_43X118@

PJ9

112

JUMP_43X118@

PJ12

112

JUMP_43X79@

12

68_1206_5%

2

12

PR18

PR18 200_0603_5%

200_0603_5%

12

PC10

1U_0805_25V4Z

SMB3025500YA_2P

PC2

100P_0402_50V8J

PR9

13

+NB_CORE+NB_COREP

+1.5VS+1.5VSP

B

PL1

1 2

12

PC3

PC3 1000P_0402_50V7K

1000P_0402_50V7K

VIN

PD2

PD2 RLS4148_LL34-2

RLS4148_LL34-2

1 2

12

PR10

PR10 68_1206_5%

68_1206_5%

VS

12

PC8

0.1U_0603_25V7K

RTC Battery

PBJ1

- +

MAXEL_ML1220T10@

SP093MX0000

PJ23

2

JUMP_43X39@

PJ4

2

VL +5VL

+2.5VSP +2.5VS

JUMP_43X39@

(100mA,40mils ,Via NO.= 2)

PJ7

2

JUMP_43X39@

(0.5A,20mils ,Via NO.= 1)

B

C

VIN

12

PC4

PC4 100P_0402_50V8J

100P_0402_50V8J

0.068U_0402_10V6K

+RTCBATT

12

112

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PC5

+RTCBATT

+VDDNBP +VDDNB+3VLP +3VL

VIN

12

PR3

84.5K_0402_1%

PR5

22K_0402_1%

1 2

12

EN06,40

ACON39

(3A, 120mils, Via NO.= 6)(100mA,40mils ,Via NO.= 2)

PR6

PR6 20K_0402_1%

20K_0402_1%

VL

RB715F_SOT323-3

2

3

PJ10

2

112

JUMP_43X79@

Compal Secret Data

12

100K_0402_1%

1 2

PD5

1000P_0402_50V7K

Deciphered Date

C

PC6

PC6 .1U_0402_16V7K

.1U_0402_16V7K

10K_0402_1%

VIN

PR19

1

PC12

1M_0402_1%

1 2

N1

3

+

2

-

PR8

LM393DG_SO8

12

PR1

8

PU1A

P

1

O

G

LM393DG_SO8

4

12

RTCVREF

3.3V

PD4

RLS4148_LL34-2

PU1B

7

O

1000P_0402_50V7K

GLZ4.3B_LL34-2

N3

12

8

5

P

+

6

-

G

4

PC13

2009/9/252008/9/25

2.2M_0402_5%

12

D

VS

12

PR2

5.6K_0402_5%

12

PD1

12

PR7

PR7 10K_0402_1%

10K_0402_1%

PR4

10K_0402_1%

1 2

PACIN

Vin Detector

High 18.384 17.901 17.430 Low 17.728 17.257 16.976

PR12 1K_1206_5%

1 2

PR14 1K_1206_5%

1 2

PR16 1K_1206_5%

1 2

PR20

12

RTCVREF

PR23

12

10K_0402_1%

PR25

@PR25

@

66.5K_0402_1%

Precharge detector

15.97V/14.84V FOR ADAPTOR

Title

Size Document Number Rev

Date: Sheet of

12

PR17

PR17 499K_0402_1%

499K_0402_1%

12

PR24

12

499K_0402_1%

PR26

PR26 191K_0402_1%

191K_0402_1%

13

D

S

47K_0402_1%

2

G

PQ2

PQ2 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

13

Compal Electronics, Inc.

DCIN & DETECTOR

LA-4971P

D

ACIN 22,34,35

PACIN 39

B+

12

PR27

12

2

PQ3

PQ3 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PC11

PC11 1000P_0402_50V7K

1000P_0402_50V7K

PACIN

+5VALWP

37 46Wednesday, April 22, 2009

0.1

A

1 1

Liverpool

PJP2

10

GND

11 12

GND

13

GND

OCTEK_BTJ-09HA1G_9P

@

Sunderland

PJP3

10

GND

11 12

GND

13

2 2

GND

OCTEK_BTJ-09HA1G_9P

@

BATT_S1

1

2

2 3 4 5 6 77GND 8 9

1 2 3 4 5 6 77GND 8 9

BATT_P3

3

BATT_P4

4

BATT_P5

5

EC_SMDA

6

EC_SMCA

8 9

PR35

PR34

100_0402_1%

BATT_S1

1 2

BATT_P3

3

BATT_P4

4

BATT_P5

5

EC_SMDA

6

EC_SMCA

8 9

PR35 100_0402_1%

100_0402_1%

1 2

12

PR39

PR39 1K_0402_1%

1K_0402_1%

1 2

12

PR32

PR32 1K_0402_1%

1K_0402_1%

6.49K_0402_1%

PR28

1K_0402_1%

PR37

15A_65V_451015MRL

12

PF2

1 2

PR29

47K_0402_1%

B

21

+3VLP

BATT_TEMPA 34

EC_SMB_DA1 18,34

EC_SMB_CK1 18,34

VMB

SMB3025500YA_2P

1 2

12

PC14

PC14 1000P_0402_50V7K

1000P_0402_50V7K

C

PH1 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

VL

8

4

PR38

1 2

P

G

PR31

47K_0402_1%

PU3A

1

O

LM393DG_SO8

12

VL

1 2

PR30

PR30 47K_0402_1%

47K_0402_1%

PL2

BATT+

12

PC15

0.01U_0402_25V7K

100K_0603_1%_TH11-4H104FT

PH2 near main Battery CONN :

BAT. thermal protection at 92 degree C Recovery at 56 degree C

VL

12

PH1

0.1U_0603_25V7K

12

PR36

PC17

13.7K_0402_1%

0.22U_0805_16V7K

PC16

PR33

13.7K_0402_1%

1 2

TM_REF1

12

3

+

2

-

PC18

12

100K_0402_1%

1000P_0402_50V7K

PR40

PR40 100K_0402_1%

100K_0402_1%

PD6

RLS4148_LL34-2

D

ENTRIP1 40

13

D

PQ4

2

SSM3K7002FU_SC70-3

G

S

12

2

G

13

D

PQ5

PQ5 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

ENTRIP2 6,40

PQ6

TP0610K-T1-E3_SOT23-3

PR43

100K_0402_1%

12

PC19

@PC19

@

0.22U_1206_25V7K

3 3

100K_0402_1%

POK40,41

4 4

A

B+

VL

PR47

PR48

1 2

0_0402_5%

1 2

13

2

G

12

PC22

@ PC22

@

.1U_0402_16V7K

PR45

22K_0402_1%

1 2

D

PQ7

PQ7 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

12

13

2

B

+VSBP

12

PC20

@ PC20

@

0.1U_0603_25V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

100K_0603_1%_TH11-4H104FT

0.22U_0805_16V7K

Compal Secret Data

PC21

12

PH2

12

Deciphered Date

C

PR44

13.7K_0402_1%

1 2

PR46

15.4K_0402_1%

TM_REF1

2009/9/252008/9/25

VLVL

PR41

PR41 47K_0402_1%

47K_0402_1%

PR42

47K_0402_1%

5

6

1 2

8

PU3B

+

-

PU3B

P

O

G

LM393DG_SO8

4

PD7

7

Title

Size Document Number Rev

Date: Sheet of

12

RLS4148_LL34-2

Compal Electronics, Inc.

BATTERY CONN / OTP

LA-4971P

D

38 46Wednesday, April 22, 2009

0.1

A

1 3

1 2 36

12

PC27

0.1U_0603_25V7K

2

G

13

P2

1 2 3 6

12

PR50

PR50 200K_0402_1%

200K_0402_1%

12

PR58

PR58 150K_0402_1%

150K_0402_1%

13

D

PQ19

PQ19 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

AO4407A_SO8

4

5600P_0402_25V7K

IREF34

PQ9

8 7

5

PC26

FSTCHG34

0.01U_0402_25V7K

154K_0402_1%

100K_0402_1%

1 2

PC36

1 2

PR68

PR71

100K_0402_1%

1SS355_SOD323-2

.1U_0402_16V7K

CSON

1 2

100P_0402_50V8J@

PC38 .1U_0402_16V7K

ADP_I34

12

PC42

0.01U_0402_25V7K

P3

1 2

10K_0402_1%

1 2

PC29

680P_0402_50V7K@

PC34 6800P_0402_25V7K

PR63 6.81K_0402_1%

12

PQ8

AO4407A_SO8

8

VIN

1 1

2 2

7

5

DTA144EUA_SC70-3

12

PR53

PR53 47K_0402_1%

47K_0402_1%

2

13

D

PQ16

2

SSM3K7002FU_SC70-3

G

S

PACIN37

ACON37

DTC115EUA_SC70-3

ACOFF34

PACIN

ACOFF

PQ12

2

13

4

PQ15

PQ15 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR67

22K_0402_5%

1 2

PQ21

2

CHGVADJ34

3 3

Iada=0~3.947A(75W) CP=3.63A

Iada=0~4.737A(90W)

Iada=0~6.316A(120W)

CP= 92%*Iada

CP mode

Vaclim=2.39*(Rb//152K/(Rt//152K+Rb//152K))

Iinput=(1/PR49)((0.05*Vaclm)/2.39+0.05) where Vaclm=1.09986V, Iinput=3.65A Vaclm=0.7717V, Iinput=4.41A Vaclm=0.4204V, Iinput=5.88A

CC=0.25A~3A

IREF=1.016*Icharge

IREF=0.254V~3.048V

VCHLIM need over 95mV

4 4

CELLS

CELL number

VDD

4

GND Float

3

A

PR49=0.02, PR70=75k, PR73=20kIada=0~3.421A(65W) CP=3.15A

PR49=0.02, PR70=24k, PR73=20k

CP=4.36A

PR49=0.015, PR70=53.6k, PR73=20k

CP=5.81A

PR49=0.015, PR70=8.25k, PR73=26.7k

CHGVADJ=(Vcell-4)/0.10627

Vcell

4V

4.2V

4.35V

-

CHGVADJ

0V

1.882V

3.2935V

2

PR54

PD10

PR57

PC33

1 2

6251VREF

PC37

1 2

0.015_2512_1%

1

2

12

53.6K_0402_1%

1 2

20K_0402_1%

287K_0402_1%

B

PR49

4

3

PQ11 TP0610K-T1-E3_SOT23-3

6251VDD

12

PR59

100K_0402_1%

PR65

47K_0402_1%

1 2

PR70

6251aclim

12

PR73

PR74

1 2

PR75

499K_0402_1%

B

B+

PR203

10_0603_5%

6251_EN CSON

6251VREF

10_0603_5%

DCIN

1 2

13

PR56

100K_0402_1%

2

12

PC28

PU4

1

2.2U_0603_6.3V6K

2

3

4

5

6

7

8

9

10

11

12

ISL6251AHAZ-T_QSOP24

12

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

VDD

ACSET

EN

CELLS

ICOMP

VCOMP

ICM

VREF

CHLIM

ACLIM

VADJ

GND

GLZ4.3B_LL34-2

Issued Date

ACPRN

CSON

CSOP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

DCIN

CSIN

CSIP

@ PD14

@

13

24

23

22

21

20

19

18

17

16

15

14

13

PD14

PL17

HCB4532KF-800T90_1812

1 2

PQ13

PQ13 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PD9

2

1

RB715F_SOT323-3

PC30

@ PC30

@

0.1U_0603_25V7K

DCIN

PC32

0.047U_0603_16V7K

1 2

PR61

20_0603_5%

PC35

0.1U_0603_25V7K

1 2

LX_CHG

DH_CHG

PR69

2.2_0603_5%

BST_CHG

1 2

6251VDDP

DL_CHG

1 2

VIN

PR171

309K_0402_1%

12

PR172

47K_0402_1%

2008/9/25 2009/9/25

FSTCHG

2

3

12

PR60

20_0603_5%

1 2

PR62

20_0603_5%

1 2

PR64

2.2_0603_5%

0.1U_0603_25V7K

BST_CHGA

12

PD12

PD12 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

PC43

4.7U_0805_6.3V6K

12

C

CSIN

CSIP

PC23

SUSP# 19,27,30,34,36,41

CSOP

12

PC39

12

6251VDD

PR72

4.7_0603_5%

PR202

10K_0402_1%

1 2

12

PC130

.1U_0402_16V7K

Compal Secret Data

Deciphered Date

C

D

PQ10

AO4407A_SO8

1 2

13

PL3

1 2

3 6

1 2 3 6

PR51

47K_0402_1%

1 2

1SS355_SOD323-2

2

1 2

1SS355_SOD323-2

0.1U_0603_25V7K

CHG

CHG_B+

12

PC24

10U_1206_25V6M

PR52

10K_0402_1%

PQ14

DTC115EUA_SC70-3

578

PQ18

PQ18 AO4466_SO8

AO4466_SO8

10U_LF919AS-100M-P3_4.5A_20%

3 6

578

3 6

241

PQ20

PQ20 AO4466_SO8

AO4466_SO8

12

PR170

4.7_1206_5%

12

PC129

PC129 680P_0603_50V7K

680P_0603_50V7K

4

PD8

1 2

PD11

PC31

PR66

0.02_2512_1%

1

2

PQ45

@PQ45

@

AO4407A_SO8

VIN

200K_0402_1%

1 2

12

8 7

5

8 7

5

ACOFF

PR55

13

D

S

SSM3K7002FU_SC70-3

4

3

90W 4407A*1 120W 4407A*2

VIN

PACIN

2

G

PQ17

12

PC40

10U_1206_25V6M

BATT+

12

PC41

10U_1206_25V6M

ADP_V 34

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

CHARGER

LA-4971P

D

39 46Wednesday, April 22, 2009

0.1

5

4

3

2

1

AO4712 Rds(on) = 15/18

3.3VALWP Imax = 5A

D D

Ipeak = 7A Iocp = 8.59A

OCP = 7.94A

PL18

HCB4532KF-800T90_1812

1 2

B+

C C

B B

A A

B++

12

PC48

PC49

4.7U_1206_25V6K

2200P_0402_50V7K

+3VALWP

ESR=15m

SSM3K7002FU_SC70-3 G

SSM3K7002FU_SC70-3

VL

VS

PC50

4.7U_1206_25V6K

1 2

PR90

100K_0402_1%

12

PC54

4.7U_LF919AS-4R7M-P3_5.2A_20%

1 2

1

+

2

680P_0603_50V7K

220U_6.3VM_R15

13

D

PQ26

2

G

S

12

PR89

100K_0402_1%

12

PR91

49.9K_0402_1%

PL5

@ PR84

@

4.7_1206_5%

@ PC56

@

2

G

PQ23

PQ23 AO4466_SO8

AO4466_SO8

12

PR84

12

PC56

2

G

13

D

PQ28

PQ28 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

3 6

241

3 6

241

13

D

PQ27

PQ27 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

578

PQ24

PQ24 AO4712_SO8

AO4712_SO8

ENTRIP2 6,38ENTRIP1 38

0.1U_0402_16V7K

EN06,37

B+

PC51

+3VLP

12

4.7U_0805_10V6K

PC52

1 2

0_0603_1%

f = 305kHz

PR86

499K_0402_1%

1 2

2VREF_51125

12

PC44

0.22U_0603_10V7K

PR77

20K_0402_1%

1 2

3

1

2

VFB1

VREF

VREG517GND

VIN16SKIPSEL

18

12

PC58

12

PC59

0.1U_0603_25V7K

PR77

30K_0402_1%

1 2

PR79

PR81

150K_0402_1%

ENTRIP1

1 2

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

VCLK

TPS51125RGER_QFN24_4X4

VL

4.7U_0805_10V6K

BST_5V

UG_5V

LX_5V

LG_5V

PC45

PR83

1 2

0_0603_1%

B++

12

2200P_0402_50V7K

POK 38,41

0.1U_0402_16V7K

1 2

f = 245kHz

PR76

13K_0402_1%

1 2

PR78

20K_0402_1%

1 2

PR80

ENTRIP2

150K_0402_1%

1 2

4

5

6

PU5

25

P PAD

VFB2

TONSEL

ENTRIP2

7

VO2

8

BST_3V

UG_3V

LX_3V

LG_3V

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

EN0

15

14

13

1 2

PR88

0_0402_5%@

B++

PR82

12

PR87

100K_0402_1%

2VREF_51125

PC53

12

PC46

4.7U_1206_25V6K

5VALWP Imax = 5A Ipeak = 7A Iocp = 8.59A

12

PC47

4.7U_1206_25V6K

PQ25

AO4712_SO8

578

3 6

578

3 6

241

AO4466_SO8

PQ22

PL6

4.7U_LF919AS-4R7M-P3_5.2A_20%

1 2

12

PR85

@ PR85

@

4.7_1206_5%

12

PC57

@ PC57

@

680P_0603_50V7K

1

+

2

ESR=15m

+5VALWP

PC55

220U_6.3VM_R15

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2008/9/25 2009/9/25

Deciphered Date

2

Compal Electronics, Inc.

Title

3VALWP/5VALWP

Size Document Number Rev

Custom

Date: Sheet of

LA-4971P

Wednesday, April 22, 2009

1

40 46

0.1

5

D D

PR93

33K_0402_1%

1 2

SUSP#19,27,30,34,36,39

+5VALW

C C

B B

A A

POK38,40

+5VALW

PR96

422_0603_1%

1 2

1U_0603_10V6K

PR101

1 2

0_0402_5%

PR104

422_0603_1%

1 2

1U_0603_10V6K

12

PC62

PC62 .1U_0402_16V7K

.1U_0402_16V7K

12

PC65

12

PC71

@PC71

@

.1U_0402_16V7K

12

PC74

PC68

@ PC68

@

47P_0402_50V8J

1 2

PR98

9.53K_0402_1%

1 2

12

PR99

20.5K_0402_1%

PC77

@PC77

@

47P_0402_50V8J

1 2

PR106

12.1K_0402_1%

1 2

12

PR107

20.5K_0402_1%

4

PR92

255K_0402_1%

1 2

1

PU6

2

TON

EN_PSV

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

GND7PGND

PR100

255K_0402_1%

1 2

1

PU7

2

TON

EN_PSV

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

GND7PGND

PR94

0_0603_1%

1 2

14TP15

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

8

PR102

0_0603_1%

1 2

14TP15

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

8

DH_NB

LX_NB

1 2

PR97

15.4K_0402_1%

DL_NB

DH_1.2V

LX_1.2V

1 2

PR105

15.4K_0402_1%

DL_1.2V

BST_NB

BST_1.2V

3

PC63

1 2

0.1U_0603_25V7K

+5VALW

12

PC67

4.7U_0805_10V6K

PC72

1 2

0.1U_0603_25V7K

+5VALW

12

PC76

4.7U_0805_10V6K

AO4466_SO8

AO4712_SO8

AO4466_SO8

AO4712_SO8

2

PL19

HCB4532KF-800T90_1812

NB_B+

1 2

12

PC61

PC60

578

PQ29

3 6

241

578

PQ30

3 6

241

578

PQ31

3 6

241

578

PQ32

3 6

241

PC60

4.7U_1206_25V6K

PL7

1.8UH_SIL104R-1R8PF_9.5A_30%

1 2

12

PR95

4.7_1206_5%

12

PC66

680P_0603_50V7K

1.2V_B+

12

PC70

PC69

4.7U_0805_25V6-K

PL8

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

12

PR103

4.7_1206_5%

12

PC75

680P_0603_50V7K

PC173

100U_25V_M

1

+

PC64

2

220U_6.3VM_R15

PL20

HCB4532KF-800T90_1812

1 2

1

+

2

1

+

PC73

2

220U_6.3VM_R15

B+

+1.1V

+NB_COREP

+1.2VALWP

B+

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/9/25 2009/9/25

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

NB_COREP/1.2VALWP

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

LA-4971P

41 46Wednesday, April 22, 2009

1

0.1

5

D D

SYSON27,34,36

+5VALW

C C

+3VS +1.8V

1

PJ17

1

JUMP_43X79@

2

PR116

1.2K_0402_1%

PR118

13

D

1K_0402_1%

PQ35

S

SSM3K7002FU_SC70-3

12

PC87

4.7U_0805_6.3V6K

B B

PR120

0_0402_5%

SUSP

1 2

.1U_0402_16V7K

@PC95

@

1 2

2

G

12

PC95

PR109

0_0402_5%

1 2

PR112

422_0603_1%

1 2

1U_0603_10V6K

PC92

.1U_0402_16V7K

PC83

12

4

12

@ PC80

@

.1U_0402_16V7K

12

PC93

PC93 10U_0805_6.3V6M

10U_0805_6.3V6M

PC80

PC85

@ PC85

@

47P_0402_50V8J

1 2

PR114

28.7K_0402_1%

1 2

12

PR115

20.5K_0402_1%

PU9

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

+1.5VSP

3

PQ33

AO4466_SO8

PC81

1 2

0.1U_0603_25V7K

+5VALW

12

PC86

4.7U_0805_10V6K

PR121

0_0402_5%

1 2

@PC96

@

.1U_0402_16V7K

PQ34

AO4712_SO8

PC89

4.7U_0805_6.3V6K

12

PC96

2

G

PR108

255K_0402_1%

1 2

1

PU8

2

TON

EN_PSV

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

GND7PGND

6

5

NC

7

NC

8

NC

9

TP

12

PC88

PC88 1U_0603_6.3V6M

1U_0603_6.3V6M

+5VALW

PR110

0_0603_1%

1 2

14TP15

VBST

13

DRVH

12

LL

11

1 2

TRIP

PR113

15.4K_0402_1%

10

V5DRV

DL_1.8VP

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

8

SYSON#36SUSP36

DH_1.8VP

LX_1.8VP

BST_1.8VP

578

3 6

241

578

3 6

241

1

PJ18

1

JUMP_43X79@

2

12

1K_0402_1%

13

D

1K_0402_1%

PQ36

S

SSM3K7002FU_SC70-3

2

51117_B+

12

PC78

4.7U_1206_25V6K

PL9

1.8UH_SIL104R-1R8PF_9.5A_30%

1 2

12

PR111

4.7_1206_5%

12

PC84

680P_0603_50V7K

12

PR117

12

PR119

PC91

.1U_0402_16V7K

12

PC79

4.7U_1206_25V6K

12

PL21

HCB4532KF-800T90_1812

1 2

1

+

PC82

2

220U_6.3VM_R15

PU10

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

+0.9VP

12

PC94

PC94 10U_0805_6.3V6M

10U_0805_6.3V6M

1

B+

+1.8VP

6

5

NC

7

NC

8

NC

9

TP

12

PC90

PC90 1U_0603_6.3V6M

1U_0603_6.3V6M

+3VALW

PU11

APL5508-25DC-TRL_SOT89-3

PC97

APL5508-25DC-TRL_SOT89-3

2

12

3

IN

OUT

GND

1

12

4

+2.5VSP

PC98

4.7U_0805_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/9/25 2009/9/25

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

1.8VP/0.9VP/1.5VSP2.5VSP

Size Document Number Rev

Date: Sheet of

LA-4971P

42 46Wednesday, April 22, 2009

1

0.1

PJ19

+3VS

A A

2

112

JUMP_43X39@

1U_0603_10V6K

5

A

12

CPU_VDD1_RUN_FB_H6

PR131

PR131 0_0402_5%

0_0402_5%

+5VS

CPU_B+

12

PR132

PR132 105K_0402_1%@

105K_0402_1%@

12

PR137

PR137 105K_0402_1%@

105K_0402_1%@

ISL6265_PWROK

12

PR142

0_0402_5%

12

PC123

1000P_0402_50V7K

PR164

6.81K_0402_1%

12

PR144

1 1

+5VS +3VS

12

PR135

PR135 10K_0402_1%@

PR139 0_0402_5%@ PR139 0_0402_5%@

PR140 0_0402_5%

4.02K_0402_1%

12

PC122

180P_0402_50V8J

PR163

PR168

36.5K_0402_1%@

10K_0402_1%@

PR146

12

CPU_VDD0_RUN_FB_H6

CPU_VDD0_RUN_FB_L6

CPU_VDD1_RUN_FB_L6

VW0

COMP0

12

PC127

12

1200P_0402_50V7K

PR134

105K_0402_1%

2 2

H_PWRGD6,20

SB_PWRGD21,34

3 3

255_0402_1%

4 4

VR_ON34

PR160

CPU_SVD6 CPU_SVC6

DIFF_0

PC121

4700P_0402_25V7K

12

PR162

1K_0402_5%

VGATE34

113K_0402_1%

12

A

PR145

54.9K_0402_1%

12

1 2

FB_0

PR123

2_0603_5%

1 2

0.1U_0603_16V7K

1 2

PR128

2_0603_5%

PC109

0.1U_0603_25V7K

1

2

3

4

5

12

6

7

8

9

10

11

12

PR149

0_0402_5%

12

PR151 0_0402_5%

+1.8V

B

PC105

PU12

OFS/VFIXEN

PGOOD

PWROK

SVD

SVC

ENABLE

RBIAS

OCSET

VDIFF0

FB0

COMP0

VW0

ISP0 ISN0

VSEN0

0_0402_5%

RTN1

12

255_0402_1%

B

12

48

13

PR150

PR173

@ PR173

@

1 2

10K_0402_1%

PR161

47

VIN

VCC

ISP0

14

RTN0

12

0_0402_5%

DIFF_1

PC124

4700P_0402_25V7K

12

PR165

1K_0402_5%

46

15

PR157

FB_NB

PC99

33P_0402_50V8K

12

PR122

44.2K_0402_1%

1000P_0402_50V7K

PC104

1000P_0402_50V7K

12

PR126

22K_0402_1%

PR129

0_0402_5%

41

42

43

44

45

RTN_NB

FSET_NB

VSEN_NB

COMP_NB

ISL6265HRTZ-T_QFN48_6X6

VDIFF119RTN117VSEN0

RTN016ISN0

18

VSEN1

12

180P_0402_50V8J

PR166

12

54.9K_0402_1%

12

PR169

36.5K_0402_1%@

C

1 2

PC106

CPU_VDDNB_RUN_FB_L 6

UGATE0

PHASE0

PR138

0_0603_1%

BOOT0

1 2

0.22U_0603_10V7K

12

PC115

PC115 1U_0603_10V6K

1U_0603_10V6K

UGATE1

PHASE1

PR152

0_0603_1%

BOOT1

1 2

0.22U_0603_10V7K

578

PQ37

PQ37 AO4466_SO8

AO4466_SO8

3 6

241

578

PQ38

AO4712_SO8

3 6

241

1 2

PC112

4

LGATE0

1 2

PC118

4

LGATE1

Compal Secret Data

Deciphered Date

12

PC102

12

PR130

9.09K_0402_1%

12

38

39

40

BOOT_NB

PGND_NB

LGATE_NB

UGATE_NB37PHASE_NB

OCSET_NB

UGATE0

PHASE0

LGATE0

LGATE1

PHASE1

UGATE1

VW1

COMP121ISP1

FB120VSEN1

ISN1

22

23

24

ISN1

ISP1

VW1

COMP1FB_1

12

PC125

PC128

12

1200P_0402_50V7K

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PHASE_NB

LGATE_NB

PHASE_NB

UGATE_NB

PR133

0_0402_5%

36

35

BOOT0

34

33

32

PGND0

31

30

PVCC

29

28

PGND1

27

26

25

BOOT1

TP

49

PC126

1000P_0402_50V7K

PR167

6.81K_0402_1%

Issued Date

UGATE_NB

PHASE_NB

PR124

2.2_0603_1%

BOOT_NB

1 2

LGATE_NB

CPU_VDDNB_RUN_FB_H 6

12

BOOT_NB

BOOT0

UGATE0

PHASE0

LGATE0

LGATE1

PHASE1

UGATE1

BOOT1

12

2008/9/25 2009/9/25

C

0.22U_0603_10V7K

+5VS

CPU_B+

1

12

+

PC100

PC103

220U_25V_M

2

10U_1206_25V6M

4.7U_LF919AS-4R7M-P3_5.2A_20%

12

PR125

4.7_1206_5%

12

PC108

PC108 680P_0603_50V7K

680P_0603_50V7K

PQ39

PQ39 TPCA8023-H_SO8

TPCA8023-H_SO8

3 5

241

PQ40

@ PQ40

@

123 5

TPCA8028-H_SOP-ADVANCE8-5

PQ42

PQ42 TPCA8023-H_SO8

TPCA8023-H_SO8

3 5

241

PQ43

123 5

TPCA8028-H_SOP-ADVANCE8-5

D

1

+

PC101

220U_25V_M

2

PL11

1 2

4

PC116

4

D

PL10

HCB4532KF-800T90_1812

1 2

1

+

2

12

PC111

PC110

4.7U_0805_25V6-K

PQ41

123 5

TPCA8028-H_SOP-ADVANCE8-5

12

PC171

PC117

4.7U_0805_25V6-K

PQ44

123 5

TPCA8028-H_SOP-ADVANCE8-5@

E

12

PC131

0.1U_0402_25V4K

PC107

PC107 220U_D2_4VM

220U_D2_4VM

12

PC169

4.7U_0805_25V6-K

12

PR141

4.7_1206_5%

12

PC113

PC113 680P_0603_50V7K

680P_0603_50V7K

CPU_B+

+CPU_CORE_0 +CPU_CORE_1

12

PC172

4.7U_0805_25V6-K

12

PR155

4.7_1206_5%

12

PC119

PC119 680P_0603_50V7K

680P_0603_50V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

PC134

PC133

PC132

PC170

0.1U_0402_25V4K

+VDDNBP

CPU_B+

12

4.7U_0805_25V6-K

PL12

0.36UH_PCMC104T-R36MN1R17_30A_20%

1

2

PR143

3.65K_0402_1%

1 2

PC114

0.1U_0603_16V7K

PR147

47K_0402_1%

ISP0

2

PL13

0.36UH_PCMC104T-R36MN1R17_30A_20%

1

2

PR156

3.65K_0402_1%

1 2

PC120

0.1U_0603_16V7K

PR159

47K_0402_1%

ISP1

Compal Electronics, Inc.

PC135

PC136

0.1U_0402_25V6

0.1U_0402_25V4K

4

3

12

ISN0

PJ20

112

JUMP_43X118@

PJ21

112

JUMP_43X118@

4

3

12

ISN1

+CPU_CORE

LA-4971P

E

12

PC137

0.1U_0402_25V6

+CPU_CORE_0

+CPU_CORE_1

43 46Wednesday, April 22, 2009

B+

12

PC138

0.1U_0402_25V6

EMC

0.1

A

Add PR710 and PC709

Version Change List ( P. I. R. List ) for Circuit

Version Change List ( P. I. R. List ) for CircuitVersion Change List ( P. I. R. List ) for Circuit

Page#

Item

Page#Page#

ItemItem

1. 2009/02/23 --> change R70, R77 from 4.7K to 2.2K

1 1

2. 2009/02/23 --> change R178 from 4.7K to 47K

3. 2009/02/26 --> change SPI ROM from SST to MXIC

4. 2009/02/26 --> change D36 from ROHM to PANJI

5. 2009/02/27 --> change the footprint of T9, T10, T11, T12, T19, T20 from TPC12 to TPC24

6. 2009/02/27 --> change 5V power of LCD connector

7. 2009/03/02 --> unmount R556

8. 2009/03/04 --> change RA16 from 5% to 1%

9. 2009/03/10 --> change R146 from 100k ohm to 10k ohm

10. 2009/03/10 --> change Y2 from SJ114P3M730 to SJ114P3MG00

11. 2009/03/11 --> change C686, C699, C702, C705, C706, C708, CA27 from SE074221K00SE to SE074221K80 for Green part

12. 2009/03/11 --> change LAN_WAKE# & EC_SWI#

13. 2009/03/11 --> unmount USB sleep & charge, add R97 & R98

14. 2009/03/11 --> unmount HDMI CEC controller and related components.

15. 2009/03/11 --> connect USB_OC#0 to LAN_WAKE# through 0 ohm

16. 2009/03/12 --> change H42 from NPH to PH

2 2

17. 2009/03/12 --> add PR203 10Ohm

18. 2009/03/24 --> change F2 footprint to F_MINISMDC110F-2

19. 2009/03/24 --> Add R370 & R381

20. 2009/03/24 --> change R557’s BOM structure from H@ to @

21. 2009/03/24 --> change R440 from 0 ohm to 100k ohm

22. 2009/03/31 --> Replace PJ13, PJ30, PJ14, PJ15, PJ16 by PL17, PL18, PL19, PL20, PL21

23. 2009/04/02 --> Add R969 on E51_TXD

24. 2009/04/02 --> Modify +HDMI_5V_OUT Circuit Remove Q159, R160, Q26, R557, C876 and add D19

25. 2009/04/02 --> Change R440 from 100k to 0 for Askey BT Reset

26. 2009/04/02 --> Change C480's BOM Stuucture from BT@ to @

27. 2009/04/06 --> Change SW5's BOM Stuucture to @ for MP

28. 2009/04/06 --> Add C876 for Power noise issue

29. 2009/04/06 --> Add D20 for Power issue

30. 2009/04/17 --> Change D12's BOM Stuucture to @

31. 2009/04/22 --> Change C876 & C234 from 330u to 470u (SGA00001U00) for Power noise issue

3 3

Title

TitleTitle

Date

DateDate

B

Request

RequestRequest Owner

Owner

OwnerOwner

Issue Description

Issue DescriptionIssue Description

C

Solution Description

Solution DescriptionSolution Description

D

E

Rev.

Rev.Rev.

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/9/25 2009/9/25

C

5212

Compal Secret Data

Deciphered Date

1/2VGA_CORE

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

List History

LA-4971P

E

1.0

44 45Wednesday, April 22, 2009

1.0

for EMI requsetCompal

5

4

HW4 Product Improvement Record (P.I.R.)

3

2

1

< Liverpool & Sunderland >

D D

< R1 for customer BOM STRUCTURE > < R3 for mass production BOM STRUCTURE >

RS780MN

RS780MC

RX781

C C

SB700

U3

RS780MN R1RS780MNR1@U3RS780MN R1RS780MNR1@

U3

RS780MC R1RS780MCR1@U3RS780MC R1RS780MCR1@

U3

RX781 R1RX781R1@U3RX781 R1RX781R1@

U15

SB700R1SB700R1@

RS780MN

RX781

U3

RS780MN R3RS780MNR3@U3RS780MN R3RS780MNR3@

U3

RX781 R3RX781R3@U3RX781 R3RX781R3@

< Tigris >

< R1 for customer BOM STRUCTURE >

RS880MN

RS880MC

RX881

U3

RS880MN R1RS880MNR1@U3RS880MN R1RS880MNR1@

U3

RS880MC R1RS880MCR1@U3RS880MC R1RS880MCR1@

U3

RX881 R1RX881R1@U3RX881 R1RX881R1@

U15

SB710 R1SB710R1@

< R3 for mass production BOM STRUCTURE >

RS880MN

RS880MC

RX881

SB710SB710

< DC Jack >

PJP1

DC-IN

B B

DC-IN

PJP1

PJP116inch_45@

PJP1

PJP117inch_45@

Use MEMO : change UG1 R5F211B4D31SP (SA000037Y60) to R5F211B4D34SP (SA00003A600)

< PCB >

ZZZ

PCB

ZZZ

PCB 075 LA-4971P LS-4971P/4972P/4973P REV1.0 M/B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2009-09-252008-09-25

2

Title

Size Document Number Rev

Date: Sheet of

PIR

45 45Wednesday, April 22, 2009

1

1.0

Toshiba Satellite L500D, Compal LA-4971P KSWAE, Liverpool 10AR, Liverpool 10ARG Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual