Toshiba Satellite L50 Schematics
5
4
3
2
1
SYSTEM PAGE REF.
01. Block Diagram
02. System Setting
03. CPU(1)_DMI,DP,PEG,FDI
04. CPU(2)_CLK,MSIC,JTAG
05. CPU(3)_DDR3
06. CPU(4)_PROCRSSOE POWER
07. CPU(5)_GRAPHIC POWER
08. CPU(6)_GND
09. CPU(7)_RESERVED
D D
10. CPU_PCH_XDP
16. DDR3(1)_SO-DIMM0
17. DDR3(2)_SO-DIMM1
18. DDR3(3)_CA/DQ Voltage
20. PCH(1)_SATA,IHDA,RTC,LPC
21. PCH(2)_PCIE,CLK,SMB,PEG
22. PCH(3)_FDI,DMI,SYS PWR
23. PCH(4)_DP,LVDS,CRT
24. PCH(5)_PCI,NVRAM,USB
25. PCH(6)_CPU,GPIO,MISC
26. PCH(7)_POWER,GND
27. PCH(8)_POWER,GND
28. PCH(9)_SPI,SMB
30. EC_IT8587E/CX(1)
31. EC_IT8587E/CX(2)KB,TP,FP
32. RST_Reset Circuit
33. LAN_QCA8171/72
34. LAN_RJ45
36. AUD(1)_92HD99
37. AUD(2)_JACK
40. CB(1)_AU6465
44. BUG_Debug
C C
45. CRT(1)_LVDS
46. CRT(2)_D-Sub
48. TV(1)_HDMI
50. FAN_Fan,Sensor
51. XDD_HDD,ODD
52. USB_USB Port
53. MINICARD_WLAN / mSTAT
56. LED_Indicator
57. DSG_Discharge
58. G-sensor
59. CIR
60. DC_DC/BAT CONN
61. Touch Panel
65. ME_CONN,Skew Hole
66. PWR BRD/IO BRD
70. VGA_Main (1)
71. VGA_Main (2)
72. VGA_VRAM CH A
73. VGA_VRAM CH B
74. VGA_MEMORY INTERFACE
75. VGA_POWER (1)
76. VGA_POWER (2)
77. VGA_THERMAL SENSOR
B B
78. VGA_STRAP
80_POWER_VCORE&VGFX
81_POWER_SYSTEM
82_POWER_+VCCP
83_POWER_DDR & VTT
84_POWER_+1.8VS
87_POWER_+VGA_CORE(DSC)
88_POWER_CHARGER(ISL88731)
90_POWER_DETECT
91_POWER_LOAD SWITCH
92_POWER_PROTECT
93_POWER_SIGNAL
94_POWER_FLOWCHART
95. POWER_ HISTORY
97. SYSTEM_HISTORY
98. Power On Sequence
99. Power On Timing
A A
10FTG 15" CHIEF RIVER Schematics Rev 1.1
BLOCK DIAGRAM
CPU
Ivy Bridge BGA (17W)
PCH
Panther Point
Page 20~28
PCIE *1
SATA
USB2.0
PCIE *1
SATA 3.0
DDR3 1333/1600 MHz
Page 3~11
DDR3 SO-DIMM
USB2.0
USB2.0
USB2.0
USB2.0
USB3.0
USB2.0
USB3.0
PCIE *1
USB2.0
ATHEROS
QCA8171_Giga
QCA8172_10/100
Card Reader
Alcor AU6465
Page 40
mSATA/SSD
Page 53
Page 16~18
Camera
Page 45
USB PORT9
Page 52
USB PORT3
Page 52
USB20 PORT1
USB30 PORT2
USB20 PORT0
USB30 PORT1
Page 52
Page 52
MiniCard
WLAN/WMAX
BT combo
Page 53
RJ45
wo/LED
eDP Panel
CRT
K/B
Page 31
T/P
Page 31
FAN
Page 50
Page 38
Head Phone
(Combo Jack)
Page 45
1G/2G DDR3
VRAM * 8
HDMI
Page 48
Page 46
DMIC
Page 45
NVIDIA
N14P-GV2
Page 70~79
Page 44
Debug Conn.
EC
IT8587E/CX
Page 30
SPI ROM
4MB (BIOS/EC)
Azalia Codec
IDT/ID92HD99
PCIE*8
eDPx2
DDC
LPC
HSPI
Page 28
Azalia
Page 36
SATA HDD
Page 51
SATA ODD
Page 51
2in1
POWER
CPU VCORE
SYSTEM, +3V, +5V
+1.05VS
DDR & VTT
1.8VS
SMART CHARGER
POWER DETECT
LOAD SWITCH
POWER PROTECT
Page 80
Page 81
Page 82
Page 83
Page 84
Page 88
Page 90
Page 91
Page 92
VGA POWER
GPU VCORE
+1.05VS_VGA
+1.5VS_VGA
+3VS_VGA
+12VS_VGA
LOAD SWITCH
POWER PROTECT
Page 87
Page 91
Page 91
Page 91
Page 91
Page 91
Page 92
Discharge Circuit
Page 57
Reset Circuit
5
Page 32
4
DC & BATT. Conn.
Page 60
Skew Holes
Page 65
Title :
Title :
Title :
Block Diagram
Block Diagram
Block Diagram
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept.5
BG1-CSC-HW R&D Dept.5
BG1-CSC-HW R&D Dept.5
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Jim3_Liu
1104Tuesday, December 11, 2012
1104Tuesday, December 11, 2012
1104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
PCH_CPT
GPIO
D D
C C
B B
A A
PCH_CPT
GPIO
GPIO 00
GPIO 01
GPIO 02
GPIO 03 EXT PUSATA_ODD_DA#
GPIO[4:5]
GPIO 06
GPIO 07
GPIO 08
GPIO 09
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO 40
GPIO 41
GPIO 42
GPIO 43
GPIO 44
GPIO 45
GPIO 46
GPIO 47
GPIO 48
GPIO 49
GPIO 50
GPIO 51
GPIO 52
GPIO 53
GPIO 54
GPIO 55
GPIO 56
GPIO 57
GPIO 58
GPIO 59
GPIO 60
GPIO 61
GPIO 62
GPIO 63
GPIO 64
GPIO 65
GPIO 66
GPIO 67
GPIO 68
GPIO 69
GPIO[70:71]
GPIO 72
GPIO 73
GPIO 74 SML1_ALERT#
5
ID PX/UMA,DSC
ID STD/EN
ID Pre/Main
ID USB3.0
ID Speaker
ID Sleep & Music
Clear PWD
WLAN
ID 17W/35W/45W
LAN
ID HDMI SKU
ID Speaker
ID 17W/35W/45W
ID zero Power ODD
ID eDP/LVDS
Signal Name
PCB_ID4 +3VS
PCB_ID6
MPC_PWR_CTRL#
EXTTS_SNI_DRV[0:1]_PCH
PCB_ID7
PCB_ID3
BT_ON/OFF#
ONKYO_DET1
GPIO13
DGPU_PWROK
CLK_REQ1#
PCB_ID8 +3VS
WLAN_LED
CLK_REQ_LAN#
PM_CLKRUN#
PCB_ID2
PCB_ID0
PCB_ID1
CLK_REQ5#
PCB_ID9
DGPU_HOLD_RST#
PCB_ID12
CLK_REQ_PEG_B#
WLAN_ON
SML1_CLK
SUSCLK
CLK_USB48_CR
BATLOW#
CLK_REQ0# +3VSUS_ORGEXT PU
SML1_DATGPIO 75
4
Internal &
External
Pull-up/down
EXT PU REV PD
EXT PU REV PD
EXT PU
EXT PU REV PD
EXT PU REV PD
EXT PU REV PD
EXT PUEXT_SCI#
EXT PU +3VSUS_ORG
EXT PU REV PD
REV PDBBS_BIT0
EXT PU REV PDCLK_REQ_WLAN#
EXT PD REV PU
EXT PD
TEST POINTGPIO23
EXT PUGPIO24
PDGPIO27
REV PDPLL_ODVR_EN
EXT PUME_SUSPWRDNACK
TEST POINTHDA_DOCK_EN#
EXT PU REV PD
EXT PD REV PUFDI_OVRVLTG
EXT PD REV PU +3VS
EXT PD REV PU +3VS
EXT PUGPIO42
EXT PU REV PD
EXT PU REV PD
REV PDBBS_BIT1
EXT PD REV PU
REV PDSTP_A16OVR
TEST POINTPM_SUS_STAT#
TEST POINT
TEST POINTSLP_S5#
TEST POINTGPIO66
EXT PD REV PUDGPU_PRSNT#
EXT PDTV_DET
EXT PU
EXT PU
4
PowerUse As
+3VS
+3VSEXT PU REV PD
+3VS
+3VS
+3VS
+3VS
+3VSUS_ORGEXT PU
+3VSUS_ORGEXT PU
+3VSUS_ORGPCB_ID11
+3VSUS_ORG
+3VSUS_ORGEXT PUGPIO12
+3VSUS_ORGPCB_ID10
+3VSUS_ORGEXT PUEXT_SMI#
+3VSGPIO16
+3VSEXT PU REV PD
+3VSEXT PU
+3VS
+3VS
+3VS
+3VS
+3VSUS_ORG
+3VSUS_ORGEXT PU REV PD
+3VSUS_ORGEXT PUCLK_REQ4#
+3VSUS_ORG
+3VSUS_ORG
+3VSUS_ORGREV PUGPIO29
+3VSUS_ORG
+3VSUS_ORGEXT PUME_AC_PRESENT
+3VSEXT PU
+3VS
+3VS
+3VSEXT PUCRT_IN#
+3VSEXT PUSATA_ODD_PRSNT#_R
+3VS
+3VSUS_ORGEXT PUGPIO40
+3VSUS_ORGEXT PUGPIO41
+3VSUS_ORG
+3VSUS_ORGEXT PUHARMAN_DET2
+3VSUS_ORGEXT PU
+3VSUS_ORGEXT PUCLK_REQ6#
+3VSUS_ORGEXT PUCLK_REQ7#
+3VSUS_ORGEXT PU REV PDCLKREQ_PEG#
+3VS
+3VSPCB_ID5
+3VSEXT PU
+3VS
+3VS
+3VSREV PUKB_LED_ID
+3VSEXT PUDGPU_PWR_EN
+3VS
+3VSUS_ORGEXT PU
+3VSUS_ORG
+3VSUS_ORGEXT PU
+3VSUS_ORGEXT PUGPIO59
+3VSUS_ORGEXT PUDRAMRST_CNTRL_PCH
+3VSUS_ORG
+3VSUS_ORG
+3VSUS_ORG
+3VSREV PUDGPU_EDID_SELECT#
+3VS
+3VS
+3VS
+3VSEXT PUSATA_ODD_PWRGT
+3VS
+3VSGPIO[70:71]
+3VSUS_ORGEXT PU& TP
+3VSUS_ORG
+3VSUS_ORGEXT PU
EC
IT8587
GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7
GPB0
GPB1
GPB2
GPB3
GPB4
GPB5
GPB6
GPB7
GPC0
GPC1
GPC2
GPC3
GPC4
GPC5
GPC6
GPC7
GPD0
GPD1
GPD2
GPD3
GPD4
GPD5
GPD6
GPD7
GPE0
GPE1
GPE2
GPE3
GPE4
GPE5
GPE6
GPE7
GPF0
GPF1
GPF2
GPF3
GPF4
GPF5
GPF6
GPF7
GPG0
GPG1
GPG2
GPG6
GPH0
GPH1
GPH2
GPH3
GPH4
GPH5
GPH6
GPI0
GPI1
GPI2
GPI3
GPI4
GPI5
GPI6
GPI7
GPJ0
GPJ1
GPJ2
GPJ3
GPJ4
GPJ5
GPJ6
GPJ7
GPM0
GPM1
GPM2
GPM3
GPM4
GPM5
GPM6
3
PWR_WHITE_LED#
BAT_ORG_LED#
KEYBOARD_LED#
DC_IN_LED#
WLAN_RST#
CHGCB2#
THERM_ALERT#_EC
PCH_FLASH_DESCRIPTOR
NUM_LED#
CAP_LED#
THRO_CPU
SMB0_CLK
SMB0_DAT
A20GATE
RCIN#
PM_RSMRST#
CRX0
SMB1_CLK
SMB1_DAT
KSO16
AC_IN_OC
KSO17
BAT1_IN_OC#
ME_AC_PRESENT
PM_SUSB#
PM_SUSC#
BUF_PLT_RST#
EXT_SCI#
EXT_SMI#
PM_PWROK
FAN0_TACH
USBP01_EN
VSUS_ON
SUSC_EC#
SUSB_EC#
CPU_VRON
PWR_SW#_M
USB_OC01#_EC
LID_SW#
USB_OC2#_EC
BAT_LEARN
ME_SUSPWRDNACK
PM_PWRBTN#
TEST pin
TP_CLK
TP_DAT
H_PECI_EC
LCD_BACKOFF#
HDMI_HPD_M
NC
FB_CLAMP_TGL_REQ#
HDPINT#
PM_CLKRUN#
CHGCB0#
CHGCB1#
KB_ID
JACK_IN#
HDPLOC
HDPACT
AD_IINP
SUS_PWRGD
ALL_SYSTEM_PWRGD
VRM_PWRGD
ADAPT_AD
BACK_EN_C
WLAN_ON_EC
IMON
SLP_MUSIC_EN
BAT_OFF#
OP_SD#
USBSLP_EN
GPU_FB_CLAMP
CTL_FAN
SW_RTCRST
LAN_PWR_EN#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
CLK_KBCPCI_PCH
LPC_FRAME#
INT_SERIRQ
3
Signal NameUse AsEC GPIO
2
WRST#
FSCE# SCE#
FSCK SCK
FMOSI SI
FMISO SO
KSI0 KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
EC_RST#
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
1
Signal NameUse AsEC Name
SM_BUS ADDRESS :
SM-Bus Device
SO-DIMM 0
SO-DIMM 1
PCIE 1
N/A
PCIE 2 WLAN
LAN WIFI/BT
PCIE 3
N/A
PCIE 4
N/A
PCIE 5
PCIE 6 N/A
PCIE 7
N/A
PCIE 8
N/A
SATA0
SATA HDD
mSATA
SATA1
SATA2
SATA ODD
SATA3
N/A
SATA4 N/A
N/A
SATA5
BG1-CSC-HW R&D Dept.5
BG1-CSC-HW R&D Dept.5
BG1-CSC-HW R&D Dept.5
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
VGFTG
VGFTG
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
VGFTG
SM-Bus Address
1010000x ( A0h )
1010001x ( A4h )
USB 0 USB 3.0 Port(Right Front)
USB 3.0 Port (Right Back)
USB 1
USB 2
USB-Reserve
USB 3
USB 4
TV Tuner Card1
USB 5
TV Tuner Card2
N/A
USB 6
N/A
USB 7
Card reader
USB 8
USB(Left Front)
USB 9
Camera
USB 10
USB 11
Touch Panel
USB 12
N/A
USB 13
N/A
Title :
Title :
Title :
System Setting
System Setting
System Setting
Jim3_Liu
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
Engineer:
2104Tuesd ay, D ecem ber 11, 2012
2104Tuesd ay, D ecem ber 11, 2012
1
2104Tuesd ay, D ecem ber 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
5
D D
4
3
2
+VCCP
+VCCP 4,6,7,26,27,32,57,82
1
PEG Compensation(Keep if PEG no used)
U0301A
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
AA11
AC12
AA10
AG11
AE11
AE10
P10
P11
W11
W1
AA6
W6
AC9
W10
W3
AA7
W7
AA3
AC8
U11
AG8
AF3
AD2
AG4
AF4
AC3
AC4
AE7
AC1
AA4
AE6
M2
P6
P1
N3
P7
P3
K1
M8
N4
R2
K3
M7
P4
T3
U7
V4
Y2
U6
T4
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
eDP_AUX#
eDP_AUX
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
ES1
01V010000003
DMI Intel(R) FDI DP
PCI EXPRESS -- GRAPHICS
DMI_TXN022
DMI_TXN122
DMI_TXN222
DMI_TXN322
DMI_TXP022
DMI_TXP122
DMI_TXP222
DMI_TXP322
DMI_RXN022
DMI_RXN122
DMI_RXN222
DMI_RXN322
DMI_RXP022
DMI_RXP122
DMI_RXP222
DMI_RXP322
C C
+3VS +3VS
12
12
R0303
R0305
100KOhm
100KOhm
@
R0306
100KOhm
@
12
12
R0304
100KOhm
@
@
EDP_AUXN45
B B
EDP_AUXP45
+VCCP
C0333 0.1UF/25V /eDP
C0334 0.1UF/25V /eDP
EDP_TXN045
EDP_TXN145
EDP_TXP045
EDP_TXP145
C0335 0.1UF/25V /eDP
C0336 0.1UF/25V /eDP
C0337 0.1UF/25V /eDP
C0338 0.1UF/25V /eDP
FDI_TXN[7:0]22
FDI_TXP[7:0]22
Always required
12
1 2
1 2
1 2
1 2
1 2
1 2
FDI_FSYNC022
FDI_FSYNC122
FDI_INT22
FDI_LSYNC022
FDI_LSYNC122
R030224.9Ohm 1%
EDP_HPD#
DP_COMP
EDP_AUXN_R
EDP_AUXP_R
EDP_TXN0_R
EDP_TXN1_R
EDP_TXP0_R
EDP_TXP1_R
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
G3
G1
G4
H22
J21
B22
D21
A19
D17
B14
D13
A11
B10
G8
A8
B6
H8
E5
K7
K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6
G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4
F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4
PEG_ICOMPO>12 mils
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R0301 24.9Ohm1%
PCIENB_RXN[0..7] 70
PCIENB_RXP[0..7] 70
PEG_COMP
PCIENB_RXN0
PCIENB_RXN1
PCIENB_RXN2
PCIENB_RXN3
PCIENB_RXN4
PCIENB_RXN5
PCIENB_RXN6
PCIENB_RXN7
PCIENB_RXP0
PCIENB_RXP1
PCIENB_RXP2
PCIENB_RXP3
PCIENB_RXP4
PCIENB_RXP5
PCIENB_RXP6
PCIENB_RXP7
PCIENB_TXN0
PCIENB_TXN1
PCIENB_TXN2
PCIENB_TXN3
PCIENB_TXN4
PCIENB_TXN5
PCIENB_TXN6
PCIENB_TXN7
PCIENB_TXP0
PCIENB_TXP1
PCIENB_TXP2
PCIENB_TXP3
PCIENB_TXP4
PCIENB_TXP5
PCIENB_TXP6
PCIENB_TXP7
C0301 0.22UF/10V /VGA
C0302 0.22UF/10V /VGA
C0303 0.22UF/10V /VGA
C0304 0.22UF/10V /VGA
C0305 0.22UF/10V /VGA
C0306 0.22UF/10V /VGA
C0307 0.22UF/10V /VGA
C0308 0.22UF/10V /VGA
Mount 0.1uF (1AV200000041) for PCIE GEN1, GEN2
Mount 0.22uF (1AV200000050) for PCIE GEN3
C0317 0.22UF/10V /VGA
C0318 0.22UF/10V /VGA
C0319 0.22UF/10V /VGA
C0320 0.22UF/10V /VGA
C0321 0.22UF/10V /VGA
C0322 0.22UF/10V /VGA
C0323 0.22UF/10V /VGA
C0324 0.22UF/10V /VGA
PCIEG_TXN0
PCIEG_TXN1
PCIEG_TXN2
PCIEG_TXN3
PCIEG_TXN4
PCIEG_TXN5
PCIEG_TXN6
PCIEG_TXN7
PCIEG_TXP0
PCIEG_TXP1
PCIEG_TXP2
PCIEG_TXP3
PCIEG_TXP4
PCIEG_TXP5
PCIEG_TXP6
PCIEG_TXP7
+VCCP
PCIEG_TXN[0..7] 70
PCIEG_TXP[0..7] 70
+VCCP
12
R0308
1KOhm
/eDP
EDP_HPD#
A A
5
3
/eDP
D
Q0301
2N7002
1
EDP_HPD
G
S
2
pull down 100K ohm at P.45
0917 Ken
4
eDP_HPD 45
Title :
Title :
Title :
CPU(1)_DMI,DP,PEG,FDI
CPU(1)_DMI,DP,PEG,FDI
CPU(1)_DMI,DP,PEG,FDI
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Jim3_Liu
3104Tuesday, December 11, 2012
3104Tuesday, December 11, 2012
3104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
4
3
2
1
+1.5V
+3VS
+3VSUS
+VCCP
+3V
D D
U0301B
MISC THERMAL PWR MANAGEMENT
DPLL_REF_CLK
DPLL_REF_CLK#
CLOCKS
SM_DRAMRST#
DDR3
MISC
JTAG & BPM
Different from EVEREST
H_PROCHOT#_D
F49
PROC_SELECT#
C57
PROC_DETECT #
C49
CATERR#
A48
PECI
C45
PROCHOT#
D45
THERMTRIP#
C48
PM_SYNC
B46
UNCOREPWRGOOD
BE45
SM_DRAMPWROK
D44
RESET#
ES1
H_SNB_IVB#25
1 2
R0404 62Ohm
+VCCP
H_PROCHOT#
C C
PM_DRAM_PWRGD22
H_PM_SYNC22
R0408 10KOhm
H_CPUPWRGD25
BUF_PLT_RST#24,30,32,33,40,53,70
H_PECI25
H_THRMTRIP#25,32
12
R0409 130Ohm1%
R0416 1.5KOhm1%
R0403 56Ohm
1 2
1 2
1
TP_SKTOCC#_R
T0401
1
TP_CATERR#_R
T0402
1 2
SP0401
12
H_PM_SYNC_R
NB_R0402_20MIL_SMALL
SP0402
12
H_CPUPWRGD_R
NB_R0402_20MIL_SMALL
VDDPWRGOOD_R
BUF_CPU_RST#
12
R0417
680OHM
Sandy Bridge:R0417 = 750 ohm (10V220000093)
Ivy Bridge:R0417 = 680 ohm (10V240000041)
PM_SYS_PWRGD is the power good for +1.5V_VCCDDQ
B B
+1.5V
12
R0449
200Ohm
1%
PM_DRAM_PWRGD
SP0403
NB_R0402_5MIL_SMALL
12
R0450
1KOhm1%@
1.57 Volt
12
If don't support S3 power reduction
1. Unmount R0450, R0452
2. Change R0409 to 130ohm from 0ohm - Design Guide 1.0 page 106
3. Unmount Q0501, C0501, R0506, R0507
4. Mount R0501, change R0508 to 0ohm from 1kohm
5. Mount R0702 and short JP0701
6. Unmount R2232, R2231, Q2203
12
@
R0452
1.1KOhm
1%
PM_PWROK 22,30,92
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TRST#
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
J3
CLK_EXP_P_R
H2
CLK_EXP_N_R
AG3
CLK_DP_P_R
AG1
CLK_DP_N_R
N59
N58
AT30
BF44
SM_RCOMP_0
BE43
SM_RCOMP_1
BG43
SM_RCOMP_2
1
N53
T0403
N55
XDP_PREQ#
L56
TCK
TMS
TDI
TDO
XDP_TCK
L55
XDP_TMS
J58
XDP_TRST#
M60
XDP_TDI
L59
XDP_TDO
K58
H_DBR#
1
G58
T0404
1
E55
T0405
1
E59
T0406
1
G55
T0407
1
G59
T0408
1
H60
T0409
1
J59
T0410
1
J61
T0411
1 2
R0422 0Ohm
1 2
R0423 0Ohm
1 2
R0425 1KOhm/LVDS
1 2
R0428 0Ohm/eDP
1 2
R0429 0Ohm/eDP
1 2
R0426 1KOhm/LVDS
CPUDRAMRST# 5
1 2
R0418 140Ohm1%
1 2
R0419 25.5Ohm1%
1 2
R0420 200Ohm1%
PU/PD for JTAG signals
R0440 51Ohm@
R0441 51Ohm
R0438 51Ohm
R0442 51Ohm
R0439 51Ohm
R0414 51Ohm
R0424 1KOhm@
+VCCP
1 2
1 2
1 2
1 2
1 2
1 2
1 2
VR_HOT#80
Intel Comments
H_PROCHOT#
+1.5V 5,7,16,17,18,57,83
+3VS 3,16,17,20,21,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57, 58,61,62,91,92
+3VSUS 22,24,27,28,30,33,34,37,53,62,81,92
+VCCP 3,6,7,26,27,32,57,82
+3V 24,44,45,57,91
CLK_EXP_P 21
CLK_EXP_N 21
CLK_DP_P 21
CLK_DP_N 21
+VCCP
+VCCP
+VCCP
+VCCP
+3VS
@
1 2
R0461 0Ohm
C0401
47PF/50V
1 2
@
3
D
Q0401
2N7002
1
THRO_CPU
G
S
2
THRO_CPU 30
A A
CPU(1)_CLK,MISC,JTAG
CPU(1)_CLK,MISC,JTAG
CPU(1)_CLK,MISC,JTAG
Title :
Title :
Title :
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
4104Tuesday, December 11, 2012
4104Tuesday, December 11, 2012
4104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
4
3
2
1
+1.5V
BD13
BF12
BD10
BD14
BE13
BF16
BE17
BE18
BE21
BE14
BG14
BG18
BF19
BD50
BF48
BD53
BF52
BD49
BE49
BD54
BE53
BF56
BE57
BC59
AY60
BE54
BG54
BA58
AW59
AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58
AG58
AG59
AM60
AL59
AF61
AH60
BG39
BD42
AT22
AV43
BF40
BD45
AL4
AL1
AN3
AR4
AK4
AK3
AN4
AR1
AU4
AT2
AV4
BA4
AU3
AR3
AY2
BA3
BE9
BD9
BF8
U0301D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
ES1
01V010000003
BA34
SB_CK[0]
AY34
SB_CK#[0]
AR22
SB_CKE[0]
BA36
SB_CK[1]
BB36
SB_CK#[1]
BF27
SB_CKE[1]
BE41
SB_CS#[0]
BE47
SB_CS#[1]
AT43
SB_ODT[0]
BG47
SB_ODT[1]
AL3
AV3
BG11
BD17
BG51
BA59
AT60
AK59
AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61
BF32
BE33
BD33
AU30
BD30
AV30
BG30
BD29
BE30
BE28
BD43
AT28
AV28
BD46
AT26
AU22
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AP11
AR11
AT13
AU13
BA13
BB11
AY13
AV14
AR14
AY17
AR19
BA14
AU14
BB14
BB17
BA45
AR43
AW48
BC48
BC45
AR45
AT48
AY48
BA49
AV49
BB51
AY53
BB49
AU49
BA53
BB55
BA55
AV56
AP50
AP53
AV54
AT54
AP56
AP52
AN57
AN53
AG56
AG53
AN55
AN52
AG55
AK56
BD37
BF36
BA28
BE39
BD39
AT41
AJ10
AG6
AJ6
AL6
AJ8
AL8
AL7
AP6
AU6
AV9
AR6
AP8
BC7
BB7
BA7
BA9
BB9
U0301C
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
ES1
01V010000003
AU36
SA_CK[0]
AV36
SA_CK#[0]
AY26
SA_CKE[0]
AT40
SA_CK[1]
AU40
SA_CK#[1]
BB26
SA_CKE[1]
BB40
SA_CS#[0]
BC41
SA_CS#[1]
AY40
SA_ODT[0]
BA41
SA_ODT[1]
AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55
AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
DDR SYSTEM MEMORY A
BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
M_A_DIM0_CLK_DDR0 16
M_A_DIM0_CLK_DDR#0 16
M_A_DIM0_CKE0 16
M_A_DIM0_CLK_DDR1 16
M_A_DIM0_CLK_DDR#1 16
M_A_DIM0_CKE1 16
M_A_DIM0_CS#0 16
M_A_DIM0_CS#1 16
M_A_DIM0_ODT0 16
M_A_DIM0_ODT1 16
M_A_DQS#[7:0] 16
M_A_DQS[7:0] 16
M_A_A[15:0] 16
D D
C C
B B
M_A_DQ[63:0]16
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_BS016
M_A_BS116
M_A_BS216
M_A_CAS#16
M_A_RAS#16
M_A_WE#16
M_B_DQ[63:0]17
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS017
M_B_BS117
M_B_BS217
M_B_CAS#17
M_B_RAS#17
M_B_WE#17
+1.5V 4,7,16,17,18,57,83
M_B_DIM0_CLK_DDR0 17
M_B_DIM0_CLK_DDR#0 17
M_B_DIM0_CKE0 17
M_B_DIM0_CLK_DDR1 17
M_B_DIM0_CLK_DDR#1 17
M_B_DIM0_CKE1 17
M_B_DIM0_CS#0 17
M_B_DIM0_CS#1 17
M_B_DIM0_ODT0 17
M_B_DIM0_ODT1 17
M_B_DQS#[7:0] 17
M_B_DQS[7:0] 17
M_B_A[15:0] 17
R1.0 S3 circuit: DRAM_RST# to memory should be high during S3
+1.5V
R0507
@
1KOhm
1 2
1 2
A A
DDR3_DRAMRST#16,17
DRAMRST_CNTRL_PCH9,21
5
R0508 1KOhm
R0508 use 1k ohm
Design Guide 2.0 p133(471984)
Close to DIMM
SP0501
1 2
NB_R0402_5MIL_SMALL
4
1 2
R0501 0Ohm
Q0501
@
S
D
3
2
G
1
2N7002
12
C0501
@
0.1UF/10V
12
R0506
4.99KOhm
1%@
CPUDRAMRST# 4
Title :
Title :
Title :
CPU(3)_DDR3
CPU(3)_DDR3
CPU(3)_DDR3
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Jim3_Liu
5104Tuesday, December 11, 2012
5104Tuesday, December 11, 2012
5104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
4
3
2
1
+VCCP
+VCORE
Vcc for processor core
Voltage range: 0.3 - 1.52V
D D
C C
B B
25A
+VCORE
U0301F
A26
VCC74
A29
VCC73
A31
VCC72
A34
VCC71
A35
VCC70
A38
VCC69
A39
VCC68
A42
VCC67
C26
VCC66
C27
VCC65
C32
VCC64
C34
VCC63
C37
VCC62
C39
VCC61
C42
VCC60
D27
VCC59
D32
VCC58
D34
VCC57
D37
VCC56
D39
VCC55
D42
VCC54
E26
VCC53
E28
VCC52
E32
VCC51
E34
VCC50
E37
VCC49
E38
VCC48
F25
VCC47
F26
VCC46
F28
VCC45
F32
VCC44
F34
VCC43
F37
VCC42
F38
VCC41
F42
VCC40
G42
VCC39
H25
VCC38
H26
VCC37
H28
VCC36
H29
VCC35
H32
VCC34
H34
VCC33
H35
VCC32
H37
VCC31
H38
VCC30
H40
VCC29
J25
VCC28
J26
VCC27
J28
VCC26
J29
VCC25
J32
VCC24
J34
VCC23
J35
VCC22
J37
VCC21
J38
VCC20
J40
VCC19
J42
VCC18
K26
VCC17
K27
VCC16
K29
VCC15
K32
VCC14
K34
VCC13
K35
VCC12
K37
VCC11
K39
VCC10
K42
VCC9
L25
VCC8
L28
VCC7
L33
VCC6
L36
VCC5
L40
VCC4
N26
VCC3
N30
VCC2
N34
VCC1
N38
VCC0
CORE SUPPLY
PEG AND DDRSENSE LINES SVID QUIET RAILS
POWER
Voltage for the memory controller and
shared cache defined at the
motherboard VCCIO_SENSE and
VSS_SENSE_VCCIO
R0613 0Ohm
C0622
1UF/6.3V
+VCCP+VCCP
8.5A
12
C0628
1UF/6.3V
12
C0611
1UF/6.3V
12
C0618
10UF/6.3V
1 2
SP0601
NB_R0603_32MIL_SMALL
Cheif River
R0615 10KOhm@
1 2
1 2
R0602 43Ohm
VCCIO34
VCCIO28
VCCIO27
VCCIO26
VCCIO23
VCCIO22
VCCIO21
VCCIO20
VCCIO19
VCCIO18
VCCIO17
VCCIO16
VCCIO15
VCCIO14
VCCIO13
VCCIO12
VCCIO11
VCCIO10
VCCIO9
VCCIO8
VCCIO7
VCCIO6
VCCIO5
VCCIO4
VCCIO3
VCCIO2
VCCIO1
VCCIO0
VCCIO47
VCCIO46
VCCIO45
VCCIO44
VCCIO43
VCCIO42
VCCIO41
VCCIO40
VCCIO39
VCCIO38
VCCIO37
VCCIO36
VCCIO35
VCCIO33
VCCIO32
VCCIO31
VCCIO30
VCCIO29
VCCIO25
VCCIO24
VCCIO49
VCCIO48
VCCIO_SEL
VCCPQE1
VCCPQE0
VIDALERT#
VIDSCLK
VIDSOUT
AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48
AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15
W16
+VCCIO_CPU_F
W17
BC22
VCCP_SEL
Filitered(BGA only)
AM25
AN22
A44
H_CPU_SVIDALRT#
B43
H_CPU_SVIDCLK
C44
H_CPU_SVIDDAT
12
12
+VCCP
12
12
12
C0631
1UF/6.3V
C0625
1UF/6.3V
C0619
10UF/6.3V
1A
12
12
12
C0632
1UF/6.3V
C0626
1UF/6.3V
C0620
10UF/6.3V
12
12
C0635
1UF/6.3V
12
12
C0627
1UF/6.3V
12
12
C0621
10UF/6.3V
+VCCP
VCCIO_SEL VCCSA
+3VA
H
12
R0603
75Ohm
1%
12
C0636
C0634
1UF/6.3V
1UF/6.3V
12
C0629
C0630
1UF/6.3V
1UF/6.3V
12
C0617
C0602
10UF/6.3V
10UF/6.3V
VR_SVID_ALERT# 80
12
12
C0637
1UF/6.3V
12
C0633
1UF/6.3V
12
C0603
10UF/6.3V
1.05V
1.00VL
Close to VRClose to CPU Close to VRClose to CPU
12
C0613
C0610
1UF/6.3V
1UF/6.3V
12
12
C0608
C0607
1UF/6.3V
1UF/6.3V
12
12
C0604
C0605
10UF/6.3V
10UF/6.3V
+VCCP+VCCP +VCCP+VCCP
R0605
54.9Ohm
1%
1 2
SP0602
1 2
12
12
C0609
1UF/6.3V
12
C0612
1UF/6.3V
12
C0601
10UF/6.3V
VR_SVID_CLK 80
C0606
1UF/6.3V
10/08 change
R0607
130Ohm
1%
1 2
Chief River
Decoupling guide from Intel (EE)
+VCCP 1uF * 21pcs
10uF * 10pcs
220uF *1pcs
SP0603
1 2
+VCCP 3,4,7,26,27,32,57,82
+VCORE 9,11,80
R0608
130Ohm
1%
1 2
VR_SVID_DATA 80
SP0604
F43
G43
AN16
AN17
VCC_SENSE_R
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
A A
5
ES1
01V010000003
4
1 2
1 2
SP0605
NB_R0402_20MIL_SMALL
NB_R0402_20MIL_SMALL
VCCSENSE
VSSSENSEVSS_SENSE_R
3
VCCSENSE 80
VSSSENSE 80
Title :
Title :
Title :
CPU(4)_Processor Power
CPU(4)_Processor Power
CPU(4)_Processor Power
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
Jim3_Liu
6104Tuesday, December 11, 2012
6104Tuesday, December 11, 2012
6104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
4
3
2
1
+VCCP
+VCCSA
+1.8VS
+VGFX_CORE
+V_SM_VREF
D D
Decoupling guide from Intel PDDG R0.8
+VGFX_CORE
1uF * 11pcs
10uF * 6pcs
22uF * 6pcs
+VGFX_CORE
12
12
12
C0725
1UF/6.3V
12
12
C0717
1UF/6.3V
C C
B B
PLL supply voltage
(DC + AC specification)
Decoupling guide for A14 (EE)
+VCCSA
1uF * 5pcs
10uF * 5pcs
A A
12
C0786
10UF/6.3V
12
C0727
1UF/6.3V
C0719
1UF/6.3V
C0738
22UF/6.3V
VCCGT_SENSE80
VSSGT_SENSE80
12
12
C0731
1UF/6.3V
C0722
1UF/6.3V
C0739
22UF/6.3V
+1.8VS
+VCCSA
Graphics core voltage Voltage range: 0 - 1.52V
12
12
C0726
1UF/6.3V
12
C0790
10UF/6.3V
12
C0740
22UF/6.3V
VCCGT_SENSE
VSSGT_SENSE
10/08 change
12
C0780
22UF/6.3V
12
12
12
C0732
1UF/6.3V
C0791
10UF/6.3V
C0741
22UF/6.3V
SP0701
SP0702
C0729
1UF/6.3V
12
C0788
10UF/6.3V
12
C0742
22UF/6.3V
12
NB_R0402_20MIL_SMALL
12
NB_R0402_20MIL_SMALL
1.2A
12
12
C0730
1UF/6.3V
12
C0789
10UF/6.3V
12
C0743
22UF/6.3V
C0761
1UF/6.3V
2.4A
12
12
C0735
1UF/6.3V
C0783
10UF/6.3V
12
12
C0736
1UF/6.3V
C0781
10UF/6.3V
12
12
C0733
1UF/6.3V
C0792
10UF/6.3V
12
12
C0734
1UF/6.3V
C0777
10UF/6.3V
12
C0728
1UF/6.3V
12
C0787
10UF/6.3V
12
+
CE0703
330UF/2.5V
vx_c3528_h79
12
12
12
@
VCCGT_SENSE_R
VSSGT_SENSE_R
C0764
1UF/6.3V
C0737
1UF/6.3V
C0793
10UF/6.3V
AA46
AB47
AB50
AB51
AB52
AB53
AB55
AB56
AB58
AB59
AC61
AD47
AD48
AD50
AD51
AD52
AD53
AD55
AD56
AD58
AD59
AE46
N45
P47
P48
P50
P51
P52
P53
P55
P56
P61
T48
T58
T59
T61
U46
V47
V48
V50
V51
V52
V53
V55
V56
V58
V59
W50
W51
W52
W53
W55
W56
W61
Y48
Y61
F45
G45
BB3
BC1
BC4
L17
L21
N16
N20
N22
P17
P20
R16
R18
R21
U15
V16
V17
V18
V21
W20
U0301G
VAXG21
VAXG20
VAXG19
VAXG18
VAXG17
VAXG16
VAXG15
VAXG14
VAXG13
VAXG12
VAXG11
VAXG10
VAXG9
VAXG8
VAXG7
VAXG6
VAXG5
VAXG4
VAXG3
VAXG2
VAXG1
VAXG0
VAXG55
VAXG54
VAXG53
VAXG52
VAXG51
VAXG50
VAXG49
VAXG48
VAXG47
VAXG46
VAXG45
VAXG44
VAXG43
VAXG42
VAXG41
VAXG40
VAXG39
VAXG38
VAXG37
VAXG36
VAXG35
VAXG34
VAXG33
VAXG32
VAXG31
VAXG30
VAXG29
VAXG28
VAXG27
VAXG26
VAXG25
VAXG24
VAXG23
VAXG22
VAXG_SENSE
VSSAXG_SENSE
VCCPLL2
VCCPLL1
VCCPLL0
VCCSA15
VCCSA14
VCCSA13
VCCSA12
VCCSA11
VCCSA10
VCCSA9
VCCSA8
VCCSA7
VCCSA6
VCCSA5
VCCSA4
VCCSA3
VCCSA2
VCCSA1
VCCSA0
ES1
01V010000003
GRAPHICS
SENSE
LINES
1.8V RAIL
SA RAIL
SM_VREF
VDDQ25
VDDQ24
VDDQ23
VDDQ22
VDDQ21
VDDQ20
VDDQ19
VDDQ18
VDDQ17
VDDQ16
VDDQ15
VDDQ14
VDDQ13
VDDQ12
VDDQ11
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
DDR3 - 1.5V RAILS
POWER
VDDQ3
VDDQ2
VDDQ1
VDDQ0
VCCDQ1
VCCDQ0
QUIET RAILS
VDDQ_SENSE
VSS_SENSE_VDDQ
SENSE LINES
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
( Without Implement S3 circuit)
AY43
+V_SM_VREF
+V_SM_REF 10mil
AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33
12
C0704
1UF/6.3V
12
C0775
10UF/6.3V
Chief River
Decoupling guide from Intel (EE)
+1.5VS_VCCDDQ
1uF * 10pcs
10uF * 8pcs
Filtered(BGA Only)
+1.5VS_VCCDDQ_R
1A
AM28
AN26
BC43
BA43
U10
D48
D49
R0707 0Ohm
12
C0714
1UF/6.3V
1
T0701
1
T0702
R0704 0Ohm
VCCSA_SEL0
VCCSA_SEL1
Chief River
1 2
@
+V_SM_VREF
12
12
1 2
VCCSA_SEL0 82
VCCSA_SEL1 82
C0709
1UF/6.3V
C0774
10UF/6.3V
Close to CPU
+1.5V
12
12
C0705
1UF/6.3V
C0772
10UF/6.3V
12
C0706
1UF/6.3V
12
C0769
10UF/6.3V
VCCSA_SENSE
12
12
C0707
1UF/6.3V
C0767
10UF/6.3V
12
12
C0708
1UF/6.3V
C0765
10UF/6.3V
12
12
VCCSA_SEL0
VCCSA_SEL1
C0713
1UF/6.3V
C0770
10UF/6.3V
+1.5V
12
12
+VCCP
+VCCP 3,4,6,26,27,32,57,82
+1.5V 4,5,16,17,18,57,83
+VCCSA 57,82
+1.8VS 25,26,84
+VGFX_CORE 9,80
+V_SM_VREF 18
+1.5V
5A
12
C0710
1UF/6.3V
C0768
10UF/6.3V
R0708
1KOhm
@
1 2
R0701
1KOhm
1 2
12
C0712
C0711
1UF/6.3V
1UF/6.3V
> 0 SUSB_EC#
>100 ns
R0709
1KOhm
@
1 2
R0702
+VCCSA_SEL0 +VCCSA_SEL1
1KOhm
1 2
Processor I/O supply
voltage for DDR3
(DC + AC specification)
L
L
H
+1.5V_VCCDDQ
+1.5V_VCCDDQ Power Good
(U0404 pin 4)
+0.75VS
VCCSA
L
H
L
0.9V
0.85V
0.725V
0.675VHH
Title :
Title :
Title :
CPU(5)_Graphics Power
CPU(5)_Graphics Power
CPU(5)_Graphics Power
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
7104Tuesday, December 11, 2012
7104Tuesday, December 11, 2012
7104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
D D
4
3
2
1
BG17
BG21
BG24
BG28
BG37
BG41
BG45
BG49
BG53
BG9
C29
C35
C40
D10
D14
D18
D22
D26
D29
D35
D40
D43
D46
D50
D54
D58
E25
E29
E35
E40
F13
F15
F19
F29
F35
F40
F55
G48
G51
G61
H10
H14
H17
H21
H53
H58
J49
J55
K11
K21
K51
L16
L20
L22
L26
L30
L34
L38
L43
L48
L61
M11
M15
D4
D6
E3
G6
H4
J1
K8
U0301I
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0
VSS10
VSS288
VSS287
VSS286
VSS283
VSS282
VSS281
VSS280
VSS279
VSS278
VSS277
VSS285
VSS276
VSS275
VSS274
VSS273
VSS272
VSS271
VSS284
VSS269
VSS268
VSS270
VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS260
VSS259
VSS257
VSS256
VSS258
VSS255
VSS253
VSS252
VSS251
VSS250
VSS254
VSS249
VSS248
VSS247
VSS246
VSS245
VSS243
VSS242
VSS241
VSS244
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS228
VSS227
ES1
01V010000003
VSS
VSS_NCTF13
VSS_NCTF12
VSS_NCTF6
VSS_NCTF5
VSS_NCTF4
VSS_NCTF3
VSS_NCTF2
VSS_NCTF1
VSS_NCTF0
VSS_NCTF11
NCTF
VSS_NCTF10
VSS_NCTF9
VSS_NCTF8
VSS_NCTF7
VSS230
VSS226
VSS229
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS210
VSS202
VSS201
VSS203
VSS200
VSS199
VSS198
VSS197
VSS196
VSS195
VSS194
VSS193
VSS192
VSS190
VSS191
VSS189
VSS188
VSS186
VSS185
VSS184
VSS183
VSS182
VSS187
VSS181
VSS180
VSS179
VSS178
M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59
A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61
BGA only
All NCTF pins should be test points
and should be routed as trace.
U0301H
A13
VSS299
A17
VSS298
A21
VSS297
A25
VSS296
A28
VSS295
A33
VSS294
A37
VSS293
A40
VSS292
A45
VSS291
A49
VSS290
A53
VSS289
A9
VSS300
AA1
VSS177
AA13
VSS175
AA50
VSS174
AA51
VSS173
AA52
VSS172
AA53
VSS171
AA55
VSS170
AA56
VSS169
AA8
VSS176
AB16
VSS168
AB18
VSS167
AB21
VSS166
AB48
VSS165
AB61
VSS164
AC10
VSS162
C C
B B
AC14
AC46
AD17
AD20
AD61
AE13
AF17
AF21
AF47
AF48
AF50
AF51
AF52
AF53
AF55
AF56
AF58
AF59
AG10
AG14
AG18
AG47
AG52
AG61
AH58
AK52
AM13
AM20
AM22
AM26
AM30
AM34
VSS161
VSS160
AC6
VSS163
VSS158
VSS157
AD4
VSS159
VSS156
VSS154
AE8
VSS155
AF1
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
AG7
VSS140
AH4
VSS133
VSS132
AJ13
VSS130
AJ16
VSS129
AJ20
VSS128
AJ22
VSS127
AJ26
VSS126
AJ30
VSS125
AJ34
VSS124
AJ38
VSS123
AJ42
VSS122
AJ45
VSS121
AJ48
VSS120
AJ7
VSS131
AK1
VSS119
VSS118
AL10
VSS117
AL13
VSS116
AL17
VSS115
AL21
VSS114
AL25
VSS113
AL28
VSS112
AL33
VSS111
AL36
VSS110
AL40
VSS109
AL43
VSS108
AL47
VSS107
AL61
VSS106
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS
VSS98
VSS105
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS81
VSS80
VSS79
VSS82
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS78
VSS70
VSS69
VSS68
VSS71
VSS67
VSS66
VSS65
VSS64
VSS62
VSS61
VSS60
VSS59
VSS63
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS50
VSS49
VSS48
VSS51
VSS45
VSS44
VSS43
VSS42
VSS47
VSS41
VSS40
VSS39
VSS38
VSS37
VSS46
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS26
VSS27
VSS25
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS24
VSS11
VSS9
AM38
AM4
AM42
AM45
AM48
AM58
AN1
AN21
AN25
AN28
AN33
AN36
AN40
AN43
AN47
AN50
AN54
AP10
AP51
AP55
AP7
AR13
AR17
AR21
AR41
AR48
AR61
AR7
AT14
AT19
AT36
AT4
AT45
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13
ES1
01V010000003
A A
Title :
Title :
Title :
CPU(6)_GND
CPU(6)_GND
CPU(6)_GND
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
8104Tuesday, December 11, 2012
8104Tuesday, December 11, 2012
8104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
4
3
2
1
U0301E
D D
C C
CFG strapping information:
CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x
- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition
- 0: Lane Numbers Reversed
CFG[4]: Embedded DisplayPort Detection
- 1: (Default) Disabled ; No Physical Display Port attached to Embedded DisplayPort
- 0: Enabled ; An external Display Port device is connected to the Embedded Display Port
CFG[6:5]: PCI Express Port Bifurcation Straps
- 11 : (Default) x 1 6
- 10 : x 8 , x 8
- 01 : Reserved
- 00 : x 8 , x 4 , x 4
CFG[7]: PEG DEFER TRAINING
- 1: (Default) PEG Train immediately following xxRESETB de assertion
- 0: PEG Wait for BIOS training
1 2
CFG2
CFG4
CFG5
CFG6
CFG7
1%
R0902 1KOhm
@
1 2
1%
R0903 1KOhm
/eDP
1 2
1%
R0904 1KOhm
1 2
1%
R0905 1KOhm@
1 2
1%
R0906 1KOhm@
R1.1
T0913
T0914
T0915
T0916
T0917
1
VCC_VAL_SENSE
1
VSS_VAL_SENSE
1
VAXG_VAL_SENSE
1
VSSAXG_VAL_SENSE
1
VCCAXG_VAL_SENSE
PROCESSOR DRIVEN Vref PATH WAS STUFFED BY DEFAULT:
1 2
R0907 0Ohm
Q0901A
@
UM6K1N
1 2
Q0901B
@
UM6K1N
61
2
34
5
DIMM0_VREF_DQ 18
DIMM1_VREF_DQ 18
DDR_WR_VREF01
B B
DRAMRST_CNTRL_PCH5,9,21
DDR_WR_VREF02
12
R0909
1KOhm
1% @
R0910 0Ohm
12
R0911
1KOhm
1% @
B50
CFG[0]
C51
CFG[1]
B54
CFG2
CFG4
CFG5
CFG6
CFG7
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
F48
VCC_DIE_SENSE
H48
RSVD39
K48
RSVD37
BA19
RSVD15
AV19
RSVD18
AT21
RSVD22
BB21
RSVD12
BB19
RSVD13
AY21
RSVD17
BA22
RSVD14
AY22
RSVD16
AU19
RSVD20
AU21
RSVD19
BD21
RSVD11
BD22
RSVD10
BD25
RSVD9
BD26
RSVD8
BG22
RSVD1
BE22
RSVD6
BG26
RSVD0
BE26
RSVD4
BF23
RSVD3
BE24
RSVD5
ES1
01V010000003
For iFDIM testing
R0912~ R0917 close to pin < 1 inch
458544_CR_PDDG
12
R0912
@
49.9Ohm
1%
VAXG_VAL_SENSE VCC_VAL_SENSE
R0913
@
100Ohm
1%
1 2
VSSAXG_VAL_SENSE VSS_VAL_SENSE
12
R0914
@
49.9Ohm
1%
RESERVED
DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1
RSVD31
RSVD36
RSVD35
RSVD34
RSVD33
RSVD32
RSVD28
RSVD27
RSVD29
RSVD21
RSVD38
RSVD25
RSVD26
RSVD24
RSVD23
RSVD30
RSVD7
RSVD2
+VCORE+VGFX_CORE
BE7
BG7
N42
L42
L45
L47
M13
M14
U14
W14
P13
AT49
K24
AH2
AG13
AM14
AM15
N50
A4
C4
D3
D1
A58
A59
C59
A61
C61
D61
BD61
BE61
BE59
BG61
BG59
BG58
BG4
BG3
BE3
BG1
BE1
BD1
12
R0915
@
49.9Ohm
1%
R0916
@
100Ohm
1%
1 2
12
R0917
@
49.9Ohm
1%
Chief River
DDR_WR_VREF01
DDR_WR_VREF02
DRAMRST_CNTRL_PCH5,9,21
A A
Title :
Title :
Title :
CPU(7)_RESERVED
CPU(7)_RESERVED
CPU(7)_RESERVED
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
9104Tuesday, December 11, 2012
9104Tuesday, December 11, 2012
9104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
CPU_PCH_XDP*****
CPU_PCH_XDP*****
CPU_PCH_XDP*****
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
BG1-CSC-HW R&D D ept.5
BG1-CSC-HW R&D D ept.5
BG1-CSC-HW R&D D ept.5
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
VGFTG
VGFTG
VGFTG
Engineer:
Jim3_Liu
Rev
Rev
Rev
1.1
1.1
10 104Tuesday, December 11, 2012
10 104Tuesday, December 11, 2012
1
10 104Tuesday, December 11, 2012
1.1
5
D D
4
+VCORE
3
2
1
Chief River
Decoupling guide from Intel PDDG R0.8
+VCORE 2.2uF * 16 pcs
22uF * 12 pcs
C C
B B
12
12
12
C1136
22UF/6.3V
12
C1144
22UF/6.3V
C1101
2.2UF/6.3V
C1111
2.2UF/6.3V
12
12
12
C1137
22UF/6.3V
12
C1145
22UF/6.3V
C1102
2.2UF/6.3V
C1112
2.2UF/6.3V
12
12
12
C1138
22UF/6.3V
12
C1146
22UF/6.3V
C1110
2.2UF/6.3V
C1113
2.2UF/6.3V
12
12
12
C1139
22UF/6.3V
12
C1147
22UF/6.3V
C1103
2.2UF/6.3V
C1114
2.2UF/6.3V
12
12
12
C1140
22UF/6.3V
C1104
2.2UF/6.3V
C1115
2.2UF/6.3V
12
12
12
C1141
22UF/6.3V
C1105
2.2UF/6.3V
C1117
2.2UF/6.3V
12
12
C1142
22UF/6.3V
C1106
2.2UF/6.3V
12
12
C1143
22UF/6.3V
C1107
2.2UF/6.3V
12
C1108
2.2UF/6.3V
12
C1109
2.2UF/6.3V
A A
Title :
Title :
Title :
Engineer:
Engineer:
BG1-CSC-HW R&D Dept.5
BG1-CSC-HW R&D Dept.5
BG1-CSC-HW R&D Dept.5
Size Project Na me
Size Project Na me
Size Project Na me
B
B
B
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
VGFTG
VGFTG
VGFTG
Engineer:
CPU DECOUPLING
CPU DECOUPLING
CPU DECOUPLING
Jim3_Liu
Jim3_Liu
Jim3_Liu
11 104Tuesday, December 11, 2012
11 104Tuesday, December 11, 2012
11 104Tuesday, December 11, 2012
1
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
+1.5V
+0.75VS
+V_VREF_CA_DIMM0
+V_VREF_DQ_DIMM0
D D
+1.5V 4,5,7,17,18,57,83
+0.75VS 17,57,83
+3VS
+3VS 3,4,17,20,21,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+V_VREF_CA_DIMM0 18
+V_VREF_DQ_DIMM0 18
4
CE1601
330UF/2.5V
1BV080000031
3
+1.5V
Layout Note: Pl ace these caps near SO DIMM 0
@
12
C1609
10UF/6.3V
vx_c0603_small
12
+
12
C1610
10UF/6.3V
vx_c0603_small
vx_c0603_small
12
C1611
10UF/6.3V
12
C1612
10UF/6.3V
@
vx_c0603_small
vx_c0603_small
12
C1613
10UF/6.3V
@
2
12
C1620
10UF/6.3V
@
vx_c0603_small
+0.75VS
12
C1616
1UF/6.3V
12
C1617
1UF/6.3V
12
C1618
1UF/6.3V
@
12
C1619
1UF/6.3V
@
1
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CLK_DDR1
M_A_DIM0_CLK_DDR#1
12
12
C1602
10PF/50V
@
C1601
10PF/50V
@
12
12
1%
150Ohm
R1603
@
1%
150Ohm
R1604
@
PLACE CLOSE TO SODIMM
C C
M_A_DQS[7:0]5
M_A_DQS#[7:0]5
B B
SMBus Slave Address: A0H
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A[15:0]5
M_A_DIM0_CLK_DDR15
M_A_DIM0_CLK_DDR#15
M_A_DIM0_CLK_DDR05
M_A_DIM0_CLK_DDR#05
M_A_DIM0_CS#15
M_A_DIM0_CS#05
M_A_DIM0_ODT15
M_A_DIM0_ODT05
M_A_WE#5
M_A_RAS#5
M_A_CAS#5
M_A_BS25
M_A_BS15
M_A_BS05
M_A_DIM0_CKE15
M_A_DIM0_CKE05
DM should connect to GND directly
Design Guide 0.9 p86 (436735)
SMB_CLK_S17,28,31
SMB_DAT_S17,28,31
1 2
10KOhm
3 4
10KOhm
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
RN1601A
RN1601B
M_A_DQS7
M_A_DQS#7
M_A_DQS6
M_A_DQS#6
M_A_DQS5
M_A_DQS#5
M_A_DQS4
M_A_DQS#4
M_A_DQS3
M_A_DQS#3
M_A_DQS2
M_A_DQS#2
M_A_DQS1
M_A_DQS#1
M_A_DQS0
M_A_DQS#0
H4.0mm,REV
J1601A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
0
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
1
A14
78
A15
102
CK1
104
CK1#
101
CK0
103
CK0#
121
114
120
116
113
110
115
108
109
201
197
188
186
171
169
154
152
137
135
187
170
153
136
202
200
2
S1#
S0#
ODT1
ODT0
WE#
3
RAS#
CAS#
79
BA2
BA1
BA0
74
CKE1
73
4
CKE0
SA1
SA0
DQS7
DQS#7
5
DQS6
DQS#6
DQS5
DQS#5
DQS4
DQS#4
64
DQS3
62
DQS#3
47
6
DQS2
45
DQS#2
29
DQS1
27
DQS#1
12
DQS0
10
DQS#0
DM7
7
DM6
DM5
DM4
63
DM3
46
DM2
28
DM1
11
DM0
SCL
RESET#
SDA
DDR3_DIMM_204P
12V02GIRM001
M: 1202-000R000
S: 1202-00K7000
S: 1202-00LP000
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
M_A_DQ0
DQ0
7
M_A_DQ1
DQ1
15
M_A_DQ6
DQ2
17
M_A_DQ5
DQ3
4
M_A_DQ4
DQ4
6
M_A_DQ2
DQ5
16
M_A_DQ3
DQ6
18
M_A_DQ7
DQ7
21
M_A_DQ13
DQ8
23
M_A_DQ8
DQ9
33
M_A_DQ10
35
M_A_DQ14
22
M_A_DQ9
24
M_A_DQ12
34
M_A_DQ15
36
M_A_DQ11
39
M_A_DQ16
41
M_A_DQ21
51
M_A_DQ23
53
M_A_DQ18
40
M_A_DQ20
42
M_A_DQ17
50
M_A_DQ22
52
M_A_DQ19
57
M_A_DQ29
59
M_A_DQ24
67
M_A_DQ26
69
M_A_DQ31
56
M_A_DQ30
58
M_A_DQ28
68
M_A_DQ25
70
M_A_DQ27
129
M_A_DQ39
131
M_A_DQ37
141
M_A_DQ33
143
M_A_DQ38
130
M_A_DQ32
132
M_A_DQ36
140
M_A_DQ35
142
M_A_DQ34
147
M_A_DQ40
149
M_A_DQ44
157
M_A_DQ46
159
M_A_DQ47
146
M_A_DQ45
148
M_A_DQ41
158
M_A_DQ43
160
M_A_DQ42
163
M_A_DQ53
165
M_A_DQ52
175
M_A_DQ55
177
M_A_DQ50
164
M_A_DQ49
166
M_A_DQ48
174
M_A_DQ54
176
M_A_DQ51
181
M_A_DQ58
183
M_A_DQ62
191
M_A_DQ57
193
M_A_DQ61
180
M_A_DQ63
182
M_A_DQ56
192
M_A_DQ60
194
M_A_DQ59
30
M_A_DQ[63:0] 5
Layout Note: Pl ace these caps near SO DIMM 0
DDR3_DRAMRST# 5,17
+1.5V
12
T1601
Reserve
+V_VREF_CA_DIMM0
+V_VREF_DQ_DIMM0
C1605
0.1UF/16V
1
PM_EXTTS#0_DIM_A
12
C1624
2.2UF/6.3V
@
12
C1622
2.2UF/6.3V
@
12
C1606
0.1UF/16V
W/S=20/20
12
C1623
0.1UF/16V
W/S=20/20
12
C1625
0.1UF/16V
J1601B
75
VDD1
VDD381VDD4
VDD587VDD6
VDD793VDD8
99
VDD9
105
VDD11
111
VDD13
117
VDD15
123
VDD17
2
VSS1
8
VSS3
13
VSS5
19
VSS7
25
VSS9
31
VSS11
37
VSS13
43
VSS15
48
VSS17
54
VSS19
60
VSS21
65
VSS23
71
VSS25
127
VSS27
133
VSS29
138
VSS31
144
VSS33
150
VSS35
155
VSS37
161
VSS39
167
VSS41
172
VSS43
178
VSS45
184
VSS47
189
VSS49
195
VSS51
198
EVENT#
125
TEST
77
NC1
122
NC2
126
VREFCA
1
VREFDQ
DDR3_DIMM_204P
12V02GIRM001
VDD2
VDD10
VDD12
VDD14
VDD16
VDD18
VSS2
VSS4
VSS6
VSS8
VSS10
VSS12
VSS14
VSS16
VSS18
VSS20
VSS22
VSS24
VSS26
VSS28
VSS30
VSS32
VSS34
VSS36
VSS38
VSS40
VSS42
VSS44
VSS46
VSS48
VSS50
VSS52
GND1
GND2
NP_NC1
NP_NC2
VTT1
VTT2
VDDSPD
76
82
88
94
100
106
112
118
124
3
9
14
20
26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196
207
208
205
MAX: 0.75A
206
TDC: 0.75A
203
204
199
12
C1615
0.1UF/16V
12
+0.75VS
C1607
0.1UF/16V
+3VS
+1.5V
12
C1614
2.2UF/6.3V
@
12
C1608
0.1UF/16V
A A
Title :
Title :
Title :
DDR3(1)_SO-DIMM0
DDR3(1)_SO-DIMM0
DDR3(1)_SO-DIMM0
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
16 104Tuesday, December 11, 2012
16 104Tuesday, December 11, 2012
16 104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
+1.5V
+0.75VS
+V_VREF_CA_DIMM0
+V_VREF_DQ_DIMM0
D D
+1.5V 4,5,7,16,18,57,83
+0.75VS 16,57,83
+3VS
+3VS 3,4,16,20,21,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+V_VREF_CA_DIMM0 16,18
+V_VREF_DQ_DIMM0 16,18
4
CE1701
330UF/2.5V
1BV080000031
3
Layout Note: Pl ace these caps near SO DIMM 1
12
+
@
12
C1709
22UF/6.3V
12
C1710
22UF/6.3V
12
C1711
22UF/6.3V
12
C1712
22UF/6.3V
@
12
C1713
22UF/6.3V
@
2
12
C1726
22UF/6.3V
@
1
+0.75VS+1.5V
12
C1716
1UF/6.3V
12
C1717
1UF/6.3V
12
C1718
1UF/6.3V
@
12
C1719
1UF/6.3V
@
M_B_DIM0_CLK_DDR0
M_B_DIM0_CLK_DDR#0
M_B_DIM0_CLK_DDR1
M_B_DIM0_CLK_DDR#1
PLACE CLOSE TO SODIMM
C C
M_B_DQS[7:0]5
M_B_DQS#[7:0]5
B B
12
12
C1720
10PF/50V
@
12
12
C1721
10PF/50V
@
SMBus Slave Address: A4H
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
1%
150Ohm
R1707
@
1%
150Ohm
R1708
@
DM should connect to GND directly
Design Guide 0.9 p86 (436735)
SMB_CLK_S16,28,31
SMB_DAT_S16,28,31
M_B_A[15:0]5
M_B_DIM0_CLK_DDR15
M_B_DIM0_CLK_DDR#15
M_B_DIM0_CLK_DDR05
M_B_DIM0_CLK_DDR#05
M_B_DIM0_CS#15
M_B_DIM0_CS#05
M_B_DIM0_ODT15
M_B_DIM0_ODT05
M_B_RAS#5
M_B_CAS#5
M_B_BS25
M_B_BS15
M_B_BS05
M_B_DIM0_CKE15
M_B_DIM0_CKE05
RN1701A 10KOhm
+3VS
RN1701B 10KOhm
M_B_WE#5
1 2
3 4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQS7
M_B_DQS#7
M_B_DQS6
M_B_DQS#6
M_B_DQS5
M_B_DQS#5
M_B_DQS4
M_B_DQS#4
M_B_DQS3
M_B_DQS#3
M_B_DQS2
M_B_DQS#2
M_B_DQS1
M_B_DQS#1
M_B_DQS0
M_B_DQS#0
H4.0mm,STD
J1701A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
86
89
85
107
84
83
119
80
78
102
104
101
103
121
114
120
116
113
110
115
79
108
109
74
73
201
197
188
186
171
169
154
152
137
135
64
62
47
45
29
27
12
10
187
170
153
136
63
46
28
11
202
200
0
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
1
A14
A15
CK1
CK1#
CK0
CK0#
2
S1#
S0#
ODT1
ODT0
WE#
3
RAS#
CAS#
BA2
BA1
BA0
CKE1
4
CKE0
SA1
SA0
DQS7
5
DQS#7
DQS6
DQS#6
DQS5
DQS#5
DQS4
DQS#4
DQS3
DQS#3
6
DQS2
DQS#2
DQS1
DQS#1
DQS0
DQS#0
DM7
7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
SCL
RESET#
SDA
DDR3_DIMM_204P
12V02GISM001
M: 1202-00HK000
S: 1202-00K4000
S: 1202-00LU000
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
M_B_DQ0
DQ0
7
M_B_DQ4
DQ1
15
M_B_DQ2
DQ2
17
M_B_DQ6
DQ3
4
M_B_DQ5
DQ4
6
M_B_DQ1
DQ5
16
M_B_DQ3
DQ6
18
M_B_DQ7
DQ7
21
M_B_DQ12
DQ8
23
M_B_DQ8
DQ9
33
M_B_DQ10
35
M_B_DQ14
22
M_B_DQ13
24
M_B_DQ9
34
M_B_DQ11
36
M_B_DQ15
39
M_B_DQ20
41
M_B_DQ16
51
M_B_DQ18
53
M_B_DQ19
40
M_B_DQ22
42
M_B_DQ23
50
M_B_DQ17
52
M_B_DQ21
57
M_B_DQ28
59
M_B_DQ29
67
M_B_DQ26
69
M_B_DQ30
56
M_B_DQ24
58
M_B_DQ25
68
M_B_DQ27
70
M_B_DQ31
129
M_B_DQ37
131
M_B_DQ33
141
M_B_DQ39
143
M_B_DQ35
130
M_B_DQ32
132
M_B_DQ36
140
M_B_DQ34
142
M_B_DQ38
147
M_B_DQ41
149
M_B_DQ42
157
M_B_DQ46
159
M_B_DQ45
146
M_B_DQ44
148
M_B_DQ40
158
M_B_DQ47
160
M_B_DQ43
163
M_B_DQ51
165
M_B_DQ50
175
M_B_DQ53
177
M_B_DQ52
164
M_B_DQ54
166
M_B_DQ55
174
M_B_DQ48
176
M_B_DQ49
181
M_B_DQ60
183
M_B_DQ63
191
M_B_DQ58
193
M_B_DQ62
180
M_B_DQ57
182
M_B_DQ61
192
M_B_DQ59
194
M_B_DQ56
30
M_B_DQ[63:0] 5
Layout Note: Place these caps near SO DIMM 1
DDR3_DRAMRST# 5,16
+1.5V
Reserve
12
C1705
0.1UF/16V
1
PM_EXTTS#0_DIM_B
T1701
+V_VREF_CA_DIMM1
12
C1724
2.2UF/6.3V
@
+V_VREF_DQ_DIMM1
12
C1722
2.2UF/6.3V
@
12
C1706
0.1UF/16V
W/S=20/20
12
C1723
0.1UF/16V
W/S=20/20
12
C1725
0.1UF/16V
J1701B
75
VDD1
VDD381VDD4
VDD587VDD6
VDD793VDD8
99
VDD9
105
VDD11
111
VDD13
117
VDD15
123
VDD17
2
VSS1
8
VSS3
13
VSS5
19
VSS7
25
VSS9
31
VSS11
37
VSS13
43
VSS15
48
VSS17
54
VSS19
60
VSS21
65
VSS23
71
VSS25
127
VSS27
133
VSS29
138
VSS31
144
VSS33
150
VSS35
155
VSS37
161
VSS39
167
VSS41
172
VSS43
178
VSS45
184
VSS47
189
VSS49
195
VSS51
198
EVENT#
125
TEST
77
NC1
122
NC2
126
VREFCA
1
VREFDQ
DDR3_DIMM_204P
12V02GISM001
VDD2
VDD10
VDD12
VDD14
VDD16
VDD18
VSS2
VSS4
VSS6
VSS8
VSS10
VSS12
VSS14
VSS16
VSS18
VSS20
VSS22
VSS24
VSS26
VSS28
VSS30
VSS32
VSS34
VSS36
VSS38
VSS40
VSS42
VSS44
VSS46
VSS48
VSS50
VSS52
GND1
GND2
NP_NC1
NP_NC2
VTT1
VTT2
VDDSPD
76
82
12
88
94
100
106
112
118
124
3
9
14
20
26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196
207
208
205
206
203
+0.75VS
204
199
C1707
0.1UF/16V
12
C1715
0.1UF/16V
12
+3VS
+1.5V
C1708
0.1UF/16V
12
C1714
2.2UF/6.3V
@
A A
Title :
Title :
Title :
DDR3(2)_SO-DIMM1
DDR3(2)_SO-DIMM1
DDR3(2)_SO-DIMM1
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
17 104Tuesday, December 11, 2012
17 104Tuesday, December 11, 2012
17 104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
4
3
2
1
+V_VREF_CA_DIMM0
+V_VREF_DQ_DIMM0
D D
DDR3 Vref
+V_SM_VREF
SP1801
SP1802
12
12
1 2
M_VREF30,83
R1805 0Ohm@
NB_R0402_20MIL_SMALL
NB_R0402_20MIL_SMALL
+V_VREF_CA_DIMM0
+V_VREF_CA_DIMM1
+V_VREF_CA_DIMM1
+V_VREF_DQ_DIMM1
+V_SM_VREF
+V_VREF_CA_DIMM0 16
+V_VREF_DQ_DIMM0 16
+V_VREF_CA_DIMM1 17
+V_VREF_DQ_DIMM1 17
+V_SM_VREF 7
For DDR3_VREF command & address.
M1: Fixed SO-DIMM VREF_DQ
C C
12
C1801
0.1UF/25V
M1Default
+1.5V
1 2
12
R1807
1KOhm
R1808
1KOhm
12
C1802
0.1UF/25V
@
+1.5V
1 2
12
R1811
1KOhm
@
R1810
1KOhm
@
+V_VREF_DQ_DIMM0
1 2
R1801 0Ohm
1 2
R1804 0Ohm
SP1804
SP1805
12
12
DIMM0_VREF_DQ9
NB_R0402_20MIL_SMALL
DIMM1_VREF_DQ9
NB_R0402_20MIL_SMALL
+V_VREF_DQ_DIMM1
M3 test only
1 2
R1802 0Ohm@
1 2
R1803 0Ohm@
M3
M3: Processor Generated SO-DIMM VREFDQ
B B
– New Requirement
If support M3 :
1. Mount R1802,R1803,R1805,R1806,R1810,R1811,C1802
2. Un mount R1801,R1804
A A
DDR3(3)_CA/DQ Voltage
DDR3(3)_CA/DQ Voltage
DDR3(3)_CA/DQ Voltage
Title :
Title :
Title :
Engineer:
Engineer:
BG1-CSC-HW R&D Dept.5
BG1-CSC-HW R&D Dept.5
BG1-CSC-HW R&D Dept.5
Size Project Na me
Size Project Na me
Size Project Na me
B
B
B
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
VGFTG
VGFTG
VGFTG
Engineer:
1
Rev
Rev
Rev
1.1
1.1
18 104Tuesday, December 11, 2012
18 104Tuesday, December 11, 2012
18 104Tuesday, December 11, 2012
1.1
of
of
of
5
4
3
2
1
+VTT_PCH_VCCIO
SNN_PCH_DRQ#0
GPIO23
SATA_COMP
SATA3_COMP
RBIAS_SATA3
SATALED#
PCB_ID8
BBS_BIT0_R
+VCC_RTC
+3VSUS_ORG
1
1
RTC battery
+RTCBAT
12
R2001 1KOhm
12
J2001
BATT_HOLDER_2P
3
4
12V20GBSM000
D D
+VCC_RTC
RTCRST# RC delay
should be 18ms~25ms
R2003 20KOhm
C2004
1UF/6.3V
R2004 20KOhm
C2005
1UF/6.3V
R2005
1MOhm
1 2
C C
ACZ_SYNC_AUD36
B B
A A
GND
12
12
GND GND
12
12
R2009
M: 1220-001O000
S: 1220-00F2000
S :1220-00HD000
1
JRST2001
1
SGL_JUMP
2
2
1
JRST2002
1
SGL_JUMP
2
2
GNDGND
ACZ_SYNC_C
33Ohm
+RTC_BAT
R1.1 2012/11/30 delete
EC reset CMOS feature
INTVRMEN: Integrated SUS 1.05V VRM Enables
Low: Enable External VRs
High:Enable Internal VRs
PCH_INTVRMEN
+5VS
1
G
2
S
1 2
R2011
R2012 0Ohm@
1MOhm
10V240000006
1 2
GND
GPIO13
XDP reserved
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TCK_BUF
Strap information:
SB_SPKR: No reboot strap
Low: Disable
High:Enable
ACZ_SDOUT:
1.Flash descriptor security:
Sampled Low: in effect.
Sampled High: override
2.ACZ_SDOUT which sample high on the
rising edge of PWROK will also disable Intel ME.
ACZ_SYNC: On Die PLL VR voltage selector
Low: 1.8V
High: 1.5V
note :
CRB has no strap
Hrron River Platform Schematic Design
Checklist(438390 page 48)
+VCC_RTC+3VA
D2001
1
3
2
07V030000001
reserved for leakage
Q2010
D
2N7002
12
0.8V/0.2mA
GND
R2030 330KOhm1%
3
ACZ_SYNC
1 2
R2028 10KOhm
1 2
R2040 220Ohm@ 1%
1 2
R2038 220Ohm@ 1%
1 2
R2039 220Ohm@ 1%
1 2
R2041 100Ohm1%@
1 2
R2042 100Ohm1%@
1 2
R2043 100Ohm1%@
1 2
R2044 51Ohm@
C2003
1UF/6.3V
12
@
+3VSUS_ORG
+3VSUS_ORG
GND
SB_SPKR
ACZ_SDOUT
ACZ_SYNC
VCCVRAM use +1.5VS in mobile
Request by CSC for CMOS clear function
CMOS Settings
Clear CMOS
JRST2001
Shunt
Keep CMOS Open
12
C2001
18PF/50V
GND
Xtal Spec:NC
12
C2002
18PF/50V
GND
+VCC_RTC
ACZ_BCLK_AUD36
GND
PCH_FLASH_DESCRIPTOR30
ACZ_SDOUT_AUD36
1 2
R2020 1KOhm@
1 2
R2034 1KOhm@
1 2
R2036 1KOhm
ACZ_RST#_AUD36,37
+3VS
+3VSUS_ORG
+3VSUS_ORG
SB_SPKR36
ACZ_SDIN036
TPM Settings
Clear ME RTC
Registers
Keep ME RTC
Registers
14
2
3
NB_R0402_20MIL_SMALL
R2006 330KOhm1%
SP2006
NB_R0402_20MIL_SMALL
R2055 33Ohm
SPI_CLK28,30
SPI_CS#028
SPI_CS#128,30
SPI_SI28,30
SPI_SO28,30
JRST2002
Shunt
Open
RTC_X1
X2001
32.768KHZ
SP2005
12
R2035 33Ohm
R2052 33Ohm
12
1
T2003
12
R2002
10MOhm
12
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INTVRMEN
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
HDA_DOCK_EN#
GPIO13
PCH_JTAG_TCK_BUF
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
A20
C20
RTC_X2RTC_X2_C
D20
G22
K22
C17
N34
L34
T10
K34
E34
G34
C34
A34
A36
C36
N32
J3
H7
K5
H1
T3
Y14
T1
V4
U3
U2001A
RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUD ER#
INTVRMEN
HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO13
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_MOSI
SPI_MISO
COUGAR_POINT_ES1
HM70: 0200-00PT0TB
HM76: 0200-00P20TB
RTCIHDA
JTAG
SPI
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
LPC
FWH4/LFRAME#
LDRQ0#
LDRQ1#/GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA 6G
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP/GPIO21
SATA1GP/GPIO19
C38
A38
B37
C37
D36
E36
K36
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
+VCC_RTC 22,27
+3VA
+3VA 6,30,33,37,57,60,65,81,88,93
+3VS
+3VS 3,4,16,17,21,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+3VSUS_ORG 21,22,24,25,27
+VTT_PCH_VCCIO 26,27
+5VS
+5VS 27,30,31,36,37,46,48,50,51,56,57,58,62,66,80,87,91
LPC_AD0 30, 44
LPC_AD1 30, 44
LPC_AD2 30, 44
LPC_AD3 30, 44
LPC_FRAME# 30,44
T2024
T2023
INT_SERIRQ 30,44
SATA_RXN0 51
SATA_RXP0 51
SATA_TXN0 51
SATA_TXP0 51
SATA_RXN2 51
SATA_RXP2 51
SATA_TXN2 51
SATA_TXP2 51
0.HDD
2.ODD
R1.1
1%
1 2
1 2
SP2003
12
+VTT_PCH_VCCIO
+VTT_PCH_VCCIO
GND
+3VS
PCB_ID8 25
BBS_BIT0 24
Pull High
INT_SERIRQ
R2007 35.7OHM1%
R2047 42.2Ohm
R2048 750Ohm1%
R2025 10KOhm@
NB_R0402_20MIL_SMALL
1 2
R2026 10KOhm
+3VS
PCH(1)_SATA,IHDA,RTC,LPC
PCH(1)_SATA,IHDA,RTC,LPC
PCH(1)_SATA,IHDA,RTC,LPC
Title :
Title :
Title :
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
20 104Tuesday, December 11, 2012
20 104Tuesday, December 11, 2012
20 104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
4
3
+VTT_PCH_ORG
+3VSUS_ORG
2
+3VS
+3VS 3,4,16,17,20,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+VTT_PCH_ORG 22,26,27
+3VSUS_ORG 20,22,24,25,27
1
U2001B
BG34
PERn1
D D
2.WLAN
3.LAN
C C
2.WLAN
3.LAN
B B
PCIE_RXN_WLAN53
PCIE_RXP_WLAN53
PCIE_TXN_WLAN53
PCIE_TXP_WLAN53
PCIE_RXN_LAN33
PCIE_RXP_LAN33
PCIE_TXN_LAN33
PCIE_TXP_LAN33
CLK_PCIE_WLAN#53
CLK_PCIE_WLAN53
CLK_REQ_WLAN#53
CLK_PCIE_LAN#33
CLK_PCIE_LAN33
CLK_REQ_LAN#33
1 2
C2104 0.1UF/25V
1 2
C2112 0.1UF/25V
1 2
C2105 0.1UF/25V
1 2
C2103 0.1UF/25V
SP2104
SP2105
SP2106
SP2107
SP2108
SP2109
12
12
12
12
12
12
PCIE_TXN_WLAN_C
PCIE_TXP_WLAN_C
PCIE_TXN_LAN_C
PCIE_TXP_LAN_C
CLK_REQ0#
CLK_REQ1#
CLK_PCH_SRC2_N
CLK_PCH_SRC2_P
CLK_REQ2#
CLK_PCH_SRC3_N
CLK_PCH_SRC3_P
CLK_REQ3#
CLK_REQ4#
CLK_REQ5#
CLK_REQ_PEG_B#
CLK_REQ6#
CLK_REQ7#
BJ34
PERp1
AV32
PETn1
AU32
PETp1
BE34
PERn2
BF34
PERp2
BB32
PETn2
AY32
PETp2
BG36
PERn3
BJ36
PERp3
AV34
PETn3
AU34
PETp3
BF36
PERn4
BE36
PERp4
AY34
PETn4
BB34
PETp4
BG37
PERn5
BH37
PERp5
AY36
PETn5
BB36
PETp5
BJ38
PERn6
BG38
PERp6
AU36
PETn6
AV36
PETp6
BG40
PERn7
BJ40
PERp7
AY40
PETn7
BB40
PETp7
BE38
PERn8
BC38
PERp8
AW38
PETn8
AY38
PETp8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0#/GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1#/GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2#/GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3#/GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4#/GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5#/GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ#/GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6#/GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7#/GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
COUGAR_POINT_ES1
SMBUSController
SML1ALERT#/PCHHOT #/GPIO74
PCI-E*
Link
CLOCKS
FLEX CLOCKS
HM70: 0200-00PT0TB
HM76: 0200-00P20TB
SMBALERT#/GPIO11
SML0ALERT#/GPIO60
SML1CLK/GPIO58
SML1DATA/GPIO75
PEG_A_CLKRQ#/GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_PCILOOPBACK
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
CLKREQ_PEG#
AB37
CLK_PCIE_PEG#_PCH_L
AB38
CLK_PCIE_PEG_PCH_L
AV22
AU22
AM12
AM13
BF18
CLK_BUF_EXP_N
BE18
CLK_BUF_EXP_P
BJ30
BG30
G24
CLK_BUF_DOT96_N
E24
CLK_BUF_DOT96_P
AK7
AK5
K45
H45
V47
XTAL25_IN
V49
XTAL25_OUT
Y47
XCLK_COMP
K43
DGPU_EDID_SELECT#
F47
CLK_USB48_CR_R
H47
GPIO66
K49
DGPU_PRSNT#
EXT_SCI#
SCL_3A
SDA_3A
SML0_CLK
SML0_DAT
SML1_ALERT#
SML1_CLK
SML1_DAT
CLK_BUF_CPYCLK_P
EXT_SCI# 30
SCL_3A 28
SDA_3A 28
DRAMRST_CNTRL_PCH 5,9
1
T2101
1
T2102
R1.1 2012/12/03 NFC delete this port
1
T2103
SML1_CLK 28
SML1_DAT 28
CLKREQ_PEG# 70
12
R2103 NB_R0402_20MIL_SMALL
12
R2104 NB_R0402_20MIL_SMALL
CLK_EXP_N 4
CLK_EXP_P 4
NOTE: Pull-down can be shared
between P and N signals.
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
CLK_BUF_REF14
CLK_PCI_FB 24
+VCCDIFFCLKN
1 2
R2106 90.9Ohm
R2107 22Ohm
12
1
T2127
Reserved for Wireless team
1 2
GND
C2109
10PF/50V
@
CLK_PCIE_PEG#_PCH 70
CLK_PCIE_PEG_PCH 70
CLK_DP_N 4
CLK_DP_P 4
R2142
1MOhm
1 2
NB_R0402_20MIL_SMALL
CLK_USB48_CR 40
25-MHz is required in:
1. FCIM
2. BTM for PCH Display Clock gereration
in Integrated Graphics platforms
1 2
C2101 12PF/50V
4
X2103
2
25MHZ
1 3
SP2110
12
XTAL25_OUT_C
C2102 12PF/50V
GND
1 2
GND
GND
CLK_BUF_CPYCLK_P
CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
CLK_BUF_REF14
CLOCK TERMINATION for FCIM
Default power-on mode is ICC.
EXT_SCI#
SCL_3A
SDA_3A
SML0_CLK
SML0_DAT
DRAMRST_CNTRL_PCH
SML1_CLK
SML1_DAT
SML1_ALERT#
DGPU_EDID_SELECT#
DGPU_PRSNT#
DGPU_PRSNT#
PCH CLKREQ Setting:
Not connected to device.
CLK_REQ1#
CLK_REQ0#
CLK_REQ6#
CLK_REQ5#
CLK_REQ7#
CLK_REQ_PEG_B#
CLK_REQ4#
Connected to device.
Default : Clock free run. (PD 10K).
Reserver 10K PU for power saving purpose.
CLK_REQ2#
CLK_REQ3#
CLKREQ_PEG#
CLK_REQ2#
CLK_REQ3#
CLKREQ_PEG#
1 2
R2109 10KOhm
1 2
RN2101A 10KOhm
3 4
RN2101B 10KOhm
1 2
RN2102A 10KOhm
3 4
RN2102B 10KOhm
3 4
RN2103B 10KOhm
1 2
RN2103A 10KOhm
1 2
R2116 10KOhm
1 2
R2117 10KOhm
3 4
RN2104B 2.2KOhm
5 6
RN2104C 2.2KOhm
7 8
RN2104D 2.2KOhm
1 2
RN2104A 2.2KOhm
1 2
R2120 1KOhm
3 4
RN2106B 2.2KOhm
1 2
RN2106A 2.2KOhm
1 2
R2125 10KOhm
@
1 2
R2145 10KOhm@
1 2
R2126 10KOhm/UMA
1 2
R2135 10KOhm
/VGA
R1.1
1 2
R2138 10KOhm
1 2
R2127 10KOhm
1 2
R2130 10KOhm
1 2
R2136 10KOhm
1 2
R2131 10KOhm
1 2
R2132 10KOhm
1 2
R2134 10KOhm
1 2
R2128 10KOhm
1 2
R2149 10KOhm
1 2
R2141 10KOhm
pull up at GPU
1 2
R2133 10KOhm@
1 2
R2129 10KOhm@
1 2
R2151 10KOhm@
GND
+3VSUS_ORG
+3VS
GND
+3VS
+3VSUS_ORG
+3VS
+3VSUS_ORG
GND
A A
PCH(2)_PCIE,CLK,SMB,PEG
PCH(2)_PCIE,CLK,SMB,PEG
PCH(2)_PCIE,CLK,SMB,PEG
Title :
Title :
Title :
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
21 104Tuesday, December 11, 2012
21 104Tuesday, December 11, 2012
21 104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
D D
+VTT_PCH_ORG
C C
PM_PWROK4,30,92
ME_SUSPWRDNACK DSWODVREN
+3VS
SP2212 NB_R0402_20MIL_SMALL
SP2201 NB_R0402_20MIL_SMALL
non-iAMT:connected to PWROK.
PM_DRAM_PWRGD4
PM_RSMRST#
has PD 10k ohm in EC
B B
PM_RSMRST#30
ME_SUSPWRDNACK30
PM_PWRBTN#30
ME_AC_PRESENT30
SYS_PWROK for PCH
U2201
A
1
DELAY_VR_AND_ALL_SYS92
PM_PWROK
A A
VCC
B
2
3 4
GND
Vcc=2~5.5
5
Y
4
R2201 49.9Ohm1%
R2202 750Ohm1%
GND
NB_R0402_20MIL_SMALL
1
T2206
R2205 10KOhm
1 2
D2201 1.2V/0.1A
@
12
12
NB_R0402_20MIL_SMALL
NB_R0402_20MIL_SMALL
+3VSUS
SYS_PWROK
3
U2001C
DMI_RXN03
DMI_RXN13
DMI_RXN23
DMI_RXN33
DMI_RXP03
DMI_RXP13
DMI_RXP23
DMI_RXP33
DMI_TXN03
DMI_TXN13
DMI_TXN23
DMI_TXN33
DMI_TXP03
DMI_TXP13
DMI_TXP23
DMI_TXP33
12
DMI_COMP_R
12
RBIAS_CPY
SP2203
12
SP2213
SP2214
T2201
T2202
12
12
1
1
SUSACK#_R
PM_SYSRST#_R
SYS_PWROK
PM_PCH_PWROK_R
PM_APWROK_R
PM_RSMRST_R
BATLOW#
RI#
12
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPW RDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT/GPIO31
E10
BATLOW# /GPIO72
A10
RI#
COUGAR_POINT_ES1
PANTHERPOINT
HM70: 0200-00PT0TB
HM76: 0200-00P20TB
DMI
FDI
CLKRUN#/GPIO32
SUS_STAT#/GPIO6 1
SUSCLK/GPIO62
SLP_S5#/GPIO63
System Power Management
SLP_LAN#/GPIO29
Add for S3 power reduce
+5VSUS+3VSUS
12
12
R2230
10KOhm
@
SP2211
SUSB_EC#24,30,36,57,91,92
PM_SUSB#
R2241 0Ohm@
12
NB_R0402_20MIL_SMALL
12
R2232
10KOhm
@
61
Q2203A
2
UM6K1N
@
GND
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
SLP_SUS#
PMSYNCH
+12VSUS
5
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
PM_SUS_STAT#
N14
SUSCLK_C
D10
SLP_S5#
H4
F4
G10
ME_PM_SLP_M#
G16
SLP_SUS#
AP14
K14
GPIO29
R2231
100KOhm
1%
@
1 2
PS_S3CNTRL_1.5V
34
Q2203B
UM6K1N
@
GND
FDI_TXN0 3
FDI_TXN1 3
FDI_TXN2 3
FDI_TXN3 3
FDI_TXN4 3
FDI_TXN5 3
FDI_TXN6 3
FDI_TXN7 3
FDI_TXP0 3
FDI_TXP1 3
FDI_TXP2 3
FDI_TXP3 3
FDI_TXP4 3
FDI_TXP5 3
FDI_TXP6 3
FDI_TXP7 3
FDI_INT 3
FDI_FSYNC0 3
FDI_FSYNC1 3
FDI_LSYNC0 3
FDI_LSYNC1 3
1 2
R2215 330KOhm@
1 2
R2214 330KOhm
SP2202
12
NB_R0402_20MIL_SMALL
PCIE_WAKE# 33,53
PM_CLKRUN# 30
T2203
1
T2207
1
T2204
1
PM_SUSC# 30
PM_SUSB# 30
NC when non-iAMT
T2205
1
H_PM_SYNC 4
NC when non-intel LAN
GND
PM_RSMRST_R
2
+3VSUS_ORG
+3VS
+VTT_PCH_ORG
+3VA
+VCC_RTC
+3VSUS
+5VSUS
+12VSUS
DSWODVREN - On Die DSW VR Enable
HIGH - Enabled(DEFAULT) ; LOW-Disabled
+VCC_RTC
1
+3VSUS_ORG 20,21,24,25,27
+3VS 3,4,16,17,20,21,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+VTT_PCH_ORG 26,27
+3VA 6,20,30,33,37,57,60,65,81,88,93
+VCC_RTC 20,27
+3VSUS 24,27,28,30,33,34,37,53,62,81,92
+5VSUS 27,51,52,62,81,82
+12VSUS 33,36,51,81,91
+3VSUS_ORG
RI#
BATLOW#
PCIE_WAKE#
ME_PM_SLP_M#
ME_SUSPWRDNACK
ME_AC_PRESENT
GPIO29
PM_CLKRUN#
PM_PWROK
1 2
R2223 10KOhm
1 2
R2224 10KOhm
1 2
R2225 1KOhm
1 2
R2226 10KOhm@
1 2
R2227 10KOhm
1 2
R2228 10KOhm
1 2
R2229 10KOhm@
1 2
R2220 10KOhm
1 2
R2221 10KOhm
+3VS
GND
PCH(3)_FDI,DMI,SYS PWR
PCH(3)_FDI,DMI,SYS PWR
PCH(3)_FDI,DMI,SYS PWR
Title :
Title :
Title :
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
1
Engineer:
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
22 104Tuesday, December 11, 2012
22 104Tuesday, December 11, 2012
22 104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
4
3
2
1
+3VS
D D
U2001D
LCD_BKEN_PCH45
R2306
L_VDDEN_PCH45
LVDSA_LCLKN_PCH45
LVDSA_LCLKP_PCH45
LVDSA_L0N_PCH45
LVDSA_L1N_PCH45
LVDSA_L2N_PCH45
LVDSA_L0P_PCH45
LVDSA_L1P_PCH45
LVDSA_L2P_PCH45
12
DDC_DATA_PCH46
CRT_HSYNC_PCH46
CRT_VSYNC_PCH46
L_BKLT_CTRL45
EDID_CLK_PCH45
EDID_DATA_PCH45
1
T2301
1
T2302
/VGA_OPT/UMA
R2301 2.37KOhm
R2302 0Ohm@
SP2303
NB_R0402_20MIL_SMALL
GND
B_PCH
G_PCH
R_PCH
DDC_CLK_PCH46
R2303 1KOhm0.5%
GND GND
L_CTRL_CLK
L_CTRL_DATA
12
12
12
+3VS
/VGA_OPT/UMA
RN2301A 2.2KOhm
RN2301B 2.2KOhm
RN2301D 2.2KOhm
RN2301C 2.2KOhm
R2307 100KOhm
R2308 100KOhm
GND
C C
CRT_B_PCH46
CRT_G_PCH46
CRT_R_PCH46
CRT_B_PCH
CRT_G_PCH
CRT_R_PCH
JP2301 SHORT_PIN
50 ohm
50 ohm
50 ohm
12
/VGA_OPT/UMA
34
/VGA_OPT/UMA
78
/VGA_OPT/UMA
56
/VGA_OPT/UMA
12
/VGA_OPT/UMA
12
12
JP2302 SHORT_PIN
Close to PCH
B B
+3VS
L_CTRL_CLK
L_CTRL_DATA
EDID_DATA_PCH
EDID_CLK_PCH
LCD_BKEN_PCH
L_VDDEN_PCH
12
JP2303 SHORT_PIN
12
R2304
150Ohm
/VGA_OPT/UMA
1 2
RN2302A 2.2KOhm
3 4
RN2302B 2.2KOhm
12
/VGA_OPT/UMA
GND
37.5 ohm
37.5 ohm
37.5 ohm
R2305
150Ohm
12
/VGA_OPT/UMA
DDC_DATA_PCH
DDC_CLK_PCH
150Ohm
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
12
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
COUGAR_POINT_ES1
HM70: 0200-00PT0TB
HM76: 0200-00P20TB
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDAT A
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT
SDVO_INTN
SDVO_INTP
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
RN2303A
2.2KOhm
/VGA_OPT/UMA
DDPD_AUXN
DDPD_AUXP
+3VS
1 2
RN2303B
2.2KOhm
/VGA_OPT/UMA
3 4
1
1
T2303
T2304
+3VS 3,4,16,17,20,21,22,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
HDMI_DDC_CLK_PCH 48
HDMI_DDC_DATA_PCH 48
HDMI_HPD_PCH 48
HDMI_TXN2_PCH 48
HDMI_TXP2_PCH 48
HDMI_TXN1_PCH 48
HDMI_TXP1_PCH 48
HDMI_TXN0_PCH 48
HDMI_TXP0_PCH 48
HDMI_CLKN_PCH 48
HDMI_CLKP_PCH 48
Display Port D
CRT Disable: (For discrete graphic)
1. NC:
CRT_RED,CRT_GREEN,CRT_BLUE
CRT_HSYCN,CRT_VSYNC
2. 1-kΩ ±0.5% pull-down to GND:
DAC_IREF
3. Connected to GND:
CRT_ITRN
4. Connect to +V3.3:
VCCADAC
A A
5
4
3
DisPlay Port Disable: (For discrete graphic)
1. NC:
ALL
LVDS Disable: (For discrete graphic)
1. NC:
LVDSA_DATA [3:0], LVDSA_DATA# [3:0],
LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0],
LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK#
L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH
LVD_VREFL, LVD_IBG, LVD_VBG
2. Connected to GND:
VccALVDS,VccTX_LVDS
2
Title :
Title :
Title :
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
1
Engineer:
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
PCH(4)_DP,LVDS,CRT
PCH(4)_DP,LVDS,CRT
PCH(4)_DP,LVDS,CRT
Jim3_Liu
Jim3_Liu
Jim3_Liu
23 104Tuesday, December 11, 2012
23 104Tuesday, December 11, 2012
23 104Tuesday, December 11, 2012
of
of
of
Rev
Rev
Rev
1.1
1.1
1.1
5
4
3
2
+3VSUS
+3VSUS_ORG
+12VS
+3VSUS 22,27,28,30,33,34,37,53,62,81,92
+3VS
+3VS 3,4,16,17,20,21,22,23,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+3V
+3V 44,45,57,91
+3VSUS_ORG 20,21,22,25,27
+12VS 28,31,48,91
1
D D
U2402
VGA_PWRON91
R2414 0Ohm
+3VSUS
1 2
5
VCC
4
SN74LVC1G08DCKR
1 2
R2413 0Ohm
+3VS
12
R2430
10KOhm
1
A
2
B
GND3Y
@
1 2
R2415 0Ohm
SUSB_EC# 22,30,36,57,91,92
GND
DGPU_PWR_EN
USB (3.0 for IVB)
R1.1
port1
port2
C C
DGPU_HOLD_RST#:
1 = Reset is released.
100 ms after DGPU_PWROK
B B
A A
+3VS
7 8
RN2403D 10KOhm
5 6
RN2403C 10KOhm
3 4
RN2403B 10KOhm
1 2
RN2403A 10KOhm
+3VS
RN2407C 10KOhm
RN2407D 10KOhm
RN2407B 10KOhm
RN2407A 10KOhm
R2422 10KOhm
R2423 1KOhm
56
78
34
12
12
12
BBS_BIT0,BBS_BIT1 : Boot BIOS Strap
Boot BIOS Strap
BBS_BIT0BBS_BIT1 Boot BIOS Location
00
01
10
1
1
MPC_PWR_CTRL#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQA#
SATA_ODD_DA#
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH
DGPU_HOLD_RST#
DGPU_PWR_EN
LPC
Reserved (NAND)
Reserved
(PCH)
SPI
DGPU_HOLD_RST#70
SATA_ODD_DA#51
CLK_PCI_FB21
CLK_KBCPCI_PCH30
CLK_DEBUG44
STP_A16OVR:
A16 swap override Strap/
Top-Block swap override jumper
Low=Enabled A16 swap override/
Top-Block swap override
High=Default
DGPU_PWR_EN
GND
C2403
10PF/50V
@
1 2
GND
SP2402
NB_R0402_20MIL_SMALL
R2405 1KOhm@
Reserved for Wireless team
Sampled on rising edge of PWROK.
BBS_BIT020
BBS_BIT0
BBS_BIT1
5
1 2
R2417 1KOhm@
1 2
R2418 1KOhm@
GND
STP_A16OVR
R2419 1KOhm@
4
1 2
GND
KB_LED_ID31
1 2
T2401
T2402
12
12
12
PLT_RST#
USB3_RX1_N52
USB3_RX2_N52
USB3_RX1_P52
USB3_RX2_P52
USB3_TX1_N52
USB3_TX2_N52
USB3_TX1_P52
USB3_TX2_P52
12
1
1
R240922Ohm
R241022Ohm
R241222Ohm
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
DGPU_HOLD_RST#
PCB_ID12
DGPU_PWR_EN_R
BBS_BIT1
KB_LED_ID
STP_A16OVR
MPC_PWR_CTRL#
SATA_ODD_DA#
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH
PCI_PME#
PLT_RST#
CLKOUT_PCI0
CLK_PCI_FB_R
CLK_KBCPCI_PCH_R
CLK_DBG_R
U2401
A
1
B
2
3 4
GND
SN74LVC1G08DCKR
GND
1 2
R2428 0Ohm@
3
BG26
BH25
BG16
AH38
AH37
AK43
AK45
AH12
AB46
AB45
AY16
BG46
BE28
BC30
BE32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
VCC
Y
U2001E
TP1
BJ26
TP2
TP3
BJ16
TP4
TP5
TP6
TP7
TP8
TP9
C18
TP10
N30
TP11
H3
TP12
TP13
AM4
TP14
AM5
TP15
Y13
TP16
K24
TP17
L24
TP18
TP19
TP20
B21
TP21
M20
TP22
TP23
TP24
TP25
TP26
TP27
BJ32
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1#/GPIO50
C44
REQ2#/GPIO52
E40
REQ3#/GPIO54
D47
GNT1#/GPIO51
E42
GNT2#/GPIO53
F46
GNT3#/GPIO55
G42
PIRQE#/GPIO2
G40
PIRQF#/GPIO3
C42
PIRQG#/GPIO4
D44
PIRQH#/GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
COUGAR_POINT_ES1
+3V
5
RSVD
PCI
USB
HM70: 0200-00PT0TB
HM76: 0200-00P20TB
R2426
10KOhm
BUF_PLT_RST# 4,30, 32,33,40,53,70
12
GND
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
NV_RCOMP
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
HM65:Port6,7 Disable
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
USB_BIAS
A14
GPIO59
K20
GPIO40
B17
GPIO41
C16
GPIO42
L16
A16
D14
PCB_ID11
C14
PCB_ID10
2
1 2
R2427 32.4Ohm1%
@
USB_PN0 52
USB_PP0 52
USB_PN1 52
USB_PP1 52
USB_PN2 53
USB_PP2 53
USB_PN3 52
USB_PP3 52
USB_PN8 40
USB_PP8 40
USB_PN9 52
USB_PP9 52
USB_PN10 45
USB_PP10 45
USB_PN11 61
USB_PP11 61
USB_PN12 62
USB_PP12 62
R2416 22.6Ohm
7 8
RN2401D 10KOhm
1 2
RN2401A 10KOhm
3 4
RN2401B 10KOhm
5 6
RN2401C 10KOhm
HARMAN_DET2 37
ONKYO_DET1 37
GND
0.USB - USB3.0 co-lay
1.USB - USB3.0 co-lay
2.WIFI/BT module
3.USB-Reserve
4.TV Tuner Card1
5.TV Tuner Card2 (Reserve)
8.Card reader
9.USB
10.Camera
11.Touch Panel
11.NFC
R1.1 add USB12 for NFC
GND
Place within 500 mils of PCH
R2431
10KOhm
R2432
10KOhm
@
PCB_ID11
1: Support
0: No Support0 USB 3.0 port
12
R2433
10KOhm
/SLP_MUSIC
12
R2434
10KOhm
/non-SLP_MUSIC
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Date: Sheet
Date: Sheet
Date: Sheet
PCB_ID10
USB 3.0 Port Sleep & Music
1: Support
0: No Support
+3VSUS_ORG +3VSUS_ORG
12
PCB_ID10
PCB_ID11
PCB_ID12
12
GND GND
+3VSUS_ORG
Size Project Name
Size Project Name
Size Project Name
C
C
C
9
3
USB CONN location
TP
HM70:Port4,5 Disable
PCB_ID12
eDP & LVDS
1: eDP
0: LVDS
+3VS
12
R2435
10KOhm
/eDP
12
R2436
10KOhm
/LVDS
GND
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
1
1
0
PCH(5)_PCI,NVRAM,USB
PCH(5)_PCI,NVRAM,USB
PCH(5)_PCI,NVRAM,USB
Jim3_Liu
Jim3_Liu
Jim3_Liu
24 104Tuesday, December 11, 2012
24 104Tuesday, December 11, 2012
24 104Tuesday, December 11, 2012
of
of
of
Rev
Rev
Rev
1.1
1.1
1.1
5
4
3
+VCCP
+3VSUS_ORG
+1.8VS
2
+3VS
+3VS 3,4,16,17,20,21,22,23,24,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+VCCP 3,4,6,7,26,27,32,57,82
+3VSUS_ORG 20,21,22,24,27
+1.8VS 7, 26,84
1
BIOS Rev. SKU
1 port support
Sleep & Charge
+3VS
+3VS
12
12
R2530
10KOhm
R1.1
12
12
R2531
10KOhm
@
GND
GND
PCB_ID8
0 0: 17W
0 1: 35W
1 0: 45W
1 1: Reserve
+3VS
+3VS
12
R2546
10KOhm
12
R2548
1KOhm
@
GND
GND
R1.1
R2529 1KOhm
R2538 10KOhm
R2539 10KOhm
R2524 10KOhm
R2544 10KOhm
R2542 10KOhm
R2553 10KOhm
PCB_ID3
USB 3.0
1: 2 port
0: 1 port
+3VS +3VS
12
R2533
10KOhm
12
R2532
1KOhm
@
GND
+3VS
12
R2549
10KOhm
@
12
R2550
10KOhm
GND
/nonWOWL
1 2
R2540
10KOhm
R2537
10KOhm
@
12
12
12
12
12
12
12
12
R2551
10KOhm
@
R2552
10KOhm
R1.1
12
R2535
10KOhm
/Zero_ODD
12
R2536
10KOhm
/NON_Zero_ODD
GND
+3VSUS_ORG
PCB_ID4
1:OPT/UMA
0:DSC
+3VS
PCB_ID5
1:Zero_ODD
0:NON_Zero_ODD
BT_ON/OFF#53
EXT_SMI#30, 44
DGPU_PWROK87,91,92
WLAN_LED56
R1.1
Clear password for TODs required
Place ONTO D-part
JRST2501
GND
1 2
R2518 1KOhm1%
+3VS GND
FDI TERMINATION VOLTAGE OVERRIDE
- GPIO37 (FDI_OVRVLTG)
LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
DEFAULT
R2520 200KOhm1%
+3VS
DMI TERMINATION VOLTAGE OVERRIDE
- GPIO36 (SATA_ODD_PRSNT#)
LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
DEFAULT
SGL_JUMP
@
1 2
112
2
FDI_OVRVLTG
CRT_IN#46
SATA_ODD_PRSNT#51
WLAN_ON53
GPIO16
1 2
R2519 100KOhm
SATA_ODD_PRSNT#
PCB_ID4
PCB_ID6
PCB_ID7
PCB_ID3
BT_ON/OFF#
GPIO12
GPIO16
DGPU_PWROK
GPIO24
GPIO27
PLL_ODVR_EN
PCB_ID2
FDI_OVRVLTG
PCB_ID0
PCB_ID1
PCB_ID9
PCB_ID5
WLAN_ON
U2001F
T7
BMBUSY#/GPIO0
A42
TACH1/GPIO1
H36
TACH2/GPIO6
E38
TACH3/GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL/GPIO12
G2
GPIO15
U2
SATA4GP/GPIO16
D40
TACH0/GPIO17
T5
SCLOCK/GPIO22
E8
GPIO24/MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI#/GPIO34
K4
GPIO35
V8
SATA2GP/GPIO36
M5
SATA3GP/GPIO37
N2
SLOAD/GPIO38
M3
SDATAOUT0/G PIO39
V13
SDATAOUT1/G PIO48
V3
SATA5GP/GPIO49
D6
GPIO57
A4
Vss_NCTF1
A44
Vss_NCTF2
A45
Vss_NCTF3
A46
Vss_NCTF4
A5
Vss_NCTF5
A6
Vss_NCTF6
B3
Vss_NCTF7
B47
Vss_NCTF8
BD1
Vss_NCTF9
BD49
Vss_NCTF10
BE1
Vss_NCTF11
BE49
Vss_NCTF12
BF1
Vss_NCTF13
BF49
Vss_NCTF14
COUGAR_POINT_ES1
GPIO
NCTF
HM70: 0200-00PT0TB
HM76: 0200-00P20TB
TACH4/GPIO68
TACH5/GPIO69
TACH6/GPIO70
TACH7/GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V #
DF_TVS
CPU/MISC
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
Vss_NCTF15
Vss_NCTF16
Vss_NCTF17
Vss_NCTF18
Vss_NCTF19
Vss_NCTF20
Vss_NCTF21
Vss_NCTF22
Vss_NCTF23
Vss_NCTF24
Vss_NCTF25
Vss_NCTF26
Vss_NCTF27
Vss_NCTF28
Vss_NCTF29
Vss_NCTF30
Vss_NCTF31
Vss_NCTF32
C40
B41
R2511 1.5KOhm1%
C41
R2512 1.5KOhm1%
A40
R2513 1.5KOhm1%
P4
AU16
H_PECI_R
P5
AY11
AY10
PM_THRMTRIP#
T14
INIT3_3V#
AY1
NV_CLE
AH8
TS Signal Disable Guideline
AK11
TS_VSS[1:4] should pull down to GND
Design Guide 0.9 (436735)
AH10
AK10
P37
GND
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
1 2
1 2
1 2
1 2
R2514 0Ohm@
1 2
R2516 390Ohm1%
1
T2504
R2503 1KOhm
12
SATA_ODD_PWRGT 51
GND
+3VS
+3VS
A20GATE 30
RCIN# 30
H_CPUPWRGD 4
1 2
R2515 43Ohm
1 2
R2502 2.2KOhm
H_THRMTRIP# 4,32
+1.8VS
H_PECI 4
H_PECI_EC 30
H_SNB_IVB# 4
ID0 ID1 PCB Rev.
D D
0 0 R1.0
0 1 R1.1
1 0 R2.0
1 1 R2.1
+3VS
PCB_ID0
PCB_ID1
PCB_ID2
PCB_ID3
PCB_ID4
PCB_ID5
C C
GND
PCB_ID6 PCB_ID9
1: Standard
0: Entry
PCB_ID820
1: Premium
0: Mainstream
PCB_ID6
PCB_ID7
PCB_ID8
PCB_ID9
R1.1
B B
10/11
10/11
A A
+3VS
12
R2525
10KOhm
@
12
R2526
10KOhm
PCB_ID7
EXT_SMI#
GPIO12
BT_ON/OFF#
GPIO24
WLAN_ON
DGPU_PWROK
GPIO16
GND
+3VS
12
R1.1
12
12
12
GND
R2528
10KOhm
R2527
10KOhm
@
PCB_ID2
1: HDMI
0:non-HDMI
R2545
10KOhm
R2547
1KOhm
@
DGPU_PWROK
GPIO27
#438390 Checklist
5
R2543 10KOhm@
R2523 10KOhm
12
12
PLL ON DIE VR ENABLE
HIGH - ENABLED
LOW - DISABLED
GND
4
PLL_ODVR_EN
R1.1
R2521 1KOhm@
1 2
GND
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
3
2
Date: Sheet
VGFTG
VGFTG
VGFTG
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
PCH(6)_CPU,GPIO,MISC
PCH(6)_CPU,GPIO,MISC
PCH(6)_CPU,GPIO,MISC
Jim3_Liu
Jim3_Liu
Jim3_Liu
25 104Tuesday, December 11, 2012
25 104Tuesday, December 11, 2012
25 104Tuesday, December 11, 2012
of
of
of
Rev
Rev
Rev
1.1
1.1
1.1
5
D D
C C
B B
GND GND
T2601
TPC26T
1
A A
T2602
TPC26T
1
AA17
AA33
AA34
AB11
AB14
AB39
AB43
AC19
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD40
AD42
AD43
AD45
AD46
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF42
AF46
AG19
AG31
AG48
AH11
AH36
AH39
AH40
AH42
AH46
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
H5
AA2
AA3
AB4
AB5
AB7
AC2
AD4
AD8
AE2
AE3
AF4
AF5
AF7
AF8
AG2
AH3
AH7
AK3
U2001H
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
COUGAR_POINT_ES1
+1.5VS
T2603
TPC26T
1
+1.05VS
+VTT_PCH_ORG
SP2602
160mA
12
NB_R0402_20MIL_SMALL
JP2601
2
112
4.56A=330mA+1.3A+2.925A
3MM_OPEN_5MIL
JP2602
1.3A
2
112
2MM_OPEN_5MIL
JP2603
2.925A
2
112
2MM_OPEN_5MIL
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
+VCCAFDI_VRM
+VTT_PCH_ORG
+VTT_PCH_VCC
+VTT_PCH_VCCIO
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
+VCCAFDI_VRM
GND
12
C2624
0.1UF/25V
+VTT_PCH_ORG
+VTT_PCH_VCCIO
4
+VTT_PCH_VCC
+VTT_PCH_VCCIO
+VTT_PCH_ORG
+VTT_PCH_VCCIO
10UF/6.3V
vx_c0603_small
R2605 0Ohm@
SP2604
NB_R0402_20MIL_SMALL
C2601
10UF/6.3V
vx_c0603_small
NB_R0402_20MIL_SMALL
L2601 1kOhm/100Mhz
12
C2606
+VTT_PCH_VCCAPLL_FDI
12
+VTT_PCH_VCCDPLL_FDI
12
12
GND
SP2601
2 1
@
+VTT_PCH_VCC_EXP
12
C2607
1UF/6.3V
+3VS_VCC3_3
12
C2602
1UF/6.3V
GND
GND GND
+VTT_PCH_VCCDPLL_EXP
12
12
C2608
1UF/6.3V
SP2603
12
NB_R0402_20MIL_SMALL
12
C2623
0.1UF/25V
@
GND
12
12
C2603
1UF/6.3V
+VTT_PCH_VCCDPLL_EXP
+VTT_PCH_VCCAPLL_EXP
12
C2605
10UF/6.3V
vx_c0603_small
@
GND
1.572A
12
12
C2609
1UF/6.3V
GND
+3VS_VCCA3GBG
12
C2611
0.1UF/25V
GND
+VCCIO_CPU_VCC_DMI
1.73A
C2604
1UF/6.3V
C2610
1UF/6.3V
131mA
22.25mA
+VCCAFDI_VRM
147mA
131mA
47mA
3
U2001G
AA23
VccCore1
AC23
VccCore2
AD21
VccCore3
AD23
VccCore4
AF21
VccCore5
AF23
VccCore6
AG21
VccCore7
AG23
VccCore8
AG24
VccCore9
AG26
VccCore10
AG27
VccCore11
AG29
VccCore12
AJ23
VccCore13
AJ26
VccCore14
AJ27
VccCore15
AJ29
VccCore16
AJ31
VccCore17
AN19
VccIO1
BJ22
VccAPLLEXP
AN16
VccIO2
AN17
VccIO3
AN21
VccIO4
AN26
VccIO5
AN27
VccIO6
AP21
VccIO7
AP23
VccIO8
AP24
VccIO9
AP26
VccIO10
AT24
VccIO11
AN33
VccIO12
AN34
VccIO13
BH29
Vcc3_3_1
AP16
VccVRM1
BG6
VccAFDIPLL
AP17
VccIO14
AU20
VccDMI1
COUGAR_POINT_ES1
POWER
CRTLVDS
VCC CORE
DMI
VCCIO
DFT / SPI HVCMOS
FDI
HM70: 0200-00PT0TB
HM76: 0200-00P20TB
VccADAC
VssADAC
VccALVDS
VssALVDS
VccTX_LVDS1
VccTX_LVDS2
VccTX_LVDS3
VccTX_LVDS4
Vcc3_3_2
Vcc3_3_3
VccVRM2
VccDMI2
VccClkDMI
VccDFTERM1
VccDFTERM2
VccDFTERM3
VccDFTERM4
VccSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
2
+VTT_PCH_VCCIO
+VTT_PCH_ORG
+VCCP
+1.05VS
+3VS_VCC3_3
+3VM_SPI
+VCCAFDI_VRM
+VCCA_DAC_1_2
63mA
12
C2612
0.01UF/50V
/VGA_OPT/UMA
GND
GND
GND
+3VS_VCCA_LVD
1mA
12
GND
44.5mA
+VCCAFDI_VRM
147mA
47mA
75mA
2mA
10mA
R2610
0Ohm
@
12
C2615
0.01UF/50V
/VGA_OPT/UMA
GND
+3VS_VCC_GIO
+1.8VS_VCCTX_LVD
12
GND
GND
40mA
12
R2611
0Ohm
@
GND
+VCCIO_CPU_VCC_DMI
12
C2619
1UF/6.3V
+VTT_PCH_ORG_VCCCLKDMI
GND
12
C2620
10UF/6.3V
vx_c0603_small
@
+V_NVRAM_VCCPNAND +1.8VS
GND
12
C2621
0.1UF/25V
+3VM_VCCPSPI
GND
12
C2622
0.1UF/25V
GND
+VTT_PCH_VCCIO 20,27
+VTT_PCH_ORG 22,27
+1.8VS
+1.5VS
12
C2618
0.1UF/25V
+VCCP 3,4,6,7,27,32,57,82
+1.8VS 7, 25,84
+1.5VS 53,57,91
+3VS
+3VS 3,4,16,17,20,21,22,23,24,25,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+1.05VS 27,80,82
+3VS_VCC3_3 27
+3VM_SPI 28
+VCCAFDI_VRM 27
C2613
0.1UF/25V
/VGA_OPT/UMA
R2616 0Ohm@
R2617 0Ohm
12
GND
1 2
R2609 0Ohm
12
C2616
0.01UF/50V
/VGA_OPT/UMA
GND
NB_R0402_20MIL_SMALL
SP2606
12
NB_R0402_20MIL_SMALL
2 1
L2603 1kOhm/100Mhz
@
R2614 0Ohm
SP2605
12
NB_R0402_20MIL_SMALL
1 2
R2607 0Ohm
C2614
10UF/6.3V
vx_c0603_small
/VGA_OPT/UMA
/VGA_OPT/UMA
L2602 1kOhm/100Mhz
12
C2617
10UF/6.3V
vx_c0603_small
/VGA_OPT/UMA
GND
12
+VCCP
12
+3VS_VCC3_3
+VTT_PCH_ORG
+3VS +3VM_SPI
SP2607
12
12
+3VS
+3VS
21
/VGA_OPT/UMA
1
SKU(VGA)
C2612,C2613,
C2614,R2609,
C2615,C2616,
L2602
R2610,R2611
+1.8VS
UMA/OPT DSC
I
NI
NI I
Title :
Title :
Title :
PCH(7)_POWER,GND
PCH(7)_POWER,GND
PCH(7)_POWER,GND
Jim3_Liu
Jim3_Liu
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Jim3_Liu
26 104Tuesday, December 11, 2012
26 104Tuesday, December 11, 2012
26 104Tuesday, December 11, 2012
Rev
Rev
Rev
1.1
1.1
1.1
of
of
of
5
U2001I
AY4
VSS159
AY42
VSS160
AY46
VSS161
AY8
VSS162
B11
VSS163
B15
VSS164
B19
VSS165
B23
VSS166
B27
VSS167
B31
VSS168
B35
VSS169
B39
VSS170
B7
VSS171
F45
VSS172
D D
BB12
C C
B B
VSS173
BB16
VSS174
BB20
VSS175
BB22
VSS176
BB24
VSS177
BB28
VSS178
BB30
VSS179
BB38
VSS180
BB4
VSS181
BB46
VSS182
BC14
VSS183
BC18
VSS184
BC2
VSS185
BC22
VSS186
BC26
VSS187
BC32
VSS188
BC34
VSS189
BC36
VSS190
BC40
VSS191
BC42
VSS192
BC48
VSS193
BD46
VSS194
BD5
VSS195
BE22
VSS196
BE26
VSS197
BE40
VSS198
BF10
VSS199
BF12
VSS200
BF16
VSS201
BF20
VSS202
BF22
VSS203
BF24
VSS204
BF26
VSS205
BF28
VSS206
BD3
VSS207
BF30
VSS208
BF38
VSS209
BF40
VSS210
BF8
VSS211
BG17
VSS212
BG21
VSS213
BG33
VSS214
BG44
VSS215
BG8
VSS216
BH11
VSS217
BH15
VSS218
BH17
VSS219
BH19
VSS220
H10
VSS221
BH27
VSS222
BH31
VSS223
BH33
VSS224
BH35
VSS225
BH39
VSS226
BH43
VSS227
BH7
VSS228
D3
VSS229
D12
VSS230
D16
VSS231
D18
VSS232
D22
VSS233
D24
VSS234
D26
VSS235
D30
VSS236
D32
VSS237
D34
VSS238
D38
VSS239
D42
VSS240
D8
VSS241
E18
VSS242
E26
VSS243
G18
VSS244
G20
VSS245
G26
VSS246
G28
VSS247
G36
VSS248
G48
VSS249
H12
VSS250
H18
VSS251
H22
VSS252
H24
VSS253
H26
VSS254
H30
VSS255
H32
VSS256
H34
VSS257
F3
VSS258
COUGAR_POINT_ES1
GND
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
GND
+VTT_PCH_VCCIO
NB_R0402_20MIL_SMALL
SP2715
1 2
+VTT_PCH_ORG
4
L2704 1kOhm/100Mhz
@
+VTT_PCH_ORG
12
C2715
1UF/6.3V
GND
+1.05VM_ORG
+VCCP
+VTT_PCH_ORG
+3VSUS_ORG
21
12
C2707
10UF/6.3V
vx_c0603_small
@
GND
+1.05VM_ORG
12
C2709
22UF/6.3V
1 2
R2708 0Ohm
C2716
1UF/6.3V
R2710 0Ohm@
SP2701
1 2
NB_R0603_25MIL_SMALL
1 2
R2703 0Ohm@
SP2711
1 2
NB_R0402_20MIL_SMALL
0.1UF/25V
+VTT_PCH_VCCIO
NB_R0402_20MIL_SMALL
12
C2710
22UF/6.3V
GNDGND
12
C2714
0.1UF/25V
GND
12
+VTT_PCH_ORG
GND
1 2
+VTT_CPU_VCCPCPU
+VCC_RTC
12
C2705
12
GND
GND
SP2712
1 2
12
C2708
1UF/6.3V
@
GND
12
12
C2711
C2712
1UF/6.3V
1UF/6.3V
GND
GND
+VCCAFDI_VRM
+VTT_PCH_VCCA_A_DPL
+VTT_PCH_VCCA_B_DPL
+VCCDIFFCLKN
+VTT_PCH_ORG_SSCVCC
SP2716
1 2
GND
C2717
1UF/6.3V
+V1.05VM_ORG_VCCSUS
12
C2720
4.7UF/6.3V
12
GND
12
12
+VTT_PCH_VCCACLK
C2706
0.1UF/25V
@
+VCCAPLL_CPY_PCH
+VCCDPLL_CPY
+VCCSUS1
12
GND
+VCCRTCEXT
+VCCDIFFCLK
GND
C2718 0.1UF/25V
12
C2719
1UF/6.3V
@
GND
C2721
0.1UF/25V
GNDGND
C2723
1UF/6.3V
3
+VCCPDSW
PCH_VCCDSW
+3VS_VCC_CLKF33
22.25mA
131mA
120mA
803mA
C2713
1UF/6.3V
120mA
12
C2722
0.1UF/25V
12
C2724
0.1UF/25V
147mA
75mA
75mA
131mA
55mA
95mA
12
VCCSST
1mA
6uA
1mA
12
AD49
T16
V12
T38
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31
W21
W23
W24
W26
W29
W31
W33
N16
Y49
BD47
BF47
AF17
AF33
AF34
AG34
AG33
V16
T17
V19
BJ8
A22
C2725
0.1UF/25V
U2001J
COUGAR_POINT_ES1
POWER
VccAClk
VccDSW3_3
DcpSusByp
Vcc3_3_4
VccAPLLDMI2
VccIO15
DcpSus1
VccASW1
VccASW2
VccASW3
VccASW4
VccASW5
VccASW6
VccASW7
VccASW8
VccASW9
VccASW10
VccASW11
VccASW12
VccASW13
VccASW14
VccASW15
VccASW16
VccASW17
VccASW18
VccASW19
VccASW20
DcpRTC
VccVRM3
VccADPLLA
VccADPLLB
VccIO16
VccDIFFCLKN1
VccDIFFCLKN2
VccDIFFCLKN3
VccSSC
DcpSST
DcpSus2
DcpSus3
V_PROC_IO
VccRTC
HM70: 0200-00PT0TB
HM76: 0200-00P20TB
Clock and Miscellaneous
CPURTC
PCI/GPIO/LPCMISC
SATA USB
HDA
VccIO17
VccIO18
VccIO19
VccIO20
VccIO21
VccSus3_3_1
VccSus3_3_2
VccSus3_3_3
VccSus3_3_4
VccSus3_3_5
VccIO22
V5REF_Sus
DcpSus4
VccSus3_3_6
V5REF
VccSus3_3_7
VccSus3_3_8
VccSus3_3_9
VccSus3_3_10
Vcc3_3_5
Vcc3_3_6
Vcc3_3_7
Vcc3_3_8
VccIO23
VccIO24
VccIO25
VccIO26
VccAPLLSATA
VccVRM4
VccIO27
VccIO28
VccIO29
VccASW21
VccASW22
VccASW23
VccSusHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
2
+VTT_PCH_VCCUSBCORE
524mA
65mA
12
C2727
0.1UF/25V
GND
65mA
131mA
+VCCAUPLL
1mA
+VCCA_USBSUS
65mA
1mA
65mA
GND
44.5mA
22.25mA
GND
22.25mA
GND
524mA
GND
147mA
393mA
GND
803mA
10mil trace
10mA
GND
12
C2726
1UF/6.3V
GND
+3VSUS_ORG_VCCPUSB
+3VSUS_ORG_VCCAUBG
12
C2728
0.1UF/25V
GND
1 2
SP2705
NB_R0402_20MIL_SMALL
120mA
+3VSUS_ORG_VCCPSUS
+3VSUS_ORG_VCCPSUS
12
C2732
1UF/6.3V
+3VS_VCCPCORE
+3VS_VCCPPCI
12
C2734
0.1UF/25V
12
C2735
0.1UF/25V
12
C2736
1UF/6.3V
+VTT_PCH_VCCIO_VCC_SATA
12
C2738
1UF/6.3V
+3VSUS_ORG_VCCPAZSUS
12
C2739
1UF/6.3V
NB_R0402_20MIL_SMALL
+VTT_PCH_VCCIO_SATA3
NB_R0402_20MIL_SMALL
+VTT_PCH_ORG_VCCAPLL_SATA3
+VCCAFDI_VRM
NB_R0402_20MIL_SMALL
NB_R0402_20MIL_SMALL
1 2
NB_R0402_20MIL_SMALL
1 2
NB_R0402_20MIL_SMALL
1 2
NB_R0402_20MIL_SMALL
+VTT_PCH_VCCIO
+5VSUS_PCH_VCC5REFSUS
12
C2730
1UF/6.3V
@
GND
SP2706
1 2
NB_R0402_20MIL_SMALL
SP2708
1 2
SP2709
1 2
SP2710
1 2
SP2714
1 2
SP2702
SP2703
SP2704
12
GND
+3VSUS_ORG
+3VSUS_ORG
1UF/6.3V
+5VS_PCH_VCC5REF
+3VSUS_ORG
+3VS_VCC3_3
+3VS_VCC3_3
+VTT_PCH_VCCIO
L2705 1kOhm/100Mhz
@
C2737
10UF/6.3V
vx_c0603_small
@
+VTT_PCH_VCCIO
+1.05VM_ORG
+3VSUS_ORG
+VTT_PCH_VCCIO
1
2
3
R2711 10Ohm
12
C2729
GND
12
C2731
1UF/6.3V
GND
12
C2733
0.1UF/25V
GND
21
1
07V030000001
0.8V/0.2mA
D2701
1 2
1
3
R2712 10Ohm
SP2707
1 2
NB_R0402_20MIL_SMALL
+VTT_PCH_ORG
2
07V030000001
0.8V/0.2mA
D2702
1 2
+3VSUS_ORG
+5VSUS_ORG
+3VS
+3VS_VCC3_3
+5VS
GND
T2703
TPC26T
1
3
GND
T2702
TPC26T
1
+5VSUS +5VSUS_ORG
JP2702
2
112
1MM_OPEN_M1M2
+3VSUS +3VSUS_ORG
JP2703
2
T2701
+3VS +3VS_VCC3_3
TPC26T
1
+1.05VS +1.05VM_ORG
112
1MM_OPEN_M1M2
JP2704
2
112
1MM_OPEN_M1M2
JP2701
2
112
1MM_OPEN_M1M2
1mA
97mA
266mA
1.01A
2
+1.05VS
+VTT_PCH_ORG
+VCCP
+VTT_PCH_VCCIO
+3VSUS
+VCC_RTC
+5VSUS
+3VSUS_ORG
+3VA
+VCCAFDI_VRM
+3VS_VCC3_3
+1.05VS 26,80,82
+3VS
+3VS 3,4,16,17,20,21,22,23,24,25,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+VTT_PCH_ORG 22,26
+VCCP 3,4,6,7,26,32,57,82
+VTT_PCH_VCCIO 20,26
+3VSUS 22,24,28,30,33,34,37,53,62,81,92
+VCC_RTC 20,22
+5VSUS 22,51,52,62,81,82
+5VS
+5VS 20,30,31,36,37,46,48,50,51,56,57,58,62,66,80,87,91
+3VSUS_ORG 20,21,22,24,25
+3VA 6,20,30,33,37,57,60,65,81,88,93
+VCCAFDI_VRM 26
+3VS_VCC3_3 26
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
VGFTG
VGFTG
VGFTG
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
PCH(8)_POWER,GND
PCH(8)_POWER,GND
PCH(8)_POWER,GND
Jim3_Liu
Jim3_Liu
Jim3_Liu
27 104Tuesday, December 11, 2012
27 104Tuesday, December 11, 2012
27 104Tuesday, December 11, 2012
of
of
of
Rev
Rev
Rev
1.1
1.1
1.1
GND
+3VS_VCC3_3
CO-LAY
@
1 2
21
L2701 1kOhm/100Mhz
R2709 0Ohm
A A
5
+3VS_VCC_CLKF33
22.25mA
12
C2701
10UF/6.3V
vx_c0603_small
GND GND
12
C2702
1UF/6.3V
+VTT_PCH_VCCA_A_DPL
12
R2702
0Ohm
@
+VTT_PCH_VCCA_B_DPL
12
C2703
1UF/6.3V
GND
+VTT_PCH_VCCA_B_DPL
12
C2704
1UF/6.3V
GND
4
GND
GND
12
12
75mA
C2741
22UF/6.3V
75mA
C2740
22UF/6.3V
+VTT_PCH_ORG
21
L2702 1kOhm/100Mhz
21
L2703 1kOhm/100Mhz
5
PCH SPI ROM
+3VA_EC reserved for share ROM
R2855 0Ohm@
R2861 0Ohm
+3VA_EC
R2863 0Ohm
+3VSUS
D D
R2847 0Ohm@
12
12
12
@
12
D2801
1
2
0.8V/0.2mA
07V030000001
R1.1
+3VM_SPI
3
Configuration1(Win 7)
U2801
@
U2802 @
ME+BIOS+EC 4MBU2803
ummount:
R2855, R2856, R2864, R2865, R2853,
R2852, R2834, R2850, R2851, R2832,
C2803, U2802, R2869, R2870, R2868,
D2802, U2801, R2835, R2836
Configuration2(Win 8)
U2801 ME Firmware 2MB
U2802 EC+BIOS 4MB
C C
4
Option for Win8
SPI_CS#020
SPI_SO20,30
SPI_CS#120,30
+3VM_SPI
+3VM_SPI
3
12
R2860 0Ohm
1 2
R2859 33Ohm1%
1 2
R2833 3.3KOhm
R2853 0Ohm
1 2
R2852 33Ohm 1%
1 2
R2834 3.3KOhm
12
+3VM_SPI
R2836
3.3KOhm
@
1 2
SPI1_CS#0
SPI1_SO
+3VM_SPI1_WP#
SPI2_CS#1
SPI2_SO
+3VM_SPI
1 2
R2835
3.3KOhm
@
U2801
1
CS#
2
SO/SIO1
3
WP#/ACC
GND4SI/SIO0
MX25L1606EM2I-12G
05V000000010
U2802
1
CS#
2
DO(IO1)
3
WP#(IO2)
GND4DI(IO0)
MX25L3206EM2I-12G
05V000000005
VCC
HOLD#
SCLK
(2MB)
HOLD#(IO3)
(4MB)
VCC
CLK
2
8
7
6
5
C2803
0.1UF/25V
8
7
6
5
+3VS
+12VS
+12VSUS
+3VM_SPI
12
SPI2_HOLD#
SPI2_CLK+3VM_SPI2_WP#
SPI2_SI
+3VS 3,4,16,17,20,21,22,23,24,25,26,27,30,31,32,36,40,45,46,48,50,51,53,57,58,61, 62,91,92
+12VS 31,48,91
+12VSUS 22,33,36,51,81,91
+3VM_SPI 26
+3VM_SPI
12
C2802
+3VM_SPI
0.1UF/25V
SPI1_CLK
SPI1_SI
1 2
R2832
3.3KOhm
R2831
3.3KOhm
1 2
1 2
R2848 33Ohm 1%
1 2
R2849 33Ohm 1%
1 2
R2850 33Ohm 1%
1 2
R2851 33Ohm 1%
1
SPI_CLK 20,30
SPI_SI 20,30
ummount:
R2858, R2862, R2866, R2867, U2803
+12VS
5
Q2802B
UM6K1N
+3VS
SMBUS Link device
SPD
R2854
4.7KOhm
12
12
R2857
4.7KOhm
DEBUG
WLAN
CPU XDP
PCH XDP
SMB_CLK_S 16, 17,31
DIMM
SMB_DAT_S 16,17,31
SML1_CLK 21
34
SML1_DAT 21
2
PCH
Title :
Title :
Title :
Engineer:
Engineer:
VGFTG
VGFTG
VGFTG
Engineer:
1
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
BG1-CSC-HW R&D Dept .5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
PCH(9)_SPI,SMB
PCH(9)_SPI,SMB
PCH(9)_SPI,SMB
Jim3_Liu
Jim3_Liu
Jim3_Liu
28 104Tuesday, December 11, 2012
28 104Tuesday, December 11, 2012
28 104Tuesday, December 11, 2012
of
of
of
Rev
Rev
Rev
1.1
1.1
1.1
PCH SMBus
R1.1
Quad I/O Flash ROM part number.
U2801 ME Firmware 2MB
Winbond
B B
MXIC
2MB
2MB
U2802 EC+BIOS 4MB
Winbond
MXIC
A A
4MB
4MB
5
Pegatron P/N
0500-01H3000
0500-01HU000
Pegatron P/N
0500-01FA000
0500-01HW000
Pegatron VX
05V000000023
Pegatron VX
05V000000022
2
Q2801A
UM6K1N
Q2802A
UM6K1N
6 1
Q2801B
UM6K1N
2
3 4
+12VS
61
5
SCL_3A21
PCH
EC
4
SDA_3A21
SMB1_CLK30,50,58,74
SMB1_DAT30,50,58,74
3
Loading...