5
4
3
2
1
PEGATRON CONFIDENTIAL
MODEL NAME :
D D
PCB NO :
69- P/N :
C C
BS/TK Colay Schematic
Intel Arrandale rPGA-989
PCH BGA 1071
2010-07-19
B B
REV :R1.0
A A
Cover Page
Cover Page
Cover Page
Title :
Title :
Title :
ChingPo Chen
ChingPo Chen
Engineer:
Engineer:
BS
BS
BS
Engineer:
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
ChingPo Chen
1
Rev
Rev
Rev
2.0
2.0
19 4 Saturday, March 05, 2011
19 4 Saturday, March 05, 2011
19 4 Saturday, March 05, 2011
2.0
5
4
3
2
1
BS/TK BLOCK DIAGRAM
CLOCK GEN.
D D
FAN
PAGE 49
DISPLAY PORT
/Removed
HDMI
PAGE 40
PAGE 39
N12M/P
PCIE *16 GEN2
PAGE 70:79
CRT
PAGE 38
LVDS & INV
PAGE 37
PAGE 67
PAGE 67
PAGE 45
PAGE 45
PAGE 48
PAGE 13
PAGE 48
PAGE 48
FFC
FFC
Azalia Codec (Main)
RTK/ALC269
Azalia Codec (Entry)
RTK/ALC269
Azalia
MDC Header
EC
IT8512E-L
C C
HP_OUT
MIC IN
HP_OUT
MIC IN
K/B
PCH
B B
SPI 32Mb
SPI 512Kb
T/P
SATA HDD
SATA ODD
A A
5
PAGE 41 42
PAGE 44
PAGE 43
PAGE 46
PAGE 60
PAGE 60
XDP
/Removed
PAGE 75
SPI 32Mb
PAGE 13
4
Azalia
LPC
ARD
(989-Pin rFCPGA)
PCH
1071 BGA
SATA
PAGE 7-12
DMI
PAGE 13-19
USB2.0
USB2.0
DDR3 1066 MHz
PCIE *1
USB2.0
3
DDR-III
SO-DIMM
10/100 LAN
RTL8103EL
USB3.0 Controller
NEC uPD720200
MiniCard
WLAN/WMAX
Card Reader
AU6435A51
Felica /Removed
Bluetooth /Removed
Camera
Fingerprint /Removed
Touch Panel /Removed
USB x2 Ports
USB 3.0x1
PAGE 54
PAGE 55
PAGE 50
PAGE 62
PAGE 62
PAGE 37
PAGE 48
PAGE 62
PAGE 61, 67
PAGE 61, 67
PAGE 21,22
SATA PORT
SATA P0
SATA P1
SATA P4
SATA P5
PCIe Port
PCIE_P1
PCIE_P2
PCIE_P3
PCIE_P4
PCIE_P5
PCIE_P6
USB PORT
USB P00
USB P01
USB P02
USB P03
USB P04
USB P05
USB P08
USB P09
USB P10
USB P11
USB P12
USB P13
2
LAN IO
PAGE 67, 68
HDD
ODD
Mini CARD (WLAN)
USB3.0 Controller
LAN
Card Reader
WiFi
External Entry
Camera
External Main
External Main
External Main/Entry
SLG8SP585V
LED
PAGE 66
Switch
PAGE 24
PAGE 65
POWER
CPU VCORE
SYSTEM, +3V, +5V
+VCCP & +VCCP_VT
DDR & VTT
2.5V & 1.5VS &1.1VS
SMART CHARGER
POWER DETECT
LOAD SWITCH
POWER PROTECT
Power Rails
Sleep State
S0 ON
S3 OFF ON ON ON ON
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
PAGE 80
PAGE 81
PAGE 82
PAGE 83
PAGE 84
PAGE 88
PAGE 90
PAGE 91
PAGE 92
RTC VA VSUS
ON ON
ON
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
BS
BS
BS
1
VV S
ON
OFF S4 ON OFF ON ON
OFF ON ON OFF ON S5/ AC
OFF S5/ DC ON OFF OFF ON
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
ChingPo Chen
ChingPo Chen
ChingPo Chen
29 4 Saturday, March 05, 2011
29 4 Saturday, March 05, 2011
29 4 Saturday, March 05, 2011
Rev
Rev
Rev
2.0
2.0
2.0
A
B
SCHEMATIC INDEX V1.0
PAGE# Description NOTE
C
D
E
Description NOTE PAGE#
1 1
2 2
3 3
4 4
5 5
01
02
03
04
05
06
07-10
11-16
17-20
21-23
24
25-33
34
35-36
37
38
39
40
41-45
46-48
49
50-52
53
54
55
56
57
58-59
60
61-62
63-64
65-66
67-68
Cover Page
Block Diagram
PAGE INDEX
Bus connection
SMBus Diagram
Power Rail
CPU
GMCH
ICH
DDR2/3 SO-DIMM
Clock Generator
Reserved
Power Express/ SLI Logic
Reserved VGA port
LVDS CON
RGB CON
HDMI (Level shift for UMA)
Dispaly port
AUDIO CODEC & AMP & Jack
EC ITE8512E / FLASH / KB / TP
THERMAL / FAN
CARD READER / 1394
Smart Card
PCI-Express Card
MINI CARD -WUSB /UPCONVERT
MINI CARD -WWAN
MINI CARD -WiFi/WMAX
Reserve
SATA(HDD & CD_ROM)
USB (Jacks & Camera & BT & FP con & eSATA)
DC-IN / Discharge / NVM
CIR, LID, MDC, SW, LED, Power BTN, Debug
LAN / RJ45 / RJ11
A
B
Reserved
Other int CONNs
3D sensor 69
70
71
72
CAP sense
FM tunner
SCREW PAD
73 NAND FLASH/ HYPER FLASH
74 Reserved
75 XDP
76 Port Docking
77 DC-IN & BAT connector and discharge
78 Power Sequence Logic
79 POWER LOAD SWITCH
80-100 POWER schematics
101- Daughter Board Combined Solutions
PAGE INDEX
PAGE INDEX
PAGE INDEX
Title :
Title :
Title :
ChingPo Chen
ChingPo Chen
Engineer:
Engineer:
BS
BS
BS
Engineer:
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet of
ChingPo Chen
E
Rev
Rev
Rev
2.0
2.0
39 4 Saturday, March 05, 2011
39 4 Saturday, March 05, 2011
39 4 Saturday, March 05, 2011
2.0
5
U0701A
U0701A
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
G24
G23
G21
G18
G22
G19
A24
C23
B22
A21
B24
D23
B23
A22
D24
F23
H23
D25
F24
E23
E22
D21
D19
D18
E19
F21
D22
C21
D20
C18
E20
F20
F17
E17
C17
F18
D17
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
FDI_FSYNC[0]
FDI_FSYNC[1]
FDI_INT
FDI_LSYNC[0]
FDI_LSYNC[1]
SOCKET989
SOCKET989
DMI Intel(R) FDI
DMI Intel(R) FDI
D D
C C
B B
DMI_TXN0 14
DMI_TXN1 14
DMI_TXN2 14
DMI_TXN3 14
DMI_TXP0 14
DMI_TXP1 14
DMI_TXP2 14
DMI_TXP3 14
DMI_RXN0 14
DMI_RXN1 14
DMI_RXN2 14
DMI_RXN3 14
DMI_RXP0 14
DMI_RXP1 14
DMI_RXP2 14
DMI_RXP3 14
FDI_TXN0 14
FDI_TXN1 14
FDI_TXN2 14
FDI_TXN3 14
FDI_TXN4 14
FDI_TXN5 14
FDI_TXN6 14
FDI_TXN7 14
FDI_TXP0 14
FDI_TXP1 14
FDI_TXP2 14
FDI_TXP3 14
FDI_TXP4 14
FDI_TXP5 14
FDI_TXP6 14
FDI_TXP7 14
FDI_FSYNC0 14
FDI_FSYNC1 14
FDI_INT 14
FDI_LSYNC0 14
FDI_LSYNC1 14
R0715 1KOhm
R0715 1KOhm
1 2
DSC
DSC
R0711 1KOhm
R0711 1KOhm
1 2
DSC
DSC
R0713 1KOhm
R0713 1KOhm
1 2
DSC
DSC
R0712 1KOhm
R0712 1KOhm
1 2
DSC
DSC
R0714 1KOhm
R0714 1KOhm
1 2
DSC
DSC
Default: DSC Only
DSC only: Pop all resisters
UMA only: Depop all resisters
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
4
PEG_COMP
B26
A26
B27
EXP_RBIAS
A25
PCIE_MRX_GTX_N15 PCIE_MRX_GTX_N15
K35
PCIE_MRX_GTX_N14 PCIE_MRX_GTX_N14
J34
PCIE_MRX_GTX_N13 PCIE_MRX_GTX_N13
J33
PCIE_MRX_GTX_N12 PCIE_MRX_GTX_N12
G35
PCIE_MRX_GTX_N11 PCIE_MRX_GTX_N11
G32
PCIE_MRX_GTX_N10 PCIE_MRX_GTX_N10
F34
PCIE_MRX_GTX_N9 PCIE_MRX_GTX_N9
F31
PCIE_MRX_GTX_N8 PCIE_MRX_GTX_N8
D35
PCIE_MRX_GTX_N7 PCIE_MRX_GTX_N7
E33
PCIE_MRX_GTX_N6 PCIE_MRX_GTX_N6
C33
PCIE_MRX_GTX_N5 PCIE_MRX_GTX_N5
D32
PCIE_MRX_GTX_N4 PCIE_MRX_GTX_N4
B32
PCIE_MRX_GTX_N3 PCIE_MRX_GTX_N3
C31
PCIE_MRX_GTX_N2 PCIE_MRX_GTX_N2
B28
PCIE_MRX_GTX_N1 PCIE_MRX_GTX_N1
B30
PCIE_MRX_GTX_N0
A31
PCIE_MRX_GTX_P15 PCIE_MRX_GTX_P15
J35
PCIE_MRX_GTX_P14 PCIE_MRX_GTX_P14
H34
PCIE_MRX_GTX_P13 PCIE_MRX_GTX_P13
H33
PCIE_MRX_GTX_P12 PCIE_MRX_GTX_P12
F35
PCIE_MRX_GTX_P11 PCIE_MRX_GTX_P11
G33
PCIE_MRX_GTX_P10 PCIE_MRX_GTX_P10
E34
PCIE_MRX_GTX_P9 PCIE_MRX_GTX_P9
F32
PCIE_MRX_GTX_P8 PCIE_MRX_GTX_P8
D34
PCIE_MRX_GTX_P7 PCIE_MRX_GTX_P7
F33
PCIE_MRX_GTX_P6 PCIE_MRX_GTX_P6
B33
PCIE_MRX_GTX_P5
D31
PCIE_MRX_GTX_P4
A32
PCIE_MRX_GTX_P3
C30
PCIE_MRX_GTX_P2 PCIE_MRX_GTX_P2
A28
PCIE_MRX_GTX_P1 PCIE_MRX_GTX_P1
B29
PCIE_MRX_GTX_P0
A30
PCIE_MTX_GRX_C_N0
L33
PCIE_MTX_GRX_C_N1 PCIE_MTX_GRX_N14
M35
PCIE_MTX_GRX_C_N2
M33
PCIE_MTX_GRX_C_N3
M30
PCIE_MTX_GRX_C_N4
L31
PCIE_MTX_GRX_C_N5
K32
PCIE_MTX_GRX_C_N6
M29
PCIE_MTX_GRX_C_N7
J31
PCIE_MTX_GRX_C_N8
K29
PCIE_MTX_GRX_C_N9
H30
PCIE_MTX_GRX_C_N10
H29
PCIE_MTX_GRX_C_N11
F29
PCIE_MTX_GRX_C_N12
E28
PCIE_MTX_GRX_C_N13
D29
PCIE_MTX_GRX_C_N14
D27
PCIE_MTX_GRX_C_N15
C26
PCIE_MTX_GRX_C_P0
L34
M34
PCIE_MTX_GRX_C_P2
M32
PCIE_MTX_GRX_C_P3
L30
PCIE_MTX_GRX_C_P4
M31
K31
PCIE_MTX_GRX_C_P6
M28
PCIE_MTX_GRX_C_P7
H31
PCIE_MTX_GRX_C_P8
K28
PCIE_MTX_GRX_C_P9
G30
PCIE_MTX_GRX_C_P10
G29
PCIE_MTX_GRX_C_P11
F28
E27
PCIE_MTX_GRX_C_P13
D28
PCIE_MTX_GRX_C_P14
C27
PCIE_MTX_GRX_C_P15
C25
R0701 49.9Ohm 1%R0701 49.9Ohm 1%
1 2
R0702 750OHM 1%R0702 750OHM 1%
1 2
C0701 0.1UF/10V DSCC0701 0.1UF/10V DSC
C0702 0.1UF/10V DSCC0702 0.1UF/10V DSC
C0703 0.1UF/10V DSCC0703 0.1UF/10V DSC
C0704 0.1UF/10V DSCC0704 0.1UF/10V DSC
C0705 0.1UF/10V DSCC0705 0.1UF/10V DSC
C0706 0.1UF/10V DSCC0706 0.1UF/10V DSC
C0707 0.1UF/10V DSCC0707 0.1UF/10V DSC
C0708 0.1UF/10V DSCC0708 0.1UF/10V DSC
C0709 0.1UF/10V DSCC0709 0.1UF/10V DSC
C0710 0.1UF/10V DSCC0710 0.1UF/10V DSC
C0711 0.1UF/10V DSCC0711 0.1UF/10V DSC
C0712 0.1UF/10V DSCC0712 0.1UF/10V DSC
C0713 0.1UF/10V DSCC0713 0.1UF/10V DSC
C0714 0.1UF/10V DSCC0714 0.1UF/10V DSC
C0715 0.1UF/10V DSCC0715 0.1UF/10V DSC
C0716 0.1UF/10V DSCC0716 0.1UF/10V DSC
C0717 0.1UF/10V DSCC0717 0.1UF/10V DSC
C0718 0.1UF/10V DSCC0718 0.1UF/10V DSC
C0719 0.1UF/10V DSCC0719 0.1UF/10V DSC
C0720 0.1UF/10V DSCC0720 0.1UF/10V DSC
C0721 0.1UF/10V DSCC0721 0.1UF/10V DSC
C0722 0.1UF/10V DSCC0722 0.1UF/10V DSC
C0723 0.1UF/10V DSCC0723 0.1UF/10V DSC
C0724 0.1UF/10V DSCC0724 0.1UF/10V DSC
C0725 0.1UF/10V DSCC0725 0.1UF/10V DSC
C0726 0.1UF/10V DSCC0726 0.1UF/10V DSC
C0727 0.1UF/10V DSCC0727 0.1UF/10V DSC
C0728 0.1UF/10V DSCC0728 0.1UF/10V DSC
C0729 0.1UF/10V DSCC0729 0.1UF/10V DSC
C0730 0.1UF/10V DSCC0730 0.1UF/10V DSC
C0731 0.1UF/10V DSCC0731 0.1UF/10V DSC
C0732 0.1UF/10V DSCC0732 0.1UF/10V DSC
PCIE_MRX_GTX_N[0..15] 70
PCIE_MRX_GTX_P[0..15] 70
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
PCIE_MTX_GRX_N[0..15] 70
PCIE_MTX_GRX_P[0..15] 70
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_P14 PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P10 PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P3 PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P0
3
R1.0- 1
M_VREFDQ_CHA/B
for CFD only
T0723 T0723
1
T0721 T0721
1
VREFDQ_CHA
VREFDQ_CHB
H_CFG0
H_CFG1
T0701 T0701
1
H_CFG2
T0702 T0702
1
H_CFG3
H_CFG4
H_CFG5
T0705 T0705
1
H_CFG6
T0706 T0706
1
H_CFG7
T0707 T0707
1
H_CFG8
T0708 T0708
1
H_CFG9
T0709 T0709
1
H_CFG10
T0710 T0710
1
H_CFG11
T0711 T0711
1
H_CFG12
T0712 T0712
1
H_CFG13
T0713 T0713
1
H_CFG14
T0714 T0714
1
H_CFG15
T0715 T0715
1
H_CFG16
T0716 T0716
1
H_CFG17
T0717 T0717
1
H_CFG18
T0718 T0718
1
Place Near CON7501
H_RSVD17
T0719 T0719
1
H_RSVD18
T0720 T0720
1
AP25
AL25
AL24
AL22
AJ33
AG9
M27
H17
G25
G17
E31
E30
AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16
B19
A19
A20
B20
AC9
AB9
A34
A33
C35
B35
L28
J17
U9
T9
C1
A3
J29
J28
2
U0701E
U0701E
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD_NCTF_23
RSVD_NCTF_24
RSVD26
RSVD27
RSVD_NCTF_28
RSVD_NCTF_29
RSVD_NCTF_30
RSVD_NCTF_31
SOCKET989
SOCKET989
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD_NCTF_37
RSVD38
RSVD39
RSVD_NCTF_40
RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
RSVD_TP_59
RSVD_TP_60
RESERVED
RESERVED
RSVD62
RSVD63
RSVD64
RSVD65
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
KEY
VSS
AJ13
AJ12
AH25
AK26
AL26
AR2
AJ26
AJ27
H_RSVD40
AP1
H_RSVD41
AT2
H_RSVD42
AT3
H_RSVD43
AR1
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
E15
F15
A2
D15
C15
H_RSVD64
AJ15
H_RSVD65
AH15
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
H_RSVD86
AP34
VSS (AP34):
NC CRB
EDS/DG GND
1
T0725 T0725
1
T0726 T0726
1
T0727 T0727
1
T0728 T0728
1
T0722 T0722
1
T0724 T0724
1
H_CFG0
A A
5
4
1 2
CFG0 : PCIE Config Strap
R0708
R0708
3.01KOhm
3.01KOhm
H = Single PEG (Default)
1% @
1% @
L = Bifurcation enabled
H_CFG3 H_CFG4
3
1 2
CFG3 : PCIE Lane Reversal
R0709
R0709
H = Normal Operation (Default)
3.01KOhm
3.01KOhm
1%
1%
L = Lane Numbers Reversed
DSC
DSC
2
1 2
CFG4 : eDP Presence
R0710
R0710
3.01KOhm
3.01KOhm
H = Disable (Default)
1% @
1% @
L = Enable
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
BS
BS
BS
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
CPU(1)
CPU(1)
CPU(1)
ChingPo Chen
ChingPo Chen
ChingPo Chen
79 4 Saturday, March 05, 2011
79 4 Saturday, March 05, 2011
79 4 Saturday, March 05, 2011
Rev
Rev
Rev
2.0
2.0
2.0
5
U0701C
U0701C
4
3
U0701D
U0701D
2
1
AA6
SA_CK[0]
D D
C C
B B
M_A_DQ[0:63] 21
M_A_CAS# 21
M_A_RAS# 21
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_BS0 21
M_A_BS1 21
M_A_BS2 21
M_A_WE# 21
A10
C10
B10
D10
E10
F10
H10
G10
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
AC3
AB2
AE1
AB3
AE9
C7
A7
A8
D8
E6
F7
E9
B7
E7
C6
G8
K7
G7
J10
M6
M8
K8
N8
P9
U7
J8
J7
L7
L9
L6
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA7
P7
Y6
Y5
P6
AE2
AE8
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_CLK_DDR0 21
M_CLK_DDR#0 21
M_CKE0 21
M_CLK_DDR1 21
M_CLK_DDR#1 21
M_CKE1 21
M_CS#0 21
M_CS#1 21
M_ODT0 21
M_ODT1 21
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DM[0..7] 21
M_A_DQS#[0:7] 21
M_A_DQS[0:7] 21
M_A_A[0:15] 21
M_B_DQ[0:63] 22
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS0 22
M_B_BS1 22
M_B_BS2 22
M_B_CAS# 22
M_B_RAS# 22
M_B_WE# 22
AF3
AG1
AK1
AG4
AG3
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
AB1
AC5
AC6
M1
M4
AJ3
AJ4
W5
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
K5
K4
N5
R7
Y7
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
W8
W9
M3
V7
V6
M2
AB8
AD6
AC7
AD1
D4
E1
H3
K1
AH1
AL2
AR4
AT8
D5
F4
J4
L4
AH2
AL4
AR5
AR8
C5
E3
H4
M5
AG2
AL5
AP5
AR7
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_CLK_DDR2 22
M_CLK_DDR#2 22
M_CKE2 22
M_CLK_DDR3 22
M_CLK_DDR#3 22
M_CKE3 22
M_CS#2 22
M_CS#3 22
M_ODT2 22
M_ODT3 22
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DM[0:7] 22
M_B_DQS#[0:7] 22
M_B_DQS[0:7] 22
M_B_A[0:15] 22
SOCKET989
A A
5
SOCKET989
SOCKET989
SOCKET989
CPU CLK/MISC/JTAG
CPU CLK/MISC/JTAG
CPU CLK/MISC/JTAG
Title :
Title :
Title :
ChingPo Chen
ChingPo Chen
Engineer:
Engineer:
BS
BS
BS
Engineer:
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
ChingPo Chen
1
Rev
Rev
Rev
2.0
2.0
89 4 Saturday, March 05, 2011
89 4 Saturday, March 05, 2011
89 4 Saturday, March 05, 2011
2.0
5
D D
C C
B B
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
U0701H
U0701H
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
4
AE34
VSS81
AE33
VSS82
AE32
VSS83
AE31
VSS84
AE30
VSS85
AE29
VSS86
AE28
VSS87
AE27
VSS88
AE26
VSS89
AE6
VSS90
AD10
VSS91
AC8
VSS92
AC4
VSS93
AC2
VSS94
AB35
VSS95
AB34
VSS96
AB33
VSS97
AB32
VSS98
AB31
VSS99
AB30
VSS100
AB29
VSS101
AB28
VSS102
AB27
VSS103
AB26
VSS104
AB6
VSS105
AA10
VSS106
Y8
VSS107
Y4
VSS108
Y2
VSS109
W35
VSS110
W34
VSS111
W33
VSS112
W32
VSS113
W31
VSS114
W30
VSS115
W29
VSS116
W28
VSS117
VSS
VSS
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
3
U0701I
U0701I
K27
VSS161
K9
VSS162
K6
VSS163
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
E24
E21
E18
E13
E11
D33
D30
D26
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
A29
A27
A23
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
VSS205
VSS206
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
VSS230
VSS231
VSS232
A9
VSS233
VSS
VSS
NCTF
NCTF
2
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
CPU_NCTF1
CPU_NCTF2
CPU_NCTF6
CPU_NCTF7
1
T0901 T0901
1
T0902 T0902
1
T0903 T0903
1
T0904 T0904
1
SOCKET989
SOCKET989
A A
5
SOCKET989
4
3
SOCKET989
CPU GND
CPU GND
CPU GND
Title :
Title :
Title :
ChingPo Chen
ChingPo Chen
Engineer:
Engineer:
BS
BS
BS
Engineer:
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
ChingPo Chen
1
Rev
Rev
Rev
2.0
2.0
99 9 Saturday, March 05, 2011
99 9 Saturday, March 05, 2011
99 9 Saturday, March 05, 2011
2.0
5
D D
+VCCP_VTT
R1019 68Ohm @R1019 68Ohm @
1 2
R1018 49.9Ohm
R1018 49.9Ohm
1 2
C C
PM_DRAM_PWRGD 14
B B
A A
5
H_CPURST#
H_CATERR#
1%
1%
H_PECI 17
PM_THRMTRIP# 17,32
H_PM_SYNC 14
H_CPUPWRGD 17
H_VTTPWRGD 92
T1012 T1012
BUF_PLT_RST# 16,32,46,55,67,70
T1001 T1001
H_VTTPWRGD
1
R1026
R1026
1 2
1.5KOhm
1.5KOhm
1%
1%
+1.5VS
4
R1004 20Ohm1%R1004 20Ohm
1 2
1%
R1003 20Ohm1%R1003 20Ohm
1 2
1%
R1002 49.9Ohm1%R1002 49.9Ohm
1 2
1%
R1001 49.9Ohm1%R1001 49.9Ohm
1 2
1%
SKTOCC#_R
1
H_CATERR#
H_PROCHOT_S#
H_CPURST#
VCCPWRGOOD_1
VCCPWRGOOD_0
VDDPWRGOOD_R
H_PWRGD_XDP
RSTIN#
1 2
R1031
R1031
750OHM
750OHM
1%
1%
1 2
R1029
R1029
1.1KOHM
1.1KOHM
1% @
1% @
VDDPWRGOOD_R
1 2
R1030
R1030
750OHM
750OHM
1%
1%
4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
PECI
AT23
AT24
G16
AT26
AH24
AK14
AT15
AN26
AK15
AP26
AL15
AN14
AN27
AK13
AM15
AM26
AL14
DDR3_DRAMRST# 21,22
R1038
R1038
1.5KOhm
1.5KOhm
1%
1%
U0701B
U0701B
COMP3
COMP2
COMP1
COMP0
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
RESET_OBS#
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD
RSTIN#
SOCKET989
SOCKET989
DRAMPWRGD_CPU
1 2
RST_GATE 17
+3VSUS
+1.5V
1 2
1 2
R1040
R1040
1KOhm
1KOhm
3
MISC
MISC
BCLK_ITP#
PEG_CLK#
DPLL_REF_SSCLK
CLOCKS
CLOCKS
THERMAL PWR MANAGEMENT
THERMAL PWR MANAGEMENT
C1001
C1001
1 2
0.1UF/10V@
0.1UF/10V@
U1002
U1002
5
VCC
VCC
Y
Y
SN74AHC1G08DCKR
SN74AHC1G08DCKR
@
@
DPLL_REF_SSCLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
DDR3
MISC
DDR3
MISC
JTAG & MBP
JTAG & MBP
R1043 0Ohm R1043 0Ohm
1 2
+3VSUS
1 2
R1037
R1037
8.2KOhm
8.2KOhm
@
@
A
A
1
B
B
2
3 4
GND
GND
For Intel S3 Power Reduction
Q1002
Q1002
2N7002
2N7002
S
S
SM_DRAMRST#
2
2
G
G
3
R1041
R1041
10KOhm
10KOhm
1 2
@
@
D
D
3
3
C1002
C1002
0.1UF/10V
0.1UF/10V
1
1
BCLK
BCLK#
BCLK_ITP
PEG_CLK
PRDY#
PREQ#
TCK
TMS
TRST#
TDI
TDO
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
RB751V-40
RB751V-40
0.37V/30mA
0.37V/30mA
1 2
1 2
@
@
BCLK_CPU_P_R
A16
BCLK_CPU_N_R
B16
BCLK_ITP_P_R
AR30
BCLK_ITP_N_R
AT30
CLK_EXP_P_R
E16
CLK_EXP_N_R
D16
A18
A17
SM_DRAMRST#
F6
SM_RCOMP_0
AL1
SM_RCOMP_1
AM1
SM_RCOMP_2
AN1
AN15
AP15
XDP_PRDY#
AT28
XDP_PREQ#
AP27
XDP_TCK
AN28
XDP_TMS
AP28
XDP_TRST#
AT27
XDP_TDI
AT29
XDP_TDO
AR27
XDP_TDI_R
AR29
XDP_TDO_R
AP29
XDP_DBRESET#
AN25
XDP_OBS0_R
AJ22
XDP_OBS1_R
AK22
XDP_OBS2_R
AK24
XDP_OBS3_R
AJ24
XDP_OBS4_R
AJ25
XDP_OBS5_R
AH22
XDP_OBS6_R
AK23
XDP_OBS7_R
AH23
Place Near CON7501
D1002
D1002
@
@
C1003
C1003
1UF/6.3V
1UF/6.3V
1 2
R1039
R1039
100KOhm
100KOhm
R1008 100Ohm 1%R1008 100Ohm 1%
1 2
R1009 24.9Ohm 1%R1009 24.9Ohm 1%
1 2
R1010 130Ohm 1%R1010 130Ohm 1%
1 2
PM_EXTTS#0 21
PM_EXTTS#1 22
T1011 T1011
1
T1015 T1015
1
T1016 T1016
1
T1002 T1002
1
T1003 T1003
1
T1004 T1004
1
T1005 T1005
1
T1006 T1006
1
T1007 T1007
1
T1008 T1008
1
T1009 T1009
1
PM_PWROK 14,46
+VCCP_+1.8VS_PWRGD 82,92
2
BCLK_CPU_P 17
BCLK_CPU_N 17
1
1
CLK_EXP_P 15
CLK_EXP_N 15
2
T1013 T1013
T1014 T1014
PWRLIMIT# 37
+3VS
XDP_DBRESET#
PM_EXTTS#0
PM_EXTTS#1
XDP_TDO
XDP_TMS
XDP_TDI
XDP_PREQ#
XDP_TCK
XDP_TRST#
1 2
PROCHOT# VIL=0.672V
D1001
D1001
RB751V-40
RB751V-40
0.37V/30mA
0.37V/30mA
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
R1063 1KOhm@R1063 1KOhm
1 2
R1021 10KOhm R1021 10KOhm
1 2
R1022 10KOhm R1022 10KOhm
1 2
R1025 51Ohm R1025 51Ohm
1 2
R1013 51Ohm@ R1013 51Ohm@
1 2
R1014 51Ohm@ R1014 51Ohm@
1 2
R1015 51Ohm@ R1015 51Ohm@
1 2
R1016 51Ohm@ R1016 51Ohm@
1 2
R1017 51Ohm R1017 51Ohm
1 2
R1036
R1036
@
@
R0402
R0402
H_PROCHOT_S#
1 2
@
@
@
XDP_TDO_R XDP_TDI_R
+VCCP_VTT
+VCCP_VTT
+VCCP_VTT
Q1001
Q1001
2N7002
2N7002
BS
BS
BS
R1020
R1020
68OHM
68OHM
1 2
3
3
D
D
G
G
S
S
2
2
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
1
1
1
THRO_CPU 46
CPU CLK/ MISC
CPU CLK/ MISC
CPU CLK/ MISC
ChingPo Chen
ChingPo Chen
ChingPo Chen
of
10 99 Saturday, March 05, 2011
10 99 Saturday, March 05, 2011
10 99 Saturday, March 05, 2011
Rev
Rev
Rev
2.0
2.0
2.0
5
U0701F
U0701F
ARD SV: 52000mA
+VCORE
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
D D
C C
B B
A A
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
1.1V RAIL POWER
1.1V RAIL POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VSS_SENSE_VTT
SENSE LINES
SENSE LINES
CSC[0]/VID[3]
CSC[1]/VID[4]
CSC[2]/VID[5]
VTT_SELECT
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
PSI#
VID[0]
VID[1]
VID[2]
VID[6]
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
AN33
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34
G15
AN35
AJ34
AJ35
B15
A15
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_VTTVID1
VTT_SENSE
1 2
C1106
C1106
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
4
+VCCP_VTT Rail Values:
VTT=1.05V; Arrandale
VTT=1.10V; Clarksfield
SV: 18000mA
1 2
1 2
C1105
C1105
C1104
C1104
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1107
C1107
@
@
@
@
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
+VCCP_VTT
1 2
1 2
C1113
C1113
C1114
C1114
@
@
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
1
T1103 T1103
I_MON 80
1
T1102 T1102
1
T1101 T1101
VID[6:0]= [0100111];
PSI#=0;
PROC_DPRSLPVR=1;
1 2
C1103
C1103
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1108
C1108
@
@
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
+VCORE
1 2
R1104
R1104
100Ohm
100Ohm
1%
1%
1 2
R1105
R1105
100Ohm
100Ohm
1%
1%
+VCCP_VTT
1 2
1 2
C1101
C1101
C1102
C1102
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
PM_PSI# 80
VR_VID0 80
VR_VID1 80
VR_VID2 80
VR_VID3 80
VR_VID4 80
VR_VID5 80
VR_VID6 80
PM_DPRSLPVR 80
VCCSENSE 80
VSSSENSE 80
3
Default: DSC Only
DSC Only: Depop C1110, C1111,
C1115, C1109
UMA Only: Vice Versa
+VGFX_CORE
UMA
UMA
1 2
C1111
C1111
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
UMA
UMA
+VCCP_VTT
1 2
C1125
C1125
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1110
C1110
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1115
C1115
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
UMA
UMA
+VCCP_VTT
1 2
C1123
C1123
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
1 2
C1126
C1126
C1127
C1127
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1109
C1109
0Ohm
0Ohm
1 2
C1124
C1124
@
@
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
@
@
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
J24
J23
H25
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
U0701G
U0701G
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VTT1_45
VTT1_46
VTT1_47
VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58
SOCKET989
SOCKET989
2
GRAPHICS
GRAPHICS
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
GFX_VR_EN
GFX_IMON
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68
VCCPLL1
VCCPLL2
VCCPLL3
AR22
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
AR25
AT25
AM24
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
L10
K10
J22
J20
J18
H21
H20
H19
L26
L27
M26
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V 1.8V
1.1V 1.8V
1
Default: DSC Only
DSC Only: Pop R1127 Depop R1129
No GFX VIDs and Sense Lines connection
UMA Only: Depop R1127 Pop R1129
With GFX VIDs and Sense Lines connection
VCC_AXG_SENSE 86
VSS_AXG_SENSE 86
GVR_VID0 86
GVR_VID1 86
GVR_VID2 86
GVR_VID3 86
GVR_VID4 86
GVR_VID5 86
GVR_VID6 86
GFX_VRON_PWR 86,93
GFX_IMON
GFXVR_DPRSLPVR 86
R1127 1KOhm
R1127 1KOhm
1 2
DSC
DSC
6000mA
+1.5VS_VDDQ
1 2
1 2
C1139
C1139
C1138
C1138
1UF/6.3V
1UF/6.3V
1UF/6.3V
1UF/6.3V
@
@
1 2
C1133
C1133
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
+VCCP_VTT
1 2
1 2
C1131
C1131
C1132
C1132
@
@
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
+VCCP_VTT
1 2
1 2
C1129
C1129
C1130
C1130
@
@
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
GVR_PWR_MON 86
1 2
C1137
C1137
1UF/6.3V
1UF/6.3V
@
@
1 2
C1134
C1134
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1136
C1136
1UF/6.3V
1UF/6.3V
GFX_VRON_PWR
1350mA
1 2
1 2
C1141
C1141
1UF/6.3V
1UF/6.3V
C1140
C1140
1UF/6.3V
1UF/6.3V
1 2
1 2
C1144
C1144
C1143
C1143
2.2UF/6.3V
2.2UF/6.3V
4.7UF/6.3V
4.7UF/6.3V
nb_c0603_h35_small
nb_c0603_h35_small
nb_c0603_h35_small
nb_c0603_h35_small
+1.5VS
1
1
2
JP1102
JP1102
2
NB_3MM_OPEN_5MIL_F1
NB_3MM_OPEN_5MIL_F1
1 2
C1135
C1135
1UF/6.3V
1UF/6.3V
R1129
R1129
4.7KOhm
4.7KOhm
UMA
UMA
1 2
+1.8VS
1 2
C1142
C1142
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
SOCKET989
SOCKET989
CPU POWER
CPU POWER
CPU POWER
Title :
Title :
Title :
Engineer:
Engineer:
BS
BS
BS
Engineer:
1
Rev
Rev
Rev
2.0
2.0
11 99 Saturday, March 05, 2011
11 99 Saturday, March 05, 2011
11 99 Saturday, March 05, 2011
2.0
of
of
of
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
5
4
3
2
1
D D
+VCORE
1 2
C1201
C1201
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
+VCORE
1 2
C1207
C1207
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
C C
B B
nb_c0805_h53_small
+VCORE
1 2
C1213
C1213
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
+VCORE
1 2
C1221
C1221
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1202
C1202
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1208
C1208
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1214
C1214
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1222
C1222
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1203
C1203
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1209
C1209
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1215
C1215
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1223
C1223
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
Decoupling guide from INTEL
VCORE 10uF x 16pcs
22uF x 12pcs
1 2
C1204
C1204
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1210
C1210
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1216
C1216
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1224
C1224
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1205
C1205
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1211
C1211
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1217
C1217
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1225
C1225
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1206
C1206
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1212
C1212
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1218
C1218
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1226
C1226
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1219
C1219
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1227
C1227
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1220
C1220
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
1 2
C1228
C1228
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
A A
CPU CAPS
CPU CAPS
CPU CAPS
Title :
Title :
Title :
Engineer:
Engineer:
BS
BS
BS
Engineer:
1
Rev
Rev
Rev
2.0
2.0
12 99 Saturday, March 05, 2011
12 99 Saturday, March 05, 2011
12 99 Saturday, March 05, 2011
2.0
of
of
of
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
5
RTC CMOS
R1303
R1303
C1304
C1304
18PF/50V
18PF/50V
C1305
C1305
18PF/50V
18PF/50V
R1338 0Ohm@R1338 0Ohm@
R1339 0Ohm R1339 0Ohm
1 2
20KOhm
20KOhm
R1306
R1306
1 2
20KOhm
20KOhm
1 2
C1303
C1303
27PF/50V
27PF/50V
1 2
1 4
X1301
X1301
2
32.768Khz
32.768Khz
3
R_RTC_X2 RTC_X2
1 2
1 2
1 2
5
+VCC_RTC
D D
+VCC_RTC
ICH_AZ_CODEC_BITCLK 41
ICH_AZ_CODEC_BITCLK_E 44
C C
ICH_AZ_CODEC_SYNC 41
ICH_AZ_CODEC_SYNC_E 44
ICH_AZ_CODEC_RST# 41,42
ICH_AZ_CODEC_RST#_E 44,45
ICH_AZ_CODEC_SDOUT 41
ICH_AZ_CODEC_SDOUT_E 44
B B
+3VA_EC
+3VSUS
A A
CLEAR
2
@JRST1
1 2
C1301
C1301
1UF/6.3V
1UF/6.3V
1 2
C1302
C1302
1UF/6.3V
1UF/6.3V
@
@
R1311 33Ohm
R1311 33Ohm
R1346 33Ohm
R1346 33Ohm
R1312 33Ohm
R1312 33Ohm
R1347 33Ohm
R1347 33Ohm
R1313 33Ohm
R1313 33Ohm
R1348 33Ohm
R1348 33Ohm
R1325 0Ohm@R1325 0Ohm@
@
2
Place Under SO-DIMM
1
SGL_JUMP
SGL_JUMP
1
JRST1
2
@JRST2
@
2
1
SGL_JUMP
SGL_JUMP
1
JRST2
R1310 33Ohm
R1310 33Ohm
R1318 33Ohm
R1318 33Ohm
Entry
Entry
1 2
Main
Main
1 2
Entry
Entry
1 2
Main
Main
1 2
Entry
Entry
1 2
Main
Main
1 2
Entry
Entry
1 2
R1307
R1307
10MOhm
10MOhm
+3VM_SPI
D1302
D1302
1
3
2
BAT54C
BAT54C
1 2
RTCRST#
SRTCRST#
1 2
Main
Main
1 2
ACZ_BCLK
1 2
C1309
C1309
27PF/50V
27PF/50V
@
@
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT ACZ_SDOUT
ACZ_SDOUT
RTC_X1
SPI_CS#0_EC 46
SPI_SO_EC 46 SPI_CLK_EC 46
4
+VCC_RTC
PCH_INTVRMEN 17
SPKR_PCH 17,41,44
PCH_JTAG_TCK
1
PCH_JTAG_TMS
1
PCH_JTAG_TDI
1
PCH_JTAG_TDO
1
PCH_JTAG_RST#
1
1 2
1 2
T1306 T1306
R1343 R1343
1 2
T1307 T1307
ACZ_SDIN0_E 44
ACZ_SDIN0 41
HDA_DKEN 17,65
MEFLSH_EN# 46
Need to set input mode
when not asserted
T1317 T1317
T1316 T1316
T1315 T1315
T1313 T1313
T1314 T1314
PCH_SPICLK 65
PCH_SPICS0# 65
PCH_SPISI 65
PCH_SPISO 65
PCH_SPICS0#
PCH_SPISO
+3VM_SPI
PCH_SPICS1#
+3VM_SPI
4
U1301A
SUS INT PD
SUS
SUS
SUS
INT PD
INT PU
R1332 0Ohm R1332 0Ohm
R1328 33Ohm 1% R1328 33Ohm 1%
R1323 3.3KOhm R1323 3.3KOhm
U1301A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
INT PD
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN#/GPIO33
J30
HDA_DOCK_RST#/GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
JTAG_RST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IBEXPEAK-M
IBEXPEAK-M
+3VM_SPI1_WP#
RTC_X1
RTC_X2
R1304 1MOhm
R1304 1MOhm
1 2
ACZ_BCLK
ACZ_SYNC
SPKR_PCH
ACZ_RST#
R1349 0Ohm
R1349 0Ohm
R1350 0Ohm MainR1350 0Ohm Main
ACZ_SDIN2
1
ACZ_SDIN3
1
ACZ_SDOUT
R1320 1KOhm
R1320 1KOhm
@
@
PCH_GPIO13
1
INT PU
INT PU
INT PU SUS
PCH_SPICLK
PCH_SPICS0#
PCH_SPICS1#
PCH_SPISI
PCH_SPISO
1 2
1 2
1 2
1%
1%
Entry
Entry
INT PD
INT PD
INT PD
INT PD
SDIN0
INT PD
INT PU
INT PD
2nd source: 0500-00NF000/0500-00J6000
1 2
1 2
1 2
R1333 0Ohm @R1333 0Ohm @
R1331 33Ohm 1% @R1331 33Ohm 1% @
R1324 3.3KOhm @R1324 3.3KOhm @
SPI2_CS#1
SPI2_SO
+3VM_SPI2_WP#
3
3
RTC IHDA
RTC IHDA
SPI JTAG
SPI JTAG
1
2
3
4
CS#
DO(IO1)
WP#(IO2)
GND
FWH4/LFRAME#
LDRQ1#/GPIO23
LPC
LPC
SATA
SATA
SATAICOMPO
SATAICOMPI
SATA0GP/GPIO21
SATA1GP/GPIO19
U1302
U1302
HOLD#(IO3)
W25Q32BVSSIG
W25Q32BVSSIG
(32Mb)
U1303
U1303
1
CE#
VDD
2
SO
HOLD#
3
WP#
SCK
VSS4SI
SST25VF032B
SST25VF032B
@
@
(32Mb)
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
LDRQ0#
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATALED#
0.1UF/10V
0.1UF/10V
VCC
CLK
DI(IO0)
0.1UF/10V
0.1UF/10V
8
7
6
5
C1307
C1307
C1308
C1308
8
7
6
5
@
@
D33
B33
C32
A32
C34
A34
F34
AB9
AK7
AK6
AK11
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
AF15
T3
Y9
V1
INT PU
INT PU
INT PU
INT PU
SATAICOMP
KB_LED_ID
3G_WI_LED
1 2
SPI1_HOLD#
SPI1_CLK
SPI1_SI
+3VM_SPI
1 2
SPI2_HOLD#
SPI2_CLK
SPI2_SI
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
ICH_LDRQ0#
ICH_LDRQ1#
R1319
R1319
1 2
10KOhm
10KOhm
SATA_RXN0 60
SATA_RXP0 60
SATA_TXN0 60
SATA_TXP0 60
HM55 Not Support
SATA_RXN4 60
SATA_RXP4 60
SATA_TXN4 60
SATA_TXP4 60
R1301 37.4Ohm
R1301 37.4Ohm
1 2
R1334
R1334
10KOhm
10KOhm
R1344 R1344
1
T1318 T1318
1
+3VM_SPI
R1321
R1321
3.3KOhm
3.3KOhm
1 2
1 2
R1322
R1322
3.3KOhm
3.3KOhm
@
@
2
LPC_AD0 46,65
LPC_AD1 46,65
LPC_AD2 46,65
LPC_AD3 46,65
LPC_FRAME# 46,65
R1341 R1341
1
R1342 R1342
1
INT_SERIRQ 46
+3VS
+VCC_SATA
1%
1%
1 2
+3VS
SATA_LED# 66
R1326 33Ohm1%R1326 33Ohm1%
R1327 33Ohm1%R1327 33Ohm1%
1 2
1 2
2
2.0 - 6
1 2
1 2
RTC BAT
T1312 T1312
1
R1329 33Ohm 1% @R1329 33Ohm 1% @
R1330 33Ohm 1% @R1330 33Ohm 1% @
SATA PORT
SATA P0
SATA P1
HDD
ODD
SATA P4
eSATA Removed
SATA P5
+3VA
3
4
T1308 T1308
1
1 2
RTCBAT_C
CON1301
CON1301
BATT_HOLDER_2P
BATT_HOLDER_2P
R1308
R1308
1KOhm
1KOhm
D1301
D1301
1
2
1 2
BAT54C
BAT54C
1220-001O000
SPI_SI_EC 46
PCH_SPICLK
PCH_SPISI
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SPI1_HOLD# 65
BS
BS
BS
1
R1345 R1345
T1310 T1310
1
3
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
+VCC_RTC
T1311 T1311
1
1
1 2
C1306
C1306
1UF/6.3V
1UF/6.3V
PCH LPC/ SATA/ HDA
PCH LPC/ SATA/ HDA
PCH LPC/ SATA/ HDA
ChingPo Chen
ChingPo Chen
ChingPo Chen
13 99 Saturday, March 05, 2011
13 99 Saturday, March 05, 2011
13 99 Saturday, March 05, 2011
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
5
U1301C
U1301C
@
@
PM_PWROK_R
@
@
SUS
INT PU SUS
R1436
10KOhm
10KOhm
R1437
10KOhm
10KOhm
BC24
BJ22
AW20
BJ20
BD24
BG22
BA20
BG20
BE22
BF21
BD20
BE18
BD22
BH21
BC20
BD18
BH25
BF25
T6
M6
B17
K5
A10
D9
C16
M1
P5
P7
A6
F14
PM_PWROK_R
@R1436
@
1 2
PM_RSMRST#_R
@R1437
@
1 2
IBEXPEAK-M
IBEXPEAK-M
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOMP
DMI_IRCOMP
SYS_RESET#
SYS_PWROK
PWROK
MEPWROK
LAN_RST#
DRAMPWROK
RSMRST#
SUS_PWR_ACK/GPIO30
PWRBTN#
ACPRESENT/GPIO31
BATLOW#/GPIO72
RI#
D1402
D1402
1
2
BAT54C @
BAT54C @
3
DMI_RXN0 7
+3VS
R1451
R1451
10KOhm
10KOhm
DMI_RXN1 7
DMI_RXN2 7
DMI_RXN3 7
DMI_RXP0 7
DMI_RXP1 7
DMI_RXP2 7
DMI_RXP3 7
DMI_TXN0 7
DMI_TXN1 7
DMI_TXN2 7
DMI_TXN3 7
DMI_TXP0 7
DMI_TXP1 7
DMI_TXP2 7
DMI_TXP3 7
R1422
R1422
1 2
49.9Ohm 1%
49.9Ohm 1%
1 2
R1425
R1425
10KOhm
10KOhm
AC_PRESENT
BAT_LL#
PM_RI#
+3VSUS
DMI_COMP_R
R1423 1KOhm R1423 1KOhm
1 2
R1448 R0402
R1448 R0402
1 2
R1453
R1453
1 2
10KOhm
10KOhm
R1449 R0402
R1449 R0402
1 2
LAN_RST#_R
PM_RSMRST#_R
1 2
PD EC=10K
D D
+VCCP_DMI_EXP
C C
PM_PWROK 10,46
R1.1-16
PM_DRAM_PWRGD 10
PM_RSMRST# 46
SUS_PWRDN_ACK 46
PM_PWRBTN# 46
AC_PRESENT 46
B B
4
BA18
FDI_RXN0
BH17
FDI_RXN1
BD16
FDI_RXN2
BJ16
FDI_RXN3
BA16
FDI_RXN4
BE14
FDI_RXN5
BA14
FDI_RXN6
BC12
FDI_RXN7
BB18
FDI_RXP0
BF17
FDI_RXP1
BC16
FDI_RXP2
BG16
FDI_RXP3
AW16
FDI_RXP4
BD14
FDI_RXP5
BB14
FDI_RXP6
BD12
FDI_RXP7
BJ14
FDI_INT
FDI_FSYNC0
DMI
FDI
DMI
FDI
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
System Power Management
System Power Management
SLP_LAN#/GPIO29
BF13
BH13
BJ12
BG14
J12
WAKE#
Y1
P8
F3
E4
H7
SLP_S4#
P12
SLP_S3#
K8
SLP_M#
N2
SLP_DSW#
BJ10
PMSYNCH
F6
SUS_PWRGD 46,81,92
SUS
SUS
SUS
SUS
SUS
SUS
SUS
PM_SUS_STAT#
SUSCLK
SLP_S5#
ME_SLP_M#
PM_SLP_DSW#
ME_SLP_LAN#
SUS_PWRDN_ACK
PCIE_WAKE# 67
PM_CLKRUN# 46
1
T1407 T1407
1
T1408 T1408
1
T1405 T1405
1
T1410 T1410
1
PM_CLKRUN#
PM_RI#
BAT_LL#
PCIE_WAKE#
AC_PRESENT
PM_PWROK
FDI_TXN0 7
FDI_TXN1 7
FDI_TXN2 7
FDI_TXN3 7
FDI_TXN4 7
FDI_TXN5 7
FDI_TXN6 7
FDI_TXN7 7
FDI_TXP0 7
FDI_TXP1 7
FDI_TXP2 7
FDI_TXP3 7
FDI_TXP4 7
FDI_TXP5 7
FDI_TXP6 7
FDI_TXP7 7
FDI_INT 7
FDI_FSYNC0 7
FDI_FSYNC1 7
FDI_LSYNC0 7
FDI_LSYNC1 7
T1406 T1406
SUSCLK 46
PM_SUSC# 46
PM_SUSB# 46
H_PM_SYNC 10
R1438
R1438
10KOhm
10KOhm
R1441 10KOhm R1441 10KOhm
1 2
R1442 8.2KOhm R1442 8.2KOhm
1 2
R1440 10KOhm R1440 10KOhm
R1445 10KOhm R1445 10KOhm
1 2
R1447 10KOhm R1447 10KOhm
1 2
R1450 10KOhm R1450 10KOhm
1 2
3
+3VS
R1443 10KOhm UMAR1443 10KOhm UMA
R1444 10KOhm UMAR1444 10KOhm UMA
RN1402A
RN1402B
RN1402C
RN1402D
LCD_BACKEN_PCH 37
LCD_VDD_EN_PCH 37
LCD_BL_PWM_PCH 37
LVDS_DDCCLK_PCH 37
LVDS_DDCDAT_PCH 37
1 2
2.2KOHM
2.2KOHM
3 4
2.2KOHM
2.2KOHM
5 6
2.2KOHM
2.2KOHM
7 8
2.2KOHM
2.2KOHM
LVDS_CLKAN_PCH 37
LVDS_CLKAP_PCH 37
LVDS_L0AN_PCH 37
LVDS_L1AN_PCH 37
LVDS_L2AN_PCH 37
LVDS_L0AP_PCH 37
LVDS_L1AP_PCH 37
LVDS_L2AP_PCH 37
LVDS_CLKBN_PCH 37
LVDS_CLKBP_PCH 37
LVDS_L0BN_PCH 37
LVDS_L1BN_PCH 37
LVDS_L2BN_PCH 37
LVDS_L0BP_PCH 37
LVDS_L1BP_PCH 37
LVDS_L2BP_PCH 37
1 2
1 2
R1.0-3
DDC2BC_PCH 38
DDC2BD_PCH 38
DAC_HSYNC_PCH 38
DAC_VSYNC_PCH 38
R1432 1KOhm
R1432 1KOhm
1 2
DAC_B_PCH 38
DAC_G_PCH 38
DAC_R_PCH 38
+3VSUS +3VS
1 2
1 2
Default: DSC Only
DSC Only: Depop R1426, R1427, R1428
UMA Only: Vice Versa
L_CTRL_CLK
L_CTRL_DAT
DDC2BC_PCH
UMARN1402A
UMA
DDC2BD_PCH
UMARN1402B
UMA
LVDS_DDCDAT_PCH
UMARN1402C
UMA
LVDS_DDCCLK_PCH
UMARN1402D
UMA
L_CTRL_CLK
L_CTRL_DAT
R1424 2.37KOHM
R1424 2.37KOHM
1 2
UMA
UMA
D_B
D_G
D_R
1%
1%
DAC_IREF
JP1401 SHORT_PIN JP1401 SHORT_PIN
JP1402 SHORT_PIN JP1402 SHORT_PIN
JP1403 SHORT_PIN JP1403 SHORT_PIN
1 2
1 2
1 2
AB48
AB46
AP39
AP41
AT43
AT42
AV53
AV51
BB47
BA52
AY48
AV47
BB48
BA50
AY49
AV48
AP48
AP47
AY53
AT49
AU52
AT53
AY51
AT48
AU50
AT51
AA52
AB53
AD53
AD48
AB51
T48
T47
Y48
Y45
V48
V51
V53
Y53
Y51
2
U1301D
U1301D
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
IBEXPEAK-M
IBEXPEAK-M
D_B
D_G
D_R
1 2
R1426
R1426
150Ohm
150Ohm
1%
1%
UMA
UMA
1
R1403 100KOhm UMAR1403 100KOhm UMA
R1404 100KOhm UMAR1404 100KOhm UMA
Default: DSC Only
DSC Only: Depop RN1401~RN1403, R1403, R1404, R1424
UMA Only: Vice Versa
LVDS
LVDS
CRT
CRT
1 2
R1427
R1427
150Ohm
150Ohm
1%
1%
UMA
UMA
LCD_BACKEN_PCH
1 2
LCD_VDD_EN_PCH
1 2
SDVO_INTN
SDVO_INTP
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ46
BG46
BJ48
BG48
BF45
BH45
T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
1 2
R1428
R1428
150Ohm
150Ohm
1%
1%
UMA
UMA
R1429 110KOHM
R1429 110KOHM
HDMI_DDC_CLK_PCH 39
HDMI_DDC_DATA_PCH 39
HDMI_HPD_PCH 39
1 2
UMA
UMA
HDMI_TXN2_PCH 39
HDMI_TXP2_PCH 39
HDMI_TXN1_PCH 39
HDMI_TXP1_PCH 39
HDMI_TXN0_PCH 39
HDMI_TXP0_PCH 39
HDMI_CLKN_PCH 39
HDMI_CLKP_PCH 39
A A
PCH DMI/ FDI/ VIDEO/ PM
PCH DMI/ FDI/ VIDEO/ PM
PCH DMI/ FDI/ VIDEO/ PM
Title :
Title :
Title :
ChingPo Chen
ChingPo Chen
ChingPo Chen
Engineer:
Engineer:
BS
BS
BS
Engineer:
1
Rev
Rev
Rev
2.0
2.0
14 99 Saturday, March 05, 2011
14 99 Saturday, March 05, 2011
14 99 Saturday, March 05, 2011
2.0
of
of
of
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
5
4
3
2
1
+3VSUS
SML0_CLK
SML0_DATA
SML1_CLK
SML1_DATA
PCIE 1
PCIE 2
D D
C C
+3VSUS
CLK_REQ0#
B B
CLK_REQ3#
CLK_REQ4#
PCIE_LOM_CLKREQ#
PCIECLKRQA#
CLK_REQ1#
CLK_REQ2#
PCIE_LOM_CLKREQ#
PCIECLKRQA#
A A
10KOhm
10KOhm
R1532 10KOhm@ R1532 10KOhm@
1 2
R1533 10KOhm R1533 10KOhm
1 2
R1535 10KOhm R1535 10KOhm
1 2
R1522
R1522
1 2
R1523 10KOhm
R1523 10KOhm
1 2
UMA
UMA
R1521 10KOhm R1521 10KOhm
1 2
R1534 10KOhm R1534 10KOhm
1 2
R1524 10KOhm@R1524 10KOhm
1 2
@
R1519 10KOhm
R1519 10KOhm
1 2
DSC
DSC
5
+3VS
PCIE 3
PCIE 4
PCIE 5
PCIE 6
PCIE_RXN2 55
PCIE_RXP2 55
PCIE_TXN2 55
PCIE_TXP2 55
PCIE_RXN6 67
PCIE_RXP6 67
PCIE_TXN6 67
PCIE_TXP6 67
CLK_PCIE_MINICARD# 55
CLK_PCIE_MINICARD 55
MINI1CLK_REQ# 55
CLK_PCIE_LAN# 67
CLK_PCIE_LAN 67
Mini CARD (WLAN)
LAN
C1504 0.1UF/10V C1504 0.1UF/10V
1 2
C1501 0.1UF/10V C1501 0.1UF/10V
1 2
C1502 0.1UF/10V C1502 0.1UF/10V
1 2
C1503 0.1UF/10V C1503 0.1UF/10V
1 2
HM55 Not Support
CLK_REQ0#
T1518 T1518
1
CLK_REQ1#
T1513 T1513
1
CLK_REQ2#
T1512 T1512
1
CLK_REQ3#
CLK_REQ4#
T1517 T1517
1
PU +3VSUS at CON5501
PCIE_LOM_CLKREQ#
1 2
C1513
C1513
3.3PF/50V
3.3PF/50V
@
@
4
GPP_TXN2
GPP_TXP2
GPP_TXN6
GPP_TXP6
INT PU SUS
1 2
C1514
C1514
3.3PF/50V
3.3PF/50V
@
@
U1301B
U1301B
BG30
PERn1
BJ30
PERp1
BF29
PETn1
BH29
PETp1
AW30
PERn2
BA30
PERp2
BC30
PETn2
BD30
PETp2
AU30
PERn3
AT30
PERp3
AU32
PETn3
AV32
PETp3
BA32
PERn4
BB32
PERp4
BD32
PETn4
BE32
PETp4
BF33
PERn5
BH33
PERp5
BG32
PETn5
BJ32
PETp5
BA34
PERn6
AW34
PERp6
BC34
PETn6
BD34
PETp6
AT34
PERn7
AU34
PERp7
AU36
PETn7
AV36
PETp7
BG34
PERn8
BJ34
PERp8
BG36
PETn8
BJ36
PETp8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0#/GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1#/GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2#/GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3#/GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4#/GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5#/GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ#/GPIO56
IBEXPEAK-M
IBEXPEAK-M
RN1502A
RN1502A
1 2
2.2kOhm
RN1502B
RN1502B
RN1502C
RN1502C
RN1502D
RN1502D
SMBALERT#/GPIO11
SML0ALERT#/GPIO60
SMBus
SMBus
SML1ALERT#/GPIO74
PCI-E*
PCI-E*
C-Link
C-Link
PEG_A_CLKRQ#/GPIO47
PEG
PEG
CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P
CLKIN_SATA_N/CKSSCD_N
CLKIN_SATA_P/CKSSCD_P
CLKIN_PCILOOPBACK
Clock Inputs from CLK BUFFER
Clock Inputs from CLK BUFFER
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
Clock Flex
Clock Flex
2.2kOhm
3 4
2.2kOhm
2.2kOhm
5 6
2.2kOhm
2.2kOhm
7 8
2.2kOhm
2.2kOhm
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK/GPIO58
SML1DATA/GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
3
B9
H14
C8
J14
C6
G8
M14
E10
G12
T13
T11
T9
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
J42
AH51
AH53
AF38
T45
P43
T42
N50
SCL_ALW
SDA_ALW
LINK0ALERT#
SML0_CLK
SML0_DATA
LINK1ALERT#
SML1_CLK
SML1_DATA
CL_CLK
CL_DATA
CL_RST#
PCIECLKRQA#
CLK_DP#
CLK_DP
CLK_PCILOOP
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
INT PD
CLK_USB48_CR_L
EXT_SCI#
LINK0ALERT#
LINK1ALERT#
1
1
1
EXT_SCI# 46
T1501 T1501
T1502 T1502
T1503 T1503
T1514 T1514
1
T1515 T1515
1
CLK_BUF_EXP_N 24
CLK_BUF_EXP_P 24
CLK_BUF_BCLK_N 24
CLK_BUF_BCLK_P 24
CLK_BUF_DOT96_N 24
CLK_BUF_DOT96_P 24
CLK_PCIE_SATA# 24
CLK_PCIE_SATA 24
CLK_BUF_REF14 24
CLK_PCILOOP 16
R1509
R1509
90.9Ohm
90.9Ohm
1%
1%
R1510 10KOhm R1510 10KOhm
1 2
R1511 10KOhm R1511 10KOhm
1 2
R1512 10KOhm R1512 10KOhm
1 2
+VCCSSC
1 2
R1520
R1520
1 2
0Ohm
0Ohm
+3VSUS
SCL_ALW
SDA_ALW
CLK_PCIE_PEG#_PCH 70
CLK_PCIE_PEG_PCH 70
CLK_EXP_N 10
CLK_EXP_P 10
CLK_USB48_CR 50 PCIE_LOM_CLKREQ# 67
For UMA
Change to 10PF
2
R1513
R1513
2.2KOhm
2.2KOhm
SML1_CLK
SML1_DATA
+3VSUS
1 2
1 2
C1508
C1508
0Ohm
0Ohm
R1514
R1514
2.2KOhm
2.2KOhm
1 2
+5VS
6 1
Q1501A
Q1501A
UM6K1N
UM6K1N
+5VS
6 1
Q1503A
Q1503A
UM6K1N
UM6K1N
2
3 4
Q1501B
Q1501B
UM6K1N
UM6K1N
2
3 4
Q1503B
Q1503B
UM6K1N
UM6K1N
5
5
R1515
R1515
4.7KOhm
4.7KOhm
PU EC
+3VS
R1516
R1516
4.7KOhm
4.7KOhm
1 2
1 2
Damping CPU Side
XTAL25_IN
1 2
R1502 1MOhm
R1502 1MOhm
X1501
X1501
25Mhz
25Mhz
1 3
2
XTAL25_OUT
UMA
UMA
1 2
UMA
UMA
4
C1507
C1507
10PF
10PF
UMA
UMA
Title :
Title :
Title :
Engineer:
Engineer:
BS
BS
BS
Engineer:
1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
SMB_CLK_S 21,22,24
SMB_DAT_S 21,22,24
SMB1_CLK 46,74
SMB1_DAT 46,74
PCH CLK/ USB/ PCIE/ NVM
PCH CLK/ USB/ PCIE/ NVM
PCH CLK/ USB/ PCIE/ NVM
ChingPo Chen
ChingPo Chen
ChingPo Chen
15 99 Saturday, March 05, 2011
15 99 Saturday, March 05, 2011
15 99 Saturday, March 05, 2011
Rev
Rev
Rev
2.0
2.0
2.0
5
U1301E
U1301E
H40
AD0
N34
AD1
C44
AD2
D D
C C
PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#
PCI_REQ#0
1
1
PCI_GNT#0
PCI_GNT#1
DGPU_PWM_SEL#
1
PCI_GNT#3
PCI_RST#
1
T1601 T1601
WUSB_ON#
DGPU_SEL#
PCI_REQ#3
PCI_INTE#
FELI_EN#
PCI_INTG#
PCI_INTH#
PCI_SERR#
PCI_PERR#
PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#
PCI_LOCK#
PCI_STOP#
PCI_TRDY#
PCI_PME#
1
PLTRST#
CLK_PCI0
CLK_PCI1
CLK_FB
T1634 T1634
T1633 T1633
PCI_GNT#0 17,65
PCI_GNT#1 17,65
PCI_GNT#3 17
B B
CLK_KBCPCI 46
CLK_DEBUG2 65
CLK_PCILOOP 15
A A
5
CLK_KBCPCI
1 2
C1603 10PF/50V C1603 10PF/50V
CLK_DEBUG2
1 2
C1602 10PF/50V@C1602 10PF/50V
@
CLK_PCILOOP
1 2
C1605 10PF/50V@C1605 10PF/50V
@
T1632 T1632
T1631 T1631
R1611 22Ohm R1611 22Ohm
1 2
R1612 22Ohm R1612 22Ohm
1 2
R1615 22Ohm R1615 22Ohm
1 2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
C/BE3#
G38
PIRQA#
H51
PIRQB#
B37
PIRQC#
A44
PIRQD#
F51
REQ0#
A46
REQ1#/GPIO50
B45
REQ2#/GPIO52
M53
REQ3#/GPIO54
F48
GNT0#
K45
GNT1#/GPIO51
F36
GNT2#/GPIO53
H53
GNT3#/GPIO55
B41
PIRQE#/GPIO2
K53
PIRQF#/GPIO3
A36
PIRQG#/GPIO4
A48
PIRQH#/GPIO5
K6
PCIRST#
E44
SERR#
E50
PERR#
A42
IRDY#
H44
PAR
F46
DEVSEL#
C46
FRAME#
D49
PLOCK#
D41
STOP#
C48
TRDY#
M7
PME#
D5
PLTRST#
N52
CLKOUT_PCI0
P53
CLKOUT_PCI1
P46
CLKOUT_PCI2
P51
CLKOUT_PCI3
P48
CLKOUT_PCILOOPBACK
IBEXPEAK-M
IBEXPEAK-M
4
AY9
NV_CE#0
BD1
NV_CE#1
AP15
NV_CE#2
BD8
NV_CE#3
AV9
NV_DQS0
BG8
NV_DQS1
NV_ALE
NV_CLE
NV_RB#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
BD3
AY6
AU2
AV7
AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
HM55 Not Support
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
USBRBIAS
USBRBIAS
B25
D25
USB_OC#0
N16
USB_OC#1
J16
USB_OC#2
F16
USB_OC#3
L16
USB_OC#4
E14
USB_OC#5
G16
USB_OC#6
F12
USB_OC#7
T15
USB_PN0 50
USB_PP0 50
USB_PN8 55
USB_PP8 55
USB_PN09 61
USB_PP09 61
USB_PN10 37
USB_PP10 37
USB_PN11 61
USB_PP11 61
USB_PN12 61
USB_PP12 61
USB_PN13 61
USB_PP13 61
1 2
NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8
NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NVRAM
NVRAM
NV_DQ11/NV_IO11
NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15
NV_RCOMP
PCI
PCI
4
USB
USB
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USBRBIAS#
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
R1609
R1609
22.6Ohm 1%
22.6Ohm 1%
1
1
1
1
1
1
1
3
NVM_ALE 17
NVM_CLE 17
USB PORT
USB P00
USB P01
USB P02
USB P03
USB P04
USB P05
USB P08
USB P09
USB P10
USB P11
USB P12
USB P13
T1602 T1602
T1603 T1603
T1605 T1605
T1606 T1606
T1607 T1607
T1608 T1608
T1609 T1609
3
Card Reader
WiFi
External Entry
Camera
External Main
External Main
External 2.0/3.0
PCH_GPIO34 17
DGPU_PWR_EN# 17
DGPU_HOLD_RST# 17
DGPU_PRSNT# 17
DGPU_PWROK 17,87,92
PLTRST#
PCI_STOP#
PCI_IRDY#
PCI_INTD#
DGPU_SEL#
PCI_INTE#
PCI_INTA#
PCI_INTG#
PCI_INTC#
PCI_PERR#
PCI_LOCK#
PCI_DEVSEL#
PCI_SERR#
2
1 2
8.2KOhm
8.2KOhm
3 4
8.2KOhm
8.2KOhm
5 6
8.2KOhm
8.2KOhm
7 8
8.2KOhm
8.2KOhm
1 2
8.2KOhm
8.2KOhm
3 4
8.2KOhm
8.2KOhm
5 6
8.2KOhm
8.2KOhm
7 8
8.2KOhm
8.2KOhm
1 2
8.2KOhm
8.2KOhm
3 4
8.2KOhm
8.2KOhm
5 6
8.2KOhm
8.2KOhm
7 8
8.2KOhm
8.2KOhm
1 2
8.2KOhm
8.2KOhm
3 4
8.2KOhm
8.2KOhm
5 6
8.2KOhm
8.2KOhm
7 8
8.2KOhm
8.2KOhm
R1601 10KOhm
R1601 10KOhm
@
@
2
U1601
U1601
A
A
1
VCC
VCC
B
B
2
3 4
GND
GND
Y
Y
NC7SZ08P5X
NC7SZ08P5X
@
@
R1610
R1610
1 2
0Ohm
0Ohm
RN1602A
RN1602A
RN1602B
RN1602B
RN1602C
RN1602C
RN1602D
RN1602D
RN1604A
RN1604A
RN1604B
RN1604B
RN1604C
RN1604C
RN1604D
RN1604D
RN1605A
RN1605A
RN1605B
RN1605B
RN1605C
RN1605C
RN1605D
RN1605D
RN1606A
RN1606A
RN1606B
RN1606B
RN1606C
RN1606C
RN1606D
RN1606D
1 2
+3VS
1 2
C1601
C1601
@
@
0.1UF/16V
5
0.1UF/16V
BUF_PLT_RST# 10,32,46,55,67,70
+3VS
USB_OC#0
USB_OC#7
USB_OC#3
USB_OC#1
USB_OC#2
USB_OC#5
USB_OC#4
USB_OC#6
PCI_FRAME#
WUSB_ON#
PCI_TRDY#
PCI_INTH#
PCI_REQ#0
PCI_INTB#
FELI_EN#
PCI_REQ#3
Engineer:
Engineer:
BS
BS
BS
Engineer:
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1 2
8.2KOhm
8.2KOhm
3 4
8.2KOhm
8.2KOhm
5 6
8.2KOhm
8.2KOhm
7 8
8.2KOhm
8.2KOhm
1 2
8.2KOhm
8.2KOhm
3 4
8.2KOhm
8.2KOhm
5 6
8.2KOhm
8.2KOhm
7 8
8.2KOhm
8.2KOhm
1 2
8.2KOhm
8.2KOhm
3 4
8.2KOhm
8.2KOhm
5 6
8.2KOhm
8.2KOhm
7 8
8.2KOhm
8.2KOhm
1 2
8.2KOhm
8.2KOhm
3 4
8.2KOhm
8.2KOhm
5 6
8.2KOhm
8.2KOhm
7 8
8.2KOhm
8.2KOhm
Title :
Title :
Title :
1
+3VSUS
RN1601A
RN1601A
RN1601B
RN1601B
RN1601C
RN1601C
RN1601D
RN1601D
RN1603A
RN1603A
RN1603B
RN1603B
RN1603C
RN1603C
RN1603D
RN1603D
+3VS +3VS
RN1607A
RN1607A
RN1607B
RN1607B
RN1607C
RN1607C
RN1607D
RN1607D
RN1608A
RN1608A
RN1608B
RN1608B
RN1608C
RN1608C
RN1608D
RN1608D
PCH CLK/ USB/ PCIE/ NVM
PCH CLK/ USB/ PCIE/ NVM
PCH CLK/ USB/ PCIE/ NVM
ChingPo Chen
ChingPo Chen
ChingPo Chen
16 99 Saturday, March 05, 2011
16 99 Saturday, March 05, 2011
16 99 Saturday, March 05, 2011
Rev
Rev
Rev
2.0
2.0
2.0
5
U1301F
1.1 - 11
PCH_GPIO1
1
DGPU_HPD#
1
WLAN_RST#
1
1
1
1
1
PASS_CLR#
PCB_ID2
WIFI_LED
USB_CB0
PCH_GPIO27
USB_CB1
PCH_GPIO34
PCH_GPIO35
PCB_ID0
PCB_ID1
USB_M_EN#
3VAUX_ON#
JRST4
JRST4
SGL_JUMP
SGL_JUMP
D D
DGPU_HOLD_RST# 16
DGPU_PWROK 16,87,92
1.1 - 1
1.1 - 4
1.1 - 10
DGPU_PWR_EN# 16
DGPU_PRSNT# 16
C C
CRIT_TEMP_REP# 46
2
112
T1705 T1705
@
@
T1707 T1707
EXT_SMI# 46
WLAN_RST# 55
WLAN_ON 55
WIFI_LED 66
T1708 T1708
T1711 T1711
PCH_GPIO34 16
T1709 T1709
T1710 T1710
RST_GATE 10
BT_DISABLE 55
T1712 T1712
PCB_VID 0 1 2
E 1.0 0 0 0
E 1.1 0 0 1
E 2.0 0 1 0
M 1.0 1 0 0
M 1.1 1 0 1
M 2.0 1 1 0
B B
R1716
R1716
10KOhm
10KOhm
1 2
R1719
R1719
10KOhm
10KOhm
@
@
1 2
+3VS +3VS +3VS
R1715
R1715
10KOhm
10KOhm
@
@
1 2
R1718
R1718
10KOhm
10KOhm
1 2
R1714
R1714
10KOhm
10KOhm
Main
Main
1 2
R1717
R1717
10KOhm
10KOhm
Entry
Entry
1 2
PCB_ID0
PCB_ID1
PCB_ID2
U1301F
Y3
BMBUSY#/GPIO0
C38
TACH1/GPIO1
D37
TACH2/GPIO6
J32
TACH3/GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL/GPIO12
T7
GPIO15
AA2
SATA4GP/GPIO16
F38
TACH0/GPIO17
Y7
SCLOCK/GPIO22
H10
MEM_LED/GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI#/GPIO34
V6
SATACLKREQ#/GPIO35
AB7
SATA2GP/GPIO36
AB13
SATA3GP/GPIO37
V3
SLOAD/GPIO38
P3
SDATAOUT0/GPIO39
H3
PCIECLKRQ6#/GPIO45
F1
PCIECLKRQ7#/GPIO46
AB6
SDATAOUT1/GPIO48
AA4
SATA5GP/GPIO49
F8
GPIO57
A4
Vss_NCTF1
A49
Vss_NCTF2
A5
Vss_NCTF3
A50
Vss_NCTF4
A52
Vss_NCTF5
A53
Vss_NCTF6
B2
Vss_NCTF7
B4
Vss_NCTF8
B52
Vss_NCTF9
B53
Vss_NCTF10
BE1
Vss_NCTF11
BE53
Vss_NCTF12
BF1
Vss_NCTF13
BF53
Vss_NCTF14
BH1
Vss_NCTF15
BH2
Vss_NCTF16
BH52
Vss_NCTF17
BH53
Vss_NCTF18
BJ1
Vss_NCTF19
BJ2
Vss_NCTF20
BJ4
Vss_NCTF21
BJ49
Vss_NCTF22
BJ5
Vss_NCTF23
BJ50
Vss_NCTF24
BJ52
Vss_NCTF25
BJ53
Vss_NCTF26
D1
Vss_NCTF27
D2
Vss_NCTF28
D53
Vss_NCTF29
E1
Vss_NCTF30
E53
Vss_NCTF31
IBEXPEAK-M
IBEXPEAK-M
MISC
MISC
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
RSVD
NCTF
RSVD
4
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP18
TP14
TP15
TP16
TP17
TP8
TP9
TP10
TP12
TP13
TP11
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
SST
AH45
AH46
AF48
AF47
U2
AM3
AM1
BG10
T1
BE10
BD10
BA22
AW22
BB22
AY45
AY46
AV43
AV45
H12
M32
N32
M30
N30
AF13
M18
N18
AK41
AK42
AJ24
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
PCH_THRMTRIP#
RST_GATE
CRIT_TEMP_REP#
T1701 T1701
1
A20GATE 46
BCLK_CPU_N 10
BCLK_CPU_P 10
H_PECI 10
RCIN# 46
H_CPUPWRGD 10
R1701 56Ohm
R1701 56Ohm
1 2
USB_CB0
USB_CB1
USB_CB0
PASS_CLR#
1%
1%
R1725
R1725
1 2
@
@
R1726
R1726
1 2
@
@
1 2
1 2
1 2
+VCCP_VTT
1 2
R1702
R1702
56Ohm
56Ohm
1%
1%
1 2
C1701
C1701
100PF/50V
100PF/50V
@
@
100KOHM
100KOHM
100KOHM
100KOHM
R1708 10KOhm R1708 10KOhm
R1712 10KOhm R1712 10KOhm
R1707 10KOhm R1707 10KOhm
R1727 10KOhm R1727 10KOhm
1 2
3
+3VSUS
+3VS
2
HDA_DKEN : Flash Descriptor Security Overide
H = Disabled (Default)
L = Enabled
Note : Rising edge of PWROK
JRST3
JRST3
HDA_DKEN 13,65
NOTE:
Assert the HDA_DKEN will halt and disable Intel ME.
This is a debug mode and must not asserted after
manufacturing/debug.
PM_THRMTRIP# 10,32
PCH_SPISI : iTPM STRAP
H : Enable iTPM
L : Disable iTPM (Default)
PCI_GNT#3 : A16 swap override
Strap/Top-Block Swap Override jumper
H : Default
L : A16 swap override/Top-Block Swap
Override enabled
2
112
NB_1MM_OPEN_5MIL_F1
NB_1MM_OPEN_5MIL_F1
R1711 1KOhm R1711 1KOhm
Description Only.
No PU Reserved
Note : Rising edge of PWROK
R1724 1KOhm
R1724 1KOhm
PCI_GNT#3 16
NVM_CLE : DMI Termination Voltage
H : Set to Vcc
L : Set to Vss
1 2
@
@
Note : Rising edge of PWROK
R1722 1KOhm
R1722 1KOhm
1 2
GPIO15/ WLAN_ON :
H = Intel ME Crypto Transport Layer Security (TLS)
cipher suite with confidentiality
L = Intel ME Crypto Transport Layer Security (TLS)
cipher suite with no confidentiality
Note : Rising edge of RSMRST# pin
WLAN_ON
1 2
@
@
R1706 10KOhm
R1706 10KOhm
@
@
+3VSUS
1
PCH_INTVRMEN : Integrated SUS 1.05V VRM Enable
H : Integrated VRM is enabled
L : Integrated VRM is disabled
Note: This signal should always be pulled high
+VCC_RTC
1 2
PCH_INTVRMEN 13
SPKR_PCH : NO REBOOT STRAP
H : Enable
L : Disable (Default)
R1709 330KOHM R1709 330KOHM
1 2
Note : Rising edge of PWROK
+3VS
R1710 1KOhm
R1710 1KOhm
SPKR_PCH 13,41,44
1 2
@
@
PCI_GNT#1,PCI_GNT#0 : Boot BIOS Strap
PCI_GNT#0
PCI_GNT#1
001LPC
0
11
Note : Rising edge of PWROK
PCI_GNT#0 16,65
PCI_GNT#1 16,65
NVM_ALE : Danbury Technology Enabled
High--> Enable Intel Anti-Theft Technology.
Low--> Disable Intel Anti-Theft Technology.
Note : Rising edge of PWROK
NVM_ALE 16 NVM_CLE 16
GPIO27/ USB_SW :
H = Enables the internal VccVRM. (Default)
L = Disables the VccVRM.
PCI
SPI
R1720 1KOhm@R1720 1KOhm@
1 2
R1721 1KOhm@R1721 1KOhm@
1 2
R1723 1KOhm
R1723 1KOhm
1 2
@
@
+VCCQ_NVRAM +VCCQ_NVRAM
Note : Rising edge of RSMRST# pin
PCH_GPIO27
R1713 1KOhm
R1713 1KOhm
1 2
@
@
A A
PCH GPIO
PCH GPIO
PCH GPIO
Title :
Title :
Title :
ChingPo Chen
ChingPo Chen
Engineer:
Engineer:
BS
BS
BS
Engineer:
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
ChingPo Chen
1
Rev
Rev
Rev
2.0
2.0
17 99 Saturday, March 05, 2011
17 99 Saturday, March 05, 2011
17 99 Saturday, March 05, 2011
2.0
5
J1802
J1802
1 2
@
D D
+VCCP_PCH
+VCCP_PCH
C C
B B
J1801
J1801
2
112
2MM_OPEN_5MIL
2MM_OPEN_5MIL
+VCCP_PCH
@
SHORT_PIN
SHORT_PIN
nb_r0805_short
nb_r0805_short
R1802
R1802
@
@
1 2
NB_R0603_SHORT_32MIL
NB_R0603_SHORT_32MIL
+VCCP_DMI_EXP
1 2
1 2
C1814
C1814
C1811
C1811
10UF/6.3V
10UF/6.3V
1UF/6.3V
1UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
R1808@R1808
1 2
@
+1.8VS
1 2
C1815
C1815
1UF/6.3V
1UF/6.3V
112mA
1432mA
+VCCP_PCH_VCC
1 2
C1809
C1809
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
+VCCDPLL
3062mA
1 2
C1816
C1816
1UF/6.3V
1UF/6.3V
+3VS
1 2
C1823
C1823
0.1UF/10V
0.1UF/10V
+VCCVRM
+VCCDPLL_FDI
R1806@R1806
1 2
@
1 2
C1813
C1813
1UF/6.3V
1UF/6.3V
112mA
?mA
1 2
C1817
C1817
1UF/6.3V
1UF/6.3V
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
AK24
BJ24
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
AN30
AN31
AN35
AT22
BJ18
AM23
U1301G
U1301G
VccCore1
VccCore2
VccCore3
VccCore4
VccCore5
VccCore6
VccCore7
VccCore8
VccCore9
VccCore10
VccCore11
VccCore12
VccCore13
VccCore14
VccCore15
VccIO24
VccAPLLEXP
VccIO26
VccIO27
VccIO28
VccIO29
VccIO30
VccIO31
VccIO55
VccIO56
VccIO34
VccIO35
VccIO36
VccIO37
VccIO38
VccIO39
VccIO40
VccIO41
VccIO42
VccIO43
VccIO44
VccIO45
VccIO46
VccIO47
VccIO48
VccIO49
VccIO50
VccIO51
VccIO52
VccIO53
VccIO54
VccIO32
VccIO33
Vcc3_3_14
VccVRM2
VccFDIPLL
VccIO25
IBEXPEAK-M
IBEXPEAK-M
+VCCVRM
4
POWER
POWER
VCC CORE
VCC CORE
DMI
DMI
PCI E*
PCI E*
NAND / SPI
NAND / SPI
FDI
FDI
CRT LVDS
CRT LVDS
HVCMOS
HVCMOS
VccADAC1
VccADAC2
VssA_DAC2
VssA_DAC1
VccALVDS
VssA_LVDS
VccTX_LVDS1
VccTX_LVDS2
VccTX_LVDS4
VccTX_LVDS3
Vcc3_3_10
Vcc3_3_11
Vcc3_3_13
VccVRM3
VccDMI1
VccDMI2
VccPNAND9
VccPNAND3
VccPNAND5
VccPNAND4
VccPNAND2
VccPNAND1
VccPNAND6
VccPNAND7
VccPNAND8
VccME3_3_1
VccME3_3_2
VccME3_3_3
VccME3_3_4
AE50
AE52
AF53
AF51
AH38
AH39
AP43
AP45
AT46
AT45
AB34
AB35
AD35
AT24
AT16
AU16
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
AM8
AM9
AP11
AP9
69mA
85mA
3
Default: DSC Only
DSC Only: Depop R1818, R1819, C1802, C1801, C1818
C1803, C1804, C1820
Pop R1820, and C1803 change to 0ohm
UMA Only: Vice Versa
+VCCA_DAC
59mA
156mA
98mA
61mA
156mA
+VCCALVDS
R1820 0Ohm
R1820 0Ohm
DSC
DSC
1 2
C1803
C1803
UMA
UMA
0.01UF/16V
0.01UF/16V
+VCC_DMI
+VCCPNAND
+VCCME3
1 2
C1807
C1807
0.1UF/10V
0.1UF/10V
1 2
C1802
C1802
0.01UF/16V
0.01UF/16V
1 2
+VCC33_CMOS
1 2
C1806
C1806
0.1UF/10V
0.1UF/10V
1 2
C1819
C1819
1UF/6.3V
1UF/6.3V
1 2
C1808
C1808
0.1UF/10V
0.1UF/10V
+VCCA_DAC
UMA
UMA
1 2
C1804
C1804
UMA
UMA
0.01UF/16V
0.01UF/16V
R1822
R1822
0Ohm @
0Ohm @
R1817@R1817
R1823 0Ohm R1823 0Ohm
1 2
C1801
C1801
0.1UF/10V
0.1UF/10V
R1814@R1814
+3VS
1 2
UMA
UMA
R1818 0Ohm
R1818 0Ohm
UMA
UMA
1 2
C1820
C1820
UMA
UMA
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
+VCCVRM
+VCCP_VTT
1 2
@
+1.8VS
1 2
@
+3VSUS
1 2
R1821 0Ohm R1821 0Ohm
1 2
C1818
C1818
UMA
UMA
10UF/6.3V
10UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
+3VS
1 2
R1819 0Ohm
R1819 0Ohm
UMA
UMA
+3VS
R1812@R1812
1 2
@
+VCCP_VTT Rail Values:
VTT=1.05V; Arrandale
VTT=1.10V; Clarksfield
EC SPI Solution
2
U1301I
U1301I
AY7
Vss166
B11
Vss167
B15
Vss168
B19
Vss169
B23
Vss170
B31
Vss171
B35
Vss172
B39
Vss173
B43
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BC10
BC14
BC18
BC22
BC32
BC36
BC40
BC44
BC52
BD48
BD49
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
AF39
B47
BB5
BC2
BH9
BD5
BE6
BE8
BF3
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
F49
G10
G14
G18
G22
G32
G36
G40
G44
G52
H16
H20
H30
H34
H38
H42
Vss174
Vss175
B7
Vss176
Vss221
Vss180
Vss181
Vss182
Vss183
Vss184
Vss185
Vss186
Vss187
Vss189
Vss190
Vss191
Vss192
Vss193
Vss194
Vss195
Vss196
Vss197
Vss198
Vss199
Vss200
Vss236
Vss201
Vss202
Vss203
Vss204
Vss205
Vss206
Vss207
Vss208
Vss209
Vss210
Vss211
Vss212
Vss213
Vss214
Vss215
Vss216
Vss217
Vss218
Vss219
Vss222
Vss223
Vss224
Vss225
Vss226
Vss227
Vss228
Vss229
Vss230
Vss231
Vss232
Vss233
Vss234
Vss235
Vss237
Vss238
Vss239
Vss240
Vss241
Vss242
Vss243
Vss244
Vss245
Vss246
Vss247
Vss248
Vss249
E6
Vss250
E8
Vss251
Vss252
F5
Vss253
Vss254
Vss255
Vss256
G2
Vss257
Vss258
Vss259
Vss260
Vss261
Vss262
Vss263
Vss45
Vss264
Vss265
Vss266
Vss267
Vss268
Vss269
+3VS +VCCP_PCH
1 2
+1.8VS
1 2
1
H49
Vss270
H5
Vss271
J24
Vss272
K11
Vss273
K43
Vss274
K47
Vss275
K7
Vss276
L14
Vss277
L18
Vss278
L2
Vss279
L22
Vss280
L32
Vss281
L36
Vss282
L40
Vss283
L52
Vss284
M12
Vss285
M16
Vss286
M20
Vss287
N38
Vss296
M34
Vss288
M38
Vss289
M42
Vss290
M46
Vss291
M49
Vss292
M5
Vss293
M8
Vss294
N24
Vss295
P11
Vss297
AD15
Vss27
P22
Vss299
P30
Vss301
P32
Vss302
P34
Vss303
P42
Vss305
P45
Vss306
P47
Vss307
R2
Vss309
R52
Vss310
T12
Vss311
T41
Vss312
T46
Vss314
T49
Vss315
T5
Vss316
T8
Vss317
U30
Vss318
U31
Vss319
U32
Vss320
U34
Vss321
P38
Vss304
V11
Vss322
P16
Vss298
V19
Vss323
V20
Vss324
V22
Vss325
V30
Vss326
V31
Vss327
V32
Vss328
V34
Vss329
V35
Vss330
V38
Vss331
V43
Vss332
V45
Vss333
V46
Vss334
V47
Vss335
V49
Vss336
V5
Vss337
V7
Vss338
V8
Vss339
W2
Vss340
W52
Vss341
Y11
Vss342
Y12
Vss343
Y15
Vss345
Y19
Vss346
Y23
Vss347
Y28
Vss348
Y30
Vss349
Y31
Vss350
Y32
Vss351
Y38
Vss352
Y43
Vss353
Y46
Vss354
P49
Vss308
Y5
Vss356
Y6
Vss357
Y8
Vss358
P24
Vss300
T43
Vss313
AD51
Vss39
AT8
Vss137
AD47
Vss37
Y47
Vss355
AT12
Vss129
AM6
Vss112
AT13
Vss130
AM5
Vss111
AK45
Vss86
AK39
Vss84
AV14
Vss142
IBEXPEAK-M
A A
5
4
3
2
IBEXPEAK-M
Title :
Title :
Title :
Engineer:
Engineer:
BS
BS
BS
Engineer:
1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PCH PWR(1)
PCH PWR(1)
PCH PWR(1)
ChingPo Chen
ChingPo Chen
ChingPo Chen
18 99 Saturday, March 05, 2011
18 99 Saturday, March 05, 2011
18 99 Saturday, March 05, 2011
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
5
1849mA
1 2
C1930
C1930
1UF/6.3V
1UF/6.3V
+VCCPLLVRM
+VCCSSC
1 2
C1924
C1924
1UF/6.3V
1UF/6.3V
C1922
C1922
1 2
0.1UF/10V
0.1UF/10V
C1921
C1921
1 2
0.1UF/10V
0.1UF/10V
1 2
C1920
C1920
0.1UF/10V
0.1UF/10V
1 2
C1919
C1919
0.1UF/10V
0.1UF/10V
1 2
C1914
C1914
0.1UF/10V
0.1UF/10V
320mA
+VCCD_SW
+VCCRTC_EXT
98mA
68mA
69mA
672mA
1 2
C1925
C1925
1UF/6.3V
1UF/6.3V
+VCCSST
+VCCP_INT_SUS
+VCCPSUS
+VCCPCORE
1mA
1 2
C1918
C1918
0.1UF/10V
0.1UF/10V
2mA
1 2
C1915
C1915
0.1UF/10V
0.1UF/10V
44mA
156mA
D D
C1929
C1929
1 2
0.1UF/10V
+VCCP_PCH
+VCCP_PCH
1 2
L1902
L1902
0Ohm
0Ohm
nb_r0603_h22_small
nb_r0603_h22_small
C C
+VCCP_PCH
1 2
L1903
L1903
0Ohm
0Ohm
nb_r0603_h22_small
nb_r0603_h22_small
B B
+VCCP_VTT Rail Values:
VTT=1.05V; Arrandale
VTT=1.10V; Clarksfield
A A
1 2
@
@
SHORT_PIN
SHORT_PIN
nb_r0805_short
nb_r0805_short
1 2
C1926
C1926
1UF/6.3V
1UF/6.3V
1 2
C1927
C1927
1UF/6.3V
1UF/6.3V
J1915
J1915
+VCCADPLLA
+VCCADPLLB
+VCCP_VTT
1 2
C1903
C1903
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
+VCCP_PCH
@
@
R1911
R1911
@
@
R0603
R0603
+VCC_RTC
+VCCE_PW
1 2
C1905
C1905
22UF/6.3V
22UF/6.3V
nb_c0805_h53_small
nb_c0805_h53_small
R1914
R1914
R0603
R0603
+3VSUS
@
@
+3VS
1 2
0.1UF/10V
1 2
C1931
C1931
1UF/6.3V
1UF/6.3V
C1928
C1928
1 2
0.1UF/10V
0.1UF/10V
+VCCADPLLA
+VCCADPLLB
+VCCSSC
1 2
1 2
C1923
C1923
1UF/6.3V
1UF/6.3V
R1913
R1913
1 2
R0603
R0603
R1912
R1912
1 2
@
@
R0603
R0603
+VCCPCPU
1 2
1 2
C1917
C1917
C1916
C1916
0.1UF/10V
0.1UF/10V
4.7UF/6.3V
4.7UF/6.3V
nb_c0603_h35_small
nb_c0603_h35_small
1 2
C1935
C1935
1UF/6.3V
1UF/6.3V
@
@
AP51
AP53
AF23
AF24
AD38
AD39
AD41
AF43
AF41
AF42
AU24
BB51
BB53
BD51
BD53
AH23
AJ35
AH35
AF34
AH34
AF32
AT18
AU18
Y20
V39
V41
V42
Y39
Y41
Y42
V12
Y22
P18
U19
U20
U22
V15
V16
Y16
A12
V9
U1301J
U1301J
IBEXPEAK-M
IBEXPEAK-M
4
VccAClk1
VccAClk2
VccLAN1
VccLAN2
DcpSusByp
VccME11
VccME12
VccME13
VccME16
VccME14
VccME15
VccME1
VccME2
VccME3
VccME6
VccME7
VccME8
DcpRTC
VccVRM4
VccADPLLA1
VccADPLLA2
VccADPLLB1
VccADPLLB2
VccIO20
VccIO23
VccIO22
VccIO16
VccIO21
VccIO15
DcpSST
DcpSus
VccSus3_3_22
VccSus3_3_25
VccSus3_3_26
VccSus3_3_27
Vcc3_3_7
Vcc3_3_8
Vcc3_3_9
V_CPU_IO1
V_CPU_IO2
VccRTC
POWER
POWER
V24
VccIO2
V26
VccIO3
Y24
VccIO4
Y26
VccIO5
VccIO1
V5REF
Vcc3_3_1
Vcc3_3_2
Vcc3_3_3
Vcc3_3_4
Vcc3_3_5
Vcc3_3_6
Vcc3_3_12
VccIO19
VccVRM1
VccIO12
VccIO10
VccIO14
VccIO9
VccIO13
VccIO17
VccIO18
VccIO6
VccIO7
VccIO8
VccIO11
VccME9
VccME4
VccME5
VccME10
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
U23
V23
F24
K49
J38
L38
M36
N36
P36
U35
AD13
AK3
AK1
AH22
AT20
AF19
AD20
AF22
AD19
AF20
AH19
AH20
AB19
AB20
AB22
AD22
AA34
Y34
Y35
AA35
L30
VccSus3_3_32
VccSus3_3_31
VccSus3_3_30
VccSus3_3_29
VccSus3_3_24
VccSus3_3_23
VccSus3_3_21
VccSus3_3_20
VccSus3_3_19
VccSus3_3_18
VccSus3_3_17
VccSus3_3_16
USB
USB
VccSus3_3_15
VccSus3_3_14
VccSus3_3_13
VccSus3_3_12
VccSus3_3_11
VccSus3_3_10
VccSus3_3_9
VccSus3_3_8
VccSus3_3_7
VccSus3_3_6
VccSus3_3_5
VccSus3_3_4
VccSus3_3_3
VccSus3_3_2
VccSus3_3_1
VccSus3_3_28
V5REF_Sus
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPC
PCI/GPIO/LPC
VccSATAPLL2
VccSATAPLL1
SATA
SATA
PCI/GPIO/LPC
PCI/GPIO/LPC
CPU
CPU
HDA
HDA
VccSusHDA
RTC
RTC
448mA
+VCCIO_USB
163mA
1mA
1mA
357mA
98mA
1344mA
928mA
6mA
+3VSUS_HDA
1 2
C1913
C1913
1UF/6.3V
1UF/6.3V
3
1 2
C1901
C1901
1UF/6.3V
1UF/6.3V
+VCCP_USB
1 2
C1902
C1902
0.1UF/10V
0.1UF/10V
1 2
C1908
C1908
0.1UF/10V
0.1UF/10V
R1901
R1901
R0603
R0603
+V5REF_SUS
+V5REF
+VCCP_PCI
1 2
C1909
C1909
0.1UF/10V
0.1UF/10V
+VCCPLLVRM
+VCC_SATA
1 2
C1912
C1912
1UF/6.3V
1UF/6.3V
+VCCME_SATA
+VCCP_PCH
1 2
@
@
+VCCP_USB
1 2
C1904
C1904
0.1UF/10V
0.1UF/10V
+VCCP_PCH
+VCCPLLVRM
R1909
R1909
R0603
R0603
2
U1301H
U1301H
AB16
Vss13
AA19
Vss1
AA20
Vss2
AA22
Vss3
AM19
Vss94
AA24
Vss4
AA26
Vss5
AA28
+3VSUS
R1902
R1902
1 2
@
@
R0603
R0603
+3VSUS +5VSUS
3
2
1 2
C1906
C1906
1UF/6.3V
1UF/6.3V
R1905
R1905
R0603
R0603
R1906
R1906
R0603
R0603
+VCCP_PCH
R1907
R1907
R0603
R0603
+VCCP_PCH
R1908
R1908
1 2
@
@
R0603
R0603
+3VSUS
1 2
@
@
D1901
D1901
BAT54AW
BAT54AW
1
+3VS
1 2
@
@
+1.8VS
1 2
@
@
1 2
@
@
R1903
R1903
10Ohm
10Ohm
1 2
3
2
1 2
C1907
C1907
1UF/6.3V
1UF/6.3V
D1902
D1902
BAT54AW
BAT54AW
1
+5VS +3VS
R1904
R1904
10Ohm
10Ohm
1 2
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AF12
AH49
AF35
AP13
AN34
AF45
AF46
AF49
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AJ19
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AK12
AM41
AN19
AK26
AK22
AK23
AK28
AB5
AB8
AC2
AD7
AE2
AE4
Y13
AU4
AF5
AF8
AH7
AJ2
AT5
AJ4
Vss6
Vss7
Vss8
Vss9
Vss11
Vss12
Vss14
Vss15
Vss16
Vss17
Vss18
Vss19
Vss20
Vss21
Vss22
Vss23
Vss24
Vss25
Vss26
Vss28
Vss29
Vss31
Vss32
Vss33
Vss34
Vss139
Vss35
Vss36
Vss38
Vss40
Vss41
Vss42
Vss43
Vss344
Vss61
Vss140
Vss44
Vss120
Vss116
Vss46
Vss47
Vss48
Vss49
Vss50
Vss51
Vss52
Vss53
Vss54
Vss55
Vss56
Vss57
Vss144
Vss58
Vss59
Vss62
Vss63
Vss64
Vss65
Vss66
Vss67
Vss68
Vss69
Vss70
Vss71
Vss135
Vss72
Vss73
Vss107
Vss114
Vss76
Vss74
Vss75
Vss77
IBEXPEAK-M
IBEXPEAK-M
1
AK30
Vss78
AK31
Vss79
AK32
Vss80
AK34
Vss81
AK35
Vss82
AK38
Vss83
AK43
Vss85
AK46
Vss87
AK49
Vss88
AK5
Vss89
AK8
Vss90
AL2
Vss91
AL52
Vss92
AM11
Vss93
BB44
Vss188
AD24
Vss30
AM20
Vss95
AM22
Vss96
AM24
Vss97
AM26
Vss98
AM28
Vss99
BA42
Vss178
AM30
Vss100
AM31
Vss101
AM32
Vss102
AM34
Vss103
AM35
Vss104
AM38
Vss105
AM39
Vss106
AM42
Vss108
AU20
Vss138
AM46
Vss109
AV22
Vss146
AM49
Vss110
AM7
Vss113
AA50
Vss10
BB10
Vss179
AN32
Vss115
AN50
Vss117
AN52
Vss118
AP12
Vss119
AP42
Vss121
AP46
Vss122
AP49
Vss123
AP5
Vss124
AP8
Vss125
AR2
Vss126
AR52
Vss127
AT11
Vss128
BA12
Vss177
AH48
Vss60
AT32
Vss131
AT36
Vss132
AT41
Vss133
AT47
Vss134
AT7
Vss136
AV12
Vss141
AV16
Vss143
AV20
Vss145
AV24
Vss147
AV30
Vss148
AV34
Vss149
AV38
Vss150
AV42
Vss151
AV46
Vss152
AV49
Vss153
AV5
Vss154
AV8
Vss155
AW14
Vss156
AW18
Vss157
AW2
Vss158
BF9
Vss220
AW32
Vss159
AW36
Vss160
AW40
Vss161
AW52
Vss162
AY11
Vss163
AY43
Vss164
AY47
Vss165
PCH PWR
PCH PWR
PCH PWR
Title :
Title :
Title :
ChingPo Chen
ChingPo Chen
ChingPo Chen
Engineer:
Engineer:
BS
BS
BS
Engineer:
1
Rev
Rev
Rev
2.0
2.0
19 99 Saturday, March 05, 2011
19 99 Saturday, March 05, 2011
19 99 Saturday, March 05, 2011
2.0
of
of
of
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
5
4
3
2
1
+1.5V
1 2
R2103
R2103
1KOhm
1KOhm
1%
1%
1 2
R2104
R2104
1KOhm
1KOhm
1%
1%
M_A_DQ[0..63] 8 M_A_A[0..15] 8
M_VREFDQ_CHA M_VREFDQ_CHB
PM_EXTTS#0 10
M_VREFDQ_CHA
1 2
C2106
C2106
@
@
2.2UF/6.3V
2.2UF/6.3V
nb_c0603_h35_small
nb_c0603_h35_small
+1.5V
1 2
C2115
C2115
0.1UF/10V
0.1UF/10V
M_VREFDQ_CHA
+1.5V
1 2
C2110
C2110
0.1UF/10V
0.1UF/10V
U2101A
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
D D
M_CLK_DDR1 8
M_CLK_DDR#1 8
M_CLK_DDR0 8
M_CLK_DDR#0 8
M_CS#1 8
M_CS#0 8
M_ODT1 8
M_ODT0 8
M_A_WE# 8
M_A_RAS# 8
M_A_CAS# 8
C C
M_A_DM[0:7] 8
M_A_DQS[0..7] 8
M_A_DQS#[0..7] 8
B B
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_BS2 8
M_A_BS1 8
M_A_BS0 8
M_CKE1 8
M_CKE0 8
1 2
R2101
R2101
10KOhm
10KOhm
SMB_CLK_S 15,22,24 DDR3_DRAMRST# 10,22
SMB_DAT_S 15,22,24
Note:
If SA0_DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0_DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
1 2
R2102
R2102
10KOhm
10KOhm
SA1_DIM0
SA0_DIM0
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQS7
M_A_DQS#7
M_A_DQS6
M_A_DQS#6
M_A_DQS5
M_A_DQS#5
M_A_DQS4
M_A_DQS#4
M_A_DQS3
M_A_DQS#3
M_A_DQS2
M_A_DQS#2
M_A_DQS1
M_A_DQS#1
M_A_DQS0
M_A_DQS#0
M_A_DM7
M_A_DM6
M_A_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0
U2101A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
102
CK1
104
CK1#
101
CK0
103
CK0#
121
S1#
114
S0#
120
ODT1
116
ODT0
113
WE#
110
RAS#
115
CAS#
79
BA2
108
BA1
109
BA0
74
CKE1
73
CKE0
201
SA1
197
SA0
188
DQS7
186
DQS#7
171
DQS6
169
DQS#6
154
DQS5
152
DQS#5
137
DQS4
135
DQS#4
64
DQS3
62
DQS#3
47
DQS2
45
DQS#2
29
DQS1
27
DQS#1
12
DQS0
10
DQS#0
187
DM7
170
DM6
153
DM5
136
DM4
63
DM3
46
DM2
28
DM1
11
DM0
202
SCL
200
SDA
DDR3_DIMM_204P
DDR3_DIMM_204P
H:9.2mm SO-DIMM
Reverse type
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
RESET#
M_A_DQ1
5
M_A_DQ5
7
M_A_DQ4
15
M_A_DQ0
17
M_A_DQ6
4
M_A_DQ7
6
M_A_DQ2
16
M_A_DQ3
18
M_A_DQ13
21
M_A_DQ9
23
M_A_DQ10
33
M_A_DQ15
35
M_A_DQ8
22
M_A_DQ12
24
M_A_DQ14
34
M_A_DQ11
36
M_A_DQ20
39
M_A_DQ21
41
M_A_DQ18
51
M_A_DQ22
53
M_A_DQ16
40
M_A_DQ17
42
M_A_DQ19
50
M_A_DQ23
52
M_A_DQ29
57
M_A_DQ28
59
M_A_DQ27
67
M_A_DQ26
69
M_A_DQ24
56
M_A_DQ25
58
M_A_DQ30
68
M_A_DQ31
70
M_A_DQ37
129
M_A_DQ32
131
M_A_DQ35
141
M_A_DQ34
143
M_A_DQ36
130
M_A_DQ33
132
M_A_DQ38
140
M_A_DQ39
142
M_A_DQ40
147
M_A_DQ43
149
M_A_DQ42
157
M_A_DQ46
159
M_A_DQ44
146
M_A_DQ41
148
M_A_DQ47
158
M_A_DQ45
160
M_A_DQ53
163
M_A_DQ49
165
M_A_DQ55
175
M_A_DQ50
177
M_A_DQ48
164
M_A_DQ52
166
M_A_DQ54
174
M_A_DQ51
176
M_A_DQ61
181
M_A_DQ60
183
M_A_DQ63
191
M_A_DQ58
193
M_A_DQ56
180
M_A_DQ57
182
M_A_DQ62
192
M_A_DQ59
194
30
+1.5V
R2105 0Ohm
R2105 0Ohm
1 2
@
@
1 2
C2111
C2111
0.1UF/10V
0.1UF/10V
1 2
1 2
C2128
C2128
C2125
C2125
10UF/10V
10UF/10V
10UF/10V
10UF/10V
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
105
111
117
123
127
133
138
144
150
155
161
167
172
178
184
189
195
198
125
122
126
1 2
C2105
C2105
0.1UF/10V
0.1UF/10V
1 2
C2112
C2112
0.1UF/10V
0.1UF/10V
1 2
C2127
C2127
10UF/10V
10UF/10V
nb_c0805_h53_small
nb_c0805_h53_small
U2101B
U2101B
75
VDD1
81
VDD3
87
VDD5
93
VDD7
99
VDD9
VDD11
VDD13
VDD15
VDD17
2
VSS1
8
VSS3
13
VSS5
19
VSS7
25
VSS9
31
VSS11
37
VSS13
43
VSS15
48
VSS17
54
VSS19
60
VSS21
65
VSS23
71
VSS25
VSS27
VSS29
VSS31
VSS33
VSS35
VSS37
VSS39
VSS41
VSS43
VSS45
VSS47
VSS49
VSS51
EVENT#
TEST
77
NC1
NC2
VREFCA
1
VREFDQ
DDR3_DIMM_204P
DDR3_DIMM_204P
1 2
C2113
C2113
0.1UF/10V
0.1UF/10V
1 2
C2126
C2126
10UF/10V
10UF/10V
nb_c0805_h53_small
nb_c0805_h53_small
76
VDD2
82
VDD4
88
VDD6
94
VDD8
100
VDD10
106
VDD12
112
VDD14
118
VDD16
124
VDD18
3
VSS2
9
VSS4
14
VSS6
20
VSS8
26
VSS10
32
VSS12
38
VSS14
44
VSS16
49
VSS18
55
VSS20
61
VSS22
66
VSS24
72
VSS26
128
VSS28
134
VSS30
139
VSS32
145
VSS34
151
VSS36
156
VSS38
162
VSS40
168
VSS42
173
VSS44
179
VSS46
185
VSS48
190
VSS50
196
VSS52
207
GND1
208
GND2
205
NP_NC1
206
NP_NC2
203
VTT1
204
VTT2
199
VDDSPD
+0.75VS
1 2
C2117
C2117
1UF/6.3V
1UF/6.3V
1 2
C2123
C2123
10UF/10V
10UF/10V
nb_c0805_h53_small
nb_c0805_h53_small
@
@
1 2
C2118
C2118
1UF/6.3V
1UF/6.3V
+1.5V
1 2
C2119
C2119
1UF/6.3V
1UF/6.3V
@
@
+0.75VS
+3VS
1 2
C2103
C2103
0.1UF/10V
0.1UF/10V
1 2
C2120
C2120
1UF/6.3V
1UF/6.3V
@
@
A A
DDR3 SO-DIMM-Channel A
DDR3 SO-DIMM-Channel A
DDR3 SO-DIMM-Channel A
Title :
Title :
Title :
ChingPo Chen
ChingPo Chen
Engineer:
Engineer:
BS
BS
BS
Engineer:
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
ChingPo Chen
1
Rev
Rev
Rev
2.0
2.0
21 99 Saturday, March 05, 2011
21 99 Saturday, March 05, 2011
21 99 Saturday, March 05, 2011
2.0
5
4
3
2
1
M_B_A[0..15] 8
U2201A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
D D
M_CLK_DDR3 8
M_CLK_DDR#3 8
M_CLK_DDR2 8
M_CLK_DDR#2 8
M_CS#3 8
M_CS#2 8
M_ODT3 8
M_ODT2 8
M_B_WE# 8
M_B_RAS# 8
C C
M_B_DM[0..7] 8
M_B_DQS[0..7] 8
M_B_DQS#[0..7] 8
B B
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
+3VS
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
M_B_CAS# 8
M_B_BS2 8
1 2
R2201
R2201
10KOhm
10KOhm
M_B_BS1 8
M_B_BS0 8
M_CKE3 8
M_CKE2 8
1 2
R2202
R2202
10KOhm
10KOhm
SMB_CLK_S 15,21,24 DDR3_DRAMRST# 10,21
SMB_DAT_S 15,21,24
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQS7
M_B_DQS#7
M_B_DQS6
M_B_DQS#6
M_B_DQS5
M_B_DQS#5
M_B_DQS4
M_B_DQS#4
M_B_DQS3
M_B_DQS#3
M_B_DQS2
M_B_DQS#2
M_B_DQS1
M_B_DQS#1
M_B_DQS0
M_B_DQS#0
M_B_DM7
M_B_DM6
M_B_DM5
M_B_DM4
M_B_DM3
M_B_DM2
M_B_DM1
M_B_DM0
U2201A
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
102
CK1
104
CK1#
101
CK0
103
CK0#
121
S1#
114
S0#
120
ODT1
116
ODT0
113
WE#
110
RAS#
115
CAS#
79
BA2
108
BA1
109
BA0
74
CKE1
73
CKE0
201
SA1
197
SA0
188
DQS7
186
DQS#7
171
DQS6
169
DQS#6
154
DQS5
152
DQS#5
137
DQS4
135
DQS#4
64
DQS3
62
DQS#3
47
DQS2
45
DQS#2
29
DQS1
27
DQS#1
12
DQS0
10
DQS#0
187
DM7
170
DM6
153
DM5
136
DM4
63
DM3
46
DM2
28
DM1
11
DM0
202
SCL
200
SDA
DDR3_DIMM_204P
DDR3_DIMM_204P
H:5.2mm SO-DIMM
Reverse type
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
RESET#
M_B_DQ5
5
M_B_DQ6
7
M_B_DQ0
15
M_B_DQ3
17
M_B_DQ1
4
M_B_DQ4
6
M_B_DQ2
16
M_B_DQ7
18
M_B_DQ12
21
M_B_DQ9
23
M_B_DQ15
33
M_B_DQ13
35
M_B_DQ10
22
M_B_DQ8
24
M_B_DQ14
34
M_B_DQ11
36
M_B_DQ16
39
M_B_DQ21
41
M_B_DQ23
51
M_B_DQ22
53
M_B_DQ20
40
M_B_DQ17
42
M_B_DQ18
50
M_B_DQ19
52
M_B_DQ28
57
M_B_DQ29
59
M_B_DQ30
67
M_B_DQ27
69
M_B_DQ25
56
M_B_DQ24
58
M_B_DQ26
68
M_B_DQ31
70
M_B_DQ37
129
M_B_DQ32
131
M_B_DQ35
141
M_B_DQ34
143
M_B_DQ33
130
M_B_DQ36
132
M_B_DQ39
140
M_B_DQ38
142
M_B_DQ41
147
M_B_DQ44
149
M_B_DQ46
157
M_B_DQ47
159
M_B_DQ40
146
M_B_DQ45
148
M_B_DQ43
158
M_B_DQ42
160
M_B_DQ50
163
M_B_DQ52
165
M_B_DQ55
175
M_B_DQ54
177
M_B_DQ48
164
M_B_DQ53
166
M_B_DQ49
174
M_B_DQ51
176
M_B_DQ57
181
M_B_DQ60
183
M_B_DQ62
191
M_B_DQ61
193
M_B_DQ56
180
M_B_DQ58
182
M_B_DQ63
192
M_B_DQ59
194
30
M_B_DQ[0..63] 8
PM_EXTTS#1 10
M_VREFDQ_CHB
1 2
C2204
C2204
2.2UF/6.3V
2.2UF/6.3V
nb_c0603_h35_small
nb_c0603_h35_small
@
@
+1.5V
1 2
C2206
C2206
0.1UF/10V
0.1UF/10V
1 2
C2205
C2205
0.1UF/10V
0.1UF/10V
R2205 0Ohm
R2205 0Ohm
1 2
@
@
M_VREFDQ_CHB
1 2
C2207
C2207
0.1UF/10V
0.1UF/10V
+1.5V
1 2
C2223
C2223
0.1UF/10V
0.1UF/10V
1 2
C2208
C2208
0.1UF/10V
0.1UF/10V
U2201B
U2201B
75
VDD1
81
VDD3
87
VDD5
93
VDD7
99
VDD9
105
VDD11
111
VDD13
117
VDD15
123
VDD17
2
VSS1
8
VSS3
13
VSS5
19
VSS7
25
VSS9
31
VSS11
37
VSS13
43
VSS15
48
VSS17
54
VSS19
60
VSS21
65
VSS23
71
VSS25
127
VSS27
133
VSS29
138
VSS31
144
VSS33
150
VSS35
155
VSS37
161
VSS39
167
VSS41
172
VSS43
178
VSS45
184
VSS47
189
VSS49
195
VSS51
198
EVENT#
125
TEST
77
NC1
122
NC2
126
VREFCA
1
VREFDQ
DDR3_DIMM_204P
DDR3_DIMM_204P
1 2
C2217
C2217
0.1UF/10V
0.1UF/10V
VDD10
VDD12
VDD14
VDD16
VDD18
VSS10
VSS12
VSS14
VSS16
VSS18
VSS20
VSS22
VSS24
VSS26
VSS28
VSS30
VSS32
VSS34
VSS36
VSS38
VSS40
VSS42
VSS44
VSS46
VSS48
VSS50
VSS52
NP_NC1
NP_NC2
VDDSPD
+0.75VS
1 2
C2219
C2219
1UF/6.3V
1UF/6.3V
VDD2
VDD4
VDD6
VDD8
VSS2
VSS4
VSS6
VSS8
GND1
GND2
VTT1
VTT2
76
82
88
94
100
106
112
118
124
3
9
14
20
26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196
207
208
205
206
203
204
199
1 2
C2220
C2220
1UF/6.3V
1UF/6.3V
+1.5V
1 2
C2221
C2221
1UF/6.3V
1UF/6.3V
@
@
+0.75VS
+3VS
1 2
C2218
C2218
0.1UF/10V
0.1UF/10V
1 2
C2222
C2222
1UF/6.3V
1UF/6.3V
@
@
+1.5V
1 2
1 2
C2210
C2210
C2209
C2209
10UF/10V
10UF/10V
10UF/10V
10UF/10V
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
A A
5
4
3
2
1 2
1 2
C2211
C2211
10UF/10V
10UF/10V
nb_c0805_h53_small
nb_c0805_h53_small
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
C2212
C2212
C2213
C2213
10UF/10V
10UF/10V
10UF/10V
10UF/10V
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
nb_c0805_h53_small
@
@
DDR3 SO-DIMM-Channel B
DDR3 SO-DIMM-Channel B
DDR3 SO-DIMM-Channel B
Title :
Title :
Title :
ChingPo Chen
ChingPo Chen
ChingPo Chen
1
22 99 Saturday, March 05, 2011
22 99 Saturday, March 05, 2011
22 99 Saturday, March 05, 2011
BS
BS
BS
Engineer:
Engineer:
Engineer:
Rev
Rev
Rev
2.0
2.0
2.0
5
D D
4
3
2
1
Low-Power Solution(1.5VS):
IDT: 9LVS3162AKLF
SLG: SLG8LV595V
R1.1-19
+CLK_VDD
+1.5VS
R1.1-22
C C
+VCCP_VTT
R2401
R2401
4.7KOhm
4.7KOhm
@
@
1 2
CPU_SEL
1 2
R2402
R2402
C2423
C2423
10KOhm
10KOhm
10PF/50V
10PF/50V
@
@
1 2
Straps
CPU_SEL
B B
L2405 0Ohm L2405 0Ohm
1 2
L2404 0Ohm
L2404 0Ohm
1 2
+3VS
L2401
L2401
600Ohm
600Ohm
nb_l0805_h43_small
nb_l0805_h43_small
Irat=500mA
Irat=500mA
CLK_BUF_REF14 15
100 MHz (0.7V- 1.5V)
1
133 MHz
0*
2 1
SMB_DAT_S 15,21,22
SMB_CLK_S 15,21,22
@
@
+CLK_VDD
+CLK_VDD
+CLK_VDD
1 2
C2401
C2401
10UF/10V
10UF/10V
nb_c0805_h53_small
nb_c0805_h53_small
+CLK_VDD15
1 2
C2403
C2403
0.1UF/16V
0.1UF/16V
1 2
C2402
C2402
0.1UF/16V
0.1UF/16V
1 2
C2413
C2413
@
@
10PF/50V
10PF/50V
R1.1-49
250mA
1 2
C2404
C2404
0.1UF/16V
0.1UF/16V
250mA
1 2
C2405
C2405
0.1UF/16V
0.1UF/16V
R2404 33Ohm R2404 33Ohm
1 2
1 2
C2406
C2406
0.1UF/16V
0.1UF/16V
CLK_XTAL_OUT
CLK_XTAL_IN
R1.1-32
+CLK_VDD15
CPU_SEL
CLK_XTAL_IN
1 2
U2401
U2401
1
VDD_DOT
5
VDD_27
17
VDD_SRC
24
VDD_CPU
29
VDD_REF
27
XTAL_OUT
28
XTAL_IN
30
REF_0/CPU_SEL
31
SDA
32
SCL
2
VSS_DOT
8
VSS_27
9
VSS_SATA
12
VSS_SRC
21
VSS_CPU
26
VSS_REF
33
GND
SLG8SP585VTR
SLG8SP585VTR
RTK: 0610-0027000
SLG: 0610-001F000
IDT : 0610-009M000
1 3
C2408
C2408
18PF/50V
18PF/50V
X2401
X2401
14.31818Mhz
14.31818Mhz
2
4
VDD_SRC_IO
VDD_CPU_IO
SRC_1/SATA
SRC_1/SATA#
*CPU_STOP#
CKPWRGD/PD#
DOT_96
DOT_96#
27MHZ
27MHZ_SS
SRC_2
SRC_2#
CPU_1
CPU_1#
CPU_0
CPU_0#
CLK_XTAL_OUT
1 2
C2407
C2407
18PF/50V
18PF/50V
80mA
15
18
3
4
27M_CLK_NSS
6
27M_CLK_SS
7
10
11
13
14
STP_CPU# STP_CPU#
16
CLK_CPU1
20
CLK_CPU1#
19
23
22
CLK_PWRGD
25
+CLK_VDD_IO
1 2
C2409
C2409
0.1UF/16V
0.1UF/16V
1 2
1 2
1
1
1
R1.1-32
CLK_PWRGD
1 2
C2410
C2410
0.1UF/16V
0.1UF/16V
R2406
R2406
33OhmDSC
33OhmDSC
R2407 33Ohm
R2407 33Ohm
@
@
T2405 T2405
T2403 T2403
T2404 T2404
+3VS
1 2
3
3
D
D
Q2401
Q2401
2N7002
2N7002
S
S
2
2
Removed 10uF
for cost down
L2402
L2402
600Ohm
600Ohm
nb_l0805_h43_small
nb_l0805_h43_small
Irat=500mA
Irat=500mA
R2408
R2408
10KOhm
10KOhm
1
1
G
G
+VCCP_VTT
2 1
CLK_BUF_DOT96_P 15
CLK_BUF_DOT96_N 15
CLK_VGA_27M_NSS 72
CLK_VGA_27M_SS 72
CLK_PCIE_SATA 15
CLK_PCIE_SATA# 15
CLK_BUF_EXP_P 15
CLK_BUF_EXP_N 15
CLK_BUF_BCLK_P 15
CLK_BUF_BCLK_N 15
CLK_EN# 80
+VCCP_VTT Rail Values:
VTT=1.05V; Arrandale
VTT=1.10V; Clarksfield
+3VS
R2403
R2403
10KOhm
10KOhm
1 2
A A
CLK GEN. SLG8SP585V
CLK GEN. SLG8SP585V
CLK GEN. SLG8SP585V
Title :
Title :
Title :
Lucifer Lin
Lucifer Lin
Lucifer Lin
Engineer:
Engineer:
BS
BS
BS
Engineer:
1
Rev
Rev
Rev
2.0
2.0
24 99 Saturday, March 05, 2011
24 99 Saturday, March 05, 2011
24 99 Saturday, March 05, 2011
2.0
of
of
of
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
5
D D
C C
B B
4
ODD_CON02
ODD_CON02
16
SIDE2
14
13
12
11
10
9
8
7
6
5
4
3
2
15
ODD_GND
1
SIDE1
FPC_CON_14P
FPC_CON_14P
3
14
13
12
11
10
9
8
ODD_SATA_ODD_PRSNT#
7
6
5
4
3
ODD_SATA_ODD_DA#
2
1
ODD_GND
ODD_GND
ODD_SATA_ODD_TXP1
ODD_SATA_ODD_TXN1
ODD_GND
ODD_SATA_ODD_RXN1
ODD_SATA_ODD_RXP1
ODD_GND
ODD_+5VS_ODD
ODD_+5VS_ODD
ODD_+5VS_ODD
ODD_+5VS_ODD
2
ODD_CON01
ODD_CON01
S1
S1
S2
S2
S3
S3
S4
S4
S5
S5
S6
S6
S7
S7
P1
P1
P2
P2
P3
P3
P4
P4
P5
P5
P6
P6
SATA_CON_13P
SATA_CON_13P
NP_NC4
NP_NC2
NP_NC1
NP_NC3
1
4
2
1
3
ODD_H01
ODD_GND
3
ODD_H01
1
C315D102
C315D102
ODD
ODD
ODD
Title :
Title :
Title :
Stanly Hsu
Stanly Hsu
Engineer:
Engineer:
BS
BS
BS
Engineer:
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
Stanly Hsu
1
Rev
Rev
Rev
2.0
2.0
2.0
of
of
of
25 99 Saturday, March 05, 2011
25 99 Saturday, March 05, 2011
25 99 Saturday, March 05, 2011
ODD_H02
ODD_H02
1
tooling_HOLE
tooling_HOLE
A A
5
4
5
D D
C C
4
PWR_U01
PWR_U01
1
1
2
2
3
3
4
HOTBAR_PAD_4P
HOTBAR_PAD_4P
4
PWR_H02
PWR_H02
1
C67D67N
C67D67N
3
PWR_GND
PWR_H01
PWR_H01
1
C67D67N
C67D67N
PWR_SW#
GND1
GND1
5 6
GND2
GND2
PWR_SW01
PWR_SW01
SWITCH_4P
SWITCH_4P
3 4
1 2
2
1
B B
A A
5
4
3
PWR_GND
R2.0
PWR BTN
PWR BTN
PWR BTN
Title :
Title :
Title :
Stanly Hsu,Iris Chen
Stanly Hsu,Iris Chen
Engineer:
Engineer:
BS
BS
BS
Engineer:
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
BU1-RD Div.1-HW RD Dept.1
Size Project Name
Size Project Name
Size Project Name
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
Stanly Hsu,Iris Chen
of
of
of
26 99 Saturday, March 05, 2011
26 99 Saturday, March 05, 2011
26 99 Saturday, March 05, 2011
1
Rev
Rev
Rev
2.0
2.0
2.0
5
D D
TP_H3
TP_H3
1
DO181X102N
C C
TP_GND
DO181X102N
@
@
TP_H2
TP_H2
1
C335D102
C335D102
@
@
TP_H1
TP_H1
1
C102D102N
C102D102N
@
@
4
1
I/O1
I/O1
2
GND
GND
TP_GND
TP_LEFT TP_RIGHT
3 4
I/O2 I/O3
I/O2 I/O3
TP_D1
TP_D1
CM1293_04SO
CM1293_04SO
@
@
3
TP_+3VA
6
I/O4
I/O4
5
VDD
VDD
2
TP_LEFT
TP_SW1
TP_SW1
SWITCH_4P
SWITCH_4P
GND2
GND2
3 4
1 2
GND1
GND1
5 6
TP_GND
TP_RIGHT
1
B B
LID Switch
TP_LID_SW#
1 2
TPR09
TPR09
100KOhm
100KOhm
TP_+3VA
TPC01 0.1UF/10V TPC01 0.1UF/10V
1 2
AH180-WG-7
AH180-WG-7
1
Vdd
2
OUTPUT
TPU01
TPU01
GND
3
TP_GND
TPCON1
TPCON1
7
GND1
GND1
8
GND2
GND2
FPC_CON_6P
FPC_CON_6P
TP_LID_SW#
1
2
3
4
5
6
TP_LEFT
TP_RIGHT
TP_+3VA
TP_GND
GND2
GND2
GND1
GND1
5 6
TP_GND
TP_SW2
TP_SW2
SWITCH_4P
SWITCH_4P
3 4
1 2
R2.0
A A
TP_GND
TP_M
TP_M
TP_M
Title :
Title :
Title :
Stanly Hsu
Stanly Hsu
Engineer:
Engineer:
BS
BS
BS
Engineer:
BG1-HW RD Div.2-NB RD Dept.5
BG1-HW RD Div.2-NB RD Dept.5
BG1-HW RD Div.2-NB RD Dept.5
Size Project Name
Size Project Name
Size Project Name
B
B
B
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Stanly Hsu
1
Rev
Rev
Rev
2.0
2.0
2.0
of
of
of
27 99 Saturday, March 05, 2011
27 99 Saturday, March 05, 2011
27 99 Saturday, March 05, 2011
5
4
3
2
+5VUSB0_IO
1
1 2
+
+
IOCE01
IOCE01
100UF/6.3V
D_GND_IO
D D
IOD4
IOD4
+5VUSB0_IO
FPC_CON_18P
FPC_CON_18P
19
SIDE1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
SIDE2
IOCON5
IOCON5
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
20
A_GND_IO
C C
B B
IO_USB_PN1
IO_USB_PP1
IO_USB_PN3
IO_USB_PP3
MIC_IN_AC_E_R_IO
MIC_EXT_JD#_IO
AC_HP_L_IO
AC_HP_R_IO
HP_JD#_IO
IOD5
IOD5
1 2
AZ2025-01H.R7G
AZ2025-01H.R7G
R2.0
IOR07
IOR07
0Ohm
0Ohm
@
@
1 2
IOD6
IOD6
AZ2025-01H.R7G
AZ2025-01H.R7G
IOR09
IOR09
0Ohm
0Ohm
@
@
1 2
1 2
Moat
D_GND_IO
D_GND_IO
A_GND_IO
MIC_IN_AC_E_R_IO
MIC_EXT_JD#_IO
1
2
3 4
CM1293_04SO
CM1293_04SO
IOR01 0Ohm IOR01 0Ohm
1 2
100UF/6.3V
6
5
IOC08
IOC08
0.1UF/16V
0.1UF/16V
1 2
D_GND_IO
IO_USB_PP3 IO_USB_PN3
+5VUSB0_IO
IO_USB_PN1 IO_USB_PP1
MIC_IN_AC_E_R_JACK
1 2
IOC06
IOC06
100PF/50V
100PF/50V
1 2
IOC05
IOC05
100PF/50V
100PF/50V
A_GND_IO A_GND_IO
+5VUSB0_IO
IO_USB_PN3
IO_USB_PP3
D_GND_IO
+5VUSB0_IO
IO_USB_PN1
IO_USB_PP1
USB 2.0
IOCON4
IOCON4
P_GND1
1
VBUS
P_GND3
2
D-
3
D+
4
GND
P_GND4
P_GND2
USB_CON_1X4P
USB_CON_1X4P
USB 2.0
IOCON3
IOCON3
P_GND1
1
VBUS
P_GND3
2
D-
3
D+
4
GND
P_GND4
P_GND2
USB_CON_1X4P
USB_CON_1X4P
MIC JACK
8
8
7
7
1
1
2
2
6
6
3
3
4
4
5
5
9
NP_NC1
10
NP_NC2
PHONE_JACK_8P
PHONE_JACK_8P
A_GND_IO
5
7
8
6
5
7
8
6
IOCON1
IOCON1
D_GND_IO
D_GND_IO D_GND_IO
Ground Hole&Pad
HP_JD#_Jack
AU_HP_RR_JACK
IOH1
IOH1
@
@
1
RTB945X492D201
RTB945X492D201
IOU1
IOU1
1
1
@
@
SMD47X472_M2_NP
SMD47X472_M2_NP
IOH2
IOH2
@
@
1
C221D201
C221D201
A A
D_GND_IO
5
AU_HP_LL_JACK
@
@
1
2
AZ2025-02S
AZ2025-02S
AZ2025-02S
IOD1
IOD1
AZ2025-02S
IOD2
IOD2
3
A_GND_IO A_GND_IO A_GND_IO
4
MIC_EXT_JD#_IO
MIC_IN_AC_E_R_JACK
@
@
1
2
AZ2025-01H.R7G
AZ2025-01H.R7G
@
@
3
IOD3
IOD3
1 2
AC_HP_L_IO
AC_HP_R_IO
HP_JD#_IO
3
IOR03 0Ohm IOR03 0Ohm
IOR04 0Ohm IOR04 0Ohm
IOR02 0Ohm IOR02 0Ohm
1 2
1 2
1 2
1 2
IOC02
IOC02
100PF/50V
100PF/50V
2
1 2
IOC03
IOC03
100PF/50V
100PF/50V
AU_HP_LL_JACK
AU_HP_RR_JACK
1 2
IOC04
IOC04
100PF/50V
100PF/50V
A_GND_IO A_GND_IO A_GND_IO
BG1-NB1-HW-NB5
BG1-NB1-HW-NB5
BG1-NB1-HW-NB5
Size Project Name
Size Project Name
Size Project Name
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Headphone Jack
8
7
1
2
6
3
HP_JD#_Jack
A_GND_IO
BS
BS
BS
4
5
9
10
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
IOCON2
IOCON2
8
7
1
2
6
3
4
5
NP_NC1
NP_NC2
PHONE_JACK_8P
PHONE_JACK_8P
IO
IO
IO
JR Huang
JR Huang
JR Huang
28 99 Saturday, March 05, 2011
28 99 Saturday, March 05, 2011
28 99 Saturday, March 05, 2011
Rev
Rev
Rev
2.0
2.0
2.0
of
of
of
5
D D
4
3
2
1
Thermal Policy
+3VS
C C
R4708
R4708
0Ohm
0Ohm
VGA_OVERTEMP# 74
BUF_PLT_RST# 10,16,46,55,67,70
B B
Input Signal
PM_THRMTRIP# 10,17
1 2
DSC
DSC
CPU_VGA_THERM#
+VCCP_VTT
R4701
R4701
330Ohm
330Ohm
1 2
2
5
Q4702B
Q4702B
UM6K1N
UM6K1N
B
B
1
1
R4706
R4706
10KOhm
10KOhm
1 2
6 1
3 4
3
3
C
C
Q4701
Q4701
PMBS3904
PMBS3904
E
E
2
2
Q4702A
Q4702A
UM6K1N
UM6K1N
NPCE795 has internal power-on reset circuit
+3VA_EC
Use 47k ohm to make sure that raising time of POR is less than 10us
R4704 47KOhm R4704 47KOhm
D4702 1SS355 D4702 1SS355
D4703 1SS355 D4703 1SS355
1 2
1 2
1 2
1 2
C4701
C4701
4.7UF/6.3V
4.7UF/6.3V
@
@
EC_RST# 46 FORCE_OFF#_EC 49
+3VA_EC
A A
5
4
+3VA_EC 13,46
+3VS
+3VS 10,13,14,15,16,17,18,19,21,22,24,37,39,41,42,44,45,46,48,60,63,65,66,67,80,86,91,92
Title :
Title :
Title :
RST_Reset Circuit
RST_Reset Circuit
RST_Reset Circuit
Stanly Hsu
Stanly Hsu
Engineer:
Engineer:
BS
BS
BS
Engineer:
1
BG1-HW RD Div.2-NB RD Dept.5
BG1-HW RD Div.2-NB RD Dept.5
BG1-HW RD Div.2-NB RD Dept.5
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Stanly Hsu
of
of
of
32 99 Saturday, March 05, 2011
32 99 Saturday, March 05, 2011
32 99 Saturday, March 05, 2011
Rev
Rev
Rev
2.0
2.0
2.0