CR#_F
Byte5: bit0 =1
DOC. NUMBER
0
33_5%
Byte5: bit2 =1
FSA
SIZE
CR#_E
SRC4
HOST CLOCK
SRC4
SRC2
FREQUENCY
SRC1
Byte5: bit6 =0(PWD)
22_1%
30PPM
0
1
Byte6: bit4=0, disable CR#_H; 1,enable CR#_H
Byte6: bit7=0, disable CR#_E; 1,enable CR#_E
TITLE
1
Byte5: bit4 =0(PWD)
27MHz NON-SPREAD CLOCK
SRC9
CR#_G
1066
Byte5: bit3=0, disable CR#_C; 1,enable CR#_C
Stuff
SRC0
Layout note: All decoupling 0.1uF disperse closed to pin
INVENTEC
FSB
OF
CR#_D
Layout note: All decoupling 0.1uF disperse closed to pin
REVCODE
200
FSB CLOCK
Byte5: bit1=0, disable CR#_D; 1,enable CR#_D
27_Select=1
Card reader
0
Byte5: bit4 =1
0
0
FREQUENCY
0
Byte5: bit5=0, disable CR#_B; 1,enable CR#_B
22._1%
R967
Byte6: bit6=0, disable CR#_F; 1,enable CR#_F
Byte5: bit7=0, disable CR#_A; 1,enable CR#_A
R6029
CR#_C
Byte5: bit0 =0(PWD)
SRC2
Byte5: bit6 =1
SRC10
*CLKREQ# pin controls SRC Table.
SRC8
Byte6: bit5=0, disable CR#_G; 1,enable CR#_G
Byte5: bit2 =0(PWD)
SRC6
OPEN
SRC1
1
SHEET
166
CHANGE by
CR#_H
27_Select=0
LCD_SST 100MHz
CR#_A
Please place close to CLKGEN within 500mils
266
OPEN
1
2
19-
23-Mar-2010
CLOCK_GENERATOR
MAS10M
CS
A3
5213
1310A23553-0-0 A02
KOBE
800
667
SRC0
CR#_B
FSC
1
2
32-
R4016
1K_5%
1
2
10K_5%
R4005
R4026
12
0402_OPEN
R4024
10K_5%_OPEN
R4010
1
2
10K_5%
60
59
X2
15-,19-
40-
19-
9-,11-,13-,14-,15-,16-,19-,20-,21-,23-,24-,31-,34-
44
30
SRCT9
SUB_48MHZ_FSLA
10
VDD
16
9
VDD48
12
VDD96_IO
VDDCPU
55
VDDCPU_IO
49
VDDPCI
2
20
VDDPLL3_IO
VDDREF
61
X1
SRCC6
40
43
SRCC7_CR#_E
SRCC9
31
SRCT0_DOTC_96
14
SRCT10
34
33
SRCT11_CR#_H
21
SRCT2_SATAT
SRCT3_CR#_C
24
27
SRCT4
41
SRCT6
SRCT7_CR#_F
PCI_F5_ITP_EN
38
PCI_STOP#
REF0_FSLC_TEST_SEL
62
SCLK
64
63
SDTAT
13
SRCC0_DOTT_96
35
SRCC10
SRCC11_CR#_G
32
SRCC2_SATAC
22
25
SRCC3_CR#_D
SRCC4
28
FSLB_TEST_MODE
GND48
11
GNDCPU
52
8
GNDPCI
58
GNDREF
48
NC
1
PCI0_CR#_A
PCI1_CR#_B
3
4
PCI2_TME
PCI3
5
PCI4_27_Select
6
7
42
45
VDDSRC_IO
CK_PWRGD_PD#
56
CPUC0
53
50
CPUC1_F
46
CPUC2_ITP_SRCC8
54
CPUT0
CPUT1_F
51
CPUT2_ITP_SRCT8
47
CPU_STOP#
37
57
GND
19
GNDSRC
23
VDDSRC_IO
26
27MHz_NonSS_SRCT1_SE1
17
18
27MHz_SS_SRCC1_SE2
29
GNDSRC
36
VDDSRC_IO
VDDSRC_IO
39
GNDSRC
1
2
ICS_ICS9LPRS365BGLFT_A_TSSOP_64P
U4001
GND
15
2
4444-
BLM11A121S
L4000
1 2
C4018
10uF_10v
1
15-,19-
47-
8-,9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,40-,41-,42-,46-,47-
33_5%
R4008
1
2
32-
32-
19-
32-
475_1%
12
C4021
0.1uF_10v
1
2
46-
R4017
1
2
R4014
10K_5%
1
2
C4014
0.1uF_10v
1
2
33-
C4019
0.1uF_10v
1 2
21-
C4023
27pF_50V
32-
31-
14.31818MHZ
X4000
C4011
10uF_10v
1
2 2
0.1uF_10v
C4009
1
22
C4008
0.1uF_10v
1
1
2
10uF_10v
C4017
1
2
R4015
475_1%
2
32-
R4023
10K_5%
1
19-
14-
21-
39_5%
R4019
1
47-
R4013
1K_5%
1
2
R4000
2.2K_5%
1 2
47-
R4003
475_1%_OPEN
1 2
44-
9-,11-,13-,14-,15-,16-,19-,20-,21-,23-,24-,31-,34-
8-,9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,40-,41-,42-,46-,47-
R4025
1
2
1
2
26-,27-,32-
0402_OPEN
33_5%
1 2
0402_OPEN
R4022
R4012
0402_OPEN
1 2
R4018
1
2
8-,9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,40-,41-,42-,46-,47-
R4009
1
2
1K_5%
R4021
10K_5%
R4007
1
2
10K_5%
10K_5%_OPEN
R4006
1
2
1 2
9-,11-,13-,14-,15-,16-,19-,20-,21-,23-,24-,31-,34-
47-
10K_5%
R4020
1
2
475_1%
R4004
1
2
15-,19-
1
2
19-
8-,9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,40-,41-,42-,46-,47-
8-,9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,40-,41-,42-,46-,47-
27pF_50V
C4022
0.1uF_10v
C4020
1
2
R4011
10K_5%_OPEN
0.1uF_10v
C4010
1
2
22_1%
R4001
1 2
L4001
BLM11A121S
1
2
0.1uF_10v
C4016
1
2
22_1%R4027
1 2
1
2
31-
14-
26-,27-,32-
32-
32-
1
2
0.1uF_10v
C4013
1 2
1919-
C4012
0.1uF_10v
CLKSS1_DREF
+VCCP_CLKGEN
+V3S
CLK_PCIE_LAN
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_LAN#
33_5%
R4002
CPUSTOP#_3
CLK_NBCLK
CLK_NBCLK
CLK_CPUBCLK
CLK_CPUBCLK
CLK_NBCLK#
CLK_NBCLK#
CLK_CPUBCLK#
CLK_CPUBCLK#
CLK_PWRGD
CLKSS1_DREF#
CLKSS1_DREF#
CLKSS1_DREF
CLK_DREF#
ICH_3S_SMDATA
ICH_3S_SMCLK
CLK_SB14
PCISTOP#_3
CLK_3S_ICHPCI
CLK_3S_MINICARD2
CLK_KBPCI
CLKREQ_MCH#
CLKREQ_SATA#
CPU_BSEL1
CLK_SATA
CLKREQ_LAN#
CLK_DREF
CLK_DREF
CLK_PCIE_WLAN#
CLK_PCIE_WLAN#
CLK_PCIE_SB#
CLK_PCIE_SB#
CLK_PEG_MCH#
CLK_PEG_MCH#
CLK_SATA#
CLK_SATA#
CLKREQ_WLAN#
CLK_DREF#
+V3S
+V3S_CLKGEN
CPU_BSEL0_USB48
CLK_PCIE_WLAN
CLK_PCIE_WLAN
CLK_PCIE_SB
CLK_PCIE_SB
CLK_PEG_MCH
CLK_PEG_MCH
CLK_SATA
+V3S
CLK_R_ICHPCI
CLKREQ_R_WLAN#
CLKREQ_R_LAN#
CLK_R_CARD48
CLKREQ_R_SATA#
CLK_R_PCI_DEBUG
CPU_BSEL2
CPU_BSEL0
CLK_R_SB48
+VCCP
+VCCP
+V3S
CLK_R_KBPCI
CLK_R_SB14
+VCCP
CLKREQ_R_MCH#
+V3S