A
1 1
B
C
D
E
Compal Confidential
2 2
EBQ10 LA-2741 Schematics Document
Intel Dothan with 915PM(GM)/910GML + DDRII + ICH6M
(nVidia NV43M or ATi M24/M26)
3 3
2005-03-25
REV: 0.3
4 4
A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/25 2006/03/25
C
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
Cover Sheet
星期三, 四月
EBQ10 LA-2741
20, 2005
E
of
14 9
1.0
A
B
C
D
E
Compal Confidential
Model Name : EBQ10
Fan Control
page 39
File Name : LA-2741
1 1
LCD Conn.
page 15
VGA/B Conn.
CRT & TV-out
page 14
PCI-Express
ATI M24C/M26P
with 64/128/256MB VRAM
LCD Conn.
2 2
page 15
IDSEL:AD16
(PIRQE#,
GNT#2,
REQ#2)
IEEE 1394
TSB43AB21A
page 25
1394 Conn.
3 3
page 25
RTC CKT.
page 38
nVidia NV43M
with 64/128MB VRAM
3.3V 33 MHz
IDSEL:AD18
(PIRQG/H#,
GNT#3,
REQ#3)
Mini PCI
socket
(WLAN)
page 28
IDSEL:AD22
(PIRQF#,
GNT#1,
REQ#1)
LAN (GbE)
RTL8110SBL/
RTL8100CL
RJ45
page 27
page 26
PCI BUS
IDSEL:AD20
(PIRQA#,
GNT#2,
REQ#2)
CardBus
ENE CB714
/CB1410
Slot 0
page 23
Pentium-M/Celeron-M Processor
uPGA-478 Package
page 4,5
H_A#(3..31)
PSB
400/533MHz
Intel 915PM/GM, 910GML
uFCBGA-1257
page 6,7,8,9,10
DMI
Intel ICH6-M
BGA-609
page 16,17,18,19
page 22
5 in 1
socket
page 23
LPC BUS
ENE KB910Q
page 33
H_D#(0..63)
Memory BUS(DDRII)
PCI Express
3.3V 48MHz
3.3V 24.576MHz/48Mhz
3.3V ATA-100
S-ATA
SATA Bridge
Marvell 88SA8040
P-ATA HDD
Conn.
page 20
Thermal Sensor
ADM1032
Dual Channel
1.8V DDRII 400/533
New Card
Socket
IDE
page 20
S-ATA HDD
Conn.
page 4
page 24
USB port 6
AC-LINK/Azalia
CDROM
Conn.
page 21
Clock Generator
ICS 954226AG
page 13
200pin DDRII-SO-DIMM X2
BANK 0, 1, 2, 3
USB conn
USB port 0, 2, 4
page 21
page 30
AC97 Codec
ALC250
page 11,12
Bluetooth
Conn
MDC Conn
page 31
Audio AMP
page 32
Phone Jack x3
page 32
page 30
USB port5
page 35
Power On/Off CKT.
page 38
DC/DC Interface CKT.
page 40
4 4
Power Circuit DC/DC
page 41,42,43,44,
45,46,47
A
LED/B Conn.
page 36
TP/B Conn.
page 35
Touch Pad
page 35
EC I/O Buffer
page 34
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/25 2006/03/25
C
Int.KBD
page 35
BIOS
page 34
CIR CKT.
page 37
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
Block Diagram
星期三, 四月
EBQ10 LA-2741
20, 2005
E
1.0
of
24 9
A
Voltage Rails
Power Plane Description
1 1
2 2
VIN
B+
+CPU_CORE
+0.9VS 0.9V switched power rail for DDR terminator
+1.05VS
+1.5VALW 1.5V always on power rail
+1.5VS
+1.8V
+1.8VS 1.8V switched power rail
+2.5VS
+3VALW
+3V
+3VS
+5VALW
+5VS
+12VALW 12V always on power rail ON ON*
+RTCVCC RTC power
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
1.05V switched power rail
1.5V switched power rail
1.8V power rail for DDR
2.5V switched power rail
3.3V always on power rail
3.3V power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
B
S1 S3 S5
N/A N/A N/A
ON OFF
ON OFF
ON OFF OFF
ON
ON OFF OFF
ON
ON
ON
ON
ON
ON
ON
ON
ON
N/A N/A N/A
OFF
OFF
ON* ON
ON
OFF
OFF
OFF
OFF
OFF
ON ON*
OFF
ON
OFF
OFF
ON
ON*
OFF
OFF ON
ON ON
C
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
SLP_S1# SLP_S3#
HIGH HIGH HIGH HIGH
LOW
LOW
LOW LOW LOW LOW
D
LOW
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0
1
2
3
4
5
6
7 NC
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V min
AD_BID
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
E
SLP_S4# SLP_S5# +VALW +V +VS Clock
0 V
HIGH
LOW LOW LOW
HIGH HIGH HIGH
HIGH
HIGH
V typ
AD_BID
0.503 V
0.819 V
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
0 V 0 V
V
AD_BID
0.538 V
0.875 V
ON ON
ON
OFF
OFF
OFF
max
1.185 V 1.264 V
2.200 V
3.300 V
2.341 V
3.300 V
LOW
OFF
OFF
OFF
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
CardBus(SD)
1394
LAN
Mini-PCI(WLAN)
Mini-PCI(TV-Tuer)
3 3
AD20
AD16 0
AD17
AD18
AD19 4
2
1
3
PIRQA/PIRQB
PIRQE
PIRQF
PIRQG/PORQH
PIRQH/PORQA
BOARD ID Table
Board ID
0
1
2
3
4
5
6
7
PCB Revision
0.1
0.2
0.3
1.0
BTO Option Table
BTO Item BOM Structure
VGA
Card Reader 5IN1@
Giga LAN
New Card NEWCARD@
IEEE1394 1394@
TV Tuner TUNER@
INT MIC. MIC@
GM@
PM@
8100C@
8110S@
KILL SW WLAN@
EC SM Bus1 address
Device
Smart Battery
EEPROM(24C16/02)
Address Address
1010 000X b
EC SM Bus2 address
Device
ADM1032
1001 110X b 0001 011X b
SKU ID Table
SKU ID
0
1
2
SKU
CIR CIR@
HW EQ EQ@
NOEQ@
3
4
5
6
ICH6M SM Bus address
Device
4 4
Clock Generator
( ICS 954226)
DDR DIMM0
DDR DIMM2
A
Address
1101 001Xb
1001 000Xb
1001 010Xb
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/25 2006/03/25
C
7
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
Notes
星期三, 四月
EBQ10 LA-2741
20, 2005
E
of
34 9
1.0
5
4
3
2
1
H_D#[0..63]
H_A#[3..31] 6
D D
H_REQ#[0..4] 6
C C
H_RS#[0..2] 6
B B
A A
H_A#[3..31]
H_REQ#[0..4]
H_RS#[0..2]
H_ADSTB#0 6
H_ADSTB#1 6
CLK_CPU_BCLK 13
CLK_CPU_BCLK# 13
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_BR0# 6
H_DEFER# 6
H_DRDY# 6
H_HIT# 6
H_HITM# 6
H_LOCK# 6
H_CPURST# 6
H_TRDY# 6
H_DBSY# 6
H_DPSLP# 17
H_DPRSTP# 17
H_DPWR# 6
H_PWRGOOD 17
H_CPUSLP# 6,17
H_THERMTRIP# 6,17
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_IERR#
H_CPURST#
H_RS#0
H_RS#1
H_RS#2
ITP_DBRRESET#
PRO_CHOT#
H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#
THERMDA
THERMDC
THERMDA & THERMDC Trace / Space = 10 / 10 mil
5
JP20A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
AA3
A14#
Y3
A15#
AA2
A16#
AF4
A17#
AC4
A18#
AC7
A19#
AC3
A20#
AD3
A21#
AE4
A22#
AD2
A23#
AB4
A24#
AC6
ADDR GROUP
A25#
AD5
A26#
AE2
A27#
AD6
A28#
AF3
A29#
AE1
A30#
AF1
A31#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
U3
ADSTB0#
AE5
ADSTB1#
A16
ITP_CLK0
A15
ITP_CLK1
B15
BCLK0
B14
BCLK1
N2
ADS#
L1
BNR#
J3
BPRI#
N4
BR0#
L4
DEFER#
H2
DRDY#
K3
HIT#
K4
HITM#
A4
IERR#
J2
LOCK#
B11
RESET#
H1
RS0#
K1
RS1#
L2
RS2#
M3
TRDY#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
A7
DBR#
M2
DBSY#
B7
DPSLP#
G1
DPRSTP#
C19
DPWR#
A10
PRDY#
B10
PREQ#
B17
PROCHOT#
E4
PWRGOOD
A6
SLP#
A13
TCK
C12
TDI
A12
TDO
C5
TEST1
F23
TEST2
C11
TMS
B13
TRST#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
TYCO_1612365-1_Dothan
<BOM Structure>
4
Dothan
DATA GROUP
HOST CLK
CONTROL GROUP
MISC
THERMAL
DIODE
LEGACY CPU
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DINV0#
DINV1#
DINV2#
DINV3#
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
STPCLK#
SMI#
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
D25
J26
T24
AD20
C23
K24
W25
AE24
C22
L24
W24
AE25
C2
D3
A3
B5
D1
D4
C6
B4
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DINV#0 6
H_DINV#1 6
H_DINV#2 6
H_DINV#3 6
H_DSTBN#0 6
H_DSTBN#1 6
H_DSTBN#2 6
H_DSTBN#3 6
H_DSTBP#0 6
H_DSTBP#1 6
H_DSTBP#2 6
H_DSTBP#3 6
H_A20M# 17
H_FERR# 17
H_IGNNE# 17
H_INIT# 17
H_INTR 17
H_NMI 17
H_STPCLK# 17
H_SMI# 17
2005/03/25 2006/03/25
3
Compal Secret Data
Deciphered Date
H_D#0
A19
H_D#[0..63] 6
1
2200P_0402_50V7K
EC_SMB_CK2 30,33
EC_SMB_DA2 30,33
C434
2
C713 220P_0402_50V8J
1 2
C714 220P_0402_50V8J
C715 220P_0402_50V8J
C716 220P_0402_50V8J
C717 220P_0402_50V8J
C718 680P_0402_50V7K
C719 220P_0402_50V8J
C720 220P_0402_50V8J
C721 220P_0402_50V8J
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
THERMDA
THERMDC
2
+3VS
1
C427
0.1U_0402_16V4Z
2
U31
2
D+
3
D-
8
SCLK
7
SDATA
ADM1032ARM_RM8
ITP_TDI
ITP_TDO
H_CPURST#
ITP_TMS
PRO_CHOT#
H_PWRGOOD
H_IERR#
ITP_DBRRESET#
ITP_TRST#
ITP_TCK
TEST1
TEST2
H_INIT#
H_A20M#
H_CPUSLP#
H_INTR
H_NMI
H_SMI#
H_STPCLK#
H_IGNNE#
Title
Size Document Number Rev
Date: Sheet
1
VDD1
6
ALERT#
4
THERM#
5
GND
R352 150_0402_5%
R353 54.9_0402_1%@
R351 54.9_0402_1%@
R350 40.2_0402_1%
R356 56_0402_5%
R346 200_0402_5%
R347 56_0402_5%
R349 150_0402_5%
R355 680_0402_5%
R354 27.4_0402_1%
R348 1K_0402_5%@
R362 1K_0402_5%@
R630 200_0402_5%
R631 200_0402_5%@
R632 200_0402_5%@
R633 200_0402_5%@
R634 200_0402_5%@
R635 200_0402_5%@
R636 200_0402_5%@
R637 200_0402_5%@
Compal Electronics, Inc.
星期三, 四月
1 2
R344
10K_0402_5%@
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Dothan(1/2)
EBQ10 LA-2741
20, 2005
+1.05VS
+3VS
+1.05VS
1
1.0
of
44 9
5
JP20B
1
2
+1.05VS
C453
VCCSENSE
VSSSENSE
GTL_REF0
COMP0
COMP1
COMP2
COMP3
AE7
VCCSENSE
AF6
VSSSENSE
F26
VCCA0
B1
VCCA1
N1
VCCA2
AC26
VCCA3
P23
VCCQ0
W4
VCCQ1
D10
VCCP
D12
VCCP
D14
VCCP
D16
VCCP
E11
VCCP
E13
VCCP
E15
VCCP
F10
VCCP
F12
VCCP
F14
VCCP
F16
VCCP
K6
VCCP
L5
VCCP
L21
VCCP
M6
VCCP
M22
VCCP
N5
VCCP
N21
VCCP
P6
VCCP
P22
VCCP
R5
VCCP
R21
VCCP
T6
VCCP
T22
VCCP
U21
VCCP
D6
VCC
D8
VCC
D18
VCC
D20
VCC
D22
VCC
E5
VCC
E7
VCC
E9
VCC
E17
VCC
E19
VCC
E21
VCC
F6
VCC
F8
VCC
F18
VCC
E1
PSI#
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AD26
GTLREF
C16
BSEL0
C14
BSEL1
P25
COMP0
P26
COMP1
AB2
COMP2
AB1
COMP3
B2
RSVD
C3
RSVD
E26
RSVD
AF7
RSVD
AC1
RSVD
TYCO_1612365-1_Dothan
<BOM Structure>
COMP0
COMP1
COMP2
COMP3
Dothan
R374 54.9_0402_1%@
1 2
R373 54.9_0402_1%@
1 2
+VCCA
D D
1.8V FOR DOTHAN-A
1 2
+1.8VS
R361 0_1206_5%@
1.5V FOR DOTHAN-B
1 2
+1.5VS
R359 0_1206_5%
C C
R372
1K_0402_1%
B B
A A
1 2
R371 2K_0402_1%
20mils
1
C456
2
0.01U_0402_16V7K
+1.05VS
10U_0805_6.3V6M
+CPU_CORE
PSI# 47
CPU_VID0 47
CPU_VID1 47
1 2
CPU_VID2 47
CPU_VID3 47
CPU_VID4 47
CPU_VID5 47
CPU_BSEL0 13
CPU_BSEL1 13
R366 27.4_0402_1%
1 2
R365 54.9_0402_1%
1 2
R84 27.4_0402_1%
1 2
R86 54.9_0402_1%
1 2
TRACE CLOSELY CPU < 0.5'
COMP0, COMP2 layout : Width 18mils and Space 25mils
COMP1, COMP3 layout : Space 25mils
5
4
A2
VSS
A5
VSS
A8
VSS
A11
VSS
A14
VSS
A17
VSS
A20
VSS
A23
VSS
A26
VSS
B3
VSS
B6
VSS
B9
VSS
B12
VSS
B16
VSS
B19
VSS
B22
VSS
B25
VSS
C1
VSS
C4
VSS
C7
VSS
C10
VSS
C13
VSS
C15
VSS
C18
VSS
C21
VSS
C24
VSS
D2
VSS
D5
VSS
D7
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E10
VSS
E12
VSS
E14
VSS
E16
VSS
E18
VSS
E20
VSS
E22
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
1
+
2
150U_D2_6.3VM
POWER, GROUNG, RESERVED SIGNALS AND NC
+1.05VS
C729
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
Vcc-core
Decoupling
SPCAP,Polymer
MLCC 0805 X5R
1
+
2
150U_D2_6.3VM
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+CPU_CORE
1
+
C162
2
330U_D_2VM
+CPU_CORE
10U_0805_6.3V6M
1
C469
2
+CPU_CORE
10U_0805_6.3V6M
1
C468
2
+CPU_CORE
10U_0805_6.3V6M
1
C501
2
+CPU_CORE
10U_0805_6.3V6M
1
C470
2
+CPU_CORE
10U_0805_6.3V6M
1
C147
2
0.1U_0402_16V4Z
1
C26
2
3
330U_D_2VM
1
+
C160
2
1
C127
2
10U_0805_6.3V6M
1
C149
2
10U_0805_6.3V6M
1
C159
2
10U_0805_6.3V6M
1
C492
2
10U_0805_6.3V6M
1
C500
2
10U_0805_6.3V6M
C150
C481
C487
C499
C493
1
+
C161
2
330U_D_2VM
10U_0805_6.3V6M
1
C77
2
10U_0805_6.3V6M
1
C134
2
10U_0805_6.3V6M
1
C140
2
10U_0805_6.3V6M
1
C158
2
10U_0805_6.3V6M
1
C467
2
330U_D_2VM@
1
2
1
C78
2
10U_0805_6.3V6M
1
C114
2
10U_0805_6.3V6M
1
C113
2
10U_0805_6.3V6M
1
C111
2
10U_0805_6.3V6M
1
C90
2
10U_0805_6.3V6M
+
C154
4 x 330uF(12mOhm/4)
10U_0805_6.3V6M
1
1
C494
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C96
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C488
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C97
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C79
2
2
10U_0805_6.3V6M
C482
C80
C112
C491
C88
1
2
1
2
1
2
1
2
1
2
C,uF ESR, mohm ESL,nH
2X330uF 7m ohm/2 3.5nH/2
35X10uF 5m ohm/35 0.6nH/35
1
C82
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C92
0.1U_0402_16V4Z
1
1
C87
C428
2
0.1U_0402_16V4Z
2
2005/03/25 2006/03/25
3
0.1U_0402_16V4Z
1
1
C430
C432
2
2
0.1U_0402_16V4Z
Compal Secret Data
Deciphered Date
1
2
2
1
C429
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C433
C431
2
1
+CPU_CORE
1
C86
2
0.1U_0402_16V4Z
JP20C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23
TYCO_1612365-1_Dothan
<BOM Structure>
Title
Size Document Number Rev
星期三, 四月
Date: Sheet
Dothan
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
POWER, GROUND
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Compal Electronics, Inc.
Dothan (2/2)
EBQ10 LA-2741
20, 2005
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
1.0
of
54 9
5
H_RS#[0..2]
H_A#[3..31] 4
H_REQ#[0..4] 4
D D
C C
B B
A A
CLK_MCH_BCLK# 13
CLK_MCH_BCLK 13
H_CPUSLP# 4,17
(5mil:15mil) (12mil:10mil)
H_VREF H_XSWING H_YSWING
1
C68
0.1U_0402_16V4Z
2
H_A#[3..31]
H_ADSTB#0 4
H_ADSTB#1 4
H_DSTBN#0 4
H_DSTBN#1 4
H_DSTBN#2 4
H_DSTBN#3 4
H_DSTBP#0 4
H_DSTBP#1 4
H_DSTBP#2 4
H_DSTBP#3 4
H_DINV#0 4
H_DINV#1 4
H_DINV#2 4
H_DINV#3 4
H_CPURST# 4
H_ADS# 4
H_TRDY# 4
H_DPWR# 4
H_DRDY# 4
H_DEFER# 4
H_HITM# 4
H_HIT# 4
H_LOCK# 4
H_BR0# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 4
Un-pop for Dothan-A
R57 0_0402_5%
1 2
1 2
R27
100_0603_1%
1 2
R26
200_0603_1%
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
CPU_SLP#
H_RS#0
H_RS#1
H_RS#2
H_RS#[0..2] 4
U34A
G9
HA3#
C9
HA4#
E9
HA5#
B7
HA6#
A10
HA7#
F9
HA8#
D8
HA9#
B10
HA10#
E10
HA11#
G10
HA12#
D9
HA13#
E11
HA14#
F10
HA15#
G11
HA16#
G13
HA17#
C10
HA18#
C11
HA19#
D11
HA20#
C12
HA21#
B13
HA22#
A12
HA23#
F12
HA24#
G12
HA25#
E12
HA26#
C13
HA27#
B11
HA28#
D13
HA29#
A13
HA30#
F13
HA31#
A11
HPCREQ#
A7
HREQ#0
D7
HREQ#1
B8
HREQ#2
C7
HREQ#3
A8
HREQ#4
B9
HADSTB#0
E13
HADSTB#1
AB1
HCLKN
AB2
HCLKP
G4
HDSTBN#0
K1
HDSTBN#1
R3
HDSTBN#2
V3
HDSTBN#3
G5
HDSTBP#0
K2
HDSTBP#1
R2
HDSTBP#2
W4
HDSTBP#3
H8
HDINV#0
K3
HDINV#1
T7
HDINV#2
U5
HDINV#3
H10
HCPURST#
F8
HADS#
B5
HTRDY#
G6
HDPWR#
F7
HDRDY#
E6
HDEFER#
F6
HEDRDY#
D6
HHITM#
D4
HHIT#
B3
HLOCK#
E7
HBREQ0#
A5
HBNR#
D5
HBPRI#
C6
HDBSY#
G8
HCPUSLP#
A4
HRS0#
C5
HRS1#
B4
HRS2#
CPU_SLP#
1
2
Alviso
C56
0.1U_0402_16V4Z
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HOST
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
HVREF
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING
ALVISO_BGA1257915GM@
H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil
+1.05VS +1.05VS +1.05VS
1 2
R66
221_0603_1%
1 2
R56
100_0603_1%
4
H_D#[0..63] H_REQ#[0..4]
H_D#0
E4
H_D#1
E1
H_D#2
F4
H_D#3
H7
H_D#4
E2
H_D#5
F1
H_D#6
E3
H_D#7
D3
H_D#8
K7
H_D#9
F2
H_D#10
J7
H_D#11
J8
H_D#12
H6
H_D#13
F3
H_D#14
K8
H_D#15
H5
H_D#16
H1
H_D#17
H2
H_D#18
K5
H_D#19
K6
H_D#20
J4
H_D#21
G3
H_D#22
H3
H_D#23
J1
H_D#24
L5
H_D#25
K4
H_D#26
J5
H_D#27
P7
H_D#28
L7
H_D#29
J3
H_D#30
P5
H_D#31
L3
H_D#32
U7
H_D#33
V6
H_D#34
R6
H_D#35
R5
H_D#36
P3
H_D#37
T8
H_D#38
R7
H_D#39
R8
H_D#40
U8
H_D#41
R4
H_D#42
T4
H_D#43
T5
H_D#44
R1
H_D#45
T3
H_D#46
V8
H_D#47
U6
H_D#48
W6
H_D#49
U3
H_D#50
V5
H_D#51
W8
H_D#52
W7
H_D#53
U2
H_D#54
U1
H_D#55
Y5
H_D#56
Y2
H_D#57
V4
H_D#58
Y7
H_D#59
W1
H_D#60
W3
H_D#61
Y3
H_D#62
Y6
H_D#63
W2
H_VREF
J11
H_XRCOMP
C1
C2
T1
L1
D1
P1
R46 24.9_0402_1%
H_XSCOMP
R40 54.9_0402_1%
H_YRCOMP
R80 24.9_0402_1%
H_YSCOMP
R74 54.9_0402_1%
H_XSWING
H_YSWING
1
C75
0.1U_0402_16V4Z
2
1 2
1 2
1 2
1 2
+1.8V
1 2
1 2
R78
221_0603_1%
(12mil:10mil)
R79
100_0603_1%
H_D#[0..63] 4
R81 40.2_0402_1%
1 2
R82 40.2_0402_1%
1 2
R90 80.6_0402_1%
1 2
R89 80.6_0402_1%
1 2
+1.05VS
DMI_ITX_MRX_N0 18
DMI_ITX_MRX_N1 18
DMI_ITX_MRX_N2 18
DMI_ITX_MRX_N3 18
DMI_ITX_MRX_P0 18
DMI_ITX_MRX_P1 18
DMI_ITX_MRX_P2 18
DMI_ITX_MRX_P3 18
DMI_MTX_IRX_N0 18
DMI_MTX_IRX_N1 18
DMI_MTX_IRX_N2 18
DMI_MTX_IRX_N3 18
DMI_MTX_IRX_P0 18
DMI_MTX_IRX_P1 18
DMI_MTX_IRX_P2 18
DMI_MTX_IRX_P3 18
DDRA_CLK0 11
DDRA_CLK1 11
DDRB_CLK0 12
DDRB_CLK1 12
DDRA_CLK0# 11
DDRA_CLK1# 11
DDRB_CLK0# 12
DDRB_CLK1# 12
DDRA_CKE0 11
DDRA_CKE1 11
DDRB_CKE0 12
DDRB_CKE1 12
DDRA_SCS#0 11
DDRA_SCS#1 11
DDRB_SCS#0 12
DDRB_SCS#1 12
DDRA_ODT0 11
DDRA_ODT1 11
DDRB_ODT0 12
DDRB_ODT1 12
(10mil:20mil)
3
10mils
10mils
10mils
10mils
10mils
10mils
1K_0402_1%
1K_0402_1%
1K_0402_1%
1K_0402_1%
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
M_OCDCOMP0
M_OCDCOMP1
M_RCOMPN
M_RCOMPP
SMVREF0
SMVREF1
M_XSLEW
M_YSLEW
+1.8V
R83
R85
+1.8V
R580
R581
1 2
0.1U_0402_16V4Z
1 2
C117
1 2
0.1U_0402_16V4Z
1 2
C682
U34B
AA31
DMIRXN0
AB35
DMIRXN1
AC31
DMIRXN2
AD35
DMIRXN3
Y31
DMIRXP0
AA35
DMIRXP1
AB31
DMIRXP2
AC35
DMIRXP3
AA33
DMITXN0
AB37
DMITXN1
AC33
DMITXN2
AD37
DMITXN3
Y33
DMITXP0
AA37
DMITXP1
AB33
DMITXP2
AC37
DMITXP3
AM33
SM_CK0
AL1
SM_CK1
AE11
SM_CK2
AJ34
SM_CK3
AF6
SM_CK4
AC10
SM_CK5
AN33
SM_CK0#
AK1
SM_CK1#
AE10
SM_CK2#
AJ33
SM_CK3#
AF5
SM_CK4#
AD10
SM_CK5#
AP21
SM_CKE0
AM21
SM_CKE1
AH21
SM_CKE2
AK21
SM_CKE3
AN16
SM_CS0#
AM14
SM_CS1#
AH15
SM_CS2#
AG16
SM_CS3#
AF22
SM_OCDCOMP0
AF16
SM_OCDCOMP1
AP14
SM_ODT0
AL15
SM_ODT1
AM11
SM_ODT2
AN10
SM_ODT3
AK10
SMRCOMPN
AK11
SMRCOMPP
AF37
SMVREF0
AD1
SMVREF1
AE27
SMXSLEWIN
AE28
SMXSLEWOUT
AF9
SMYSLEWIN
AF10
SMYSLEWOUT
ALVISO_BGA1257 915GM@
1
1
2
2
1
1
2
2
DMI DDR MUXING
SMVREF0
15mils
C110
0.1U_0402_16V4Z
SMVREF1
15mils
C683
0.1U_0402_16V4Z
2
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
CFG/RSVD
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
BM_BUSY#
EXT_TS0#
EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
PM
DREF_CLKN
DREF_CLKP
DREF_SSCLKP
CLK
DREF_SSCLKN
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC
NC11
G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25
J23
J21
H22
F5
AD30
AE29
A24
A23
D37
C37
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37
CLK_DREF_SSC
CLK_DREF_SSC#
CFG0
MCH_CLKSEL1
MCH_CLKSEL0
CFG5
CFG6
CFG7
CFG9
CFG12
CFG13
CFG16
CFG18
CFG19
EXT_TS#0
EXT_TS#1
H_THERMTRIP#
CLK_DREF_96M#
CLK_DREF_96M
CLK_DREF_SSC
CLK_DREF_SSC#
CFG[2:0]
CFG5
CFG6
CFG7
CFG9
CFG[13:12]
CFG16
(FSB Dynamic
ODT)
CFG18
(VCC Select)
CFG19
(VTT Select)
R50 0_0402_5%PM@
1 2
R45 0_0402_5%PM@
1 2
MCH_CLKSEL1 13
MCH_CLKSEL0 13
CFG0
R59 10K_0402_5%
1 2
CFG5
CFG6
CFG7
CFG9
CFG12
CFG13
CFG16
R62 1K_0402_5%@
1 2
R54 1K_0402_5%
1 2
R47 1K_0402_5%@
1 2
R48 1K_0402_5%@
1 2
R55 1K_0402_5%@
1 2
R65 1K_0402_5%@
1 2
R72 1K_0402_5%@
1 2
CFG[17:3]: internal pull-up
CFG18
R58 1K_0402_5%@
CFG19
1 2
R61 1K_0402_5%@
1 2
CFG[19:18]: internal pull-down
PM_BMBUSY# 18
H_THERMTRIP# 4,17
VGATE 13,18,47
PLT_RST# 16,18,20,21,33
CLK_DREF_96M# 13
CLK_DREF_96M 13
CLK_DREF_SSC 13
CLK_DREF_SSC# 13
EXT_TS#0
R70 10K_0402_5%
EXT_TS#1
1 2
R67 10K_0402_5%
1 2
Refer to sheet 6 for FSB
frequency select
Low = DMI x 2
High = DMI x 4
Low = DDR-II
High = DDR-I
Low = DT/Transportable CPU
High = Mobile CPU
Low = Reverse Lane
High = Normal Operation
00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation (Default)
Low = Disabled
High = Enabled
Low = 1.05V (Default)
High = 1.5V
Low = 1.05V (Default)
High = 1.2V
1
+1.5VS
+1.05VS
+2.5VS
+2.5VS
*
*
*
*
*
*
*
*
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/25 2006/03/25
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Alviso HOST (1/5)
EBQ10 LA-2741
星期三, 四月
20, 2005
1
1.0
of
64 9
5
4
3
2
1
DDRA_SDQ[0..63] 11
DDRA_SDM[0..7] 11
D D
C C
B B
DDRA_SMA[0..13] 11
DDRA_SBS0# 11
DDRA_SBS1# 11
DDRA_SBS2# 11 DDRB_SBS2# 12
DDRA_SDQS0 11
DDRA_SDQS1 11
DDRA_SDQS2 11
DDRA_SDQS3 11
DDRA_SDQS4 11
DDRA_SDQS5 11
DDRA_SDQS6 11
DDRA_SDQS7 11
DDRA_SDQS0# 11
DDRA_SDQS1# 11
DDRA_SDQS2# 11
DDRA_SDQS3# 11
DDRA_SDQS4# 11
DDRA_SDQS5# 11
DDRA_SDQS6# 11
DDRA_SDQS7# 11
DDRA_SCAS# 11
DDRA_SRAS# 11
DDRA_SWE# 11
AF28,AF29 should be routed to a via AF14,AF15 should be routed to a via
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SMA[0..13]
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7
DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
AK15
AK16
AL21
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
AN15
AP16
AF29
AF28
AP15
SA_BS0#
SA_BS1#
SA_BS2#
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
ALVISO_BGA1257915GM@
U34C
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
DDR MEMORY SYSTEM A
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRB_SDQ[0..63] 12
DDRB_SDM[0..7] 12
DDRB_SMA[0..13] 12
DDRB_SBS0# 12
DDRB_SBS1# 12
DDRB_SDQS0 12
DDRB_SDQS1 12
DDRB_SDQS2 12
DDRB_SDQS3 12
DDRB_SDQS4 12
DDRB_SDQS5 12
DDRB_SDQS6 12
DDRB_SDQS7 12
DDRB_SDQS0# 12
DDRB_SDQS1# 12
DDRB_SDQS2# 12
DDRB_SDQS3# 12
DDRB_SDQS4# 12
DDRB_SDQS5# 12
DDRB_SDQS6# 12
DDRB_SDQS7# 12
DDRB_SCAS# 12
DDRB_SRAS# 12
DDRB_SWE# 12
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SMA[0..13]
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7
DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
AJ15
AG17
AG21
AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7
AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4
AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5
AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
AH14
AK14
AF15
AF14
AH16
SB_BS0#
SB_BS1#
SB_BS2#
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
U34D
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
DDR SYSTEM MEMORY B
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
ALVISO_BGA1257915GM@
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
A A
5
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/25 2006/03/25
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Alviso DDR(2/5)
星期三, 四月
EBQ10 LA-2741
20, 2005
1
1.0
of
74 9
5
+3VS +2.5VS
1 2
R21
2.2K_0402_5%GM@
D D
C C
+2.5VS
B B
A A
GMCH_ENBKL 15
GMCH_TV_LUMA 14
GMCH_TV_CRMA 14
R52 4.7K_0402_5%
1 2
R53 4.7K_0402_5%
1 2
R37 2.2K_0402_5%
1 2
R44 2.2K_0402_5%
1 2
R18 100K_0402_5%
1 2
R43 1.5K_0402_1%
1 2
R30 150_0402_1%
1 2
R29 150_0402_5%PM@
1 2
R28 150_0402_5%PM@
1 2
+2.5VS
R22
GM@
4.7K_0402_5%GM@
LDDC_CLK
4.7K_0402_5%
LDDC_DATA
R23
G
2
1 2
S
+2.5VS
G
2
1 2
S
5
1 3
D
Q2
1 3
D
Q3
2
1 3
D
Q1
GMCH_CRT_CLK 14
GMCH_CRT_DATA 14
GMCH_CRT_B 14
GMCH_CRT_G 14
GMCH_CRT_R 14
GMCH_CRT_VSYNC 14
GMCH_CRT_HSYNC 14
GMCH_CRT_CLK
GMCH_CRT_DATA
LCTLB_DATA
LCTLA_CLK
LBKLT_EN
LIBG
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
GMCH_LCD_CLK
2N7002_SOT23GM@
GMCH_LCD_DATA
2N7002_SOT23GM@
G
LBKLT_EN
S
BSS138_SOT23GM@
GMCH_TV_LUMA
GMCH_TV_CRMA
+3VS
R19
1 2
+3VS
R20
1 2
GMCH_TV_COMPS
R71 4.99K_0402_1%
GMCH_CRT_CLK
GMCH_CRT_DATA
R51 150_0402_5%PM@
R41 150_0402_5%PM@
R38 150_0402_5%PM@
4.7K_0402_5%GM@
GMCH_LCD_CLK 15
4.7K_0402_5%GM@
GMCH_LCD_DATA 15
+2.5VS
CLK_MCH_3GPLL# 13
CLK_MCH_3GPLL 13
1 2
4
R69 3K_0402_1%@
1 2
R60 3K_0402_1%@
1 2
TV_REFSET
10mils
1 2
1 2
1 2
1 2
R75 255_0402_1%
GMCH_ENVDD 15
GMCH_TXCLK- 15
GMCH_TXCLK+ 15
GMCH_TZCLK- 15
GMCH_TZCLK+ 15
GMCH_TXOUT0- 15
GMCH_TXOUT1- 15
GMCH_TXOUT2- 15
GMCH_TXOUT0+ 15
GMCH_TXOUT1+ 15
GMCH_TXOUT2+ 15
GMCH_TZOUT0- 15
GMCH_TZOUT1- 15
GMCH_TZOUT2- 15
GMCH_TZOUT0+ 15
GMCH_TZOUT1+ 15
GMCH_TZOUT2+ 15
REFSET
10mils
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
GMCH_ENVDD
LIBG
GMCH_TXCLKGMCH_TXCLK+
GMCH_TZCLKGMCH_TZCLK+
GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-
GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+
GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2-
GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+
U34G
H24
H25
AB29
AC29
A15
C16
A17
J18
B15
B16
B17
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
J20
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
B30
B29
C25
C24
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
ALVISO_BGA1257
915GM@
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
LACLKN
LACLKP
LBCLKN
LBCLKP
LADATAN0
LADATAN1
LADATAN2
LADATAP0
LADATAP1
LADATAP2
LBDATAN0
LBDATAN1
LBDATAN2
LBDATAP0
LBDATAP1
LBDATAP2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PEG_COMP
EXP_COMPI
EXP_ICOMPO
EXP_RXN0/SDVO_TVCLKIN#
MISC TV VGA LVDS
EXP_RXN1/SDVO_INT#
EXP_RXN2/SDVO_FLDSTALL#
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
EXP_RXP0/SDVO_TVCLKIN
EXP_RXP1/SDVO_INT
EXP_RXP2/SDVO_FLDSTALL
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
EXP_TXN0/SDVOB_RED#
EXP_TXN1/SDVOB_GREEN#
EXP_TXN2/SDVOB_BLUE#
EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#
EXP_TXN5/SDVOC_GREEN#
EXP_TXN6/SDVOC_BLUE#
EXP_TXN7/SDVOC_CLKN
PCI - EXPRESS GRAPHICS
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
EXP_TXP0/SDVOB_RED
EXP_TXP1/SDVOB_GREEN
EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP
EXP_TXP4/SDVOC_RED
EXP_TXP5/SDVOC_GREEN
EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
2005/03/25 2006/03/25
3
D36
D34
E30
F34
G30
H34
EXP_RXN3
J30
EXP_RXN4
K34
EXP_RXN5
L30
EXP_RXN6
M34
EXP_RXN7
N30
EXP_RXN8
P34
EXP_RXN9
R30
T34
U30
V34
W30
Y34
D30
E34
F30
G34
EXP_RXP3
H30
EXP_RXP4
J34
EXP_RXP5
K30
EXP_RXP6
L34
EXP_RXP7
M30
EXP_RXP8
N34
EXP_RXP9
P30
R34
T30
U34
V30
W34
E32
F36
G32
H36
J32
K36
L32
M36
N32
EXP_TXN8
P36
EXP_TXN9
R32
T36
U32
V36
W32
Y36
D32
E36
F32
G36
H32
J36
K32
L36
M32
EXP_TXP8
N36
EXP_TXP9
P32
R36
T32
U36
V32
W36
Compal Secret Data
Deciphered Date
10mils
PCEI_GTX_C_MRX_N0
PCEI_GTX_C_MRX_N1
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_N4
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_N6
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_N11
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_N14
PCEI_GTX_C_MRX_N15
PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_P15
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4 PCIE_MTX_C_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
2
PCIE_MTX_C_GRX_N[0..15] 15
PCIE_MTX_C_GRX_P[0..15] 15
PCEI_GTX_C_MRX_N[0..15] 15
PCEI_GTX_C_MRX_P[0..15] 15
1 2
R49 24.9_0402_1%
C445 0.1U_0402_16V4ZPM@
1 2
C449 0.1U_0402_16V4ZPM@
1 2
C454 0.1U_0402_16V4ZPM@
1 2
C460 0.1U_0402_16V4ZPM@
1 2
C465 0.1U_0402_16V4ZPM@
1 2
C473 0.1U_0402_16V4ZPM@
1 2
C483 0.1U_0402_16V4ZPM@
1 2
C490 0.1U_0402_16V4ZPM@
1 2
C444 0.1U_0402_16V4ZPM@
1 2
C448 0.1U_0402_16V4ZPM@
1 2
C452 0.1U_0402_16V4ZPM@
1 2
C458 0.1U_0402_16V4ZPM@
1 2
C464 0.1U_0402_16V4ZPM@
1 2
C472 0.1U_0402_16V4ZPM@
1 2
C478 0.1U_0402_16V4ZPM@
1 2
C489 0.1U_0402_16V4ZPM@
1 2
2
1
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCEI_GTX_C_MRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]
+1.5VS
C443 0.1U_0402_16V4ZPM@
1 2
C447 0.1U_0402_16V4ZPM@
1 2
C451 0.1U_0402_16V4ZPM@
1 2
C457 0.1U_0402_16V4ZPM@
1 2
C463 0.1U_0402_16V4ZPM@
1 2
C471 0.1U_0402_16V4ZPM@
1 2
C475 0.1U_0402_16V4ZPM@
1 2
C486 0.1U_0402_16V4ZPM@
1 2
C438 0.1U_0402_16V4ZPM@
1 2
C446 0.1U_0402_16V4ZPM@
1 2
C450 0.1U_0402_16V4ZPM@
1 2
C455 0.1U_0402_16V4ZPM@
1 2
C461 0.1U_0402_16V4ZPM@
1 2
C466 0.1U_0402_16V4ZPM@
1 2
C474 0.1U_0402_16V4ZPM@
1 2
C484 0.1U_0402_16V4ZPM@
1 2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Alviso PCI-E(3/5)
星期三, 四月
EBQ10 LA-2741
20, 2005
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15
84 9
1
of
1.0
5
4
3
2
1
U34E
+1.05VS
D D
+1.05VS
0.1U_0402_16V4Z
1
1
2
0.1U_0402_16V4Z
C C
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
C724
2
+1.5VS
C725
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
20mils
B B
+1.5VS_DPLLA
60mA
1
1
C38
C24
22U_1206_16V4Z_V1
2
2
22U_1206_16V4Z_V1
(470uF x1, 0.1uF x1)
+1.5VS_HPLL
A A
60mA
1
1
C101
C95
22U_1206_16V4Z_V1
2
2
22U_1206_16V4Z_V1
(470uF x1, 0.1uF x1) (470uF x1, 0.1uF x1)
T29
VCC0
R29
VCC1
N29
VCC2
M29
VCC3
K29
VCC4
J29
VCC5
V28
VCC6
U28
VCC7
T28
VCC8
R28
VCC9
P28
VCC10
N28
VCC11
M28
VCC12
L28
VCC13
K28
VCC14
J28
VCC15
H28
VCC16
G28
VCC17
V27
VCC18
U27
VCC19
T27
VCC20
R27
VCC21
P27
VCC22
N27
VCC23
M27
VCC24
L27
VCC25
K27
VCC26
J27
VCC27
H27
VCC28
K26
VCC29
H26
VCC30
K25
VCC31
J25
VCC32
K24
VCC33
K23
VCC34
K22
VCC35
K21
VCC36
W20
VCC37
U20
VCC38
T20
VCC39
K20
VCC40
V19
VCC41
U19
VCC42
K19
VCC43
W18
VCC44
V18
VCC45
T18
VCC46
K18
VCC47
K17
VCC48
AC1
VCCD_HMPLL1
AC2
VCCD_HMPLL2
B23
VCCA_DPLLA
C35
VCCA_DPLLB
AA1
VCCA_HPLL
AA2
VCCA_MPLL
ALVISO_BGA1257
915GM@
0.1U_0402_16V4Z
1
C726
2
L8
CHB1608U301_0603
1 2
Change to 0 ohm
1
C39
2
0.1U_0402_16V4Z
L10
CHB1608U301_0603
1 2
Change to 0 ohm Change to 0 ohm
1
C99
2
0.1U_0402_16V4Z
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
POWER
VCCA_CRTDAC0
VCCA_CRTDAC1
0.1U_0402_16V4Z
1
C727
2
0.1U_0402_16V4Z
+1.5VS_DPLLB
+1.5VS
1
C30
2
22U_1206_16V4Z_V1
+1.5VS_MPLL
+1.5VS
1
C109
2
22U_1206_16V4Z_V1
VCCA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
VCCA_3GBG
VSSA_CRTDAC
1
2
22U_1206_16V4Z_V1
22U_1206_16V4Z_V1
F17
E17
D18
C18
F18
E18
H18
G18
VSSA_TVBG
D19
H17
B26
B25
A25
A35
VCCA_LVDS
B22
VCCHV0
B21
VCCHV1
A21
VCCHV2
B28
A28
A27
AF20
VCCA_SM0
AP19
VCCA_SM1
AF19
VCCA_SM2
AF18
VCCA_SM3
AE37
VCC3G0
W37
VCC3G1
U37
VCC3G2
R37
VCC3G3
N37
VCC3G4
L37
VCC3G5
J37
VCC3G6
Y29
Y28
Y27
F37
G37
VSSA_3GBG
H20
VCC_SYNC
F19
E19
G19
+1.5VS
1
C684
+
C728
2
150U_D2_6.3VM
60mA
1
C29
2
(470uF x1, 0.1uF x1)
60mA
1
C116
2
120mA
24mA
60mA
10mA
2mA
60mA
1000mA
0.15mA
70mA
L7
CHB1608U301_0603
1 2
Change to 0 ohm
1
C31
2
0.1U_0402_16V4Z
L11
CHB1608U301_0603
1 2
1
C102
2
0.1U_0402_16V4Z
+3VS_DAC
+1.5VS
+2.5VS
+1.5VS_DDRDLL
+1.5VS_PEG
0.47U_0603_16V4Z
+1.5VS_3GPLL
+2.5VS_3GBG
+2.5VS
0.47U_0603_16V4Z
0.1U_0402_16V4Z
1
C722
2
0.1U_0402_16V4Z
C27
C28
0.22U_0402_10V4Z
0.22U_0402_10V4Z
+1.5VS_DDRDLL
+1.5VS
22U_1206_16V4Z_V1
+1.5VS_3GPLL
+1.5VS
+1.05VS
+1.05VS
1
C723
2
1
2
1
2
1
C91
2
C65
1
1
C142
22U_1206_16V4Z_V1
2
2
(100uF x1, 0.1uF x1)
1
C128
2
10U_1206_16V4Z
(10uF x1, 0.1uF x1)
C143
1
2
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1
1
2
R96
0_0603_5%
1 2
1
C141
2
0.1U_0402_16V4Z
R94
0.5_0603_1%
1 2
C98
0.1U_0402_16V4Z
U34F
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
POWER
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
ALVISO_BGA1257
915GM@
+3GPLL
1 2
Change to 0 ohm
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
+1.5VS_PEG
+1.5VS
1
2
22U_1206_16V4Z_V1
L12
CHB1608U301_0603
AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1
(220uF x1, 10uF x2)
C20
22U_1206_16V4Z_V1
+1.5VS
V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5
V1.8_DDR_CAP6
V1.8_DDR_CAP4
V1.8_DDR_CAP3
1
C21
2
+2.5VS_3GBG
C136
0.1U_0402_16V4Z
+1.8V
330U_D2E_2.5VM
C139
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C19
2
4.7U_0805_10V4Z
(0.1uF x1)
1 2
R64 0_0603_5%
1
C61
0.1U_0402_16V4Z
2
C125
0.1U_0402_16V4Z
1 2
1 2
C138
0.1U_0402_16V4Z
+1.8V
2200mA
0.1U_0402_16V4Z
1
1
+
C130
C146
2
2
1 2
R24
0_0805_5%
1 2
0.1U_0402_16V4Z
4.7U_0805_10V4Z
+2.5VS
+2.5VS
1
C46
2
0.1U_0402_16V4Z
VCCA_LVDS (Ball A35)
+2.5VS
1
C37
2
4.7U_0805_10V4Z
VCC_SYNC(Ball H20)
C137
0.1U_0402_16V4Z
1 2
1 2
C119
1
C108
2
4.7U_0805_10V4Z
(10uF x2, 0.1uF x6)
C129
1
C48
2
0.01U_0402_16V7K
1
C59
2
0.1U_0402_16V4Z
1
+
2
+1.05VS
1 2
C72
22U_1206_16V4Z_V1
0.1U_0402_16V4Z
1
1
C126
2
2
VCCHV(Ball A21,B21,B22)
(0.1uF x1, 0.01uF x1)
(10uF x1, 0.1uF x1)
+1.5VS
1
C36
C43
2
0.1U_0402_16V4Z
+1.5VS
2.2U_0805_16V4Z
C17
470U_D2_2.5VM
+3VS
4000mA
2.2U_0805_16V4Z
1
1
C85
2
2
0.1U_0402_16V4Z
1
C120
2
0.1U_0402_16V4Z
(10uF x1, 0.1uF x1)
1
C35
2
4.7U_0805_10V4Z
VCCA_CRTDAC(Ball F19,E19)
1
C62
2
0.1U_0402_16V4Z
VCCD_TVDAC (Ball D19)
0.1U_0402_16V4Z
1
C45
2
(10uF x1, 0.1uF x1)
+1.05VS
950mA
1
C73
2
2.2U_0805_16V4Z
L9
CHB1608U301_0603
1 2
1
C16
+
2
150U_D2_6.3VM
(10uF x3, 0.1uF x3)
0.1U_0402_16V4Z
1
1
C83
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C121
C103
2
0.1U_0402_16V4Z
C34
4.7U_0805_10V4Z
(4.7uF x1, 0.1uF x1)
C100
2.2U_0805_16V4Z
1
C105
2
1
C41
2
0.1U_0402_16V4Z
1
C76
2
1
C104
2
0.1U_0402_16V4Z
1
2
VCCTX_LVDS(Ball A27,A28,B28)
(0.1uF x1, 0.022uF x1)
1
C64
2
0.022U_0402_16V7K
(0.1uF x1, 0.022uF x1)
0.1U_0402_16V4Z
1
2
1
C50
2
0.022U_0402_16V7K
1
C55
2
VCCDQ_TVDAC (Ball H17) VCCD_LVDS(Ball A25,B25,B26)
(0.1uF x1, 0.022uF x1)
(0.47uF x2, 0.22uF x2)
1
2
1
C84
2
VCCA_TVDAC VCCA_TVBG
+3VS_DAC
0.022U_0402_16V7K
1
C47
2
0.1U_0402_16V4Z
120mA
C93
2.2U_0805_16V4Z
2.2U_0805_16V4Z
1
C57
2
0.1U_0402_16V4Z
1
C89
2
(0.1uF x1, 0.022uF x1) (0.1uF x1, 0.022uF x1)
(Ball H18)
0.022U_0402_16V7K
1
C63
2
Compal Electronics, Inc.
0.1U_0402_16V4Z
1
C94
2
1
2
1
C42
2
0.1U_0402_16V4Z
1
C67
2
0.022U_0402_16V7K
1
C51
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/25 2006/03/25
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
Alviso POWER(4/5)
EBQ10 LA-2741
星期三, 四月
20, 2005
1
1.0
of
94 9
5
4
3
2
1
U34H
+1.05VS
D D
C C
B B
+1.05VS
A A
L12
VTT_NCTF17
M12
VTT_NCTF16
N12
VTT_NCTF15
P12
VTT_NCTF14
R12
VTT_NCTF13
T12
VTT_NCTF12
U12
VTT_NCTF11
V12
VTT_NCTF10
W12
VTT_NCTF9
L13
VTT_NCTF8
M13
VTT_NCTF7
N13
VTT_NCTF6
P13
VTT_NCTF5
R13
VTT_NCTF4
T13
VTT_NCTF3
U13
VTT_NCTF2
V13
VTT_NCTF1
W13
VTT_NCTF0
Y12
VSS_NCTF68
AA12
VSS_NCTF67
Y13
VSS_NCTF66
AA13
VSS_NCTF65
L14
VSS_NCTF64
M14
VSS_NCTF63
N14
VSS_NCTF62
P14
VSS_NCTF61
R14
VSS_NCTF60
T14
VSS_NCTF59
U14
VSS_NCTF58
V14
VSS_NCTF57
W14
VSS_NCTF56
Y14
VSS_NCTF55
AA14
VSS_NCTF54
AB14
VSS_NCTF53
L15
VSS_NCTF52
M15
VSS_NCTF51
N15
VSS_NCTF50
P15
VSS_NCTF49
R15
VSS_NCTF48
T15
VSS_NCTF47
U15
VSS_NCTF46
V15
VSS_NCTF45
W15
VSS_NCTF44
Y15
VSS_NCTF43
AA15
VSS_NCTF42
AB15
VSS_NCTF41
L16
VSS_NCTF40
M16
VSS_NCTF39
N16
VSS_NCTF38
P16
VSS_NCTF37
R16
VSS_NCTF36
T16
VSS_NCTF35
U16
VSS_NCTF34
V16
VSS_NCTF33
W16
VSS_NCTF32
Y16
VSS_NCTF31
AA16
VSS_NCTF30
AB16
VSS_NCTF29
R17
VSS_NCTF28
Y17
VSS_NCTF27
AA17
VSS_NCTF26
AB17
VSS_NCTF25
AA18
VSS_NCTF24
AB18
VSS_NCTF23
AA19
VSS_NCTF22
AB19
VSS_NCTF21
AA20
VSS_NCTF20
AB20
VSS_NCTF19
R21
VSS_NCTF18
Y21
VSS_NCTF17
AA21
VSS_NCTF16
AB21
VSS_NCTF15
Y22
VSS_NCTF14
AA22
VSS_NCTF13
AB22
VSS_NCTF12
Y23
VSS_NCTF11
AA23
VSS_NCTF10
AB23
VSS_NCTF9
Y24
VSS_NCTF8
AA24
VSS_NCTF7
AB24
VSS_NCTF6
Y25
VSS_NCTF5
AA25
VSS_NCTF4
AB25
VSS_NCTF3
Y26
VSS_NCTF2
AA26
VSS_NCTF1
AB26
VSS_NCTF0
V25
VCC_NCTF10
W25
VCC_NCTF9
L26
VCC_NCTF8
M26
VCC_NCTF7
N26
VCC_NCTF6
P26
VCC_NCTF5
R26
VCC_NCTF4
T26
VCC_NCTF3
U26
VCC_NCTF2
V26
VCC_NCTF1
W26
VCC_NCTF0
ALVISO_BGA1257
915GM@
5
VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10
VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0
VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70
NCTF
VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11
AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26
L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25
+1.8V
+1.05VS
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
U34I
Y1
D2
G2
J2
L2
P2
T2
V2
AD2
AE2
AH2
AL2
AN2
A3
C3
AA3
AB3
AC3
AJ3
C4
H4
L4
P4
U4
Y4
AF4
AN4
E5
W5
AL5
AP5
B6
J6
L6
P6
T6
AA6
AC6
AE6
AJ6
G7
V7
AA7
AG7
AK7
AN7
C8
E8
L8
P8
Y8
AL8
A9
H9
K9
T9
V9
AA9
AC9
AE9
AH9
AN9
D10
L10
Y10
AA10
F11
H11
Y11
ALVISO_BGA1257
915GM@
VSS271
VSS270
VSS269
VSS268
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196
VSS
2005/03/25 2006/03/25
3
VSSALVDS
Compal Secret Data
B36
AA11
VSS195
AF11
VSS194
AG11
VSS193
AJ11
VSS192
AL11
VSS191
AN11
VSS190
B12
VSS189
D12
VSS188
J12
VSS187
A14
VSS186
B14
VSS185
F14
VSS184
J14
VSS183
K14
VSS182
AG14
VSS181
AJ14
VSS180
AL14
VSS179
AN14
VSS178
C15
VSS177
K15
VSS176
A16
VSS175
D16
VSS174
H16
VSS173
K16
VSS172
AL16
VSS171
C17
VSS170
G17
VSS169
AF17
VSS168
AJ17
VSS167
AN17
VSS166
A18
VSS165
B18
VSS164
U18
VSS163
AL18
VSS162
C19
VSS161
H19
VSS160
J19
VSS159
T19
VSS158
W19
VSS157
AG19
VSS156
AN19
VSS155
A20
VSS154
D20
VSS153
E20
VSS152
F20
VSS151
G20
VSS150
V20
VSS149
AK20
VSS148
C21
VSS147
F21
VSS146
AF21
VSS145
AN21
VSS144
A22
VSS143
D22
VSS142
E22
VSS141
J22
VSS140
AH22
VSS139
AL22
VSS138
H23
VSS137
AF23
VSS136
B24
VSS135
D24
VSS134
F24
VSS133
J24
VSS132
AG24
VSS131
AJ24
VSS130
Deciphered Date
2
U34J
AL24
AN24
A26
E26
G26
J26
B27
E27
G27
W27
AA27
AB27
AF27
AG27
AJ27
AL27
AN27
E28
W28
AA28
AB28
AC28
A29
D29
E29
F29
G29
H29
L29
P29
U29
V29
W29
AA29
AD29
AG29
AJ29
AM29
C30
Y30
AA30
AB30
AC30
AE30
AP30
D31
E31
F31
G31
H31
J31
K31
L31
M31
N31
P31
R31
T31
U31
V31
W31
AD31
AG31
AL31
A32
C32
Y32
AA32
AB32
ALVISO_BGA1257
915GM@
VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Alviso POWER(5/5)
星期三, 四月
EBQ10 LA-2741
20, 2005
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0
1
AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37
10 49
1.0
of
5
+DIMM_VREF
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQS0# 7
DDRA_SDQS0 7
D D
DDRA_SDQS1# 7
DDRA_SDQS1 7
DDRA_SDQS2# 7
DDRA_SDQS2 7
DDRA_CKE0 6
C C
B B
A A
DDRA_SBS2# 7
DDRA_SBS0# 7
DDRA_SWE# 7
DDRA_SCAS# 7
DDRA_SCS#1 6
DDRA_ODT1 6
DDRA_SDQS4# 7
DDRA_SDQS4 7
DDRA_SDQS6# 7
DDRA_SDQS6 7
D_CK_SDATA 12,13
D_CK_SCLK 12,13
DDRA_SDQS0#
DDRA_SDQS0
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQS1#
DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SCS#1
DDRA_ODT1
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
D_CK_SDATA
D_CK_SCLK
+3VS
+1.8V +1.8V
JP26
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
TYCO_1-1734075-1
DIMM0 STD H:5.2mm (BOT)
***
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
VDD
VDD
BA1
RAS#
VDD
ODT0
NC/A13
VDD
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
4
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
NC
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
A11
92
A7
94
A6
96
98
A4
100
A2
102
A0
104
106
108
110
S0#
112
114
116
118
120
NC
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDM0
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDM1
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDM2
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1 DDRA_CKE0
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS#0
DDRA_ODT0
DDRA_SMA13
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQ62
DDRA_SDQ63
1 2
R376 10K_0402_5%
1 2
R375 10K_0402_5%
DDRA_CLK0 6
DDRA_CLK0# 6
DDRA_SDQS3# 7
DDRA_SDQS3 7
DDRA_CKE1 6
DDRA_SBS1# 7
DDRA_SRAS# 7
DDRA_SCS#0 6
DDRA_ODT0 6
DDRA_SDQS5# 7
DDRA_SDQS5 7
DDRA_CLK1 6
DDRA_CLK1# 6
DDRA_SDQS7# 7
DDRA_SDQS7 7
3
+DIMM_VREF
DDRA_SMA[0..13] 7
DDRA_SDQ[0..63] 7
DDRA_SDM[0..7] 7
DDRA_SBS2#
DDRA_CKE0
DDRA_SMA9
DDRA_SMA12
DDRA_SMA5
DDRA_SMA8
DDRA_SMA1
DDRA_SMA3
DDRA_SBS0#
DDRA_SMA10
DDRA_SCS#0
DDRA_SWE#
DDRA_ODT1
DDRA_SRAS#
DDRA_CKE1
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1#
DDRA_SCS#1
DDRA_SCAS#
DDRA_ODT0
DDRA_SMA13
1
C198
0.1U_0402_16V4Z
2
RP8 56_0404_4P2R_5%
RP26 56_0404_4P2R_5%
RP9 56_0404_4P2R_5%
RP10 56_0404_4P2R_5%
RP11 56_0404_4P2R_5%
RP12 56_0404_4P2R_5%
RP13 56_0404_4P2R_5%
RP30 56_0404_4P2R_5%
RP29 56_0404_4P2R_5%
RP28 56_0404_4P2R_5%
RP27 56_0404_4P2R_5%
RP14 56_0404_4P2R_5%
RP25 56_0404_4P2R_5%
C197
2.2U_0805_16V4Z
DDRA_SMA[0..13]
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1 4
2 3
1
2
2
+1.8V
1 2
R118
1K_0402_1%
1 2
R117
1K_0402_1%
+0.9VS
+1.8V
1
C730
0.1U_0402_16V4Z
2
+1.8V
1
C223
2.2U_0805_16V4Z
2
+1.8V
1
C196
0.1U_0402_16V4Z
2
+0.9VS
1
C513
2
0.1U_0402_16V4Z
+0.9VS
1
C210
0.1U_0402_16V4Z
2
+0.9VS
1
C213
0.1U_0402_16V4Z
2
1
C732
C731
1000P_0402_50V7K
2
0.1U_0402_16V4Z
1
C193
2
2.2U_0805_16V4Z
1
C220
2
0.1U_0402_16V4Z
1
C512
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C211
2
0.1U_0402_16V4Z
1
C516
2
0.1U_0402_16V4Z
C194
2.2U_0805_16V4Z
C195
0.1U_0402_16V4Z
C515
C212
0.1U_0402_16V4Z
C514
0.1U_0402_16V4Z
1
C733
2
1000P_0402_50V7K
1
2
1
2
1
0.1U_0402_16V4Z
2
1
C517
2
0.1U_0402_16V4Z
1
2
1
1
2
1
C222
2
2.2U_0805_16V4Z
1
C207
2
0.1U_0402_16V4Z
1
C208
2
0.1U_0402_16V4Z
1
2
1
C221
2.2U_0805_16V4Z
2
1
C209
2
1
C214
0.1U_0402_16V4Z
2
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
2005/03/25 2006/03/25
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
Date: Sheet
2
Compal Electronics, Inc.
DDRII SODIMM SLOT0
EBQ10 LA-2741
星期一, 四月
25, 2005
1
of
11 49
1.0
A
JP23
+DIMM_VREF
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQS0# 7
DDRB_SDQS0 7
1 1
DDRB_SDQS1# 7
DDRB_SDQS1 7
DDRB_SDQS2# 7
DDRB_SDQS2 7
DDRB_CKE0 6
2 2
3 3
4 4
DDRB_SBS2# 7
DDRB_SBS0# 7
DDRB_SWE# 7
DDRB_SCAS# 7
DDRB_SCS#1 6
DDRB_ODT1 6
DDRB_SDQS4# 7
DDRB_SDQS4 7
DDRB_SDQS6# 7
DDRB_SDQS6 7
D_CK_SDATA 11,13
D_CK_SCLK 11,13
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26
DDRB_SDQ27
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS#1
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
D_CK_SDATA
D_CK_SCLK
+3VS
DIMM1 STD H:9.2mm (BOT)
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
TYCO_3-1734042-2_200P
***
NC/CKE1
NC/A15
NC/A14
NC/A13
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
VDD
VDD
A11
VDD
VDD
BA1
RAS#
S0#
VDD
ODT0
VDD
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
B
+1.8V +1.8V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
NC
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
A7
94
A6
96
98
A4
100
A2
102
A0
104
106
108
110
112
114
116
118
120
NC
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDM0
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDM1
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDM2
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
DDRB_SDQ30
DDRB_SDQ31
DDRB_CKE1
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS#0
DDRB_ODT0
DDRB_SMA13
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
DDRB_SDQ62
DDRB_SDQ63
1 2
R114 10K_0402_5%
1 2
R115 10K_0402_5%
DDRB_CLK0 6
DDRB_CLK0# 6
DDRB_SDQS3# 7
DDRB_SDQS3 7
DDRB_CKE1 6
DDRB_SBS1# 7
DDRB_SRAS# 7
DDRB_SCS#0 6
DDRB_ODT0 6
DDRB_SDQS5# 7
DDRB_SDQS5 7
DDRB_CLK1 6
DDRB_CLK1# 6
DDRB_SDQS7# 7
DDRB_SDQS7 7
+3VS
C
DDRB_SMA[0..13] 7
DDRB_SDQ[0..63] 7
DDRB_SDM[0..7] 7
+DIMM_VREF
1
C508
2.2U_0805_16V4Z
2
DDRB_SBS2#
DDRB_CKE0
DDRB_SMA9
DDRB_SMA12
DDRB_SMA5
DDRB_SMA8
DDRB_SMA1
DDRB_SMA3
DDRB_SBS0#
DDRB_SMA10
DDRB_SCAS#
DDRB_SWE#
DDRB_ODT1
DDRB_SCS#1
DDRB_CKE1
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS#0
DDRB_ODT0
DDRB_SMA13
1
C509
2
0.1U_0402_16V4Z
DDRB_SMA[0..13]
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
1 4
2 3
RP24 56_0404_4P2R_5%
1 4
2 3
RP21 56_0404_4P2R_5%
1 4
2 3
RP20 56_0404_4P2R_5%
1 4
2 3
RP19 56_0404_4P2R_5%
1 4
2 3
RP18 56_0404_4P2R_5%
1 4
2 3
RP23 56_0404_4P2R_5%
1 4
2 3
RP22 56_0404_4P2R_5%
1 4
2 3
RP2 56_0404_4P2R_5%
1 4
2 3
RP3 56_0404_4P2R_5%
1 4
2 3
RP4 56_0404_4P2R_5%
1 4
2 3
RP5 56_0404_4P2R_5%
1 4
2 3
RP6 56_0404_4P2R_5%
1 4
2 3
RP7 56_0404_4P2R_5%
D
+1.8V
1
C169
2
150U_D2_6.3VM
1
C244
0.1U_0402_16V4Z
2
1
+
C217
0.1U_0402_16V4Z
2
1
C243
2
0.1U_0402_16V4Z
+1.8V
1
C248
2.2U_0805_16V4Z
2
+1.8V
1
C192
0.1U_0402_16V4Z
2
+0.9VS
1
C188
2
0.1U_0402_16V4Z
+0.9VS
1
C185
0.1U_0402_16V4Z
2
+0.9VS
1
C506
0.1U_0402_16V4Z
2
2.2U_0805_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+
C165
150U_D2_6.3VM
+1.8V
C200
0.1U_0402_16V4Z
+0.9VS
1
C215
2
0.1U_0402_16V4Z
1
C245
0.1U_0402_16V4Z
2
1
C205
2.2U_0805_16V4Z
2
1
C191
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C186
2
0.1U_0402_16V4Z
1
C502
2
0.1U_0402_16V4Z
1
C507
0.1U_0402_16V4Z
2
1
C247
0.1U_0402_16V4Z
2
1
C510
2
0.1U_0402_16V4Z
1
C115
2
2.2U_0805_16V4Z
1
C189
2
0.1U_0402_16V4Z
1
C184
0.1U_0402_16V4Z
2
1
C504
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C505
2
1
2
1
2
C236
C190
C187
C182
E
1
C202
2
0.1U_0402_16V4Z
1
C148
0.1U_0402_16V4Z
2
1
C235
2.2U_0805_16V4Z
2
1
2
1
C183
2
0.1U_0402_16V4Z
1
C503
0.1U_0402_16V4Z
2
1
C219
0.1U_0402_16V4Z
2
1
2
1
2
1
2
1
C246
2
0.1U_0402_16V4Z
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/25 2006/03/25
C
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
DDRII-SODIMM SLOT1
EBQ10 LA-2741
星期三, 四月
20, 2005
E
of
12 49
1.0
A
FSC FSB FSA CPU
CLKSEL0 CLKSEL1 CLKSEL2
1 1
*
1 1
+3VS
1 2
R422 10K_0402_5%
1 2
R445 10K_0402_5%
1 2
R451 10K_0402_5%
1 2
R446 10K_0402_5%
2 2
3 3
R447
4.7K_0402_5%
CLKSEL0 CLKSEL1
1 2
1 2
R455
0_0402_5%@
4 4
0
0
1
1
R454
1K_0402_5%@
R459
0_0402_5%
1 2
R453
0_0402_5%
CLK_ICH_48M 18
CLK_SD_48M 22
CLK_14M_CODEC 30
1
1
0 0
+3VS
2
1 3
D
+3VS
2
1 3
D
1 2
0
0
CLKSEL2
CLK_PCI0
CLK_PCI2
CLK_PCI1
CK_SCLK 18,24
CK_SDATA 18,24
+1.05VS +1.05VS
1 2
MHz
100
133
166
200
B
SRC
PCI
MHz
MHz
100 33.3
33.3
100
33.3
100
33.3
100
1
2
C
+CLK_VDD48 +CLK_VDDREF
C273
2.2U_0805_16V4Z
+CLK_VDD2
1
C276
2
0.047U_0402_16V7K
+CLK_VDD1
Table : ICS 954226AG
+CLK_VDD1
C554
33P_0402_50V8J
33P_0402_50V8J
CLK_PCI_MINI2 35
CLK_PCI_MINI1 28
CLK_PCI_LAN 26
CLK_PCI_PCM 22
CLK_PCI_LPC 33
CLK_PCI_1394 25
CLK_PCI_ICH 16
D_CK_SCLK 11,12
D_CK_SDATA 11,12
R448
4.7K_0402_5%
G
1 2
D_CK_SCLK
S
Q53
2N7002_SOT23
R449
4.7K_0402_5%
G
1 2
D_CK_SDATA
S
Q52
2N7002_SOT23
MCH_CLKSEL0 6
CPU_BSEL0 5 CPU_BSEL1 5
Y3
14.318MHZ_16PF_DSX840GA
1 2
C553
1 2
1 2
CLK_ICH_48M
CLK_14M_CODEC CLKSEL0
R429 12_0402_5%
1 2
R434 12_0402_5%
1 2
R444 33_0402_5%
CLK_PCI_MINI2
CLK_PCI_MINI1 CLK_PCI4
CLK_PCI_1394
CLK_PCI_ICH
D_CK_SCLK
D_CK_SDATA
+3VS
+3VS
R404
0_0402_5%@
1 2
1 2
R458 33_0402_5%
1 2
R457 33_0402_5%
1 2
R456 33_0402_5%
1 2
R450 33_0402_5%
1 2
R443 12_0402_5%
1 2
R442 12_0402_5%
1 2
R452 33_0402_5%
R408
4.7K_0402_5%
1 2
1 2
+CLK_VDDREF
1 2
R163 1_0402_5%
+CLK_VDD48
1 2
R160 2.2_0402_5%
XTALIN
XTALOUT
CLKSEL2 CLK_SD_48M
CLKSEL1
CLK_PCI5
CLK_PCI3 CLK_PCI_LAN
CLK_PCI2 CLK_PCI_PCM
CLK_PCI1 CLK_PCI_LPC
R405 475_0402_1%
1 2
1 2
R414
1K_0402_5%@
R409
0_0402_5%
1 2
R415
0_0402_5%
CLK_PCI0
CLKIREF
1 2
15mil
15mil
15mil
MCH_CLKSEL1 6
D
1
C277
0.047U_0402_16V7K
2
U38
21
VDDPCIEX_0
28
VDDPCIEX_1
34
VDDPCIEX_2
1
VDDPCI_0
7
VDDPCI_1
42
VDDCPU
48
VDDREF
11
VDD48
50
X1
49
X2
12
FS_A/USB_48MHz
53
REF1/FSLC/TEST_SEL
16
FSLB/TEST_MODE
5
PCICLK5
4
PCICLK4
3
PCICLK3
56
PCICLK2/REQ_SEL
9
SELPCIEX_LCDCLK#/PCICLK_F1
8
ITP_EN/PCICLK_F0
46
SCLK
47
SDATA
39
IREF
13
GND_0
29
GND_1
2
GND_2
45
GND_3
51
GND_4
6
GND_5
ICS954226AGT_TSSOP56
L15
KC FBM-L11-201209-221LMAT_0805
1 2
+3VS
Change to 0 ohm
VDDA
GNDA
PCI/SRC_STOP#
CPU_STOP#
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
CPUCLKT2_ITP/PCIEXT6
CPUCLKC2_ITP/PCIEXC6
PEREQ1#/PCIEXT5
PEREQ2#/PCIEXC5
PCIEXT4
PCIEXC4
SATACLKT
SATACLKC
PCIEXT3
PCIEXC3
PCIEXT2
PCIEXC2
PCIEXT1
PCIEXC1
LCDCLK_SS/PCIEX0T
LCDCLK_SS/PCIEX0C
DOTT_96MHz
DOTC_96MHz
VTT_PWRGD#/PD
REF0
E
1
C262
2.2U_0805_16V4Z
2
37
38
STP_PCI#
55
STP_CPU#
54
CLK_CPU1
41
CLK_CPU1#
40
CLK_CPU0
44
CLK_CPU0#
43
CLK_CPU2
36
CLK_CPU2#
35
33
32
CLK_SRC5
31
CLK_SRC5#
30
CLK_SRC4
26
CLK_SRC4#
27
CLK_SRC3
24
CLK_SRC3#
25
CLK_SRC2
22
CLK_SRC2#
23
CLK_SRC1
19
CLK_SRC1#
20
CLK_SRC0
17
CLK_SRC0#
18
CLK_DOT
14
CLK_DOT#
15
10
CLK_REF CLK_14M_SIO
52
1
C268
0.047U_0402_16V7K
2
+CLK_VCCA
40mil
1
C267
2
2.2U_0805_16V4Z
R419 33_0402_5%
1 2
R411 33_0402_5%
1 2
R431 33_0402_5%
1 2
R425 33_0402_5%
1 2
R401 33_0402_5%
1 2
R394 33_0402_5%
1 2
R389 0_0402_5%
R386 33_0402_5%
1 2
R381 33_0402_5%
1 2
R387 33_0402_5%
1 2
R383 33_0402_5%
1 2
R395 33_0402_5%
1 2
R391 33_0402_5%
1 2
R406 33_0402_5%
1 2
R402 33_0402_5%
1 2
R420 33_0402_5%
1 2
R412 33_0402_5%
1 2
R432 33_0402_5%
1 2
R427 33_0402_5%
1 2
R439 33_0402_5%
1 2
R435 33_0402_5%
1 2
1 2
R441 12_0402_5%
1 2
R438 12_0402_5%
1 2
1
C270
2
0.047U_0402_16V7K
PM_STP_PCI# 18
PM_STP_CPU# 18,47
1 2
CLK_ICH_14M
F
1
2
R159
2.2_0402_5%
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_ITP
CLK_CPU_ITP#
CLK_PCIE_CARD
CLK_PCIE_CARD#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_DREF_96M
CLK_DREF_96M#
C263
0.047U_0402_16V7K
+CLK_VDD1
1 2
+3VS
R437 10K_0402_5%
VTT_POWERGD#
CLK_14M_SIO 35
CLK_ICH_14M 18
40mil
1
C264
0.047U_0402_16V7K
2
L16
KC FBM-L11-201209-221LMAT_0805
1 2
+3VS
Change to 0 ohm
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
PCIEC_CLKREQ# 24
CLK_PCIE_CARD 24
CLK_PCIE_CARD# 24
CLK_PCIE_SATA 17
CLK_PCIE_SATA# 17
CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8
CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15
CLK_PCIE_ICH 18
CLK_PCIE_ICH# 18
CLK_DREF_SSC 6
CLK_DREF_SSC# 6
CLK_DREF_96M 6
CLK_DREF_96M# 6
G
+CLK_VDD1
1
C280
2
2.2U_0805_16V4Z
1 3
D
1
C274
0.047U_0402_16V7K
2
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_CPU_ITP
CLK_CPU_ITP#
CLK_PCIE_CARD
CLK_PCIE_CARD#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_DREF_96M
CLK_DREF_96M#
2
G
S
Q51
2N7002_SOT23
H
Clock Generator
+CLK_VDD2
40mil
1
C285
2
0.047U_0402_16V7K
VGATE 6,18,47
1
C278
2
0.047U_0402_16V7K
1 2
R418 49.9_0402_1%
1 2
R410 49.9_0402_1%
1 2
R430 49.9_0402_1%
1 2
R424 49.9_0402_1%
1 2
R400 49.9_0402_1%
1 2
R393 49.9_0402_1%
1 2
R385 49.9_0402_1%
1 2
R380 49.9_0402_1%
1 2
R388 49.9_0402_1%
1 2
R384 49.9_0402_1%
1 2
R396 49.9_0402_1%
1 2
R392 49.9_0402_1%
1 2
R407 49.9_0402_1%
1 2
R403 49.9_0402_1%
1 2
R421 49.9_0402_1%
1 2
R413 49.9_0402_1%
1 2
R433 49.9_0402_1%
1 2
R428 49.9_0402_1%
1 2
R440 49.9_0402_1%
1 2
R436 49.9_0402_1%
A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
2005/03/25 2006/03/25
Compal Secret Data
Deciphered Date
E
Title
Size Document Number Rev
F
Date: Sheet
Compal Electronics, Inc.
Clock Generator
EBQ10 LA-2741
星期三, 四月
20, 2005
G
of
13 49
H
1.0
A
B
C
D
E
CRT Connector
1 1
R300 0_0402_5%PM@
VGA_CRT_R 15
GMCH_CRT_R 8
VGA_CRT_G 15
GMCH_CRT_G 8
VGA_CRT_B 15
GMCH_CRT_B 8
2 2
3 3
VGA_TV_LUMA 15
GMCH_TV_LUMA 8
VGA_TV_CRMA 15
GMCH_TV_CRMA 8
4 4
R4 0_0402_5%PM@
R3 0_0402_5%GM@
R6 0_0402_5%PM@
R5 0_0402_5%GM@
1 2
1 2
R301 0_0402_5%GM@
R304 0_0402_5%PM@
1 2
1 2
R305 0_0402_5%GM@
R303 0_0402_5%PM@
1 2
1 2
R302 0_0402_5%GM@
VGA_CRT_HSYNC 15
GMCH_CRT_HSYNC 8
1 2
1 2
1 2
1 2
No pull-down
on VGA side
No pull-down
on VGA side
+3VS
1 2
R2
75_0402_1%
75_0402_1%
1 2
R308 0_0402_5%PM@
1 2
R309 39_0402_5%GM@
VGA_CRT_VSYNC 15
GMCH_CRT_VSYNC 8
D36
1 2
R7
DAN217_SC59@
1
2
TV_LUMA
TV_CRMA
R1
75_0402_1%
1 2
3
1 2
R8
75_0402_1%
1 2
C409 0.1U_0402_16V4Z
1 2
R306 0_0402_5%PM@
1 2
R307 39_0402_5%GM@
D37
DAN217_SC59@
2
1
C6
100P_0402_50V8K
2
CRT_R CRT_R_L
CRT_G
CRT_B
1 2
R9
75_0402_1%
CRT_HSYNC CRT_HSYNC_B
1
3
1
C5
100P_0402_50V8K
2
1
C15
8P_0402_50V8K
2
+CRT_VCC
1
5
P
4
OE#
A2Y
G
U28
SN74AHCT1G125GW_SOT353-5
3
1 2
C408 0.1U_0402_16V4Z
1 2
1 2
L2 FCM1608C-121T_0603
1 2
L3 FCM1608C-121T_0603
1 2
1
C14
8P_0402_50V8K
2
8P_0402_50V8K
+CRT_VCC
1
5
CRT_VSYNC CRT_VSYNC_B
C3
22P_0402_50V8J
@
C4
22P_0402_50V8J
@
100P_0402_50V8K
P
OE#
A2Y
G
U27
SN74AHCT1G125GW_SOT353-5
3
TV_LUMA_L
TV_CRMA_L
1
C2
2
100P_0402_50V8K
+3VS
1 2
L6
FCM2012C-800_0805
1 2
L5
FCM2012C-800_0805
1 2
L4
FCM2012C-800_0805
1
C13
8P_0402_50V8K
2
1 2
R299 10K_0402_5%
4
1
C1
2
D3
DAN217_SC59@
CRT_G_L
CRT_B_L
1
C9
2
L1
FCM1608C-121T_0603
1 2
TV_GND
1
2
3
4
ALLTO_C10877-104A1-L_4P
TV-OUT Conn.
change to DC230000K00
D4
DAN217_SC59@
1
2
1 2
L21 FCM1608C-121T_0603
1 2
L22 FCM1608C-121T_0603
JP14
1
2
3
4
1
2
3
C10
3
1
2
8P_0402_50V8K
10P_0402_50V8J
4.7K_0402_5%
DSUB_12
DSUB_15
1. Y ground
2. C ground
3. Y (luminance+sync)
4. C (crominance)
1
2
C406
+CRT_VCC
R319
1
2
C8
8P_0402_50V8K
CRT_HSYNC_L
CRT_VSYNC_L
1 2
D2
DAN217_SC59@
3
1
1
2
2
1 2
R318
4.7K_0402_5%
Q41
BSS138_SOT23
+5VS
2 1
RB411D_SOT23
100P_0402_50V8J
C405
10P_0402_50V8J
R315 0_0402_5%PM@
R314 0_0402_5%GM@
2
G
1 3
D
S
1 3
D
Q42
BSS138_SOT23
D1
C404
1 2
1 2
2
G
W=40mils
POLYSWITCH_1A
DDC_MD2
1
2
C407
68P_0402_50V8K
R320 0_0402_5%GM@
1 2
1 2
S
R321
F1
C11
0.1U_0402_16V4Z
1
2
1 2
1 2
0_0402_5%GM@
W=40mils
1
2
DSUB_12
DSUB_15
1
C403
68P_0402_50V8K
2
R313
0_0402_5%PM@
R316
0_0402_5%PM@
+CRT_VCC +R_CRT_VCC
JP13
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
TYCO_1470801-1
+3VS
+2.5VS
GMCH_CRT_DATA 8
VGA_DDC_DATA 15
VGA_DDC_CLK 15
GMCH_CRT_CLK 8
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/25 2006/03/25
C
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
CRT&TV out Connector
EBQ10 LA-2741
星期三, 四月
20, 2005
E
of
14 49
1.0
5
4
3
2
1
PCEI_GTX_C_MRX_N[0..15] 8
PCEI_GTX_C_MRX_P[0..15] 8
PCIE_MTX_C_GRX_N[0..15] 8
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_CRT_VSYNC
VGA_CRT_HSYNC
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
VGA_DDC_CLK
VGA_DDC_DATA
10U_0805_6.3V6M
PCIE_MTX_C_GRX_P[0..15] 8
PM@
VGA BOARD Conn.
1
C677
2
change to SP010009V00
10U_0805_6.3V6M
LCD POWER CIRCUIT
GMCH_ENVDD 8
D D
+LCDVDD
1 2
R322
300_0603_1%GM@
1 3
D
Q43
2N7002_SOT23GM@
C C
B B
B+
+3VS
GMCH_LCD_CLK 8
GMCH_LCD_DATA 8
GMCH_TZOUT0- 8
GMCH_TZOUT0+ 8
GMCH_TZOUT1+ 8
GMCH_TZOUT1- 8
GMCH_TZOUT2+ 8
GMCH_TZOUT2- 8
GMCH_TZCLK- 8
GMCH_TZCLK+ 8
LCD_ID# 16
2
G
S
+3VS
1
C106
0.1U_0402_16V4Z@
2
L30
KC FBM-L11-201209-221LMAT_0805GM@
L31
KC FBM-L11-201209-221LMAT_0805GM@
+3VALW
0.01U_0402_16V7KGM@
R317
1 2
GMCH_ENBKL 8
BKOFF# 33
1 2
1 2
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_TZOUT0-
GMCH_TZOUT1+
GMCH_TZOUT1-
GMCH_TZOUT2+
GMCH_TZOUT2-
GMCH_TZCLKGMCH_TZCLK+
LCD_ID#
100K_0402_5%GM@
GMCH_ENVDD
U29
1
5
SN74AHCT1G125GW_SOT353-5GM@
P
4
OE#
A2Y
2
1
1
C414
2
R17 0_0402_5%GM@
G
3
0.047U_0402_16V7KGM@
1 2
2 1
R323
1 2
100_0402_5%GM@
D9
RB751V_SOD323
2
ENBKL
G
4.7U_0805_10V4ZGM@
+3VS
C413
BKOFF# DISPOFF#
LCD/PANEL BD. Conn.
CHB1608U301_0603
CHB1608U301_0603
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
L32
1 2
L33
1 2
L34
1 2
CHB1608U301_0603
L35
KC FBM-L11-201209-221LMAT_0805
GMCH_TXOUT0GMCH_TXOUT0+ GMCH_TZOUT0+
GMCH_TXOUT1GMCH_TXOUT1+
GMCH_TXOUT2+
GMCH_TXOUT2-
GMCH_TXCLKGMCH_TXCLK+
1 2
JP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
ACES_88107-4000GGM@
+3VS
W=60mils
S
Q44
D
1 3
1
C415
2
1 2
R16
4.7K_0402_5%
INVT_PWM
DISPOFF#
GMCH_TXOUT0- 8
GMCH_TXOUT0+ 8
GMCH_TXOUT1- 8
GMCH_TXOUT1+ 8
GMCH_TXOUT2+ 8
GMCH_TXOUT2- 8
GMCH_TXCLK- 8
GMCH_TXCLK+ 8
SI2301BDS_SOT23GM@
W=60mils
+LCDVDD
+LCDVDD
1
C416
0.1U_0402_16V4ZGM@
2
DAC_BRIG 33
INVT_PWM 33
+5VALW
PM@
VGA_CRT_R 14
VGA_CRT_G 14
VGA_CRT_B 14
VGA_CRT_VSYNC 14
VGA_CRT_HSYNC 14
VGA_DDC_CLK 14
VGA_DDC_DATA 14
CLK_PCIE_VGA 13
CLK_PCIE_VGA# 13
+5VS
PM@
+3VALW
+1.8VS
1
C676
2
+2.5VS
1
C675
2
10U_0805_6.3V6M
PCEI_GTX_C_MRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
JP19
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89 90
91 92
93 94
95 96
97 98
99 100
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124
125 126
127 128
129 130
131 132
133 134
135 136
137 138
139 140
141 142
143 144
145 146
147 148
149 150
151 152
153 154
155 156
157 158
159 160
ACES_88081-1600PM@
B+
VGA_TV_LUMA
VGA_TV_CRMA
VGA_TV_COMP
PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_N0
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N4
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N6
PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N11
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N14
PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N15
1 2
R332 75_0402_5%PM@
Reserve for SDVO
DAC_BRIG DAC_BRIG
DISPOFF#
INVT_PWM
SUSP#
ENBKL
LCD_ID#
+1.8VS
1
C672
2
PM@
10U_0805_6.3V6M
VGA_TV_LUMA 14
VGA_TV_CRMA 14
PLTRST_VGA# 18
SUSP# 24,33,34,40
ENBKL 33
+3VS
1
C673
2
PM@
10U_0805_6.3V6M
No pull-down
on VGA side
+1.5VS
1
C674
2
10U_0805_6.3V6M
PM@
A A
Security Classification
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/03/25 2006/03/25
3
Compal Secret Data
Deciphered Date
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
VGA/LCD CONN.
EBQ10 LA-2741
星期三, 四月
20, 2005
1
of
15 49
1.0