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Toshiba
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M600
Schematics
61 pgs1.74 Mb0
Schematics
31 pgs1.25 Mb0

Toshiba M600 Schematics

A
1 1
B
C
D
E
NBQAA
2 2
LA-6072P
LA-6072P Schematic
LA-6072PLA-6072P
3 3
Intel Arrandale CPU / Intel 5 Series Chipset
Bordeaux 10G
REV 1.0
REV 1.0
REV 1.0REV 1.0
Schematic
SchematicSchematic
2010-03-22 Rev 1.0
4 4
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
1 61Tuesday, March 23, 2 010
1 61Tuesday, March 23, 2 010
1 61Tuesday, March 23, 2 010
E
1.0
1.0
1.0
A
B
C
D
E
Compal Confidential
Model Name : NBQAA
PCIE-Express 16X 2.5GHz
File Name : LA-6072P
1 1
VGA (DDR3)
N11M-OP1,64bit with 512MB/1GB
N11P-LP1,128bit with 1GB
page 13,14,15,16,17,18,19,20,21,22,23,24
EC_SMB
2 2
HDMI-CEC
page 27
LCD Conn.
page 25
CRT
page 26
Intel Arrandale
(2C,35W)
rPGA-989
page 5,6,7,8,9,10
FDI X8
2.7GHz
Memory BUS(DDRIII)
DMI X4
2.5GHz
Fan Control
APL5607
page 6
Dual Channel
1.5V DDRIII 800/1066 MT/s
USB Conn
USB port 0,1
USB
5V 480MHz
Int. Camera
USB port 11
PCIeMini Card
Intel 5 Series Chipset
HDMI Conn.
page 27
LAN
RJ45
page 40
RTC CKT.
page 28
3 3
DC/DC Interface
page 47
RTL8105E 10/100M RTL8111E 10/100/1000M
PCIe port 1
4 in 1 Card Reader
JMB389C/385C
PCIe port 5
page 40
page 41
PCIe 1x
1.5V 2.5G Hz(250MB/s)
PCIe 1x
1.5V 2.5G Hz(250MB/s)
page 28,29,30,31,32,33,34,35,36
HM57,HM55
BGA-1071
USB
5V 480MHz
PCIe 1x
1.5V 2.5G Hz(250MB/s)
SATA port 1
5V 3GHz(30 0MB/s)
SATA port 4
5V 3GHz(30 0MB/s)
SATA port 5
5V 3GHz(30 0MB/s)
USB port 3
5V 480MHz
WiMax
PCIeMini Card WLAN
SATA HDD
SATA ODD
eSATA
PCIe port 5
page 37
VGA Thermal Sensor
ADM1032ARMZ-2
204pin DDRIII-SO-DIMM X2
BANK 0, 1, 2, 3
Fringer Printer
USB
USB port 3
USB port 8
BT conn
USB port 5
page 37
page 37
page 25
PCIe port 2 USB port 13
page 39
PCIe port 2 USB port 13
page 39
page 37
page 37
page 14
page 38
page 38
PCIeMini Card 3G
USB port 10
page 39
PCIeMini Card JET
PCIe port 4
page 39
Clock Generator
SLG8SP587VTR
page 11,12
Express Card
USB port 4
PCIe port 3
page 25
page 39
Power Circuit DC/DC
page 48~58
3.3V 33 MHz
LPC BUS
NBQAA Sub-board Conn
Power Membrane
page 46
4 4
Slot ODD
page 37
TP LED
page 38
Touch Pad FP/LOGO LED
page 38
Cap Sensor Light Sensor
page 38
A
SPI ROM
page 28
B
Debug Port
page 45
G-Sensor
page 45
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ENE KB926 E0
page 44
Int.KBD
page 35
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
C
HD Audio
EC ROM
page 45
Compal Secret Data
Compal Secret Data
Compal Secret Data
3.3V/1.5V 24MHz
Deciphered Date
Deciphered Date
Deciphered Date
D
Int.
MIC CONN
page 25
HDA Codec
ALC269
page 42
MIC CONN
page 43
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
HP CONN
page 43
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
SPK CONN
page 43
E
2 61Tuesday, March 23, 2 010
2 61Tuesday, March 23, 2 010
2 61Tuesday, March 23, 2 010
1.0
1.0
1.0
5
4
3
2
1
NBQAA Bordeaux Intel Arrandale (Discrete)
VR_ON
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9
D D
N-CHANNEL
SI4800
SUSP
P-CHANNEL
AO-3413
ODD_EN#
DESIGN CURRENT 1.7A
DESIGN CURRENT 2.2A
DESIGN CURRENT 1100mA
+5VALW
+5VS
+5VS_ODD
RT8205EGQW
Ipeak=5A, Imax=3.5A, Iocp min=8.6
WOL_EN#
P-CHANNEL
AO-3413
SUSP
N-CHANNEL
SI4800
P-CHANNEL
C C
VTTP_EN
APW7138NITRL
Ipeak=20A, Imax=14A, Iocp min=29.73A
AO-3413
P-CHANNEL
AO-3413
P-CHANNEL
AO-3413
DESIGN CURRENT 0.5A
DESIGN CURRENT 330mA
DESIGN CURRENT 3A
UMA_ENVDD
DESIGN CURRENT 1.5A
BT_PWR#
DESIGN CURRENT 180mA
DGPU_PWR_EN#
DESIGN CURRENT 780mA
DESIGN CURRENT 15A
+3VALW
+3V_LAN
+3VS
+LCD_VDD
+BT_VCC
+3VS_DGPU
+VTT
B+
ISL62883HRZ-T
GFXVR_EN
ADP3211AMNR2G
GFXVR_EN
APW7138NITRL
DESIGN CURRENT 48A
+CPU_CORE
Ipeak=48A, Imax=33.6A, Iocp min=57.19A
DESIGN CURRENT 22A
+GFX_CORE
Ipeak=22A, Imax=15.4A, Iocp min=26A
DESIGN CURRENT 24.1A
+VGA_CORE
Ipeak=24.10A, Imax=16.87A, Iocp min=28.65A
DESIGN CURRENT 5A
DGPU_PWR_EN#
P-CHANNEL
AO-3413
B B
RT8209BGQW
SYSON
Ipeak=20.15A, Imax=14.11A, Iocp min=21.73A
SUSP
N-CHANNEL
DESIGN CURRENT 2.87A
DESIGN CURRENT 9A
DESIGN CURRENT 3A
+1.05VS
+1.05VS_DGPU
+1.5V
+1.5V_CPU
SI4856
SUSP
N-CHANNEL
SI4800
VGA_PWROK#
N-CHANNEL
DESIGN CURRENT 4.75A
DESIGN CURRENT 6.4A
+1.5VS
+VRAM_1.5VS
SI4856
0.75VR_EN#
A A
SUSP#
G2992F1U
MP2121DQ-LF-Z
5
4
DESIGN CURRENT 1.3A
DESIGN CURRENT 1.7A
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+0.75VS
+1.8VS
Compal Secret Data
Compal Secret Data
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Power Tree
Power Tree
Power Tree
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
3 61Monday, March 22 , 2010
3 61Monday, March 22 , 2010
3 61Monday, March 22 , 2010
1
1.0
1.0
1.0
A
B
C
D
E
Voltage Rails
1 1
State
2 2
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
3 3
EC SM Bus1 address
+3VL
+3VL
S0
S1
S3
power plane
Device
EC KB926 D3
HDMI-CEC
Smart Batte ry+3VL
( O MEANS ON X MEANS OFF )
+RTCVCC
O
O
O
O
O
O
+B
O
O
O
O
O
X
+5VALW
+3VALW
+VSB
O
O
O
O
X
X X X
+1.5V
O
X X
X
EC SM Bus2 address
Address Address
0001 011x b
PowerPower
+3VS
+3VS
+3VS
+3VALW
+3VS
Device
EC KB926 D3
AMD GPU Thermal Sensor
Ambient Ligh Sensor
PCH
G-Sensor
+5VS
+3VS
+1.5VS
+VGA_CORE
+CPU_CORE
+VTT
+1.05VS
+1.8VS
+1.1VS
+0.75VS
OO
OO
X
X
BTO Option Table
Function
description
explain
BTO
Function
description
explain
BTO
Function
description
explain
BTO
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
G3 LOW LOWLOW
Bluetooth
B
Bluetooth
BT@
ODD
ODD0@
PCH
H5 H7
HM55
HM55@ HM57@
SIGNAL
SLP_S3# SLP_S4# SLP_S5#
Slot N11M-OP1
ODD1@
HM57
HIGH HIGHHIGH
LOW
LOW LOW
Card Reader
JMB389 JMB385
KB LED
KB LEDNormal
KBL@
512 1G
512M 1G
4pcs@ 4pcs@+8pcs@
HIGH HIGHHIGH
HIGH
LOW LOWLOW
3G
3G@
VRAM
HIGH
HIGH
JGKT
JET
JET@
HDMI-CEC
HDMI
IHDMI@JMB389@ JMB385@
Mini Card
3G/JFT
3GJFT@
Y
HDMI+CEC
IHDMI@+CEC@
W
WiMAX
WiMAX@
LAN
U V
10/100 10/100/1000
8105E@ 8111E@
GPU
P M
N11P-LP1
N11P@
CAM+MIC
X
CAM
CAM@
N11P@
PCH SM Bus address
Power
+3VALW
+3VS
4 4
+3VS
+3VS
+3VS
+3VS
+3VS
Device
PCH
Clock Generator
DDR DIMMA
DDR DIMMB
Express
Slot#1--WLAN/Wimax
Slot#2--JET/3G
A
Address
1101 001x b
1001 000x b
1001 010x b
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
Notes List
Notes List
Notes List
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
4 61Tuesday, March 23, 2 010
4 61Tuesday, March 23, 2 010
4 61Tuesday, March 23, 2 010
E
1.0
1.0
1.0
5
+VTT
H_PWRGOOD
1
C426
C426 1000P_0402_50V7K
1000P_0402_50V7K
2
1 2
R18 49.9_0402_1%R18 49.9_0402_1%
1 2
R9 68_0402_5%R9 68_0402_5%
1 2
R36 1K_0402_5%R36 1K_0402_5%
D D
to avoid noise
C C
+VTT
C482
C482
1000P_0402_50V7K
1000P_0402_50V7K
1 2
12
R10
R10 68_0402_5%
68_0402_5%
@
@
H_CPURST#
H_PWRGOOD
PECI33
+VTT
H_THERMTRIP#33
XDP_RST#_R
PMSYNCH30
H_PWRGOOD33
DRAMPWROK30
VTTPWROK_CPU52
BUF_PLT_RST#32
DRAMPWROK
4
1 2
R1 20_0402_1%R1 20_0402_1%
1 2
R2 20_0402_1%R2 20_0402_1%
1 2
R4 49.9_0402_1%R4 49.9_0402_1%
1 2
R3 49.9_0402_1%R3 49.9_0402_1%
T41PAD T41PAD
H_PWRGOOD1_R
12
R250_0402_5% R250_0402_5%
TAPPWRGD
R301.5K_0402_1% R301.5K_0402_1%
R31
R31
750_0402_1%
750_0402_1%
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TP_SKTOCC#
CATERR#
H_PROCHOT#_D
H_CPURST#
JCPUB
JCPUB
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPW RGOOD_1
AN27
VCCPW RGOOD_0
AK13
SM_DRAMPW ROK
AM15
VTTPWR GOOD
AM26
TAPPWR GOOD
AL14
RSTIN#
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
@
@
3
MISC THERMAL
MISC THERMAL
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
PM_EXT_TS#[0] PM_EXT_TS#[1]
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
PRDY# PREQ#
TCK TMS
TRST#
TDO
TDI_M
TDO_M
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
TDI
A16 B16
CLK_CPU_XDP_R
AR30
CLK_CPU_XDP#_R
AT30
E16 D16
A18 A17
SM_DRAMRST#_CPU
F6
SM_RCOMP_0
AL1
SM_RCOMP_1
AM1
SM_RCOMP_2
AN1
PM_EXTTS#0
AN15 AP15
XDP_PRDY#
AT28
XDP_PREQ#
AP27
XDP_TCK
AN28
XDP_TMS
AP28
XDP_TRST#
AT27
XDP_TDI_R
AT29
XDP_TDO_R
AR27
XDP_TDI_M
AR29
XDP_TDO_M
AP29
AN25
XDP_BPM#0
AJ22
XDP_BPM#1
AK22
XDP_BPM#2
AK24
XDP_BPM#3
AJ24 AJ25 AH22 AK23 AH23
CLK_CPU_BCLK 33 CLK_CPU_BCLK# 33
1 2
R41 0_0402_5%@R41 0_0402_5%@
1 2
R42 0_0402_5%@R42 0_0402_5%@
CLK_PEG 29 CLK_PEG# 29
Unused by Clarksfield rPGA989
R6 100_0402_1%R6 100_0402_1%
1 2
R7 24.9_0402_1%R7 24.9_0402_1%
1 2
R8 130_0402_1%R8 130_0402_1%
1 2
12
R12 0_0402_5%R12 0_0402_5%
Routed as a single daisy chain
R312 1K_0402_5 %R312 1K_0402_5 %
XDP_PRDY#
XDP_PREQ#
XDP_TCK XDP_TCK_R
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_DBRESET#
Reserved for EMI;don't open solder if placing under H=0
2
CLK_CPU_XDP CLK_CPU_XDP#
DDR3 Compensation Signals Layout Note:Please these resistors near Processor
PM_EXTTS# 11,12
12
+3VS
XDP_DBRESET# 30
1 2
R40 0_0402_5%@R40 0_0402_5%@
1 2
R54 0_0402_5%@R54 0_0402_5%@
1 2
R449 0_0402_5%@R449 0_0402_5%@
1 2
R450 0_0402_5%@R450 0_0402_5%@
1 2
R454 0_0402_5%@R454 0_0402_5%@
1 2
R452 0_0402_5%@R452 0_0402_5%@
1 2
R451 0_0402_5%@R451 0_0402_5%@
1 2
R455 0_0402_5%@R455 0_0402_5%@
1 2
R456 0_0402_5%@R456 0_0402_5%@
XDP_PRDY#_R
XDP_PREQ#_R
XDP_TMS_RXDP_TMS
XDP_BPM#0_RXDP_BPM#0
XDP_BPM#1_R
XDP_BPM#2_R
XDP_BPM#3_R
XDP_DBRESET#_R
1
+VTT
PM_EXTTS#0
PM_EXTTS#_RPM_EXTTS#_R
XDP_TDI_R XDP_TDI
XDP_TDO_M
0_0402_5%
0_0402_5%
XDP_TDI_M
XDP_TDO_R
R15 10K_0402_5%R15 10K_0402_5%
R13 10K_0402_5%R13 10K_0402_5%
1 2
R20 0_0402_5%R20 0_0402_5%
@
@
1 2
R21 0_0402_5%
R21 0_0402_5%
12
R23
R23
@
@
1 2
R26 0_0402_5%
R26 0_0402_5%
1 2
R27 0_0402_5%R27 0_0402_5%
12
12
XDP_TDO
JTAG MAPPING
Scan Chain (Default)
CPU Only
GMCH Only
STUFF -> R20, R23, R27 NO STUFF -> R21, R26
STUFF -> R20, R21 NO STUFF -> R23, R26, R27
STUFF -> R26, R27 NO STUFF -> R20, R21, R23
XDP Connector
B B
@
@
12
R19 0_0402_5%
R19 0_0402_5%
D
S
D
R123
R123
12
S
13
Q41
Q41
G
G
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
2
1
C160
C160
0.047U_0402_25V6K
0.047U_0402_25V6K
2
5
SM_DRAMRST#_CPU
100K_0402_5%
100K_0402_5%
A A
For S3 Power Reduction
SM_DRAMRST# 11,12
RST_GATE 33
VTTPWROK47,52
VTTPWROK
R29
R29 750_0402_1%
750_0402_1%
+3VALW
1 2
C253 0.1U_0402_16V4ZC253 0.1U_0402_16V4Z
5
U10
U10
1
P
IN1
4
O
2
IN2
G
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
3
12
R520_0402_5% @ R520_0402_5% @
4
R33 1.5K_0402_1%R33 1.5K_0402_1%
+1.5V_CPU
1 2
1 2
DRAMPWROK
R28
R28
1.1K_0402_1%
1.1K_0402_1%
@
@
DRAMPWROK
R29
R29 3K_0402_1%
3K_0402_1%
@
@
1
C414
C414 1000P_0402_50V7K
1000P_0402_50V7K
2
XDP_PREQ#_R XDP_PRDY#_R
XDP_BPM#0_R XDP_BPM#1_R
XDP_BPM#2_R
2
XDP_BPM#3_R
H_PWRGOOD_R TAPPWRGD_R CLK_CPU_XDP CLK_CPU_XDP#
XDP_RST#_R XDP_DBRESET#_R
XDP_TDO XDP_TRST# XDP_TDI XDP_TMS_R
XDP_TCK_R
H_PWRGOOD TAPPWRGD
+VTT
1
C1
C1
0.1U_0402_10V6K
0.1U_0402_10V6K
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL
THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL
THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2009/11/13 2010/01/23
2009/11/13 2010/01/23
2009/11/13 2010/01/23
2
@
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
R32 1K_0402_5%@R32 1K_0402_5%@
1 2 1 2
R35 0_0402_5%@R35 0_0402_5%@
R11
R11
51_0402_5%
51_0402_5%
Deciphered Date
Deciphered Date
Deciphered Date
12
R1451_0402_5% R1451_0402_5%
12
SFF-24Pin
JXDP
JXDP
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23 24
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
25
23
GND
26
24
GND
MOLEX_52435-2472
MOLEX_52435-2472
@
@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
CPU CLK/MISC/JTAG
CPU CLK/MISC/JTAG
CPU CLK/MISC/JTAG
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
1
5 61Tuesday, March 23, 2010
5 61Tuesday, March 23, 2010
5 61Tuesday, March 23, 2010
1.0
1.0
1.0
5
4
3
2
1
FAN Control Circuit
+5VS
1A
2
C3
C3
10U_080 5_10V4Z
D D
EN_DFAN 144
+FAN1
10mil
JCPUA
JCPUA
DMI_PTX_C RX_N030 DMI_PTX_C RX_N130 DMI_PTX_C RX_N230 DMI_PTX_C RX_N330
DMI_PTX_C RX_P030 DMI_PTX_C RX_P130 DMI_PTX_C RX_P230 DMI_PTX_C RX_P330
DMI_CTX_P RX_N030 DMI_CTX_P RX_N130
C C
DMI_CTX_P RX_N230 DMI_CTX_P RX_N330
DMI_CTX_P RX_P030 DMI_CTX_P RX_P130 DMI_CTX_P RX_P230 DMI_CTX_P RX_P330
FDI_CTX_P RX_N030 FDI_CTX_P RX_N130 FDI_CTX_P RX_N230 FDI_CTX_P RX_N330 FDI_CTX_P RX_N430 FDI_CTX_P RX_N530 FDI_CTX_P RX_N630 FDI_CTX_P RX_N730
FDI_CTX_P RX_P030 FDI_CTX_P RX_P130 FDI_CTX_P RX_P230 FDI_CTX_P RX_P330 FDI_CTX_P RX_P430 FDI_CTX_P RX_P530 FDI_CTX_P RX_P630 FDI_CTX_P RX_P730
B B
FDI_FSYNC030 FDI_FSYNC130
FDI_INT3 0
FDI_LSYNC030 FDI_LSYNC130
A A
A24 C23 B22 A21
B24 D23 B23 A22
D24 G24
H23
D25
E23 G23
E22 D21 D19 D18 G21 E19
G18
D22 C21 D20 C18 G22 E20
G19
E17
C17
D17
F23
F24
F21
F20
F17
F18
DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]
DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]
DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]
DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]
FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7]
FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7]
FDI_FSYNC[0] FDI_FSYNC[1]
FDI_INT
FDI_LSYNC[0] FDI_LSYNC[1]
DMI Intel(R) FDI
DMI Intel(R) FDI
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]
PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8]
PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
PEG_COM P
B26 A26 B27
PEG_RBIAS
A25
PCIE_GTX_ C_CRX_N0
K35
PCIE_GTX_ C_CRX_N1
J34
PCIE_GTX_ C_CRX_N2
J33
PCIE_GTX_ C_CRX_N3
G35
PCIE_GTX_ C_CRX_N4
G32
PCIE_GTX_ C_CRX_N5
F34
PCIE_GTX_ C_CRX_N6
F31
PCIE_GTX_ C_CRX_N7
D35
PCIE_GTX_ C_CRX_N8
E33
PCIE_GTX_ C_CRX_N9
C33
PCIE_GTX_ C_CRX_N10
D32
PCIE_GTX_ C_CRX_N11
B32
PCIE_GTX_ C_CRX_N12
C31
PCIE_GTX_ C_CRX_N13
B28
PCIE_GTX_ C_CRX_N14
B30
PCIE_GTX_ C_CRX_N15
A31
PCIE_GTX_ C_CRX_P0
J35
PCIE_GTX_ C_CRX_P1
H34
PCIE_GTX_ C_CRX_P2
H33
PCIE_GTX_ C_CRX_P3
F35
PCIE_GTX_ C_CRX_P4
G33
PCIE_GTX_ C_CRX_P5
E34
PCIE_GTX_ C_CRX_P6
F32
PCIE_GTX_ C_CRX_P7
D34
PCIE_GTX_ C_CRX_P8
F33
PCIE_GTX_ C_CRX_P9
B33
PCIE_GTX_ C_CRX_P10
D31
PCIE_GTX_ C_CRX_P11
A32
PCIE_GTX_ C_CRX_P12
C30
PCIE_GTX_ C_CRX_P13
A28
PCIE_GTX_ C_CRX_P14
B29
PCIE_GTX_ C_CRX_P15
A30
PCIE_CTX_ GRX_N0
L33
PCIE_CTX_ GRX_N1
M35
PCIE_CTX_ GRX_N2
M33
PCIE_CTX_ GRX_N3
M30
PCIE_CTX_ GRX_N4
L31
PCIE_CTX_ GRX_N5
K32
PCIE_CTX_ GRX_N6
M29
PCIE_CTX_ GRX_N7
J31
PCIE_CTX_ GRX_N8
K29
PCIE_CTX_ GRX_N9
H30
PCIE_CTX_ GRX_N10
H29
PCIE_CTX_ GRX_N11
F29
PCIE_CTX_ GRX_N12
E28
PCIE_CTX_ GRX_N13
D29
PCIE_CTX_ GRX_N14
D27
PCIE_CTX_ GRX_N15
C26
PCIE_CTX_ GRX_P0
L34
PCIE_CTX_ GRX_P1
M34
PCIE_CTX_ GRX_P2
M32
PCIE_CTX_ GRX_P3
L30
PCIE_CTX_ GRX_P4
M31
PCIE_CTX_ GRX_P5
K31
PCIE_CTX_ GRX_P6
M28
PCIE_CTX_ GRX_P7
H31
PCIE_CTX_ GRX_P8
K28
PCIE_CTX_ GRX_P9
G30
PCIE_CTX_ GRX_P10
G29
PCIE_CTX_ GRX_P11
F28
PCIE_CTX_ GRX_P12
E27
PCIE_CTX_ GRX_P13
D28
PCIE_CTX_ GRX_P14
C27
PCIE_CTX_ GRX_P15
C25
1 2
R38 4 9.9_0402_1%R38 4 9.9_0402_1%
1 2
R39 7 50_0402_1%R39 7 50_0402_1%
PCIE_GTX_ C_CRX_N[0..15] 13
PCIE_GTX_ C_CRX_P[0..15] 13
C39 0.1U_040 2_16V7KC39 0.1U_040 2_16V7K
1 2
C40 0.1U_040 2_16V7KC40 0.1U_040 2_16V7K
1 2
C41 0.1U_040 2_16V7KC41 0.1U_040 2_16V7K
1 2
C42 0.1U_040 2_16V7KC42 0.1U_040 2_16V7K
1 2
C43 0.1U_040 2_16V7KC43 0.1U_040 2_16V7K
1 2
C44 0.1U_040 2_16V7KC44 0.1U_040 2_16V7K
1 2
C45 0.1U_040 2_16V7KC45 0.1U_040 2_16V7K
1 2
C46 0.1U_040 2_16V7KC46 0.1U_040 2_16V7K
1 2
C47 0.1U_040 2_16V7KC47 0.1U_040 2_16V7K
1 2
C48 0.1U_040 2_16V7KC48 0.1U_040 2_16V7K
1 2
C49 0.1U_040 2_16V7KC49 0.1U_040 2_16V7K
1 2
C50 0.1U_040 2_16V7KC50 0.1U_040 2_16V7K
1 2
C51 0.1U_040 2_16V7KC51 0.1U_040 2_16V7K
1 2
C52 0.1U_040 2_16V7KC52 0.1U_040 2_16V7K
1 2
C53 0.1U_040 2_16V7KC53 0.1U_040 2_16V7K
1 2
C54 0.1U_040 2_16V7KC54 0.1U_040 2_16V7K
1 2
C55 0.1U_040 2_16V7KC55 0.1U_040 2_16V7K
1 2
C56 0.1U_040 2_16V7KC56 0.1U_040 2_16V7K
1 2
C57 0.1U_040 2_16V7KC57 0.1U_040 2_16V7K
1 2
C58 0.1U_040 2_16V7KC58 0.1U_040 2_16V7K
1 2
C59 0.1U_040 2_16V7KC59 0.1U_040 2_16V7K
1 2
C60 0.1U_040 2_16V7KC60 0.1U_040 2_16V7K
1 2
C61 0.1U_040 2_16V7KC61 0.1U_040 2_16V7K
1 2
C62 0.1U_040 2_16V7KC62 0.1U_040 2_16V7K
1 2
C63 0.1U_040 2_16V7KC63 0.1U_040 2_16V7K
1 2
C64 0.1U_040 2_16V7KC64 0.1U_040 2_16V7K
1 2
C65 0.1U_040 2_16V7KC65 0.1U_040 2_16V7K
1 2
C66 0.1U_040 2_16V7KC66 0.1U_040 2_16V7K
1 2
C67 0.1U_040 2_16V7KC67 0.1U_040 2_16V7K
1 2
C68 0.1U_040 2_16V7KC68 0.1U_040 2_16V7K
1 2
C69 0.1U_040 2_16V7KC69 0.1U_040 2_16V7K
1 2
C70 0.1U_040 2_16V7KC70 0.1U_040 2_16V7K
1 2
PCIE_CTX_ C_GRX_N0 PCIE_CTX_ C_GRX_N1 PCIE_CTX_ C_GRX_N2 PCIE_CTX_ C_GRX_N3 PCIE_CTX_ C_GRX_N4 PCIE_CTX_ C_GRX_N5 PCIE_CTX_ C_GRX_N6 PCIE_CTX_ C_GRX_N7 PCIE_CTX_ C_GRX_N8
PCIE_CTX_ C_GRX_N9 PCIE_CTX_ C_GRX_N10 PCIE_CTX_ C_GRX_N11 PCIE_CTX_ C_GRX_N12 PCIE_CTX_ C_GRX_N13 PCIE_CTX_ C_GRX_N14 PCIE_CTX_ C_GRX_N15
PCIE_CTX_ C_GRX_P0 PCIE_CTX_ C_GRX_P1 PCIE_CTX_ C_GRX_P2 PCIE_CTX_ C_GRX_P3 PCIE_CTX_ C_GRX_P4 PCIE_CTX_ C_GRX_P5 PCIE_CTX_ C_GRX_P6 PCIE_CTX_ C_GRX_P7 PCIE_CTX_ C_GRX_P8
PCIE_CTX_ C_GRX_P9 PCIE_CTX_ C_GRX_P10 PCIE_CTX_ C_GRX_P11 PCIE_CTX_ C_GRX_P12 PCIE_CTX_ C_GRX_P13 PCIE_CTX_ C_GRX_P14 PCIE_CTX_ C_GRX_P15
PCIE_CTX_ C_GRX_N[0..15] 13
PCIE_CTX_ C_GRX_P[0..15] 13
1
C5
C5 10U_080 5_10V4Z
10U_080 5_10V4Z
2
1 2 3 4
10U_080 5_10V4Z
U1
U1
EN
GND
VIN
GND
VOUT
GND
VSET
GND
APL5607 KI-TRG_SO8
APL5607 KI-TRG_SO8
1
8 7 6 5
+FAN1
1
C428
C428
1000P_0 402_50V7K
1000P_0 402_50V7K
2
@
@
1 2 3
4 5
ACES_85 204-0300N
ACES_85 204-0300N
R34 10K_0 402_5%R34 10K_0 402_5%
2
C6
C6
0.01U_04 02_16V7K
0.01U_04 02_16V7K
1
@
@
JFAN
JFAN
@
@
1 2 3
GND GND
12
FAN_SPE ED1 44
+3VS
IC,AUB_CFD _rPGA,R0P9
IC,AUB_CFD _rPGA,R0P9
@
@
5
4
Security Class ification
Security Class ification
Security Class ification
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/11/ 13 2010/01/ 23
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
CPU DMI/FDI/PEG
CPU DMI/FDI/PEG
CPU DMI/FDI/PEG
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
6 61Monday, March 22 , 2010
6 61Monday, March 22 , 2010
6 61Monday, March 22 , 2010
1
1.0
1.0
1.0
5
JCPUC
JCPUC
DDR_A_D [0..63]11
4
3
JCPUD
JCPUD
DDR_B_D [0..63]12
2
1
AA6
SA_CK[0]
AA7
SA_CK#[0]
P7
DDR_A_D 0 DDR_A_D 1
D D
C C
B B
DDR_A_B S011 DDR_A_B S111 DDR_A_B S211
DDR_A_C AS#11 DDR_A_R AS#11
DDR_A_W E#11
DDR_A_D 2 DDR_A_D 3 DDR_A_D 4 DDR_A_D 5 DDR_A_D 6 DDR_A_D 7 DDR_A_D 8 DDR_A_D 9 DDR_A_D 10 DDR_A_D 11 DDR_A_D 12 DDR_A_D 13 DDR_A_D 14 DDR_A_D 15 DDR_A_D 16 DDR_A_D 17 DDR_A_D 18 DDR_A_D 19 DDR_A_D 20 DDR_A_D 21 DDR_A_D 22 DDR_A_D 23 DDR_A_D 24 DDR_A_D 25 DDR_A_D 26 DDR_A_D 27 DDR_A_D 28 DDR_A_D 29 DDR_A_D 30 DDR_A_D 31 DDR_A_D 32 DDR_A_D 33 DDR_A_D 34 DDR_A_D 35 DDR_A_D 36 DDR_A_D 37 DDR_A_D 38 DDR_A_D 39 DDR_A_D 40 DDR_A_D 41 DDR_A_D 42 DDR_A_D 43 DDR_A_D 44 DDR_A_D 45 DDR_A_D 46 DDR_A_D 47 DDR_A_D 48 DDR_A_D 49 DDR_A_D 50 DDR_A_D 51 DDR_A_D 52 DDR_A_D 53 DDR_A_D 54 DDR_A_D 55 DDR_A_D 56 DDR_A_D 57 DDR_A_D 58 DDR_A_D 59 DDR_A_D 60 DDR_A_D 61 DDR_A_D 62 DDR_A_D 63
A10 C10
B10 D10 E10
F10
H10
G10
AH5
AF5 AK6 AK7
AF6 AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8 AN8
AM10 AR11
AL11
AM9 AN9
AT11 AP12 AM12 AN12 AM13
AT14
AT12
AL13 AR14 AP14
AC3 AB2
AE1 AB3 AE9
G8
G7
J10
M6 M8
C7 A7
A8 D8
E6 F7 E9 B7 E7 C6
K7 J8
J7
L7
L9 L6 K8 N8 P9
U7
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
SA_CKE[0]
Y6
SA_CK[1]
Y5
SA_CK#[1]
P6
SA_CKE[1]
AE2
SA_CS#[0]
AE8
SA_CS#[1]
AD8
SA_ODT[0]
AF9
SA_ODT[1]
Unused by Clarksfield rPGA989
DDR_A_D M0
B9
SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
D7 H7 M7 AG6 AM7 AN10 AN13
C9 F8 J9 N9 AH7 AK9 AP11 AT13
C8 F9 H9 M9 AH8 AK10 AN11 AR13
Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9
DDR_A_D M1 DDR_A_D M2 DDR_A_D M3 DDR_A_D M4 DDR_A_D M5 DDR_A_D M6 DDR_A_D M7
DDR_A_D QS#0 DDR_A_D QS#1 DDR_A_D QS#2 DDR_A_D QS#3 DDR_A_D QS#4 DDR_A_D QS#5 DDR_A_D QS#6 DDR_A_D QS#7
DDR_A_D QS0 DDR_A_D QS1 DDR_A_D QS2 DDR_A_D QS3 DDR_A_D QS4 DDR_A_D QS5 DDR_A_D QS6 DDR_A_D QS7
DDR_A_M A0 DDR_A_M A1 DDR_A_M A2 DDR_A_M A3 DDR_A_M A4 DDR_A_M A5 DDR_A_M A6 DDR_A_M A7 DDR_A_M A8
DDR_A_M A9 DDR_A_M A10 DDR_A_M A11 DDR_A_M A12 DDR_A_M A13 DDR_A_M A14 DDR_A_M A15
DDRA_CL K0 11 DDRB_CL K0 12 DDRA_CL K0# 11 DDRA_CK E0 11 DDRB_CKE0 12
DDRA_CL K1 11 DDRA_CL K1# 11 DDRA_CK E1 11
DDRA_SC S0# 11 DDRA_SC S1# 11 DDRB_SC S1# 12
DDRA_OD T0 11 DDRB_OD T0 12 DDRA_OD T1 11 DDRB_OD T1 12
DDR_A_D M[0..7] 11
DDR_A_D QS#[0..7] 11
DDR_A_D QS[0..7] 1 1
DDR_A_M A[0..15] 11
DDR_B_B S012 DDR_B_B S112 DDR_B_B S212
DDR_B_C AS#12 DDR_B_R AS#12
DDR_B_W E#12
DDR_B_D 0 DDR_B_D 1 DDR_B_D 2 DDR_B_D 3 DDR_B_D 4 DDR_B_D 5 DDR_B_D 6 DDR_B_D 7 DDR_B_D 8 DDR_B_D 9 DDR_B_D 10 DDR_B_D 11 DDR_B_D 12 DDR_B_D 13 DDR_B_D 14 DDR_B_D 15 DDR_B_D 16 DDR_B_D 17 DDR_B_D 18 DDR_B_D 19 DDR_B_D 20 DDR_B_D 21 DDR_B_D 22 DDR_B_D 23 DDR_B_D 24 DDR_B_D 25 DDR_B_D 26 DDR_B_D 27 DDR_B_D 28 DDR_B_D 29 DDR_B_D 30 DDR_B_D 31 DDR_B_D 32 DDR_B_D 33 DDR_B_D 34 DDR_B_D 35 DDR_B_D 36 DDR_B_D 37 DDR_B_D 38 DDR_B_D 39 DDR_B_D 40 DDR_B_D 41 DDR_B_D 42 DDR_B_D 43 DDR_B_D 44 DDR_B_D 45 DDR_B_D 46 DDR_B_D 47 DDR_B_D 48 DDR_B_D 49 DDR_B_D 50 DDR_B_D 51 DDR_B_D 52 DDR_B_D 53 DDR_B_D 54 DDR_B_D 55 DDR_B_D 56 DDR_B_D 57 DDR_B_D 58 DDR_B_D 59 DDR_B_D 60 DDR_B_D 61 DDR_B_D 62 DDR_B_D 63
AF3 AG1
AK1 AG4 AG3
AH4 AK3
AK4 AM6 AN2
AK5
AK2 AM4 AM3
AP3 AN5
AT4 AN6 AN4 AN3
AT5
AT6 AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
AB1
AC5
AC6
AJ3
AJ4
B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3
G4
H6
G2
J6
J3 G1 G5
J2
J1
J5
K2
L3 M1
K5 K4
M4
N5
W5
R7
Y7
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CK[0] SB_CK#[0] SB_CKE[0]
SB_CK[1] SB_CK#[1] SB_CKE[1]
SB_CS#[0] SB_CS#[1]
SB_ODT[0] SB_ODT[1]
SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
W8 W9 M3
V7 V6 M2
AB8 AD6
AC7 AD1
D4 E1 H3 K1 AH1 AL2 AR4 AT8
DDR_B_D M0 DDR_B_D M1 DDR_B_D M2 DDR_B_D M3 DDR_B_D M4 DDR_B_D M5 DDR_B_D M6 DDR_B_D M7
DDRB_CL K0# 12
DDRB_CL K1 12 DDRB_CL K1# 12 DDRB_CK E1 12
DDRB_SC S0# 12
DDR_B_D M[0..7] 12
Unused by Clarksfield rPGA989
D5 F4 J4 L4 AH2 AL4 AR5 AR8
C5 E3 H4 M5 AG2 AL5 AP5 AR7
U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1
DDR_B_D QS#0 DDR_B_D QS#1 DDR_B_D QS#2 DDR_B_D QS#3 DDR_B_D QS#4 DDR_B_D QS#5 DDR_B_D QS#6 DDR_B_D QS#7
DDR_B_D QS0 DDR_B_D QS1 DDR_B_D QS2 DDR_B_D QS3 DDR_B_D QS4 DDR_B_D QS5 DDR_B_D QS6 DDR_B_D QS7
DDR_B_M A0 DDR_B_M A1 DDR_B_M A2 DDR_B_M A3 DDR_B_M A4 DDR_B_M A5 DDR_B_M A6 DDR_B_M A7 DDR_B_M A8
DDR_B_M A9 DDR_B_M A10 DDR_B_M A11 DDR_B_M A12 DDR_B_M A13 DDR_B_M A14 DDR_B_M A15
DDR_B_D QS#[0..7] 12
DDR_B_D QS[0..7] 1 2
DDR_B_M A[0..15] 12
IC,AUB_CFD _rPGA,R0P9
IC,AUB_CFD _rPGA,R0P9
@
@
A A
Security Class ification
Security Class ification
Security Class ification
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/11/ 13 2010/01/ 23
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
IC,AUB_CFD _rPGA,R0P9
IC,AUB_CFD _rPGA,R0P9
@
@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
CPU DDRIII
CPU DDRIII
CPU DDRIII
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
7 61Monday, March 22 , 2010
7 61Monday, March 22 , 2010
7 61Monday, March 22 , 2010
1
1.0
1.0
1.0
5
4
3
2
1
Material Note (+VTT):
JCPUF
JCPUF
+CPU_CORE
D D
C C
B B
A A
Clarksfield: 65A Clarksfield: 21A
Auburndale:48A
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26
VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
SENSE LINES
SENSE LINES
Auburndale:18A
VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8
VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31
1.1V RAIL POWER
1.1V RAIL POWER
VTT0_32
VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VTT_SELECT
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
PSI#
AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15
AN33
AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34
G15
AN35
AJ34 AJ35
B15 A15
330uF/ 6mohm, number are 3, power x1, HW x2
(Place these capacitors under CPU socket Edge, top layer) (Place these capacitors between inductor and socket on Bottom)
+
+
C144 330U_2.5V_M_R1 7
C144 330U_2.5V_M_R1 7
1 2
+
+
C159 330U_2.5V_M_R1 7
C159 330U_2.5V_M_R1 7
1 2
SF000002Z00 H=4.5
C87 22U_0805_6.3V6MC87 22U_0805_6.3V6M
1 2
C91 22U_0805_6.3V6MC91 22U_0805_6.3V6M
1 2
H_PSI# 56
CPU_VID0 56 CPU_VID1 56 CPU_VID2 56 CPU_VID3 56 CPU_VID4 56 CPU_VID5 56
H_DPRSLPVR_R
H_VTTSELECT
VCCSENSE_R
1 2
R62 0_0402_5%R62 0_0402_5%
R65 0_0402_5%R65 0_0402_5%
1 2
R66 0_0402_5%R66 0_0402_5%
1 2
VTT_SENSE 52 VSS_SENSE_VTT 52
CPU_VID6 56 H_DPRSLPVR 56
IMVP_IMON 56
T56 PADT56 PAD
+VTT
C81 10U_0805_10V4KC81 10U _0805_10V4K
1 2
C83 10U_0805_10V4KC83 10U _0805_10V4K
1 2
C85 10U_0805_10V4KC85 10U _0805_10V4K
1 2
C89 10U_0805_10V4KC89 10U _0805_10V4K
1 2
C88 10U_0805_10V4KC88 10U _0805_10V4K
1 2
C90 10U_0805_10V4KC90 10U _0805_10V4K
1 2
C92 10U_0805_10V4KC92 10U _0805_10V4K
1 2
C94 10U_0805_10V4K@C94 10U_0805_10V4K@
1 2
Add on 2/8 to improve ESD
+CPU_CORE
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C127
C127
C120
C128
C128
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C120
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CRB default setting: VID[6:0]=[0100111]
VTT Rail
Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V
H_VTTSELECT = low, 1.1V
H_VTTSELECT = high, 1.05V
1 2
R64 1 00_0402_1%R64 1 00_0402_1%
VCCSENSE VSSSENSEVSSSENSE_R
1 2
R67 1 00_0402_1%R67 1 00_0402_1%
near CPU
VCCSENSE 56 VSSSENSE 56
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C118
C118
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+CPU_CORE
C119
C119
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C117
C117
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C129
C129
+CPU_CORE
10U_0805_10V4K
10U_0805_10V4K
1
C71
C71
2
10U_0805_10V4K
10U_0805_10V4K
1
C72
C72
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C73
C73
2
1
C74
C74
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C75
C75
2
1
C76
C76
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C77
C77
2
1
C78
C78
2
10U_0805_10V4K
10U_0805_10V4K
1
C79
C79
2
(Place these capacitors under CPU socket, top layer)
+CPU_CORE
10U_0805_10V4K
10U_0805_10V4K
1
C98
C98
2
10U_0805_10V4K
10U_0805_10V4K
1
C99
C99
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C100
C100
2
1
C101
C101
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C102
C102
2
1
1
C104
C104
C103
C103
2
2
10U_0805_10V4K
10U_0805_10V4K
(Place these capacitors on CPU cavity, Bottom Layer)
+CPU_CORE
22U_0805_6.3V6M
1
1
C107
C107
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C113
C113
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
C108
C108
22U_0805_6.3V6M
22U_0805_6.3V6M
C114
C114
22U_0805_6.3V6M
22U_0805_6.3V6M
1
2
1
C105
C105
C106
C106
2
22U_0805_6.3V6M
22U_0805_6.3V6M
+CPU_CORE
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C112
C112
C111
C111
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C109
C109
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C115
C115
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C110
C110
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C116
C116
2
TOP side (under inductor)
+CPU_CORE
1
+
+
C121
C121
330U_D2_2.5VM_R9M
330U_D2_2.5VM_R9M
2
SGA00002680
330U_D2_2.5VM_R9M
330U_D2_2.5VM_R9M
1
+
+
C123
C122
C122
C123
330U_D2_2.5VM_R9M
330U_D2_2.5VM_R9M
2
330U_D2_2.5VM_R9M
330U_D2_2.5VM_R9M
1
+
+
C124
C124
2
1
+
+
2
Check list:
+CPU_CORE: 6x 470uF, 12x 22uF, 17x 10uF
+VTT: 4x 330uF, 7x 22uF, 8x 10uF
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
@
@
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2009/11/13 2010/01/23
2009/11/13 2010/01/23
2009/11/13 2010/01/23
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
CPU POWER-1
CPU POWER-1
CPU POWER-1
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
1
8 61Monday, March 22, 2010
8 61Monday, March 22, 2010
8 61Monday, March 22, 2010
1.0
1.0
1.0
5
4
3
2
1
For S3 Power Reduction
8
D
7
D
6
D
5
D
R417
R417 820K_04 02_5%
820K_04 02_5%
PJ30
@PJ30
@
112
PJ31
@PJ31
@
112
+1.5V+1.5V _CPU
R418
R418
1 2
220K_04 02_5%
220K_04 02_5%
61
Q46A
Q46A
SUSP
2
2N7002D W-T/R7_SOT3 63-6
2N7002D W-T/R7_SOT3 63-6
+VSB
SUSP 47,5 5
+1.5V
Q33
Q33
1
S
2
S
1
C179
R424
R424
470_080 5_5%
470_080 5_5%
1 2 3
Q46B
Q46B
SUSP
5
4
To prevent glit ch issue
1 2
R86 330_040 2_5%R86 330_040 2_5%
22U_080 5_6.3V6M
22U_080 5_6.3V6M
1
1
C138
C138
C137
C137
2
2
1U_0402 _6.3V4Z
1U_0402 _6.3V4Z
1
C155
C155
C154
C154
2
22U_080 5_6.3V6M
22U_080 5_6.3V6M
VAXG_SENSE
VSSAXG_SENSE
LINES
LINES
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V1.8V
1.1V1.8V
+GFX_CO RE
GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]
GFX_VR_EN
GFX_IMON
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18
VTT0_59 VTT0_60 VTT0_61 VTT0_62
VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68
VCCPLL1 VCCPLL2 VCCPLL3
VCC_AXG _SENSE
AR22
VSS_AXG _SENSE
AT22
AM22 AP22 AN22 AP23 AM23 AP24 AN24
AR25
GFXVR_D PRSLPVR
AT25 AM24
Reserved for Cl arksfield
AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1
P10 N10 L10 K10
J22 J20 J18 H21 H20 H19
L26 L27 M26
1U_0402 _6.3V4Z
1U_0402 _6.3V4Z
C133
C133
1U_0402 _6.3V4Z
1U_0402 _6.3V4Z
+1.8VS_H _PLL
C151
C151
2N7002D W-T/R7_SOT3 63-6
2N7002D W-T/R7_SOT3 63-6
VCC_AXG _SENSE 57 VSS_AXG _SENSE 57
GFXVR_V ID_0 57 GFXVR_V ID_1 57 GFXVR_V ID_2 57 GFXVR_V ID_3 57 GFXVR_V ID_4 57 GFXVR_V ID_5 57 GFXVR_V ID_6 57
GFXVR_E N 57
PADT8PAD
T8
GFXVR_IMO N 57
R687 1K_0402 _5%
R687 1K_0402 _5%
1
2
+VTT
1
C143
C143
10U_080 5_10V4K
10U_080 5_10V4K
2
1
C145
C145
22U_080 5_6.3V6M
22U_080 5_6.3V6M
2
12
@
@
1U_0402 _6.3V4Z
1
1
C135
C135
2
2
1U_0402 _6.3V4Z
1U_0402 _6.3V4Z
1U_0402 _6.3V4Z
C136
C136
1U_0402 _6.3V4Z
1U_0402 _6.3V4Z
C134
C134
(Place these capacitors under CPU socket Edge, top layer)
+VTT
(Place these capacitors under CPU socket, top layer)
1U_0402 _6.3V4Z
1U_0402 _6.3V4Z
1
C152
C152
2
2.2U_060 3_6.3V4Z
2.2U_060 3_6.3V4Z
1
C153
C153
2
1
2
4.7U_060 3_6.3V6K
4.7U_060 3_6.3V6K
VCC_AXG _SENSE
JCPUG
JCPUG
VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36
VTT1_45 VTT1_46 VTT1_47
VSS_AXG _SENSE
D D
+GFX_CO RE
1U_0402 _6.3V4Z
22U_080 5_6.3V6M
22U_080 5_6.3V6M
SGA00002680
330U_D2 _2.5VM_R9M
330U_D2 _2.5VM_R9M
C C
B B
C218
C218
1
1
+
+
2
2
22U_080 5_6.3V6M
22U_080 5_6.3V6M
C140
C140
1
C150
C150
2
1U_0402 _6.3V4Z
1
C125
C125
2
1U_0402 _6.3V4Z
1U_0402 _6.3V4Z
22U_080 5_6.3V6M
22U_080 5_6.3V6M
1
C158
C158
2
10U_080 5_6.3V6M
10U_080 5_6.3V6M
C141
C141
1
2
+VTT
C148
C148
1
2
1
C126
C126 10U_080 5_6.3V6M
10U_080 5_6.3V6M
2
1
C142
C142
22U_080 5_6.3V6M
22U_080 5_6.3V6M
2
AT21 AT19 AT18
AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16
AL21
AL19
AL18
AL16 AK21 AK19 AK18 AK16
AJ21
AJ19
AJ18
AJ16 AH21 AH19 AH18 AH16
H25
J24 J23
1 2
R509 10 0_0402_1%R509 10 0_0402_1%
1 2
R510 10 0_0402_1%R510 10 0_0402_1%
Close to CPU
SENSE
SENSE
GRAPHICS
GRAPHICS
Clarksfield: 5A
Auburndale:3A
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
Clarksfield: 21A
+VTT
1
1
C147
2
C147
22U_080 5_6.3V6M
22U_080 5_6.3V6M
2
C146
C146
22U_080 5_6.3V6M
22U_080 5_6.3V6M
(Place these capacitors under CPU socket, top layer)
G28 G27 G26
K26
H27
F26 E26 E25
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58
Auburndale:18A
Clarksfield: 1.35A
Auburndale:1.35A
IC,AUB_CFD _rPGA,R0P9
IC,AUB_CFD _rPGA,R0P9
@
@
A A
C179
10U_080 5_10V4K
10U_080 5_10V4K
2
0.1U_040 2_25V6
0.1U_040 2_25V6
1
1
C139
C139
2
2
22U_080 5_6.3V6M
22U_080 5_6.3V6M
R71 0_0805_ 5%R71 0_08 05_5%
+1.5V_CP U
1
+
+
2
12
3
S
4
G
FDS6676 AS_SO8
FDS6676 AS_SO8
1
C472
C472
2
C205 0.1 U_0402_16V4ZC205 0.1 U_0402_16V4Z
C186 0.1 U_0402_16V4ZC186 0.1 U_0402_16V4Z
C185 0.1 U_0402_16V4ZC185 0.1 U_0402_16V4Z
C180 0.1 U_0402_16V4ZC180 0.1 U_0402_16V4Z
C216
C216
330U_D2 _2.5VM_R9M
330U_D2 _2.5VM_R9M
SGA00002680
+1.8VS
12
1 2
1 2
1 2
1 2
2
JUMP_43 X79
JUMP_43 X79
2
JUMP_43 X79
JUMP_43 X79
Security Class ification
Security Class ification
Security Class ification
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/11/ 13 2010/01/ 23
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
B
B
B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
CPU POWER-2
CPU POWER-2
CPU POWER-2
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
9 61Monday, March 22 , 2010
9 61Monday, March 22 , 2010
9 61Monday, March 22 , 2010
1
1.0
1.0
1.0
5
JCPUI
JCPUI
K27
VSS161
K9
VSS162
K6
VSS163
D D
C C
B B
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
VSS196
E24
VSS197
E21
VSS198
E18
VSS199
E13
VSS200
E11
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
D33
VSS205
D30
VSS206
D26
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
C34
VSS211
C32
VSS212
C29
VSS213
C28
VSS214
C24
VSS215
C22
VSS216
C20
VSS217
C19
VSS218
C16
VSS219
B31
VSS220
B25
VSS221
B21
VSS222
B18
VSS223
B17
VSS224
B13
VSS225
B11
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
A29
VSS230
A27
VSS231
A23
VSS232
A9
VSS233
IC,AUB_CFD _rPGA,R0P9
IC,AUB_CFD _rPGA,R0P9
@
@
VSS
VSS
NCTF
NCTF
VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7
AT35 AT1 AR34 B34 B2 B1 A35
H_NCTF1 H_NCTF2
H_NCTF6 H_NCTF7
PADT4PAD PADT5PAD
PADT6PAD PADT7PAD
4
JCPUH
JCPUH
AT20
VSS1
AT17
VSS2
AR31
VSS3
AR28
VSS4
AR26
VSS5
AR24
VSS6
AR23
VSS7
AR20
VSS8
AR17
VSS9
AR15
VSS10
AR12
VSS11
AR9
VSS12
AR6
VSS13
AR3
VSS14
AP20
VSS15
AP17
VSS16
AP13
VSS17
AP10
VSS18
AP7
VSS19
AP4
VSS20
AP2
VSS21
AN34
VSS22
AN31
VSS23
AN23
VSS24
AN20
VSS25
AN17
VSS26
AM29
VSS27
AM27
VSS28
AM25
VSS29
AM20
VSS30
AM17
VSS31
AM14
VSS32
AM11
VSS33
AM8
VSS34
AM5
VSS35
AM2
VSS36
AL34
VSS37
AL31
VSS38
AL23
VSS39
AL20
VSS40
AL17
VSS41
AL12
VSS42
AL9
VSS43
AL6
VSS44
AL3
VSS45
AK29
T4 T5
T6 T7
VSS46
AK27
VSS47
AK25
VSS48
AK20
VSS49
AK17
VSS50
AJ31
VSS51
AJ23
VSS52
AJ20
VSS53
AJ17
VSS54
AJ14
VSS55
AJ11
VSS56
AJ8
VSS57
AJ5
VSS58
AJ2
VSS59
AH35
VSS60
AH34
VSS61
AH33
VSS62
AH32
VSS63
AH31
VSS64
AH30
VSS65
AH29
VSS66
AH28
VSS67
AH27
VSS68
AH26
VSS69
AH20
VSS70
AH17
VSS71
AH13
VSS72
AH9
VSS73
AH6
VSS74
AH3
VSS75
AG10
VSS76
AF8
VSS77
AF4
VSS78
AF2
VSS79
AE35
VSS80
IC,AUB_CFD _rPGA,R0P9
IC,AUB_CFD _rPGA,R0P9
@
@
VSS
VSS
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
3
AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30
2
PAD
PAD
T54
T54
PAD
PAD
T55
T55
WW41 Recommend not pull down PCIE2.0 Jitter is over on ES1
CFG0
R743.0 1K_0402_1% @R743.01K_04 02_1% @
1 2
1 2 1 2
CFG1 CFG2 CFG3
R753.0 1K_0402_1% @R753.01K_04 02_1% @
CFG4
R763.0 1K_0402_1% @R763.01K_04 02_1% @
CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11
CFG13 CFG14 CFG15 CFG16 CFG17 CFG18
Reserve via for test
RSVD17 RSVD18
CFG0 - PCI-Expr ess Configurat ion Select
*1:Single PEG 0:Bifurcation e nabled
CFG3 - PCI-Expr ess Static Lan e Reversal
*1 :Normal Oper ation 0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
CFG4 - Display Port Presence
*1:Disabled; No Physical Disp lay Port attached to Embedded Displ ay Port 0:Enabled; An e xternal Displa y Port device is co nnected to the Embedded Display Port
JCPUE
JCPUE
AP25
RSVD1
AL25
RSVD2
AL24
RSVD3
AL22
RSVD4
AJ33
RSVD5
AG9
RSVD6
M27
RSVD7
L28
RSVD8
J17
RSVD9
H17
RSVD10
G25
RSVD11
G17
RSVD12
E31
RSVD13
E30
RSVD14
AM30
CFG[0]
AM28
CFG[1]
AP31
CFG[2]
AL32
CFG[3]
AL30
CFG[4]
AM31
CFG[5]
AN29
CFG[6]
AM32
CFG[7]
AK32
CFG[8]
AK31
CFG[9]
AK28
CFG[10]
AJ28
CFG[11]
AN30
CFG[12]
AN32
CFG[13]
AJ32
CFG[14]
AJ29
CFG[15]
AJ30
CFG[16]
AK30
CFG[17]
H16
RSVD_TP_86
B19
RSVD15
A19
RSVD16
A20
RSVD17
B20
RSVD18
U9
RSVD19
T9
RSVD20
AC9
RSVD21
AB9
RSVD22
C1
RSVD_NCTF_23
A3
RSVD_NCTF_24
J29
RSVD26
J28
RSVD27
A34
RSVD_NCTF_28
A33
RSVD_NCTF_29
C35
RSVD_NCTF_30
B35
RSVD_NCTF_31
IC,AUB_CFD _rPGA,R0P9
IC,AUB_CFD _rPGA,R0P9
@
@
(SA_DIMM_VREF) (SB_DIMM_VREF)
RESERVED
RESERVED
RSVD32 RSVD33
RSVD34 RSVD35
RSVD36
RSVD_NCTF_37
RSVD38 RSVD39
RSVD_NCTF_40 RSVD_NCTF_41
RSVD_NCTF_42 RSVD_NCTF_43
RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52
RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57
RSVD58
RSVD_TP_59 RSVD_TP_60
KEY RSVD62 RSVD63 RSVD64 RSVD65
RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75
RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85
VSS
1
AJ13 AJ12
AH25 AK26
AL26 AR2
AJ26 AJ27
AP1 AT2
AT3 AR1
AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32
E15 F15 A2 D15 C15
RSVD64
AJ15
RSVD65
AH15
AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3
V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9
AP34
*:Default
A A
Security Class ification
Security Class ification
Security Class ification
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/11/ 13 2010/01/ 23
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
CPU GND/RESERVED/XDP
CPU GND/RESERVED/XDP
CPU GND/RESERVED/XDP
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
10 61Monday, March 22, 20 10
10 61Monday, March 22, 20 10
10 61Monday, March 22, 20 10
1
1.0
1.0
1.0
5
+VREF_D QA
1
C156
C156
C157
C157
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
D D
close to JDDRH.1
C C
B B
A A
+3VS
C181
C181
DDR_A_B S27
DDRA_CL K07 DDRA_CL K0#7
DDR_A_B S07
DDR_A_W E#7
DDR_A_C AS#7
DDRA_SC S1#7
1
C182
C182
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
DDR_A_D 0 DDR_A_D 1
DDR_A_D M0
DDR_A_D 2 DDR_A_D 3
DDR_A_D 8 DDR_A_D 9
DDR_A_D QS#1 DDR_A_D QS1
DDR_A_D 10 DDR_A_D 11
DDR_A_D 16 DDR_A_D 17
DDR_A_D QS#2 DDR_A_D QS2
DDR_A_D 18 DDR_A_D 19
DDR_A_D 24 DDR_A_D 25
DDR_A_D M3
DDR_A_D 26 DDR_A_D 27
DDR_A_M A12 DDR_A_M A9
DDR_A_MA8 DDR_A_M A5
DDR_A_M A3 DDR_A_M A1
DDR_A_M A10
DDR_A_M A13
DDR_A_D 32 DDR_A_D 33
DDR_A_D QS#4 DDR_A_D QS4
DDR_A_D 34 DDR_A_D 35
DDR_A_D 40 DDR_A_D 41
DDR_A_D M5
DDR_A_D 42 DDR_A_D 43
DDR_A_D 48 DDR_A_D 49
DDR_A_D QS#6 DDR_A_D QS6
DDR_A_D 50 DDR_A_D 51
DDR_A_D 56 DDR_A_D 57
DDR_A_D M7
DDR_A_D 58 DDR_A_D 59
R90
R90
1 2
10K_040 2_5%
10K_040 2_5%
1
2
R91
R91
0.1U_0402_16V4Z
0.1U_0402_16V4Z
5
10K_0402_5%
10K_0402_5%
+1.5V
+0.75VS
12
JDDRH
JDDRH
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
GND2
FOX_AS0 A626-UARN-7F_2 04P
FOX_AS0 A626-UARN-7F_2 04P
@
@
VREF_CA
VSS DQ4 DQ5 VSS
DQS0#
DQS0
VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
RESET#
VSS DQ14 DQ15
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1 RAS#
VDD
ODT0
VDD ODT1
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
EVENT#
SDA
SCL
VTT
BOSS1 BOSS2
A15 A14
A11
S0#
A7
A6 A4
A2 A0
NC
4
+1.5V
2
DDR_A_D 4
4
DDR_A_D 5
6 8
DDR_A_D QS#0
10
DDR_A_D QS0
12 14
DDR_A_D 6
16
DDR_A_D 7
18 20
DDR_A_D 12
22
DDR_A_D 13
24 26
DDR_A_D M1
28 30 32
DDR_A_D 14
34
DDR_A_D 15
36 38
DDR_A_D 20
40
DDR_A_D 21
42 44
DDR_A_D M2
46 48
DDR_A_D 22
50
DDR_A_D 23
52 54
DDR_A_D 28
56
DDR_A_D 29
58 60
DDR_A_D QS#3
62
DDR_A_D QS3
64 66
DDR_A_D 30
68
DDR_A_D 31
70 72
74 76
DDR_A_M A15
78
DDR_A_M A14
80 82
DDR_A_MA11
84
DDR_A_M A7
86 88
DDR_A_MA6
90
DDR_A_M A4
92 94
DDR_A_M A2
96
DDR_A_M A0
98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206 208
+DDR_VR EF_CA_DIMMA
DDR_A_D 36 DDR_A_D 37
DDR_A_D M4
DDR_A_D 38 DDR_A_D 39
DDR_A_D 44 DDR_A_D 45
DDR_A_D QS#5 DDR_A_D QS5
DDR_A_D 46 DDR_A_D 47
DDR_A_D 52 DDR_A_D 53
DDR_A_D M6
DDR_A_D 54 DDR_A_D 55
DDR_A_D 60 DDR_A_D 61
DDR_A_D QS#7 DDR_A_D QS7
DDR_A_D 62 DDR_A_D 63
+0.75VS
4
DDR3 SO-DIMM A Reverse Type
+1.5V
12
R80
R80
1K_0402 _1%
1K_0402 _1%
For S3 Power Reduction
DDRA_CK E1 7DDRA_CK E07
DDRA_CL K1 7 DDRA_CL K1# 7
DDR_A_B S1 7 DDR_A_R AS# 7
DDRA_SC S0# 7 DDRA_OD T0 7
DDRA_OD T1 7
C161
C161
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
close to JDDRH.126
PM_EXTT S# 5,12
PM_SMBD ATA 12,25,29,39 PM_SMBC LK 12,25,29,39
+V_DDR3 _DIMM_REF
R89
R89
1 2
0_0402_ 5%
0_0402_ 5%
1
1
C162
C162
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
DDR_A_D QS[0..7]7
DDR_A_D QS#[0..7]7
DDR_A_D [0..63]7
DDR_A_D M[0..7]7
DDR_A_M A[0..15]7
SM_DRAM RST# 5,12
+VREF_D QA
+VREF_D QB
Layout Note: Place near JDDRH
+1.5V
C163 33 0U_D2_2.5VM_R 9M
C163 33 0U_D2_2.5VM_R 9M
C166 10 U_0805_6.3V6MC166 10 U_0805_6.3V6M
C168 10 U_0805_6.3V6MC168 10 U_0805_6.3V6M
C171 10 U_0805_6.3V6MC171 10 U_0805_6.3V6M
C174 10 U_0805_6.3V6MC174 10 U_0805_6.3V6M
C176 10 U_0805_6.3V6MC176 10 U_0805_6.3V6M
C178 10 U_0805_6.3V6MC178 10 U_0805_6.3V6M
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
3
+
+
1 2
1 2
1 2
1 2
1 2
1 2
1 2
SGA00002680
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
+1.5V
+V_DDR3 _DIMM_REF
12
R920_0402_5% R920_0402_5%
12
R930_0402_5% R930_0402_5%
Layout Note: Place these 4 Caps near Command and Control signals of DIMMA
+1.5V +0.75VS
C164 0.1 U_0402_16V4ZC164 0.1 U_0402_16V4Z
1 2
C167 0.1 U_0402_16V4ZC167 0.1 U_0402_16V4Z
1 2
C170 0.1 U_0402_16V4ZC170 0.1 U_0402_16V4Z
1 2
C173 0.1 U_0402_16V4ZC173 0.1 U_0402_16V4Z
1 2
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
12
12
1
R79
R79
1K_0402 _1%
1K_0402 _1%
R81
R81
1K_0402 _1%
1K_0402 _1%
Layout Note: Place near JDDRH.203 and 204
C165 10 U_0805_6.3V6MC165 10 U_0805_6.3V6M
1 2
C169 1U _0402_6.3V4ZC1 69 1U_0402_6 .3V4Z
12
C172 1U _0402_6.3V4ZC1 72 1U_0402_6 .3V4Z
12
C175 1U _0402_6.3V4ZC1 75 1U_0402_6 .3V4Z
12
C177 1U _0402_6.3V4ZC1 77 1U_0402_6 .3V4Z
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DDRIII-SODIMM0
DDRIII-SODIMM0
DDRIII-SODIMM0
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
11 61Monday, March 22, 20 10
11 61Monday, March 22, 20 10
11 61Monday, March 22, 20 10
1
1.0
1.0
1.0
A
+VREF_D QB
1
2
C183
C183
2.2U_0603_6.3V4Z
1 1
2.2U_0603_6.3V4Z
close to JDDRL.1
2 2
3 3
4 4
DDRB_CK E07
DDR_B_B S27
DDRB_CL K07 DDRB_CL K0#7
DDR_B_W E#7 DDR_B_C AS#7
DDRB_SC S1#7
+3VS
2.2U_060 3_6.3V4Z
2.2U_060 3_6.3V4Z
1
C207
C207
2
0.1U_040 2_16V4Z
0.1U_040 2_16V4Z
1
C208
C208
2
1
2
C184
C184
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R98
R98 10K_040 2_5%
10K_040 2_5%
R99
R99
1 2
10K_040 2_5%
10K_040 2_5%
DDR_B_D 0 DDR_B_D 1
DDR_B_D M0
DDR_B_D 2 DDR_B_D 3
DDR_B_D 8 DDR_B_D 9
DDR_B_D QS#1 DDR_B_D QS1
DDR_B_D 10 DDR_B_D 11
DDR_B_D 16 DDR_B_D 17
DDR_B_D QS#2 DDR_B_D QS2
DDR_B_D 18 DDR_B_D 19
DDR_B_D 24 DDR_B_D 25
DDR_B_D M3
DDR_B_D 26 DDR_B_D 27
DDR_B_M A12 DDR_B_M A9
DDR_B_MA8 DDR_B_M A5
DDR_B_M A3 DDR_B_M A1
DDR_B_M A10
DDR_B_M A13
DDR_B_D 32 DDR_B_D 33
DDR_B_D QS#4 DDR_B_D QS4
DDR_B_D 34 DDR_B_D 35
DDR_B_D 40 DDR_B_D 41
DDR_B_D M5
DDR_B_D 42 DDR_B_D 43
DDR_B_D 48 DDR_B_D 49
DDR_B_D QS#6 DDR_B_D QS6
DDR_B_D 50 DDR_B_D 51
DDR_B_D 56 DDR_B_D 57
DDR_B_D M7
DDR_B_D 58 DDR_B_D 59
1 2
A
+0.75VS
+1.5V
JDDRL
JDDRL
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST
127
VSS
129
DQ32
131
DQ33
133
VSS
135
DQS4#
137
DQS4
139
VSS
141
DQ34
143
DQ35
145
VSS
147
DQ40
149
DQ41
151
VSS
153
DM5
155
VSS
157
DQ42
159
DQ43
161
VSS
163
DQ48
165
DQ49
167
VSS
169
DQS6#
171
DQS6
173
VSS
175
DQ50
177
DQ51
179
VSS
181
DQ56
183
DQ57
185
VSS
187
DM7
189
VSS
191
DQ58
193
DQ59
195
VSS
197
SA0
199
VDDSPD
201
SA1
203
VTT
205
GND1
207
GND2
FOX_AS0 A626-U2RN-7F_2 04P
FOX_AS0 A626-U2RN-7F_2 04P
@
@
VREF_CA
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS DQ12 DQ13
VSS
DM1
RESET#
VSS DQ14 DQ15
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1 RAS#
VDD
ODT0
VDD ODT1
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
EVENT#
SDA
SCL
VTT
BOSS1 BOSS2
A15 A14
A11
S0#
A7
A6 A4
A2 A0
NC
+1.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206 208
B
DDR_B_D 4 DDR_B_D 5
DDR_B_D QS#0 DDR_B_D QS0
DDR_B_D 6 DDR_B_D 7
DDR_B_D 12 DDR_B_D 13
DDR_B_D M1
DDR_B_D 14 DDR_B_D 15
DDR_B_D 20 DDR_B_D 21
DDR_B_D M2
DDR_B_D 22 DDR_B_D 23
DDR_B_D 28 DDR_B_D 29
DDR_B_D QS#3 DDR_B_D QS3
DDR_B_D 30 DDR_B_D 31
DDR_B_M A15 DDR_B_M A14
DDR_B_MA11 DDR_B_M A7
DDR_B_MA6 DDR_B_M A4
DDR_B_M A2 DDR_B_M A0
+DDR_VR EF_CA_DIMMB
DDR_B_D 36 DDR_B_D 37
DDR_B_D M4
DDR_B_D 38 DDR_B_D 39
DDR_B_D 44 DDR_B_D 45
DDR_B_D QS#5 DDR_B_D QS5
DDR_B_D 46 DDR_B_D 47
DDR_B_D 52 DDR_B_D 53
DDR_B_D M6
DDR_B_D 54 DDR_B_D 55
DDR_B_D 60 DDR_B_D 61
DDR_B_D QS#7 DDR_B_D QS7
DDR_B_D 62 DDR_B_D 63
+0.75VS
B
DDR3 SO-DIMM B Reverse Type
SM_DRAM RST# 5,11
DDRB_CK E1 7
DDRB_CL K1 7 DDRB_CL K1# 7
DDR_B_B S1 7 DDR_B_R AS# 7DDR_B_B S07
DDRB_SC S0# 7 DDRB_OD T0 7
DDRB_OD T1 7
1
2
C187
C187
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
close to JDDRL.126
PM_EXTT S# 5,11
PM_SMBD ATA 11,25,29,39 PM_SMBC LK 11,25,29,39
+V_DDR3 _DIMM_REF
R97
R97
1 2
C188
C188
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Security Class ification
Security Class ification
Security Class ification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
2
Issued Date
Issued Date
Issued Date
0_0402_ 5%
0_0402_ 5%
C
DDR_B_D QS#[0..7]7
DDR_B_D QS[0..7]7
DDR_B_D [0..63]7
DDR_B_D M[0..7]7
DDR_B_M A[0..15]7
Layout Note: Place near JDDRL
+1.5V
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
2009/11/ 13 2010/01/ 23
C
@
@
+
+
C189 330U_B2 _2.5VM_R15M
C189 330U_B2 _2.5VM_R15M
1 2
C192 10 U_0805_6.3V6MC192 10 U_0805_6.3V6M
1 2
C194 10 U_0805_6.3V6MC194 10 U_0805_6.3V6M
1 2
C197 10 U_0805_6.3V6MC197 10 U_0805_6.3V6M
1 2
C200 10 U_0805_6.3V6MC200 10 U_0805_6.3V6M
1 2
C202 10 U_0805_6.3V6MC202 10 U_0805_6.3V6M
1 2
C204 10 U_0805_6.3V6MC204 10 U_0805_6.3V6M
1 2
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Layout Note: Place these 4 Caps near Command and Control signals of DIMMB
D
C190 0.1 U_0402_16V4ZC190 0.1 U_0402_16V4Z
1 2
C193 0.1 U_0402_16V4ZC193 0.1 U_0402_16V4Z
1 2
C196 0.1 U_0402_16V4ZC196 0.1 U_0402_16V4Z
1 2
C199 0.1 U_0402_16V4ZC199 0.1 U_0402_16V4Z
1 2
D
E
Layout Note: Place near JDDRL.203 and 204
+0.75VS+1.5V
C191 10 U_0805_6.3V6MC191 10 U_0805_6.3V6M
1 2
C195 1U _0402_6.3V4ZC1 95 1U_0402_6 .3V4Z
12
C198 1U _0402_6.3V4ZC1 98 1U_0402_6 .3V4Z
12
C201 1U _0402_6.3V4ZC2 01 1U_0402_6 .3V4Z
12
C203 1U _0402_6.3V4ZC2 03 1U_0402_6 .3V4Z
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
DDRIII-SODIMM1
DDRIII-SODIMM1
DDRIII-SODIMM1
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
12 61Monday, March 22, 20 10
12 61Monday, March 22, 20 10
12 61Monday, March 22, 20 10
E
1.0
1.0
1.0
5
100NH_LQW18ANR10J00D_5 %_0603
100NH_LQW18ANR10J00D_5 %_0603
+1.05VS_DGPU
D D
+1.05VS_DGPU
C C
27MHZ_16PF_X5H027000FG1H
B B
27MHZ_16PF_X5H027000FG1H
1
CV45
CV45 20P_0402_50V8J
20P_0402_50V8J
@
@
2
1 2
LV1
LV1
CV9
CV9
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
100NH_LQW18ANR10J00D_5 %_0603
100NH_LQW18ANR10J00D_5 %_0603
1 2
LV2
LV2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
@
@
1 2
RV29 10M_0402_5%
RV29 10M_0402_5%
YV1
YV1
1 2
@
@
1
CV7
CV7
2
XTAL_OUTXTALIN
1
2
1
2
CV46
CV46 20P_0402_50V8J
20P_0402_50V8J
@
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV11
CV11
CV10
CV10
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+SP_PLLVDD
1
CV8
CV8
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
150mA , 10mil
PCIE_GTX_C_CRX_P15 PCIE_GTX_C_CRX_N15 PCIE_GTX_C_CRX_P14 PCIE_GTX_C_CRX_N14 PCIE_GTX_C_CRX_P13 PCIE_GTX_C_CRX_N13 PCIE_GTX_C_CRX_P12 PCIE_GTX_C_CRX_N12 PCIE_GTX_C_CRX_P11 PCIE_GTX_C_CRX_N11 PCIE_GTX_C_CRX_P10 PCIE_GTX_C_CRX_N10 PCIE_GTX_C_CRX_P9 PCIE_GTX_C_CRX_N9 PCIE_GTX_C_CRX_P8 PCIE_GTX_C_CRX_N8 PCIE_GTX_C_CRX_P7 PCIE_GTX_C_CRX_N7 PCIE_GTX_C_CRX_P6 PCIE_GTX_C_CRX_N6 PCIE_GTX_C_CRX_P5 PCIE_GTX_C_CRX_N5 PCIE_GTX_C_CRX_P4 PCIE_GTX_C_CRX_N4 PCIE_GTX_C_CRX_P3 PCIE_GTX_C_CRX_N3 PCIE_GTX_C_CRX_P2 PCIE_GTX_C_CRX_N2 PCIE_GTX_C_CRX_P1 PCIE_GTX_C_CRX_N1 PCIE_GTX_C_CRX_P0 PCIE_GTX_C_CRX_N0
Differential signal
1
2
+PLLVDD
1
CV12
CV12
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PLTRST_VGA#32
Reserve 27MHZ Crystal at Pre-MP
DGPU_PWR_EN33,47,58
RV124
RV124
10K_0402_5%
10K_0402_5%
CLKREQ_PEG#29
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
A A
XTALSSIN
3
QV2B
QV2B
RV28
RV28
1 2
+3VS_DGPU
1 2
RV118
RV118
5
10K_0402_5%
10K_0402_5%
CLKREQ_VGA#
4
1 2
Another at page 47
10K_0402_5%@
10K_0402_5%@
27M_CLK25
RV26
RV26
10K_0402_5%
10K_0402_5%
Reserved for internal SSC
5
4
150mA , 10mil
LANE Reversal
CV13 0.1U_0402_10V7KCV13 0.1U_0402_10V7K
1 2
CV14 0.1U_0402_10V7KCV14 0.1U_0402_10V7K
1 2
CV15 0.1U_0402_10V7KCV15 0.1U_0402_10V7K
1 2
CV16 0.1U_0402_10V7KCV16 0.1U_0402_10V7K
1 2
CV17 0.1U_0402_10V7KCV17 0.1U_0402_10V7K
1 2
CV18 0.1U_0402_10V7KCV18 0.1U_0402_10V7K
1 2
CV19 0.1U_0402_10V7KCV19 0.1U_0402_10V7K
1 2
CV20 0.1U_0402_10V7KCV20 0.1U_0402_10V7K
1 2
CV21 0.1U_0402_10V7KCV21 0.1U_0402_10V7K
1 2
CV22 0.1U_0402_10V7KCV22 0.1U_0402_10V7K
1 2
CV23 0.1U_0402_10V7KCV23 0.1U_0402_10V7K
1 2
CV24 0.1U_0402_10V7KCV24 0.1U_0402_10V7K
1 2
CV25 0.1U_0402_10V7KCV25 0.1U_0402_10V7K
1 2
CV26 0.1U_0402_10V7KCV26 0.1U_0402_10V7K
1 2
CV27 0.1U_0402_10V7KCV27 0.1U_0402_10V7K
1 2
CV28 0.1U_0402_10V7KCV28 0.1U_0402_10V7K
1 2
CV29 0.1U_0402_10V7KCV29 0.1U_0402_10V7K
1 2
CV30 0.1U_0402_10V7KCV30 0.1U_0402_10V7K
1 2
CV31 0.1U_0402_10V7KCV31 0.1U_0402_10V7K
1 2
CV32 0.1U_0402_10V7KCV32 0.1U_0402_10V7K
1 2
CV33 0.1U_0402_10V7KCV33 0.1U_0402_10V7K
1 2
CV34 0.1U_0402_10V7KCV34 0.1U_0402_10V7K
1 2
CV35 0.1U_0402_10V7KCV35 0.1U_0402_10V7K
1 2
CV36 0.1U_0402_10V7KCV36 0.1U_0402_10V7K
1 2
CV37 0.1U_0402_10V7KCV37 0.1U_0402_10V7K
1 2
CV38 0.1U_0402_10V7KCV38 0.1U_0402_10V7K
1 2
CV39 0.1U_0402_10V7KCV39 0.1U_0402_10V7K
1 2
CV40 0.1U_0402_10V7KCV40 0.1U_0402_10V7K
1 2
CV41 0.1U_0402_10V7KCV41 0.1U_0402_10V7K
1 2
CV42 0.1U_0402_10V7KCV42 0.1U_0402_10V7K
1 2
CV43 0.1U_0402_10V7KCV43 0.1U_0402_10V7K
1 2
CV44 0.1U_0402_10V7KCV44 0.1U_0402_10V7K
1 2
CLK_PCIE_VGA29
CLK_PCIE_VGA#2 9
1 2
RV16 200_0402_1%@R V16 20 0_0402_1%@
1 2
RV18 0_0402_5%RV18 0_0402_5%
1 2
RV19 2.49K_0402_1%RV19 2.49K_0402_1%
+PLLVDD
RV103 0_0402_5%RV103 0_0402_5%
1 2
12
27M_SSC25
Internal Thermal Sensor
SMB_CLK_GPU14 SMB_DATA_GPU14
LVDS
CRT
4
3
UV1A
PCIE_CTX_C_GRX_P15 PCIE_CTX_C_GRX_N15 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_N10 PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_P8 PCIE_CTX_C_GRX_N8 PCIE_CTX_C_GRX_P7 PCIE_CTX_C_GRX_N7 PCIE_CTX_C_GRX_P6 PCIE_CTX_C_GRX_N6 PCIE_CTX_C_GRX_P5 PCIE_CTX_C_GRX_N5 PCIE_CTX_C_GRX_P4 PCIE_CTX_C_GRX_N4 PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_N3 PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_N0
PCIE_GTX_CRX_P15 PCIE_GTX_CRX_N15 PCIE_GTX_CRX_P14 PCIE_GTX_CRX_N14 PCIE_GTX_CRX_P13 PCIE_GTX_CRX_N13 PCIE_GTX_CRX_P12 PCIE_GTX_CRX_N12 PCIE_GTX_CRX_P11 PCIE_GTX_CRX_N11 PCIE_GTX_CRX_P10 PCIE_GTX_CRX_N10 PCIE_GTX_CRX_P9 PCIE_GTX_CRX_N9 PCIE_GTX_CRX_P8 PCIE_GTX_CRX_N8 PCIE_GTX_CRX_P7 PCIE_GTX_CRX_N7 PCIE_GTX_CRX_P6 PCIE_GTX_CRX_N6 PCIE_GTX_CRX_P5 PCIE_GTX_CRX_N5 PCIE_GTX_CRX_P4 PCIE_GTX_CRX_N4 PCIE_GTX_CRX_P3 PCIE_GTX_CRX_N3 PCIE_GTX_CRX_P2 PCIE_GTX_CRX_N2 PCIE_GTX_CRX_P1 PCIE_GTX_CRX_N1 PCIE_GTX_CRX_P0 PCIE_GTX_CRX_N0
CLK_PCIE_VGA CLK_PCIE_VGA# CLKREQ_VGA#
PEX_TSTCLK_OUT PEX_TSTCLK_OUT#
PLTRST_VGA#_R
+SP_PLLVDD
XTALIN XTAL_OUT
RV105
RV105
1 2
XTALSSIN
0_0402_5%
0_0402_5%
SMB_CLK_GPU SMB_DATA_GPU
VGA_EDID_CLK VGA_EDID_DATA
I2CB_SCL I2CB_SDA
VGA_CRT_CLK VGA_CRT_DAT
HDCP_SCL HDCP_SDA
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
UV1A
AP17
PEX_RX0
AN17
PEX_RX0_N
AN19
PEX_RX1
AP19
PEX_RX1_N
AR19
PEX_RX2
AR20
PEX_RX2_N
AP20
PEX_RX3
AN20
PEX_RX3_N
AN22
PEX_RX4
AP22
PEX_RX4_N
AR22
PEX_RX5
AR23
PEX_RX5_N
AP23
PEX_RX6
AN23
PEX_RX6_N
AN25
PEX_RX7
AP25
PEX_RX7_N
AR25
PEX_RX8
AR26
PEX_RX8_N
AP26
PEX_RX9
AN26
PEX_RX9_N
AN28
PEX_RX10
AP28
PEX_RX10_N
AR28
PEX_RX11
AR29
PEX_RX11_N
AP29
PEX_RX12
AN29
PEX_RX12_N
AN31
PEX_RX13
AP31
PEX_RX13_N
AR31
PEX_RX14
AR32
PEX_RX14_N
AR34
PEX_RX15
AP34
PEX_RX15_N
AL17
PEX_TX0
AM17
PEX_TX0_N
AM18
PEX_TX1
AM19
PEX_TX1_N
AL19
PEX_TX2
AK19
PEX_TX2_N
AL20
PEX_TX3
AM20
PEX_TX3_N
AM21
PEX_TX4
AM22
PEX_TX4_N
AL22
PEX_TX5
AK22
PEX_TX5_N
AL23
PEX_TX6
AM23
PEX_TX6_N
AM24
PEX_TX7
AM25
PEX_TX7_N
AL25
PEX_TX8
AK25
PEX_TX8_N
AL26
PEX_TX9
AM26
PEX_TX9_N
AM27
PEX_TX10
AM28
PEX_TX10_N
AL28
PEX_TX11
AK28
PEX_TX11_N
AK29
PEX_TX12
AL29
PEX_TX12_N
AM29
PEX_TX13
AM30
PEX_TX13_N
AM31
PEX_TX14
AM32
PEX_TX14_N
AN32
PEX_TX15
AP32
PEX_TX15_N
AR16
PEX_REFCLK
AR17
PEX_REFCLK_N
AR13
PEX_CLKREQ_N
AJ17
PEX_TSTCLK_OUT
AJ18
PEX_TSTCLK_OUT_N
AM16
PEX_RST_N
AG21
PEX_TERMP
AE9
PLLVDD
AF9
SP_PLLVDD
AD9
VID_PLLVDD
B1
XTAL_IN
B2
XTAL_OUT
D1
XTAL_OUTBUFF
D2
XTAL_SSIN
E2
I2CS_SCL
E1
I2CS_SDA
E3
I2CC_SCL
E4
I2CC_SDA
G3
I2CB_SCL
G2
I2CB_SDA
G1
I2CA_SCL
G4
I2CA_SDA
F6
I2CH_SCL
G6
I2CH_SDA
N11P-LP1-A3_BGA969
N11P-LP1-A3_BGA969
Part 1 of 7
Part 1 of 7
GPIO
GPIO
DVO
DVO
PCI EXPRESS
PCI EXPRESS
MIOA_HSYNC
MIOA_VSYNC
MIOB_HSYNC
MIOB_VSYNC
MIOA_CLKIN
MIOA_CLKOUT
MIOB_CLKIN
MIOB_CLKOUT
MIOA_CLKOUT_N MIOB_CLKOUT_N
MIOACAL_PD_VDDQ
MIOACAL_PU_GND
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
CLK
CLK
DACA_GREEN
DACA_BLUE
DACA_HSYNC DACA_VSYNC
DACA_VREF DACA_RSET
DACB_GREEN
DACs
DACs
DACB_BLUE
DACB_HSYNC
I2C
I2C
DACB_VSYNC
DACB_VREF DACB_RSET
Compal Secret Data
Compal Secret Data
2009/11/13 2010/01/01
2009/11/13 2010/01/01
2009/11/13 2010/01/01
3
Compal Secret Data
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23
MIOA_D0 MIOA_D1 MIOA_D2 MIOA_D3 MIOA_D4 MIOA_D5 MIOA_D6 MIOA_D7 MIOA_D8
MIOA_D9 MIOA_D10 MIOA_D11 MIOA_D12 MIOA_D13 MIOA_D14
MIOB_D0
MIOB_D1
MIOB_D2
MIOB_D3
MIOB_D4
MIOB_D5
MIOB_D6
MIOB_D7
MIOB_D8
MIOB_D9 MIOBD_10 MIOB_D11 MIOB_D12 MIOB_D13 MIOB_D14
MIOA_DE
MIOA_CTL3
MIOA_VREF
MIOB_DE
MIOB_CTL3
MIOB_VREF
DACA_RED
DACA_VDD
DACB_RED
DACB_VDD
N11PR3@
N11PR3@
Deciphered Date
Deciphered Date
Deciphered Date
K1 K2 K3 H3 H2 H1 H4 H5 H6 J7 K4 K5 H7 J4 J6 L1 L2 L4 M4 L7 L5 K6 L6 M6
N1 P4 P1 P2 P3 T3 T2 T1 U4 U1 U2 U3 R6 T6 N6
Y1 Y2 Y3 AB3 AB2 AB1 AC4 AC1 AC2 AC3 AE3 AE2 U6 W6 Y6
N3 L3
W1 W2
N2 P5 N5
Y5 W3 AF1
N4 R4
AE1 V4
T4 W4
U5 T5
AA7 AA6
AM15 AM14 AL14
AM13 AL13
AJ12 AK12 AK13
AK4 AL4 AJ4
AM1 AM2
AG7 AK6 AH7
+DACB_VDD
VGA_PWM VGA_ENVDD VGA_ENBKL GPU_VID0 GPU_VID1
THERM#_VGA
VGA_HDMI_HPD
VGA_CRT_R VGA_CRT_G VGA_CRT_B
VGA_CRT_HSYNC VGA_CRT_VSYNC
+DACA_VDD +DACA_VREF DACA_RSET
RV15 10K_0402_5%RV15 10K_0402_5%
RV17 10K_0402_5%RV17 10K_0402_5%
124_0402_1%
124_0402_1%
2
TV1TV1
TV6TV6
1 2
1 2
RV32 0_0402_5%RV32 0_0402_5%
12
RV27
RV27
RV31 10K_0402_5%RV31 10K_0402_5%
2
PCIE_GTX_C_CRX_P[0..15]6
PCIE_GTX_C_CRX_N[0..15]6
GPU_VID0 58 GPU_VID1 58
THERM#_VGA 14
PCIE_CTX_C_GRX_P[0..15]6
PCIE_CTX_C_GRX_N[0..15]6
Reserve vias for EVT debug
12
+3VS_DGPU
1
CV47
CV47
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
12
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
PCIE_CTX_C_GRX_P[0..15]
PCIE_CTX_C_GRX_N[0..15]
VGA_ENVDD
VGA_ENBKL
VGA_PWM
VGA_HDMI_HPD
VGA_EDID_CLK
VGA_EDID_DATA
SMB_CLK_GPU
SMB_DATA_GPU
THERM#_VGA
HDCP_SCL
HDCP_SDA
VGA_CRT_DAT
VGA_CRT_CLK
I2CB_SCL
I2CB_SDA
1 2
RV1 10K_0402_5%@R V1 10K_0402_5%@
12
RV2 10K_0402_5%@R V2 10K_0402_5%@
12
RV3 10K_0402_5%@R V3 10K_0402_5%@
1 2
RV5 100K_0402_5%RV5 100K_0402_5%
1 2
RV6 2.2K_0402_5%RV6 2.2K_0402_5%
1 2
RV7 2.2K_0402_5%RV7 2.2K_0402_5%
1 2
RV8 2.2K_0402_5%RV8 2.2K_0402_5%
1 2
RV9 2.2K_0402_5%RV9 2.2K_0402_5%
1 2
RV10 100K_0402_5%RV10 100K_0402_5%
1 2
RV11 2.2K_0402_5%RV11 2.2K_0402_5%
1 2
RV12 2.2K_0402_5%RV12 2.2K_0402_5%
1 2
RV13 2.2K_0402_5%RV13 2.2K_0402_5%
1 2
RV14 2.2K_0402_5%RV14 2.2K_0402_5%
1 2
RV121 2.2K_0402_5%RV121 2.2K_0402_5%
1 2
RV122 2.2K_0402_5%RV122 2.2K_0402_5%
+3VS_DGPU
Close to GPU
1 2
RV20 75_0402_1%RV20 75_0402_1%
1 2
RV21 75_0402_1%RV21 75_0402_1%
1 2
RV23 75_0402_1%RV23 75_0402_1%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
PCIE/DAC/GPIO
PCIE/DAC/GPIO
PCIE/DAC/GPIO
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
13 61Monday, March 22, 2010
13 61Monday, March 22, 2010
13 61Monday, March 22, 2010
1
1.0
1.0
1.0
5
D D
C C
4
UV1D
AM11 AM12
AM8
AM10
AM9
AK10
AL10
AK11
AL11
AP13 AN13
AN8
AP8 AP10 AN10 AR11 AR10 AN11 AP11
AM7
AM6
AM5
AM3
AM4
AP1
AR2
AR8
AR7
AP7
AN7
AN5
AP5
AR5
AR4
AH6
AH5
AH4
AG4
AE6
AE5
AH1
AH2
AH3
AL8
AL5
AF4 AF5
AL2 AL3 AJ3 AJ2 AJ1
UV1D
IFPA_TXC IFPA_TXC_N IFPA_TXD0 IFPA_TXD0_N IFPA_TXD1 IFPA_TXD1_N IFPA_TXD2 IFPA_TXD2_N IFPA_TXD3 IFPA_TXD3_N
IFPB_TXC IFPB_TXC_N IFPB_TXD4 IFPB_TXD4_N IFPB_TXD5 IFPB_TXD5_N IFPB_TXD6 IFPB_TXD6_N IFPB_TXD7 IFPB_TXD7_N
IFPC_L0 IFPC_L0_N IFPC_L1 IFPC_L1_N IFPC_L2 IFPC_L2_N IFPC_L3 IFPC_L3_N
IFPD_L0 IFPD_L0_N IFPD_L1 IFPD_L1_N IFPD_L2 IFPD_L2_N IFPD_L3 IFPD_L3_N
IFPE_L0 IFPE_L0_N IFPE_L1 IFPE_L1_N IFPE_L2 IFPE_L2_N IFPE_L3 IFPE_L3_N
IFPF_L0 IFPF_L0_N IFPF_L1 IFPF_L1_N IFPF_L2 IFPF_L2_N IFPF_L3 IFPF_L3_N
Part 4 of 7
Part 4 of 7
LVDS/TMDS
LVDS/TMDS
3
NC_0 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8
NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_23 NC_24 NC_25 NC_26
NC
NC
NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42 NC_43 NC_44 NC_45 NC_46 NC_47 NC_48
VDD_SENSE_0 VDD_SENSE_1 VDD_SENSE_2
GND_SENSE_0 GND_SENSE_1 GND_SENSE_2
A2 A7 B7 C5 C7 D5 D6 D7 E5 E7 F4 G5 G11 G12 G14 G15 G27 G28 G24 G25 H32 J18 J19 J25 J26 L29 M7 M29 P6 P29 R29 U7 V6 Y4 AA4 AB4 AB7 AC5 AD6 AD29 AE29 AF6 AG6 AG20 AG29 AH29 AJ5 AK15 AL7
D35 P7 AD20
AD19 E35 R7
THERM_D+
THERM_D-
2200P_0402_50V7K
2200P_0402_50V7K
+3VS_DGPU
VGA_CORE Sense
VDD_SENSE 58
2
External VGA Thermal Sensor
Address: 0x9A H
+3VS_DGPU
UV2
12
CV53 0.1U_0402_16V4ZCV53 0.1U_0402_16V4Z
CV54
CV54
1 2
UV2
1
VDD
2
D+
3
D-
THERM#4GND
ADM1032ARMZ-2REEL_MSOP8
ADM1032ARMZ-2REEL_MSOP8
RV123 2.2K_0402_5%RV123 2.2K_0402_5%
12
RV117 2.2K_0402_5%RV117 2.2K_0402_5%
12
VGA_THMDATA
VGA_THMCLK
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
SCLK
SDATA
ALERT#
2
QV1A
QV1A
8
7
6
5
+3VS_DGPU
4
61
VGA_THMCLK
THERM#_VGA
VGA_THMDATA
5
QV1B
QV1B
3
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1
Internal Thermal Sensor
12
12
RV34
RV33
RV33
0_0402_5%
0_0402_5%
@
@
THERM#_VGA 13
RV34 0_0402_5%
0_0402_5%
EC_SMB_DA2 29,38,44,45
EC_SMB_CK2 29,38,44,45
@
@
SMB_CLK_GPU 13
SMB_DATA_GPU 13
AP2
IFPC_AUX_I2CW_SCL
AN3
B B
+3VS_DGPU
1 2
RV119 4.7K_0402_5%RV119 4.7K_0402_5%
1 2
RV120 4.7K_0402_5%RV120 4.7K_0402_5%
A A
VGA_HDMI_CLK
VGA_HDMI_DATA
5
HDMI
+3VS_DGPU
STRAP024 STRAP124 STRAP224
VGA_HDMI_CLK VGA_HDMI_DATA
1 2
RV49 10K_0402_5%RV49 10K_0402_5%
STRAP0 STRAP1 STRAP2
4
IFPC_AUX_I2CW_SDA_N
AP4
IFPD_AUX_I2CX_SCL
AN4
IFPD_AUX_I2CX_SDA_N
AE4
IFPE_AUX_I2CY_SCL
AD4
IFPE_AUX_I2CY_SDA_N
AF3
IFPF_AUX_I2CZ_SCL
AF2
IFPF_AUX_I2CZ_SDA_N
A4
BUFRST_N
AB5
CEC
W5
STRAP0
W7
STRAP1
V7
STRAP2
N11P-LP1-A3_BGA969
N11P-LP1-A3_BGA969
GENERAL
GENERAL
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
TEST
TEST
TESTMODE
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
JTAG_TRST_N
SERIAL
SERIAL
ROM_CS_N
ROM_SI
ROM_SO
ROM_SCLK
MULTI_STRAP_REF0_GND
MULTI_STRAP_REF1_GND
Issued Date
Issued Date
Issued Date
NC/SPDIF
THERMDP THERMDN
N11PR3@
N11PR3@
3
TESTMODE
AP35 AP14 AN14 AN16 AR14 AP16
1 2
RV41 10K_0402_5%@RV41 10K_0402_5%@
C3
ROM_SI
D3
ROM_SO
C4
ROM_SCLK
D4
A5
N9
1 2
RV48 40.2K_0402_1%RV48 40.2K_0402_1%
1 2
M9
RV50 40.2K_0402_1%RV50 40.2K_0402_1%
THERM_D+
B5
THERM_D-
B4
2009/11/13 2010/01/01
2009/11/13 2010/01/01
2009/11/13 2010/01/01
TV2TV2 TV3TV3 TV4TV4 TV5TV5
ROM_SI 24 ROM_SO 24 ROM_SCLK 24
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
12
10K_0402_5%
10K_0402_5% RV47
RV47
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
LVDS/HDMI/DP/THM
LVDS/HDMI/DP/THM
LVDS/HDMI/DP/THM
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
14 61Monday, March 22, 2010
14 61Monday, March 22, 2010
14 61Monday, March 22, 2010
1
1.0
1.0
1.0
5
D D
4
3
2
1
P21 P23 P25 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 T12 T14 T16 T18 T20 T22 T24 V11 V13 V15 V17 V19 V21 V23 V25 W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 W23 W24 W25 Y12 Y14 Y16 Y18 Y20 Y22 Y24
+VGA_CORE+VGA_CORE
SGA00002680
+VGA_CORE
12
CV59
CV59
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
+VGA_CORE
1
CV66
CV66
0.047U_0402_25V6K
0.047U_0402_25V6K
0.01U_0402_25V7K
0.01U_0402_25V7K
2
+VGA_CORE
1
CV74
CV74
2
0.047U_0402_25V6K
0.047U_0402_25V6K
0.01U_0402_25V7K
0.01U_0402_25V7K
UV1G
UV1G
AB11
VDD_0
AB13
VDD_1
AB15
VDD_2
AB17
VDD_3
AB19
VDD_4
AB21
VDD_5
AB23
VDD_6
AB25
VDD_7
AC11
VDD_8
AC12
VDD_9
AC13
VDD_10
AC14
VDD_11
AC15
VDD_12
AC16
VDD_13
AC17
VDD_14
AC18
VDD_15
AC19
VDD_16
AC20
VDD_17
AC21
VDD_18
C C
B B
AC22
VDD_19
AC23
VDD_20
AC24
VDD_21
AC25
VDD_22
AD12
VDD_23
AD14
VDD_24
AD16
VDD_25
AD18
VDD_26
AD22
VDD_27
AD24
VDD_28
L11
VDD_29
L12
VDD_30
L13
VDD_31
L14
VDD_32
L15
VDD_33
L16
VDD_34
L17
VDD_35
L18
VDD_36
L19
VDD_37
L20
VDD_38
L21
VDD_39
L22
VDD_40
L23
VDD_41
L24
VDD_42
L25
VDD_43
M12
VDD_44
M14
VDD_45
M16
VDD_46
M18
VDD_47
M20
VDD_48
M22
VDD_49
M24
VDD_50
P11
VDD_51
P13
VDD_52
P15
VDD_53
P17
VDD_54
P19
VDD_55
N11P-LP1-A3_BGA969 N11PR3@
N11P-LP1-A3_BGA969 N11PR3@
Part 7 of 7
Part 7 of 7
POWER
POWER
VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63 VDD_64 VDD_65 VDD_66 VDD_67 VDD_68 VDD_69 VDD_70 VDD_71 VDD_72 VDD_73 VDD_74 VDD_75 VDD_76 VDD_77 VDD_78 VDD_79 VDD_80 VDD_81 VDD_82 VDD_83 VDD_84 VDD_85 VDD_86 VDD_87 VDD_88 VDD_89 VDD_90 VDD_91 VDD_92 VDD_93 VDD_94 VDD_95 VDD_96 VDD_97 VDD_98
VDD_99 VDD_100 VDD_101 VDD_102 VDD_103 VDD_104 VDD_105 VDD_106 VDD_107 VDD_108 VDD_109 VDD_110
+VGA_CORE
1
+
+
CV58
CV58
330U_D2_2.5VM_R9M
330U_D2_2.5VM_R9M
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
12
CV60
CV60
1
2
1
2
1
2
0.047U_0402_25V6K
0.047U_0402_25V6K
1
CV67
CV67
2
0.01U_0402_25V7K
0.01U_0402_25V7K
1
CV75
CV75
2
1
+
+
2
CV61
CV61
@
@
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
CV68
CV68
2
0.022U_0402_25V7K
0.022U_0402_25V7K
1
CV76
CV76
2
0.01U_0402_25V7K
0.01U_0402_25V7K
SF000002Z00 H=4.5
CV57
CV57 330U_2.5V_M_R17
330U_2.5V_M_R17
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV212
CV212
2
0.022U_0402_25V7K
0.022U_0402_25V7K
1
CV69
CV69
2
0.01U_0402_25V7K
0.01U_0402_25V7K
1
CV77
CV77
2
1
CV62
CV62
2
4700P_0402_25V7K
4700P_0402_25V7K
CV70
CV70
0.022U_0402_25V7K
0.022U_0402_25V7K
CV78
CV78
0.01U_0402_25V7K
0.01U_0402_25V7K
1
CV71
CV71
2
1
CV79
CV79
2
4700P_0402_25V7K
4700P_0402_25V7K
CV63
CV63
CV64
CV64
1
CV65
CV65
0.022U_0402_25V7K
0.022U_0402_25V7K
2
A A
Security Classification
Security Classification
Security Classification
2009/11/13 2010/01/01
2009/11/13 2010/01/01
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/11/13 2010/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
VGA CORE
VGA CORE
VGA CORE
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
15 61Monday, March 22, 2010
15 61Monday, March 22, 2010
15 61Monday, March 22, 2010
1
1.0
1.0
1.0
5
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
+VRAM_1.5VS
CV82
CV82
N11P@
N11P@
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
D D
+VRAM_1.5VS
0.047U_0402_25V6K
0.047U_0402_25V6K
CV99
CV99
1
2
4.7U_0603_6.3V6K
1
2
0.047U_0402_25V6K
0.047U_0402_25V6K
1
CV100
CV100
2
0.047U_0402_25V6K
0.047U_0402_25V6K
1
CV83
CV83
2
1
CV101
CV101
2
0.1U_0402_16V4Z
1
N11P@
N11P@
CV84
CV84
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.01U_0402_25V7K
0.01U_0402_25V7K
1
CV102
CV102
2
0.01U_0402_25V7K
0.01U_0402_25V7K
1
CV85
CV85
N11P@
N11P@
2
1
CV103
CV103
N11P@
N11P@
2
Close to Pin
C C
1 2
RV96 1K_0402_1%@RV96 1K_0402_1%@
1 2
RV51 1K_0402_1%
RV51 1K_0402_1%
1 2
RV52 1K_0402_1%
RV52 1K_0402_1%
B B
4
1
N11P@
N11P@
CV86
CV86
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.01U_0402_25V7K
0.01U_0402_25V7K
1
1
CV104
CV104
2
2
0.01U_0402_25V7K
0.01U_0402_25V7K
RV110 10K_0402_5%RV110 10K_0402_5%
10K_0402_5%
10K_0402_5%
12
RV113
RV113
RV114 10K_0402_5%RV114 10K_0402_5%
@
@
RV107 10K_0402_5%RV107 10K_0402_5%
RV109 10K_0402_5%RV109 10K_0402_5%
@
@
RV99 10K_0402_5%RV99 10K_0402_5%
RV97 10K_0402_5%RV97 10K_0402_5%
1 2
RV53 1K_0402_1%@RV53 1K_0402_1%@
RV101 10K_0402_5%RV101 10K_0402_5%
RV115 10K_0402_5%RV115 10K_0402_5%
RV116 10K_0402_5%RV116 10K_0402_5%
12 12
CV218
CV218
+IFPAB_PLLVDD
12
+IFPA_IOVDD +IFPB_IOVDD
12
+IFPC_PLLVDD
12
+IFPC_IOVDD
12
+IFPD_PLLVDD
12
+IFPD_IOVDD
12
+IFPEF_PLLVDD
12
+IFPE_IOVDD +IFPF_IOVDD
UV1E
UV1E
J23
FBVDDQ_ 0
J24
FBVDDQ_ 1
J29
FBVDDQ_ 2
AA27
FBVDDQ_ 3
AA29
FBVDDQ_ 4
AA31
FBVDDQ_ 5
AB27
FBVDDQ_ 6
AB29
FBVDDQ_ 7
AC27
FBVDDQ_ 8
AD27
FBVDDQ_ 9
AE27
FBVDDQ_ 10
AJ28
FBVDDQ_ 11
B18
FBVDDQ_ 12
E21
FBVDDQ_ 13
G17
FBVDDQ_ 14
G18
FBVDDQ_ 15
G22
FBVDDQ_ 16
G8
FBVDDQ_ 17
G9
FBVDDQ_ 18
H29
FBVDDQ_ 19
J14
FBVDDQ_ 20
J15
FBVDDQ_ 21
J16
FBVDDQ_ 22
J17
FBVDDQ_ 23
J20
FBVDDQ_ 24
J21
FBVDDQ_ 25
J22
FBVDDQ_ 26
N27
FBVDDQ_ 27
P27
FBVDDQ_ 28
R27
FBVDDQ_ 29
T27
FBVDDQ_ 30
U27
FBVDDQ_ 31
U29
FBVDDQ_ 32
V27
FBVDDQ_ 33
V29
FBVDDQ_ 34
V34
FBVDDQ_ 35
W27
FBVDDQ_ 36
Y27
FBVDDQ_ 37
AK9
IFPAB_PLL VDD
AJ11
IFPAB_RSE T
AG9
IFPA_IOVDD
AG10
IFPB_IOVDD
AJ9
IFPC_PLLV DD
AK7
IFPC_RSET
AJ8
IFPC_IOVDD
AC6
IFPD_PLLV DD
AB6
IFPD_RSET
AK8
IFPD_IOVDD
AJ6
IFPEF_PLL VDD
AL1
IFPEF_RSE T
AE7
IFPE_IOVDD
AD7
IFPF_IOVDD
N11P-LP1-A3_BGA969
N11P-LP1-A3_BGA969
220mA
150mA 150mA
285mA
285mA
285mA 285mA
Part 5 of 7
Part 5 of 7
220mA
220mA
220mA
3
2000mA
PEX_IOVDD Q_0 PEX_IOVDD Q_1 PEX_IOVDD Q_2 PEX_IOVDD Q_3 PEX_IOVDD Q_4 PEX_IOVDD Q_5 PEX_IOVDD Q_6 PEX_IOVDD Q_7 PEX_IOVDD Q_8
PEX_IOVDD Q_9 PEX_IOVDD Q_10 PEX_IOVDD Q_11 PEX_IOVDD Q_12 PEX_IOVDD Q_13 PEX_IOVDD Q_14 PEX_IOVDD Q_15 PEX_IOVDD Q_16 PEX_IOVDD Q_17 PEX_IOVDD Q_18 PEX_IOVDD Q_19 PEX_IOVDD Q_20 PEX_IOVDD Q_21 PEX_IOVDD Q_22 PEX_IOVDD Q_23 PEX_IOVDD Q_24
500mA
PEX_IOVDD _0 PEX_IOVDD _1 PEX_IOVDD _2 PEX_IOVDD _3 PEX_IOVDD _4
POWER
POWER
110mA
PEX_PLL VDD
PEX_SVD D_3V3_0 PEX_SVD D_3V3_1
VDD33_0 VDD33_1 VDD33_2 VDD33_3 VDD33_4
MIOA_VDDQ _0 MIOA_VDDQ _1 MIOA_VDDQ _2 MIOA_VDDQ _3
MIOB_VDDQ _0 MIOB_VDDQ _1 MIOB_VDDQ _2 MIOB_VDDQ _3
N11PR3@
N11PR3@
AG11 AG12 AG13 AG15 AG16 AG17 AG18 AG22 AG23 AG24 AG25 AG26 AJ14 AJ15 AJ19 AJ21 AJ22 AJ24 AJ25 AJ27 AK18 AK20 AK23 AK26 AL16
AK16 AK17 AK21 AK24 AK27
AG14
AG19 F7
J10 J11 J12 J13 J9
P9 R9 T9 U9
AA9 AB9 W9 Y9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
20 MIL
+PEX_PLLVDD
CV115
CV115
Close to Pin
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS_DGPU
1
2
CV87
CV87
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CV93
CV93
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
CV217
CV217
2
2
1
CV116
CV116
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
2
1
2
1
2
CV216
CV216
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV89
CV88
CV88
CV94
CV94
CV89
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV95
CV95
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Close to Pin
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV117
@
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV112
CV112
2
CV117
@
@
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV113
CV113
2
+3VS_DGPU
CV105
CV105
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV90
CV90
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
CV96
CV96
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
CV107
CV107
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV114
CV114
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
1
CV91
CV91
2
1
CV97
CV97
2
100NH_LQW18ANR10J00D_5%_0603
100NH_LQW18ANR10J00D_5%_0603
1 2
1
CV108
CV108
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
CV110
CV110
1
CV92
CV92
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV98
CV98
2
10U_0603_6.3V6M
10U_0603_6.3V6M
LV4
LV4
+3VS_DGPU
1
2
+1.05VS_DGPU
+1.05VS_DGPU
1
CV111
CV111
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
1
1
CV109
CV109
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
+1.05VS_DGPU
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEER ING DRAWING IS THE PRO PRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CO NFIDENTIAL
THIS SHEET OF ENGINEER ING DRAWING IS THE PRO PRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CO NFIDENTIAL
THIS SHEET OF ENGINEER ING DRAWING IS THE PRO PRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFOR MATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFOR MATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFOR MATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
2009/11/13 2010/01/01
2009/11/13 2010/01/01
2009/11/13 2010/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
POWER
POWER
POWER
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
16 61Monday, March 22, 2010
16 61Monday, March 22, 2010
16 61Monday, March 22, 2010
1
1.0
1.0
1.0
5
D D
C C
B B
A A
4
UV1F
UV1F
Part 6 of 7
B3
GND_0
B6
GND_1
B9
GND_2
B12
GND_3
B15
GND_4
B21
GND_5
B24
GND_6
B27
GND_7
B30
GND_8
B33
GND_9
C2
GND_10
C34
GND_11
E6
GND_12
E9
GND_13
E12
GND_14
E15
GND_15
E18
GND_16
E24
GND_17
E27
GND_18
E30
GND_19
F2
GND_20
F31
GND_21
F34
GND_22
F5
GND_23
J2
GND_24
J5
GND_25
J31
GND_26
J34
GND_27
K9
GND_28
L9
GND_29
M2
GND_30
M5
GND_31
M11
GND_32
M13
GND_33
M15
GND_34
M17
GND_35
M19
GND_36
M21
GND_37
M23
GND_38
M25
GND_39
M31
GND_40
M34
GND_41
N11
GND_42
N12
GND_43
N13
GND_44
N14
GND_45
N15
GND_46
N16
GND_47
N17
GND_48
N18
GND_49
N19
GND_50
N20
GND_51
N21
GND_52
N22
GND_53
N23
GND_54
N24
GND_55
N25
GND_56
P12
GND_57
P14
GND_58
P16
GND_59
P18
GND_60
P20
GND_61
P22
GND_62
P24
GND_63
R2
GND_64
R5
GND_65
R31
GND_66
R34
GND_67
T11
GND_68
T13
GND_69
T15
GND_70
T17
GND_71
T19
GND_72
T21
GND_73
T23
GND_74
T25
GND_75
U11
GND_76
U12
GND_77
U13
GND_78
U14
GND_79
U15
GND_80
U16
GND_81
U17
GND_82
U18
GND_83
U19
GND_84
U20
GND_85
U21
GND_86
U22
GND_87
U23
GND_88
U24
GND_89
U25
GND_90
V2
GND_91
V5
GND_92
V9
GND_93
V12
GND_94
V14
GND_95
V16
GND_96
N11P-LP1-A3_BGA969
N11P-LP1-A3_BGA969
Part 6 of 7
GND
GND
3
GND_97 GND_98
GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192
N11PR3@
N11PR3@
V18 V20 V22 V24 V31 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y25 AA2 AA5 AA11 AA12 AA13 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AA24 AA25 AA34 AB12 AB14 AB16 AB18 AB20 AB22 AB24 AC9 AD2 AD5 AD11 AD13 AD15 AD17 AD21 AD23 AD25 AD31 AD34 AE11 AE12 AE13 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AG2 AG5 AG31 AG34 AK2 AK5 AK14 AK31 AK34 AL6 AL9 AL12 AL15 AL18 AL21 AL24 AL27 AL30 AN2 AN34 AP3 AP6 AP9 AP12 AP15 AP18 AP21 AP24 AP27 AP30 AP33
2
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEER ING DRAWING IS THE PRO PRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CO NFIDENTIAL
THIS SHEET OF ENGINEER ING DRAWING IS THE PRO PRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CO NFIDENTIAL
THIS SHEET OF ENGINEER ING DRAWING IS THE PRO PRIETARY PROPERTY OF COMPAL EL ECTRONICS, INC. AND CONTAINS CO NFIDENTIAL AND TRADE SECRET INFOR MATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFOR MATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFOR MATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORI ZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.
2009/11/13 2010/01/01
2009/11/13 2010/01/01
2009/11/13 2010/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
GND
GND
GND
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
17 61Monday, March 22, 2010
17 61Monday, March 22, 2010
17 61Monday, March 22, 2010
1
1.0
1.0
1.0
5
D D
C C
RV55
RV55
1.1K_0402_1%
1.1K_0402_1%
RV56
RV56
1.1K_0402_1%
B B
+1.05VS_DGPU
CV147
CV147
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1.1K_0402_1%
MMZ1608D301BT_0603
MMZ1608D301BT_0603
1 2
LV11
LV11
1
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
CV148
CV148
+VRAM_1.5VS
12
@
@
12
@
@
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
MDA[0..63]20,21
1
CV146
CV146
0.01U_0402_25V7K
0.01U_0402_25V7K
@
@
2
1
2
12mil
CV149
CV149
1U_0402_6.3V4Z
1U_0402_6.3V4Z
20 mil
1
CV150
CV150
@
@
2
MDA[0..63]
+FB_VREF
+VRAM_1.5VS
4
MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8
MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63
+FB_AVDD
+FB_VREF
12
RV57 10K_0402_5%RV57 10K_0402_5%
UV1B
UV1B
L32
FBA_D0
N33
FBA_D1
L33
FBA_D2
N34
FBA_D3
N35
FBA_D4
P35
FBA_D5
P33
FBA_D6
P34
FBA_D7
K35
FBA_D8
K33
FBA_D9
K34
FBA_D10
H33
FBA_D11
G34
FBA_D12
G33
FBA_D13
E34
FBA_D14
E33
FBA_D15
G31
FBA_D16
F30
FBA_D17
G30
FBA_D18
G32
FBA_D19
K30
FBA_D20
K32
FBA_D21
H30
FBA_D22
K31
FBA_D23
L31
FBA_D24
L30
FBA_D25
M32
FBA_D26
N30
FBA_D27
M30
FBA_D28
P31
FBA_D29
R32
FBA_D30
R30
FBA_D31
AG30
FBA_D32
AG32
FBA_D33
AH31
FBA_D34
AF31
FBA_D35
AF30
FBA_D36
AE30
FBA_D37
AC32
FBA_D38
AD30
FBA_D39
AN33
FBA_D40
AL31
FBA_D41
AM33
FBA_D42
AL33
FBA_D43
AK30
FBA_D44
AK32
FBA_D45
AJ30
FBA_D46
AH30
FBA_D47
AH33
FBA_D48
AH35
FBA_D49
AH34
FBA_D50
AH32
FBA_D51
AJ33
FBA_D52
AL35
FBA_D53
AM34
FBA_D54
AM35
FBA_D55
AF33
FBA_D56
AE32
FBA_D57
AF34
FBA_D58
AE35
FBA_D59
AE34
FBA_D60
AE33
FBA_D61
AB32
FBA_D62
AC35
FBA_D63
AG27
FB_DLLAVDD
AF27
FB_PLLAVDD
J27
FB_VREF
T30
FBA_DEBUG
N11P-LP1-A3_BGA969
N11P-LP1-A3_BGA969
Part 2 of 7
Part 2 of 7
MEMORY INTERFACE
MEMORY INTERFACE
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
A
A
FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
N11PR3@
N11PR3@
3
V32 W31 U31 Y32 AB35 AB34 W35 W33 W30 T34 T35 AB31 Y30 Y34 W32 AA30 AA32 Y33 U32 Y31 U34 Y35 W34 V30 U35 U30 U33 AB30 AB33 T33 W29
P32 H34 J30 P30 AF32 AL32 AL34 AF35
L35 G35 H31 N32 AD32 AJ31 AJ35 AC34
L34 H35 J32 N31 AE31 AJ32 AJ34 AC33
T32 T31
AC31 AC30
DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7
DQSA#0 DQSA#1 DQSA#2 DQSA#3 DQSA#4 DQSA#5 DQSA#6 DQSA#7
DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7
CLKA0 CLKA0#
CLKA1 CLKA1#
CMDA0 CMDA1 CMDA2 CMDA3 CMDA4 CMDA5 CMDA6 CMDA7 CMDA8 CMDA9 CMDA10 CMDA11 CMDA12 CMDA13 CMDA14
CMDA16 CMDA17 CMDA18 CMDA19 CMDA20 CMDA21 CMDA22
CMDA24 CMDA25 CMDA26 CMDA27 CMDA28 CMDA29 CMDA30
CMDA0 20 CMDA1 20,21 CMDA2 20 CMDA3 20,21 CMDA4 20,21 CMDA5 20,21 CMDA6 20,21 CMDA7 20,21 CMDA8 20,21 CMDA9 20,21 CMDA10 20,21 CMDA11 21 CMDA12 20,21 CMDA13 20,21 CMDA14 20,21
CMDA16 20,21 CMDA17 20,21 CMDA18 20,21 CMDA19 20,21 CMDA20 20,21 CMDA21 20,21 CMDA22 20,21
CMDA24 20,21 CMDA25 20 CMDA26 20,21 CMDA27 20,21 CMDA28 20,21 CMDA29 20,21 CMDA30 20,21
CLKA0 20 CLKA0# 20
CLKA1 21 CLKA1# 21
DQMA[7..0] 20,21
DQSA#[7..0] 20,21
DQSA[7..0] 20,21
2
1
Mode C - Mirror Mode Mapping
Address
CMD0 CKE_L
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
DATA Bus
0..31
A8
CS0#_L
A7
A2
A11
A5
A0
CAS#
BA1
A9
BA0
BA2
A3
A4
A13
WE#
A1
A10
A12
CS1#_L
RAS#
ODT_L
A6
RST
A14
A15
32..63
A8
A6
A1
A9
A4
A12
CAS#CMD8
A3
A11
CS0#_H
BA0
A15
BA1
CS1#_H
ODT_H
A5
A14
A10
A2
WE#
A0
RAS#
A7
CKE_H
RST
A13
BA2
A A
Security Classification
Security Classification
Security Classification
2009/11/13 2010/01/01
2009/11/13 2010/01/01
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/11/13 2010/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
MEM Interface A
MEM Interface A
MEM Interface A
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
18 61Monday, March 22, 2010
18 61Monday, March 22, 2010
18 61Monday, March 22, 2010
1
1.0
1.0
1.0
5
MDB[0..63]22,23
D D
C C
B B
+VRAM_1.5VS
MDB[0..63]
1 2
RV58 40.2_0402_1%RV58 40.2_0402_1%
1 2
RV59 40.2_0402_1%RV59 40.2_0402_1%
N11P@
N11P@
1 2
RV60 40.2_0402_1%
RV60 40.2_0402_1%
RV60
N11M@
RV60
N11M@
60.4_0402_1%
60.4_0402_1%
MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8
MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63
4
UV1C
UV1C
B13
FBC_D0
D13
FBC_D1
A13
FBC_D2
A14
FBC_D3
C16
FBC_D4
B16
FBC_D5
A17
FBC_D6
D16
FBC_D7
C13
FBC_D8
B11
FBC_D9
C11
FBC_D10
A11
FBC_D11
C10
FBC_D12
C8
FBC_D13
B8
FBC_D14
A8
FBC_D15
E8
FBC_D16
F8
FBC_D17
F10
FBC_D18
F9
FBC_D19
F12
FBC_D20
D8
FBC_D21
D11
FBC_D22
E11
FBC_D23
D12
FBC_D24
E13
FBC_D25
F13
FBC_D26
F14
FBC_D27
F15
FBC_D28
E16
FBC_D29
F16
FBC_D30
F17
FBC_D31
D29
FBC_D32
F27
FBC_D33
F28
FBC_D34
E28
FBC_D35
D26
FBC_D36
F25
FBC_D37
D24
FBC_D38
E25
FBC_D39
E32
FBC_D40
F32
FBC_D41
D33
FBC_D42
E31
FBC_D43
C33
FBC_D44
F29
FBC_D45
D30
FBC_D46
E29
FBC_D47
B29
FBC_D48
C31
FBC_D49
C29
FBC_D50
B31
FBC_D51
C32
FBC_D52
B32
FBC_D53
B35
FBC_D54
B34
FBC_D55
A29
FBC_D56
B28
FBC_D57
A28
FBC_D58
C28
FBC_D59
C26
FBC_D60
D25
FBC_D61
B25
FBC_D62
A25
FBC_D63
K27
FBCAL_PD_VDDQ
L27
FBCAL_PU_GND
M27
FBCAL_TERM_GND
N11P-LP1-A3_BGA969
N11P-LP1-A3_BGA969
Part 3 of 7
Part 3 of 7
MEMORY INTERFACE C
MEMORY INTERFACE C
FBC_DQS_RN0 FBC_DQS_RN1 FBC_DQS_RN2 FBC_DQS_RN3 FBC_DQS_RN4 FBC_DQS_RN5 FBC_DQS_RN6 FBC_DQS_RN7
FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N
FBC_DEBUG
N11PR3@
N11PR3@
C17 B19 D18 F21 A23 D21 B23 E20 G21 F20 F19 F23 A22 C22 B17 F24 C25 E22 C20 B22 A19 D22 D20 E19 D19 F18 C19 F22 C23 B20 A20
A16 D10 F11 D15 D27 D34 A34 D28
B14 B10 D9 E14 F26 D31 A31 A26
C14 A10 E10 D14 E26 D32 A32 B26
E17 D17
D23 E23
G19
DQMB0 DQMB1 DQMB2 DQMB3 DQMB4 DQMB5 DQMB6 DQMB7
DQSB#0 DQSB#1 DQSB#2 DQSB#3 DQSB#4 DQSB#5 DQSB#6 DQSB#7
DQSB0 DQSB1 DQSB2 DQSB3 DQSB4 DQSB5 DQSB6 DQSB7
CLKB0 CLKB0#
CLKB1 CLKB1#
3
CMDB0 CMDB1 CMDB2 CMDB3 CMDB4 CMDB5 CMDB6 CMDB7 CMDB8 CMDB9 CMDB10 CMDB11 CMDB12 CMDB13 CMDB14
CMDB16 CMDB17 CMDB18 CMDB19 CMDB20 CMDB21 CMDB22
CMDB24 CMDB25 CMDB26 CMDB27 CMDB28 CMDB29 CMDB30
1 2
RV6110K_0402_5% RV6110K_0402_5%
CMDB0 22 CMDB1 22,23 CMDB2 22 CMDB3 22,23 CMDB4 22,23 CMDB5 22,23 CMDB6 22,23 CMDB7 22,23 CMDB8 22,23 CMDB9 22,23 CMDB10 22,23 CMDB11 23 CMDB12 22,23 CMDB13 22,23 CMDB14 22,23
CMDB16 22,23 CMDB17 22,23 CMDB18 22,23 CMDB19 22,23 CMDB20 22,23 CMDB21 22,23 CMDB22 22,23
CMDB24 22,23 CMDB25 22 CMDB26 22,23 CMDB27 22,23 CMDB28 22,23 CMDB29 22,23 CMDB30 22,23
CLKB0 22 CLKB0# 22
CLKB1 23 CLKB1# 23
+VRAM_1.5VS
DQMB[7..0] 22,23
DQSB#[7..0] 22,23
DQSB[7..0] 22,23
2
1
Mode C - Mirror Mode Mapping
Address
CMD0 CKE_L
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30
DATA Bus
0..31
A8
CS0#_L
A7
A2
A11
A5
A0
CAS#
BA1
A9
BA0
BA2
A3
A4
A13
WE#
A1
A10
A12
CS1#_L
RAS#
ODT_L
A6
RST
A14
A15
32..63
A8
A6
A1
A9
A4
A12
CAS#CMD8
A3
A11
CS0#_H
BA0
A15
BA1
CS1#_H
ODT_H
A5
A14
A10
A2
WE#
A0
RAS#
A7
CKE_H
RST
A13
BA2
A A
Security Classification
Security Classification
Security Classification
2009/11/13 2010/01/01
2009/11/13 2010/01/01
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/11/13 2010/01/01
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
MEM Interface C
MEM Interface C
MEM Interface C
NBQAA LA6072P M/B
NBQAA LA6072P M/B
NBQAA LA6072P M/B
19 61Monday, March 22, 2010
19 61Monday, March 22, 2010
19 61Monday, March 22, 2010
1
1.0
1.0
1.0
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