How it Works
Toshiba
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L700
User Manual
234 pgs5.1 Mb0
Schematic
37 pgs2.15 Mb0
Schematics
45 pgs1.51 Mb0
Schematics
45 pgs996.62 Kb0

Toshiba L700 Schematic

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PCB STACK UP
LAYER 1 : TOP LAYER 2 : GND1
TE4 Block Diagram
LAYER 3 : IN1 LAYER 4 : VCC
A A
LAYER 5 : IN2 LAYER 6 : IN3
P26
USB-0
LCD/CCD Con.
CRT Con.
HDMI Con.
POWER SYSTEM
ISL88731C PM6686TR RT8207L G5602R41U RT8152C ISL62882HRTZ-T G966A
+VCC_CORE
+1.5V +1.5VSUS
+VTT +1.05V
P26
P25
CK505
P36 P37 P38 P39 P40 P41 P42
P3
LAYER 7 : GND2 LAYER 8 : BOT
DDRIII-SODIMM1 DDRIII-SODIMM2
P14,15
Dual Channel DDR III 800/1066/1333 MHZ
Arrandale (UMA+VGA)
PCI-E
INT_LVDS INT_CRT INT_HDMI
daughter board
rPGA 989
SATA - HDD
B B
P29
USB Con.(Right)
Cardreader
P32
C C
Cardreader Con. 3 IN 1
P32
Re-Driver
SATA - ODD
daughter board
SIM CARD.
USB Con.(Left)
USB Con.(Left)
P26
P27
P28
P28
P29
P29
USB-8
USB-3
USB-4
USB-13
USB-9
SATA 0
SATA 1
USB 2.0 (Port0~13)
BATTERY
P9
Azalia
DDR SYSTEM MEMORY
SATA
USB
RTC
IHDA
FDI
FDI
Ibex Peak-M
PCH
P9, 10, 11,12,13
P4, 5, 6,7
LPC
LPC
DMI
DMI
DMI(x4)
PCI-E
NVRAM
Graphics Interfaces
PCI-Express
PCIE-3
PCIE-5
PCIE-6
USB-10
USB-5
3G
P27
WLAN
P27
Giga/10/100 Lan
P31
+1.8V
Audio Codec
P30
Port-B
D D
MDC Con.
P30 P30 P30 P30
Port-A
HP SPK Con.MIC JACK
FAN
K/B Con.
HALL Sensor
EC
P33
SPI Flash
P4
P33P34 P34P4 P34
Touch Pad /B Con.
Power /B Con.
+1.5V_S5 +3VPCU
+3V_S5 +3V +5VPCU +5V_S5 +5V +SMDDR_VTERM +SMDDR_VREF
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Block Diagram
Block Diagram
Block Diagram
Date: Sheet of
Date: Sheet of
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Date: Sheet of
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PROJECT :
TE4
TE4
TE4
8
1 46Friday, November 12, 2010
1 46Friday, November 12, 2010
1 46Friday, November 12, 2010
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Table of Contents
PAGE DESCRIPTION
Schematic Block Diagram
1
Front Page
2
A A
3
Clock Gen Processor
4-7
8
S3 Power Reduction
9-13
PCH RTC
9
14-15
DDRIII SO-DIMM HDMI comm part
25
LCD Panel
26
CRT & CRT BUS SWITCH CCD HALL SENSOR&BACK LIGHT SWITCH MINI Card (Wi-Fi & WIMAX)
27
MINI Card 2nd MINI Card 3nd
28
USB 2.0 SATA ODD
29
Main SATA HDD & 2nd SATA HDD Codec (CX20587)
30 31
B B
Atheros LAN 3 IN 1 Card reader
32
EC NPCE791L
33 34
INT KeyBoard & K/B LED Power TP board Power SW HOLE
35
LED / EMI
36
Charger (ISL88731C)
37
System 5V/3V (PM6686TR)
38
DDR1.5V(RT8207L)/1.05VSUS
39
+VTT/+1.05V (G5602R41U) VAXG_CORE RT8152C FOR UMA
40
+VCC_CORE(ISL62882HRTZ-T)
41
+1.8V (G966A)/Discharge
42
POWER PLANE
VIN +VCCRTC +3V +3V_S5 +3V_HDP +3VPCU +5V +5V_S5 +5VPCU WIMAX_P +1.8V +1.5V
+VCC_CORE +VTT +1.05V +VAXG
GND PLANE PAGE
8769AGND Audio_GND Shield_GND
GND ALL
ISL95870A_AGND
VOLTAGE
10V~+19V
+3.0V~+3.3V
+3.3V +3.3V +3.3V +3.3V +5V +5V +5V +3.3V +1.8V +1.5V +1.5V+1.5V_SUS SUSON
+1.05V +1.05V
33 30 30
30
CONTROL SIGNAL
MAIN_ON S5_ON MAIN_ON AC/DC Insert enable MAIN_ON S0 S5_ON S0~S5 AC/DC Insert enable WMAX_P for WLAN MAIN_ON MAIN_ON
VRON MAIN_ON MAIN_ON MPWROK
Power States
ACTIVE IN
S0~S5 S0~S5 S0 S0~S5 S0 S0
S0~S5
S0 S0 S0~S3 S0 S0 S0 S0
02
C C
D D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
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Size Document Number Rev
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POWER STAGE AND BOI-FUNCTION
POWER STAGE AND BOI-FUNCTION
POWER STAGE AND BOI-FUNCTION
Date: Sheet of
Date: Sheet of
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Date: Sheet of
PROJECT :
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TE4
TE4
TE4
1A
1A
2 46Friday, November 12, 2010
2 46Friday, November 12, 2010
2 46Friday, November 12, 2010
1A
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CLOCK Gen
+3V
L17 PBY160808T-601Y-N_1AL17 PBY160808T-601Y-N_1A
D D
+1.5V
L7 595@PBY160808T-601Y-N_1AL7 595@PBY160808T-601Y-N_1A
C C
CLK_PCH_14M{10}
[CLK]
C435
C435 10U/6.3V_8X
10U/6.3V_8X
C233
C233 595@10U/6.3V_8X
595@10U/6.3V_8X
CLK_PCH_14M
C239
C239
0.1U/10V_4X
0.1U/10V_4X
C7335
C7335 *0.1U/10V_4X
*0.1U/10V_4X
250mA(20mils)
C229
C229
0.1U/10V_4X
0.1U/10V_4X
150mA(20mils)
C234
C234 *0.1U/10V_4X
*0.1U/10V_4X
R133 33_4R133 33_4
C225
C225 *15P/50V_4C
*15P/50V_4C
C243
C243 *0.1U/10V_4X
*0.1U/10V_4X
4
Pin1/17/24 Sligo595 =>1.5V (AL000595000) Sligo590 =>3.3V (AL8SP590000)
+3V_CK505_VDD
R397
R397 *590@0_6
*590@0_6
+1.5V_CK505_VDD
XTAL_OUT
XTAL_IN
CPU_SEL
CGDAT_SMB CGCLK_SMB
U9
U9
5
VDD_27
29
VDD_REF
1
VDD_DOT_1.5
17
VDD_SRC_1.5
24
VDD_CPU_1.5
27
XTAL_OUT
28
XTAL_IN
30
REF_0/CPU_SEL
31
SDA
32
SCL
2
VSS_DOT
8
VSS_27
9
VSS_SATA
12
VSS_SRC
21
VSS_CPU
26
VSS_REF
33
GND
SLG8LV595VTR
SLG8LV595VTR
3
VDD_SRC_I/O VDD_CPU_I/O
SRC_1/SATA
SRC_1#/SATA#
*CPU_STOP#
CKPWRGD/PD#
DOT_96
DOT_96#
27M_SS
SRC_2
SRC_2#
CPU_1
CPU_1#
CPU_0
CPU_0#
2
+VDDIO_CLK
15 18
DREFCLK_R
3
DREFCLK#_R
4
CLK_VGA_27M_R
6
27M
CLK_VGA_27M#_R
7
DREFSSCLK_R
10
DREFSSCLK#_R
11
PCIE_3GPLL_R
13
PCIE_3GPLL#_R
14
ICS_CPU_STOP#
16
CLK_BUF_BCLK1_P_R
20
CLK_BUF_BCLK1_N_R
19
CLK_BUF_BCLK0_P_R
23
CLK_BUF_BCLK0_N_R
22
VR_PWRGD_CLKEN
25
80mA(20mils)
C249
C249 *10U/6.3V_8X
*10U/6.3V_8X
R411 10K_4R411 10K_4
TP31TP31 TP30TP30
C7354
C246
C246 10U/6.3V_8X
10U/6.3V_8X
C7354
0.1U/10V_4X
0.1U/10V_4X
RP3
RP3
2 4
R186 *EV@33_4R186 *EV@33_4 R190 EV@33_4R190 EV@33_4 R197 *33_4R197 *33_4
RP4 *short_4P2RRP4 *short_4P2R
2 4
RP5 *short_4P2RRP5 *short_4P2R
2 4
+3V
RP2 *short_4P2RRP2 *short_4P2R
4 2
1 3
1 3 1 3
3 1
L8 PBY160808T-601Y-N_1AL8 PBY160808T-601Y-N_1A
C240
C240
0.1U/10V_4X
0.1U/10V_4X
*short_4P2R
*short_4P2R
CLK_BUF_DREFCLKP {10} CLK_BUF_DREFCLKN {10}
PCH_CLK_27M
TP35TP35
CLK_BUF_DREFSSCLKP {10} CLK_BUF_DREFSSCLKN {10} CLK_BUF_PCIE_3GPLLP {10} CLK_BUF_PCIE_3GPLLN {10}
CLK_BUF_BCLKP {10} CLK_BUF_BCLKN {10}
1
03
+1.05V
CLK CRYSTAL CLK CPU_SEL CLK POWERGOOD
B B
+3V
R134
R134 *10K_4
*10K_4
Y2
XTAL_IN XTAL_OUT
C230
C230 33P/50V_4N
33P/50V_4N
A A
Y2
21
14.318MHZ_30
14.318MHZ_30 C231
C231 33P/50V_4N
33P/50V_4N
CPU_SEL
5
CPU_SEL
R136
R136 10K_4
10K_4
0 1
CPU =133MHz (default)
CPU=100MHz
4
CLK I2C
+3V
R378
2
SDATA{10,31}
SCLK{10,31}
3
2N7002_200MA
2N7002_200MA Q32
Q32
3
2N7002_200MA
2N7002_200MA Q34
Q34
3
+3V 2
R378 10K_4
10K_4
1
1
CGDAT_SMB
R398
R398 10K_4
10K_4
CGCLK_SMB
CGDAT_SMB{14,15,27}
CGCLK_SMB{14,15,27}
2
+3VPCU
VR_PWRGD_CK505#{41}
R138 10K_4R138 10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
Date: Sheet of
Date: Sheet of
Date: Sheet of
VR_PWRGD_CLKEN
3
R137
TE4
TE4
TE4
R137 100K/F_4
100K/F_4
3 46Monday, January 24, 2011
3 46Monday, January 24, 2011
3 46Monday, January 24, 2011
Q12
Q12
2
2N7002_200MA
2N7002_200MA
1
Quanta Computer Inc.
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PROJECT :
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A1A
A1A
A1A
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U19A
U19A
FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7
FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7
A24 C23 B22 A21
B24 D23 B23 A22
D24
G24
F23 H23
D25 F24 E23
G23
E22 D21 D19 D18
G21
E19 F21
G18
D22 C21 D20 C18
G22
E20 F20
G19
F17 E17
C17 F18
D17
DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]
DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]
DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]
DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]
FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7]
FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7]
FDI_FSYNC[0] FDI_FSYNC[1]
FDI_INT FDI_LSYNC[0]
FDI_LSYNC[1]
ACA-ZIF-069-K01
ACA-ZIF-069-K01
DMI
DMI
DMI_TXN0{11} DMI_TXN1{11} DMI_TXN2{11} DMI_TXN3{11}
DMI_TXP0{11} DMI_TXP1{11} DMI_TXP2{11}
A A
B B
DMI_TXP3{11}
DMI_RXN0{11} DMI_RXN1{11} DMI_RXN2{11} DMI_RXN3{11}
DMI_RXP0{11} DMI_RXP1{11} DMI_RXP2{11} DMI_RXP3{11}
2.7GT/s data rate
FDI_TXN[7:0]{11}
FDI_TXP[7:0]{11}
FDI_FSYNC0{11} FDI_FSYNC1{11}
FDI_INT{11}
FDI_LSYNC0{11} FDI_LSYNC1{11}
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS PEG_RX#[0]
PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
Intel(R) FDI
Intel(R) FDI
PEG_TX#[8]
PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]
PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]
B26 A26 B27 A25
K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31
J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30
L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26
L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25
PEG_COMP
PEG_RBIASPEG_RBIAS
R7350 49.9/F_4R7350 49.9/F_4
R7351 750/F_4R7351 750/F_4
del in UMA
PLTRST#{11,27,31,33}
PM_SYNC{11}
H_PWRGOOD{12}
PM_DRAM_PWRGD{8,11}
R7135 1.5K/F_4R7135 1.5K/F_4
R66 750/F_4R66 750/F_4
R83 20/F_4R83 20/F_4 R87 20/F_4R87 20/F_4 R55 49.9/F_4R55 49.9/F_4 R89 49.9/F_4R89 49.9/F_4
TP7TP7
H_PECI{12}
TP11TP11
TP10TP10 TP13TP13 TP9TP9 TP8TP8 TP5TP5 TP4TP4 TP12TP12 TP6TP6
JTAG MAPPING
H_CATERR# H_PROCHOT#_D
CPU_PM_THRMTRIP#
H_CPURST#_R
PM_DRAM_PWRGD
H_VTTPWRGD CPU_PLTRST#
XDP_TDI_R XDP_TDO_M
XDP_TDI_M XDP_TDO_R
H_COMP3 H_COMP2 H_COMP1 H_COMP0
XDP_OBS0 XDP_OBS1 XDP_OBS2 XDP_OBS3 XDP_OBS4 XDP_OBS5 XDP_OBS6 XDP_OBS7
Ra Rb
Rc
R103
R103 *short_4
*short_4
Rd Re
U19B
U19B
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM26
TAPPWRGOOD
AM15
VTTPWRGOOD
AL14
RSTIN#
PWR MANAGEMENT
PWR MANAGEMENT
AJ22
BPM#[0]
AK22
BPM#[1]
AK24
BPM#[2]
AJ24
BPM#[3]
AJ25
BPM#[4]
AH22
BPM#[5]
AK23
BPM#[6]
AH23
BPM#[7]
ACA-ZIF-069-K01
ACA-ZIF-069-K01
R115 *short_4R115 *short_4 R101 *0_4R101 *0_4
R102 *0_4R102 *0_4 R100 *short_4R100 *short_4
MISC
MISC
CLOCKS
CLOCKS
THERMAL
THERMAL
JTAG & BPM
JTAG & BPM
DDR3
DDR3 MISC
MISC
XDP_TDI
XDP_TDO
XDP_TRST#
R99
R99 51_4
51_4
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
PM_EXT_TS#[0] PM_EXT_TS#[1]
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
PRDY# PREQ#
TRST#
TDI_M
TDO_M
DBR#
A16 B16
AR30 AT30
E16 D16
CLK_DREFSSCLKP_R
A18
CLK_DREFSSCLKN_R
A17
DDR3_DRAMRST#_C
F6
SM_RCOMP_0
AL1
SM_RCOMP_1
AM1
SM_RCOMP_2
AN1
PM_EXT_TS#0
AN15
PM_EXT_TS#1
AP15
AT28 AP27 AN28
TCK
AP28
TMS
AT27 AT29
TDI
AR27
TDO
AR29 AP29
AN25
Processor hot
throttle
CLK_CPU_BCLKP {12} CLK_CPU_BCLKN {12}
TP17TP17 TP19TP19
CLK_PCIE_3GPLLP {10}
+VTT
+VTT
+VTT
Rb
CLK_PCIE_3GPLLN {10}
CLK_DREFSSCLKP {10} CLK_DREFSSCLKN {10}
DDR3_DRAMRST#_C {8}
PM_EXTTS#0{14} PM_EXTTS#1{15}
TP20TP20 TP14TP14 TP16TP16
TP18TP18 TP21TP21
SYS_RESET# {11}
R109
R109
68_4
68_4
H_PROCHOT#_D
XDP_PRDY#
XDP_PREQ# XDP_TCLK
XDP_TMS XDP_TRST# XDP_TDI_R
XDP_TDO_R XDP_TDI_M XDP_TDO_M
H_PROCHOT#{41}
R326 EV@0_4R326 EV@0_4
R323 *IV@0X2R323 *IV@0X2
4
3
2
1
R325 EV@0_4R325 EV@0_4
R353 100/F_4R353 100/F_4 R354 24.9/F_4R354 24.9/F_4 R355 130/F_4R355 130/F_4 R92 10K_4R92 10K_4 R95 *short_4R95 *short_4 R88 *short_4R88 *short_4 R90 10K_4R90 10K_4
Ra
R114 *short_4R114 *short_4
If Ra no stuff must change Rb to 50 ohm
04
For EDP
Scan Chain (Default)
CPU Only
C C
VTT Power Good
R113 *short_4R113 *short_4
HWPG{33}
R112
R112 *short_4
*short_4
MPWROK{11,33}
R116 *0_4R116 *0_4
+3V
2 1
3 5
U5
U5
R111 *0_4R111 *0_4
Local Temperature
+3VPCU
VL
D D
R310
R310
R313
R313
150_4
150_4
*150_4
C3A
VL
R489 *0_4R489 *0_4
*150_4
+3VPCU_HW_SD
C367
C367
0.1U/10V_4X
0.1U/10V_4X
R488 0_4R488 0_4
5
4
U16
U16
VCC
HYST
G708T1U
G708T1U
#Shut down on 86 degree#
1
C3A
R315
R315
1
SET
GND
OT#
THM@22K/F_4
THM@22K/F_4
2
THER_SHD#
3
Cost Down Study
HWPG_1
4
TC7SH08FU(F)
TC7SH08FU(F)
R105 2K/F_4R105 2K/F_4
H_VTTPWRGD
R104
R104 1K/F_4
1K/F_4
H_CATERR# H_CPURST#_R
XDP_TMS XDP_TDI_R XDP_PREQ#
XDP_TCLK
R70 49.9/F_4R70 49.9/F_4 R360 *68_4R360 *68_4
R107 *51_4R107 *51_4 R110 *51_4R110 *51_4 R106 *51_4R106 *51_4
R94 *51_4R94 *51_4
+VTT
CPU FAN CTRL
+3VPCU+3VPCU
R311
R311
R312
R312
*330_4
*330_4
*10K_4
*10K_4 C33 2.2U/6.3V_6XC33 2.2U/6.3V_6X
2
1 3
Q25 *MMBT3904-7-F_200MAQ25 *MMBT3904-7-F_200MA
R316 *short_4R316 *short_4
SYS_SHDN# {37}
TEMP_ALERT#{12,33}
+3V
2
1
Q3 *2N7002_200MAQ3 *2N7002_200MA
D3B
2
3
4
FDI Disable (Discrete only)
+5V
3
GMCH Only
3mA(40mils)
CPUFAN#_ON_R_1TEMP_ALERT#
VFAN1{33}
5
R52 EV@1K_4R52 EV@1K_4 R49 EV@1K_4R49 EV@1K_4 R50 EV@1K_4R50 EV@1K_4 R48 EV@1K_4R48 EV@1K_4 R51 EV@1K_4R51 EV@1K_4
U1
VIN2VO
GND
1
/FON
GND GND
4
VSET
GND
G991P11UU1G991P11U
FANPWR = 1.6*VSET
STUFF -> Ra, Rc, Re NO STUFF -> Rb, Rd
STUFF -> Ra, Rb NO STUFF -> Rc, Rd, Re
STUFF -> Rd, Re NO STUFF -> Ra, Rb, Rc
FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1
40mils
3 5 6 7
C30
C30
8
10U/6.3V_8X
10U/6.3V_8X
TH_FAN_POWER1
Thermal Trip
+VTT
3
Q31
Q31
DELAY_VR_PWRGOOD{11,41}
+3V
R301
R301 10K_4
10K_4
CN7
C31
C31
0.01U/25V_4X
0.01U/25V_4X
FANSIG1
C348
C348 *0.01U/25V_4X
*0.01U/25V_4X
FANSIG1{33}
6
85205-0300L
85205-0300L
7
CN7
2
2N7002_200MA
2N7002_200MA
1
+VTT
R359
R359 *56.2/F_4
*56.2/F_4
1 2 3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
R365
R365 1K_4
1K_4 Q30
Q30
2
MMBT3904-7-F_200MA
MMBT3904-7-F_200MA
1 3
R84 *short_4R84 *short_4
PROCESSER 1/4(HOST&PEX)
PROCESSER 1/4(HOST&PEX)
PROCESSER 1/4(HOST&PEX)
Monday, January 24, 2011
Monday, January 24, 2011
Monday, January 24, 2011
SYS_SHDN#CPU_PM_THRMTRIP#
PM_THRMTRIP#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
TE4
TE4
TE4
8
R364
R364 100K_4
100K_4
SYS_SHDN# {37}
PM_THRMTRIP# {12}
4 46
4 46
4 46
A1A
A1A
A1A
1
HTTP://FAQP.RU/
2
3
4
5
6
7
8
05
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)
A A
U19C
M_A_DQ[63:0]{14}
B B
C C
M_A_BS#0{14} M_A_BS#1{14}
D D
1
M_A_BS#2{14}
M_A_CAS#{14} M_A_RAS#{14}
M_A_WE#{14}
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
U19C
A10
SA_DQ[0]
C10
SA_DQ[1]
C7
SA_DQ[2]
A7
SA_DQ[3]
B10
SA_DQ[4]
D10
SA_DQ[5]
E10
SA_DQ[6]
A8
SA_DQ[7]
D8
SA_DQ[8]
F10
SA_DQ[9]
E6
SA_DQ[10]
F7
SA_DQ[11]
E9
SA_DQ[12]
B7
SA_DQ[13]
E7
SA_DQ[14]
C6
SA_DQ[15]
H10
SA_DQ[16]
G8
SA_DQ[17]
K7
SA_DQ[18]
J8
SA_DQ[19]
G7
SA_DQ[20]
G10
SA_DQ[21]
J7
SA_DQ[22]
J10
SA_DQ[23]
L7
SA_DQ[24]
M6
SA_DQ[25]
M8
SA_DQ[26]
L9
SA_DQ[27]
L6
SA_DQ[28]
K8
SA_DQ[29]
N8
SA_DQ[30]
P9
SA_DQ[31]
AH5
SA_DQ[32]
AF5
SA_DQ[33]
AK6
SA_DQ[34]
AK7
SA_DQ[35]
AF6
SA_DQ[36]
AG5
SA_DQ[37]
AJ7
SA_DQ[38]
AJ6
SA_DQ[39]
AJ10
SA_DQ[40]
AJ9
SA_DQ[41]
AL10
SA_DQ[42]
AK12
SA_DQ[43]
AK8
SA_DQ[44]
AL7
SA_DQ[45]
AK11
SA_DQ[46]
AL8
SA_DQ[47]
AN8
SA_DQ[48]
AM10
SA_DQ[49]
AR11
SA_DQ[50]
AL11
SA_DQ[51]
AM9
SA_DQ[52]
AN9
SA_DQ[53]
AT11
SA_DQ[54]
AP12
SA_DQ[55]
AM12
SA_DQ[56]
AN12
SA_DQ[57]
AM13
SA_DQ[58]
AT14
SA_DQ[59]
AT12
SA_DQ[60]
AL13
SA_DQ[61]
AR14
SA_DQ[62]
AP14
SA_DQ[63]
AC3
SA_BS[0]
AB2
SA_BS[1]
U7
SA_BS[2]
AE1
SA_CAS#
AB3
SA_RAS#
AE9
SA_WE#
ACA-ZIF-069-K01
ACA-ZIF-069-K01
2
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CK[0] SA_CK#[0] SA_CKE[0]
SA_CK[1] SA_CK#[1] SA_CKE[1]
SA_CS#[0] SA_CS#[1]
SA_ODT[0] SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
3
AA6 AA7 P7
Y6 Y5 P6
AE2 AE8
AD8 AF9
B9 D7 H7 M7 AG6 AM7 AN10 AN13
C9 F8 J9 N9 AH7 AK9 AP11 AT13
C8 F9 H9 M9 AH8 AK10 AN11 AR13
Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5
M_A_DQSN6
M_A_DQSN7 M_A_DQSP0
M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15
M_A_CLKP0{14} M_A_CLKN0{14} M_A_CKE0{14}
M_A_CLKP1{14} M_A_CLKN1{14} M_A_CKE1{14}
M_A_CS#0{14} M_A_CS#1{14}
M_A_ODT0{14} M_A_ODT1{14} M_A_DM[7:0]{14}
DM signals are not present on Clarkfield processor. All DM signal can be left as NC on Clarkfield and connect directly to GND on So-DIMM side for Clarkfield design only
M_A_DQSN[7:0] {14}
M_A_DQSP[7:0] {14}
M_A_A[15:0]{14}
4
M_B_DQ[63:0]{15}
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
M_B_BS#0{15} M_B_BS#1{15} M_B_BS#2{15}
M_B_CAS#{15} M_B_RAS#{15}
M_B_WE#{15}
5
AM6 AN2
AM4 AM3
AN5 AN6
AN4 AN3
AN7
AR10 AT10
AF3 AG1
AK1 AG4 AG3
AH4 AK3 AK4
AK5 AK2
AP3 AT4
AT5 AT6
AP6 AP8 AT9 AT7 AP9
AB1
AC5 AC6
B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2
J6
J3 G1 G5
J2
J1
J5 K2 L3 M1 K5 K4 M4 N5
AJ3
AJ4
W5
R7
Y7
U19D
U19D
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
ACA-ZIF-069-K01
ACA-ZIF-069-K01
W8
SB_CK[0]
W9
SB_CK#[0]
M3
SB_CKE[0]
V7
SB_CK[1]
V6
SB_CK#[1]
M2
SB_CKE[1]
AB8
SB_CS#[0]
AD6
SB_CS#[1]
AC7
SB_ODT[0]
AD1
SB_ODT[1]
SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9]
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
6
D4 E1 H3 K1 AH1 AL2 AR4 AT8
D5 F4 J4 L4 AH2 AL4 AR5 AR8
C5 E3 H4 M5 AG2 AL5 AP5 AR7
U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7
M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
M_B_CLKP0{15} M_B_CLKN0{15} M_B_CKE0{15}
M_B_CLKP1{15} M_B_CLKN1{15} M_B_CKE1{15}
M_B_CS#0{15} M_B_CS#1{15}
M_B_ODT0{15} M_B_ODT1{15} M_B_DM[7:0]{15}
DM signals are not present on Clarkfield processor. All DM signal can be left as NC on Clarkfield and connect directly to GND on So-DIMM side for Clarkfield design only
M_B_DQSN[7:0] {15}
M_B_DQSP[7:0] {15}
M_B_A[15:0]{15}
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROCESSER 2/4(DDR)
PROCESSER 2/4(DDR)
PROCESSER 2/4(DDR)
Monday, January 24, 2011
Monday, January 24, 2011
Monday, January 24, 2011
7
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
TE4
TE4
TE4
5 46
5 46
5 46
8
A1A
A1A
A1A
1
HTTP://FAQP.RU/
2
3
4
5
6
7
8
U19F
U19F
+VCC_CORE
C193 10U/6.3V_8XC193 10U/6.3V_8X C162 10U/6.3V_8XC162 10U/6.3V_8X
A A
B B
C C
D D
C190 10U/6.3V_8XC190 10U/6.3V_8X C159 10U/6.3V_8XC159 10U/6.3V_8X C160 10U/6.3V_8XC160 10U/6.3V_8X C192 10U/6.3V_8XC192 10U/6.3V_8X C181 10U/6.3V_8XC181 10U/6.3V_8X C191 10U/6.3V_8XC191 10U/6.3V_8X C179 10U/6.3V_8XC179 10U/6.3V_8X C182 10U/6.3V_8XC182 10U/6.3V_8X C417 10U/6.3V_8XC417 10U/6.3V_8X C157 10U/6.3V_8XC157 10U/6.3V_8X C180 10U/6.3V_8XC180 10U/6.3V_8X C424 10U/6.3V_8XC424 10U/6.3V_8X C161 10U/6.3V_8XC161 10U/6.3V_8X C194 0.1U/10V_4XC194 0.1U/10V_4X C419 0.1U/10V_4XC419 0.1U/10V_4X C175 *0.047U/10V_4XC175 *0.047U/10V_4X C185 *0.047U/10V_4XC185 *0.047U/10V_4X C423 *0.047U/10V_4XC423 *0.047U/10V_4X
C189 10U/6.3V_8XC189 10U/6.3V_8X C420 10U/6.3V_8XC420 10U/6.3V_8X C153 10U/6.3V_8XC153 10U/6.3V_8X C425 10U/6.3V_8XC425 10U/6.3V_8X C174 10U/6.3V_8XC174 10U/6.3V_8X C167 10U/6.3V_8XC167 10U/6.3V_8X C183 *10U/6.3V_8XC183 *10U/6.3V_8X C188 *10U/6.3V_8XC188 *10U/6.3V_8X
1
AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26
AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26
AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26
AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26
Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100
ACA-ZIF-069-K01
ACA-ZIF-069-K01
1.1V RAIL POWERSENSE LINES CPU VIDS
1.1V RAIL POWERSENSE LINES CPU VIDS
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
PROC_DPRSLPVR
VSS_SENSE_VTT
2
VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8
VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32
VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
VTT_SELECT
ISENSE
VTT_SENSE
VCC_SENSE VSS_SENSE
PSI#
AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15
AN33
AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34
G15
H_VTTVID1=Low, 1.1V H_VTTVID1=High, 1.05V
AN35 B15
A15
AJ34 AJ35
18A
+VTT
C418 10U/6.3V_8XC418 10U/6.3V_8X C416 10U/6.3V_8XC416 10U/6.3V_8X C397 10U/6.3V_8XC397 10U/6.3V_8X C171 10U/6.3V_8XC171 10U/6.3V_8X C151 10U/6.3V_8XC151 10U/6.3V_8X C403 10U/6.3V_8XC403 10U/6.3V_8X C163 10U/6.3V_8XC163 10U/6.3V_8X
+
+
C369 *330U/2V_7343P_E6b
C369 *330U/2V_7343P_E6b
VTT Rail Values are Auburndal VTT=1.05V
C103 10U/6.3V_8XC103 10U/6.3V_8X C100 10U/6.3V_8XC100 10U/6.3V_8X
(15mils)
+VTT_43
R54 *short_6R54 *short_6
+VTT_44
R56 *short_6R56 *short_6
PSI#
VID0 VID1 VID2 VID3 VID4 VID5 VID6 ICH_DPRSTP#
ISENSE
VTT_SENSE TP_VSS_SENSE_VTT
R75 100/F_4R75 100/F_4
R77 100/F_4R77 100/F_4
3
PSI# {41}
H_VID0 {41} H_VID1 {41} H_VID2 {41} H_VID3 {41} H_VID4 {41} H_VID5 {41} H_VID6 {41}
ICH_DPRSTP# {41}
TP2TP2
ISENSE {41}
TP72TP72 TP73TP73
+VCC_CORE
VCCSENSE {41} VSSSENSE {41}
+VTT
+VAXG
+
+
+VCC_CORE
+
+
C431
C431 *IV@330U/2V_7343P_E6b
*IV@330U/2V_7343P_E6b
+VAXG
C213 IV@10U/6.3V_8XC213 IV@10U/6.3V_8X C429 IV@10U/6.3V_8XC429 IV@10U/6.3V_8X C216 IV@10U/6.3V_8XC216 IV@10U/6.3V_8X C430 IV@10U/6.3V_8XC430 IV@10U/6.3V_8X C422 IV@10U/6.3V_8XC422 IV@10U/6.3V_8X C214 IV@10U/6.3V_8XC214 IV@10U/6.3V_8X C215 IV@10U/6.3V_8XC215 IV@10U/6.3V_8X C421 IV@10U/6.3V_8XC421 IV@10U/6.3V_8X
R91 EV@0_8R91 EV@0_8
C414
C414 *330U/2V_7343P_E6b
*330U/2V_7343P_E6b
4
C432
C432
+
+
*IV@330U/2V_7343P_E6b
*IV@330U/2V_7343P_E6b
+VTT
+VTT
C415
C415
+
+
*330U/2V_7343P_E6b
*330U/2V_7343P_E6b
C138 10U/6.3V_8XC138 10U/6.3V_8X C400 10U/6.3V_8XC400 10U/6.3V_8X
C375 10U/6.3V_8XC375 10U/6.3V_8X C370 10U/6.3V_8XC370 10U/6.3V_8X C186 10U/6.3V_8XC186 10U/6.3V_8X C177 10U/6.3V_8XC177 10U/6.3V_8X
U19G
U19G
AT21
VAXG1
AT19
VAXG2
AT18
VAXG3
AT16
VAXG4
AR21
VAXG5
AR19
VAXG6
AR18
VAXG7
AR16
VAXG8
AP21
VAXG9
AP19
VAXG10
AP18
VAXG11
AP16
VAXG12
AN21
VAXG13
AN19
VAXG14
AN18
VAXG15
AN16
VAXG16
AM21
VAXG17
AM19
VAXG18
AM18
VAXG19
AM16
VAXG20
AL21
VAXG21
AL19
VAXG22
AL18
VAXG23
AL16
VAXG24
AK21
VAXG25
AK19
VAXG26
AK18
VAXG27
AK16
VAXG28
AJ21
VAXG29
AJ19
VAXG30
AJ18
VAXG31
AJ16
VAXG32
AH21
VAXG33
AH19
VAXG34
AH18
VAXG35
AH16
VAXG36
J24
VTT1_45
J23
VTT1_46
H25
VTT1_47
K26
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51
H27
VTT1_52
G28
VTT1_53
G27
VTT1_54
G26
VTT1_55
F26
VTT1_56
E26
VTT1_57
E25
VTT1_58
ACA-ZIF-069-K01
ACA-ZIF-069-K01
HFM_VID : Max 1.4V LFM_VID : Min 0.65V
5
SENSE
SENSE
GRAPHICS
GRAPHICS
POWER
POWER
FDI PEG & DMI
FDI PEG & DMI
VID0
VID1
VID2
VID3
VID4
VID5
VID6
ICH_DPRSTP#
PSI#
AR22
VAXG_SENSE
GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]
GFX_VR_EN
GFX_IMON
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18
VTT0_59 VTT0_60 VTT0_61 VTT0_62 VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68
VCCPLL1 VCCPLL2 VCCPLL3
R343 1K_4R343 1K_4 R342 *1K_4R342 *1K_4
R341 1K_4R341 1K_4 R340 *1K_4R340 *1K_4
R345 1K_4R345 1K_4 R344 *1K_4R344 *1K_4
R347 *1K_4R347 *1K_4 R346 1K_4R346 1K_4
R349 *1K_4R349 *1K_4 R348 1K_4R348 1K_4
R351 1K_4R351 1K_4 R350 *1K_4R350 *1K_4
R352 *1K_4R352 *1K_4 R356 1K_4R356 1K_4
R7435 1K_4R7435 1K_4 R357 *1K_4R357 *1K_4
R361 *1K_4R361 *1K_4 R363 1K_4R363 1K_4
AT22
AM22 AP22 AN22 AP23 AM23 AP24 AN24
AR25 AT25 AM24
AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1
P10 N10 L10 K10 J22 J20 J18 H21 H20 H19
L26 L27 M26
VSSAXG_SENSE
LINES
LINES
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V1.8V
1.1V1.8V
6
del in VGA
GFXVR_EN
C184 *330U/2V_7343P_E6b
C184 *330U/2V_7343P_E6b
TP15TP15
R362 EV@1K_4R362 EV@1K_4
C154 1U/6.3V_4XC154 1U/6.3V_4X C169 1U/6.3V_4XC169 1U/6.3V_4X C172 1U/6.3V_4XC172 1U/6.3V_4X C166 1U/6.3V_4XC166 1U/6.3V_4X C148 1U/6.3V_4XC148 1U/6.3V_4X C178 10U/6.3V_8XC178 10U/6.3V_8X C187 10U/6.3V_8XC187 10U/6.3V_8X
+
+
C407 10U/6.3V_8XC407 10U/6.3V_8X C412 10U/6.3V_8XC412 10U/6.3V_8X C399 10U/6.3V_8XC399 10U/6.3V_8X C398 10U/6.3V_8XC398 10U/6.3V_8X
C137 10U/6.3V_8XC137 10U/6.3V_8X C141 4.7U/6.3V_6XC141 4.7U/6.3V_6X C140 2.2U/6.3V_6XC140 2.2U/6.3V_6X C142 1U/6.3V_4XC142 1U/6.3V_4X C402 1U/6.3V_4XC402 1U/6.3V_4X
+VTT
06
VCC_AXG_SENSE {40} VSS_AXG_SENSE {40}
GFXVR_VID_0 {40} GFXVR_VID_1 {40} GFXVR_VID_2 {40} GFXVR_VID_3 {40} GFXVR_VID_4 {40} GFXVR_VID_5 {40} GFXVR_VID_6 {40}
GFXVR_EN {40} GFXVR_DPRSLPVR {40}
GFXVR_IMON {40}
+VTT
+1.8V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, January 24, 2011
Date: Sheet of
Monday, January 24, 2011
Date: Sheet of
Monday, January 24, 2011
7
del in VGA
+1.5V_CPUVDDQ
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PROCESSER 3/4(POWER)
PROCESSER 3/4(POWER)
PROCESSER 3/4(POWER)
TE4
TE4
TE4
6 46
6 46
6 46
8
A1A
A1A
A1A
1
HTTP://FAQP.RU/
2
3
4
5
6
7
8
AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U19H
U19H
AT20
VSS1
AT17
VSS2
AR31
VSS3
A A
B B
C C
D D
The Clarkfield processor's PCI Express interface may not meet PCI Express 2.0 jitter specifications. Intel recommends placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin for both rPGA and BGA components. This pull down resistor should be removed when this issue is fixed.
AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12
AR9 AR6
AR3 AP20 AP17 AP13 AP10
AP7
AP4
AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11
AM8
AM5
AM2
AL34 AL31 AL23 AL20 AL17 AL12
AK29 AK27 AK25 AK20 AK17
AJ31 AJ23 AJ20 AJ17 AJ14 AJ11
AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13
AH9
AH6
AH3 AG10
AE35
AL9 AL6 AL3
AJ8 AJ5 AJ2
AF8 AF4 AF2
1
VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37
VSS
VSS
VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80
ACA-ZIF-069-K01
ACA-ZIF-069-K01
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30
R358 *short_4R358 *short_4 R327 *short_4R327 *short_4 R53 *short_4R53 *short_4
2
3
AT35
AR34
K27
K9 K6
K3 J32 J30 J21 J19
H35 H32 H28 H26 H24 H22 H18 H15 H13 H11
H8
H5
H2
G34 G31 G20
G9
G6
G3 F30 F27 F25 F22 F19 F16
E35 E32 E29 E24 E21 E18 E13 E11
E8
E5
E2
D33 D30 D26
D9
D6
D3
C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11
B8
B6
B4
A29 A27 A23
A9
AT1 B34
B2
B1
A35
U19I
U19I
VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198
VSS
VSS
VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233
VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7
ACA-ZIF-069-K01
ACA-ZIF-069-K01
NCTF
NCTF
CFG4 (Display Port Presence)
CFG0 (PCI-Epress Configuration Select)
CFG3 (PCI-Epress Static Lane Reversal)
4
U19E
U19E
CFG0
CFG3 CFG4
CFG7
AM30 AM28
AP31 AL32
AL30 AM31 AN29 AM32
AK32
AK31
AK28
AJ28 AN30 AN32
AJ32
AJ29
AJ30
AK30
AP25
AL25
AL24
AL22
AJ33
AG9 M27
AC9
AJ13
AJ12 AH25
AK26
AL26
AR2 AJ26 AJ27
J17
H17
H16
L28
G25 G17 E31 E30 B19 A19 A20 B20
U9
T9
AB9
C1
A3 J29 J28
A34 A33 C35
B35
AP1
SA_DIMM_VREF SB_DIMM_VREF
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8
RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20
RSVD21 RSVD22 RSVD_NCTF_23 RSVD_NCTF_24 RSVD26 RSVD27 RSVD_NCTF_28 RSVD_NCTF_29 RSVD_NCTF_30
RSVD_NCTF_31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD_NCTF_37 RSVD38 RSVD39 RSVD_NCTF_40
ACA-ZIF-069-K01
ACA-ZIF-069-K01
RESERVED
RESERVED
DDR_VREF_DQ0{14} DDR_VREF_DQ1{15}
TP3TP3
R7352 *0_4R7352 *0_4 R7353 *0_4R7353 *0_4
CFG[ 1:0 ] - PCI_Epress Configuration Select * 11= 1 x 16 PEG * 10= 2 x 8 PEG
TP_RSVD17_R TP_RSVD18_R
1 0
Disabled; No Physical Display Port attached to Embedded Diplay Port
Single PEG
Normal Operation Lane Numbers Reversed
5
Enabled; An external Display port device is connected to the Embedded Display port
Bifurcation enabled
15 -> 0 , 14 -> 1
6
RSVD_NCTF_41 RSVD_NCTF_42 RSVD_NCTF_43
RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50
RSVD51 RSVD52
RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57
RSVD58
RSVD_TP_59 RSVD_TP_60
RSVD62
RSVD63
RSVD64
RSVD65
RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70
RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75 RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80
RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85
KEY
VSS
AT2 AT3 AR1 AL28 AL29 AP30 AP32 AL27 AT31
AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 E15 F15
A2 D15 C15
RSVD64_R RSVD65_R
R69 *0_4R69 *0_4 R68 *0_4R68 *0_4
TP74TP74
AJ15 AH15 AA5 AA4 R8 AD3 AD2
AA2 AA1 R9 AG7 AE3 V4 V5 N2 AD5 AD7
W3 W2 N3 AE5 AD9
AP34
For Discrete only
CFG0
R97 *3.01K/F_4R97 *3.01K/F_4
CFG3
R96 3.01K/F_4R96 3.01K/F_4
CFG4
R93 *3.01K/F_4R93 *3.01K/F_4
CFG7
R98 *3.01K/F_4R98 *3.01K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, January 24, 2011
Date: Sheet of
Monday, January 24, 2011
Date: Sheet of
Monday, January 24, 2011
7
PROJECT :
PROCESSER 4/4 (GND)
PROCESSER 4/4 (GND)
PROCESSER 4/4 (GND)
07
TE4
TE4
TE4
7 46
7 46
7 46
A1A
A1A
A1A
8
S3 Power Enable
HTTP://FAQP.RU/
5
4
3
2
1
DRAM Reset
+1.5VSUS
S3_1.5V{38}
D D
C C
S3_1.5V
PQ3
PQ3 2N7002K_300MA
2N7002K_300MA
PR60 *0/F_6PR60 *0/F_6
PR54 100K_4PR54 100K_4
1 2
3
2
1
PR49
PR49
*Short_6
*Short_6
+3V_S5
PU4
PU4
4
TC7SH08FU(F)
TC7SH08FU(F)
PR53 *0_6PR53 *0_6
R27
R27 1K_4
2
1K_4
3
Q6
Q6
BSS138-7-F_0.2MA
BSS138-7-F_0.2MA
1
R25
R25 *0_4
*0_4
DDR3_DRAMRST#_PCH{12}
R37
R37 *100K_4
2 1
3 5
MAINON {13,33,39,42} +1.5V_CPUVDDQ_PG
S3_Reduce{33}
MAINON_ON_G {14,42}
DDR3_DRAMRST#_C{4}
*100K_4
R30
R30 100K_4
100K_4
C76
C76
0.1U/10V_4X
0.1U/10V_4X
DDR3_DRAMRST#_C
08
DDR3_DRAMRST# {14,15}
VDDQ Power Good VDDQ Power Switch VDDQ Discharge
C82
C82
0.1U/10V_4X
0.1U/10V_4X
+3V_S5
2
R39
R39 10K/F_4
10K/F_4
2
3
Q7
Q7
FDV301N_200MA
FDV301N_200MA
1
R45
R45 10K/F_4
10K/F_4
3
Q8
Q8 2N7002_200MA
2N7002_200MA
1
+1.5V_CPUVDDQ_PG
+15V
R314
R314 *100K_4
*100K_4
MAIND{37,38,42}
MAIND
C368
C368
0.01U/25V_4X
0.01U/25V_4X
+1.5V_CPUVDDQ
B B
R33 5.1K/F_4R33 5.1K/F_4
C3A
+1.5VSUS
578
3 6
241
+1.5V_CPUVDDQ
Q26
Q26 AO4466_9.4A
AO4466_9.4A
6A/maximum
C131
C131
0.1U/10V_4X
0.1U/10V_4X
+1.5VSUS
C136
C136
0.1U/10V_4X
0.1U/10V_4X
+1.5V_CPUVDDQ
C143
C143
0.1U/10V_4X
0.1U/10V_4X
C127
C127
0.1U/10V_4X
0.1U/10V_4X
+1.5V_CPUVDDQ
R322
R322 220_8
220_8
3
MAINON_ON_G{14,42}
2
Q27
Q27 2N7002K_300MA
2N7002K_300MA
1
Q7044可換AO6402A,cost down.
DRAM Power Good
R324
R324 10K/F_4
10K/F_4
A A
+1.5V_CPUVDDQ_PG
5
2 1
+3V_S5+3V_S5
3 5
U18
U18
4
TC7SH08FU(F)
TC7SH08FU(F)
PM_DRAM_PWRGD: Never drive hight before DDR3 voltage ramp to stable
R317 1.5K/F_4R317 1.5K/F_4
4
R320 *short_4R320 *short_4
R318
R318 750/F_4
750/F_4
PM_DRAM_PWRGD {4,11}
3
+1.5VSUS
R321
R321 *1.1K/F_4
*1.1K/F_4
PM_DRAM_PWRGD
R319
R319 *3K/F_4
*3K/F_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Monday, January 24, 2011
Date: Sheet of
Monday, January 24, 2011
Date: Sheet of
2
Monday, January 24, 2011
PROJECT :
S3 Power Reduction
S3 Power Reduction
S3 Power Reduction
1
TE4
TE4
TE4
8 46
8 46
8 46
A1A
A1A
A1A
1
HTTP://FAQP.RU/
INTVRMEN - Integrated SUS 1.1V VRM Enable High - Enable Internal VRs
2
3
4
5
6
7
8
09
C447 12P/50V_4CC447 12P/50V_4C
23
32.768KHZ_20
32.768KHZ_20
A A
C446 12P/50V_4CC446 12P/50V_4C
+RTC_CELL +RTC_CELL
ACZ_SDIN0_AUDIO{30}
B B
4 1
R422 1M_4R422 1M_4 R415 330K_6R415 330K_6
PCBEEP{12,30}
TP45TP45 TP50TP50 TP53TP53
PCH_GPIO33{12,33}
TP44TP44
TP82TP82
SPI_SI_R{12}
IBEX PEAK-M (HDA,JTAG,SATA)
R414
R414 10M_4
10M_4
RTC_RST# SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
ACZ_BITCLK ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_RST#
SPI_CLK_R SPI_CS0#_R
SPI_CS1#
SPI_SI_R
SPI_SO
RTC_X1
RTC_X2
U22A
U22A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
JTAG_TMS
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
Ibex-M
Ibex-M 1 OF 10
1 OF 10
RTC
RTC
IHDA
IHDA
JTAG
JTAG
SPI
SPI
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V)
(+3V)
LPC
LPC
FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3
FWH4 / LFRAME# LDRQ1# / GPIO23
SATA
SATA
SATAICOMPO
SATAICOMPI
SATA0GP / GPIO21 SATA1GP / GPIO19
LDRQ0# SERIRQ
SATA0RXN SATA0RXP SATA0TXN SATA0TXP
SATA1RXN SATA1RXP SATA1TXN SATA1TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA3RXN SATA3RXP SATA3TXN SATA3TXP
SATA4RXN SATA4RXP SATA4TXN SATA4TXP
SATA5RXN SATA5RXP SATA5TXN SATA5TXP
SATALED#
LAD0 {27,33} LAD1 {27,33}
D33 B33 C32 A32 C34 A34 F34 AB9
AK7 AK6 AK11 AK9
AH6 AH5 AH9 AH8
AF11 AF9 AF7 AF6
AH3 AH1 AF3 AF1
AD9 AD8 AD6 AD5
AD3 AD1 AB3 AB1
AF16 AF15 T3
SATA_LED#
LAD2 {27,33} LAD3 {27,33}
LFRAME#{27,33}
LDRQ#1 {27}
SATA2/SATA3 HM55 not support
TP81TP81 TP77TP77 TP76TP76 TP75TP75
SATA_COMP
R211 37.4/F_4R211 37.4/F_4
R216 10K_4R216 10K_4 R7356 10K_4R7356 10K_4
+3V
R209
R209 10K_4
10K_4
+1.05V SATA_LED#{35}
del in VGA
+3V +3V
SERIRQ {27,33} SATA_RXN0{29}
SATA_RXP0{29} SATA_TXN0{29} SATA_TXP0{29}
SATA_RXN1{29} SATA_RXP1{29} SATA_TXN1{29} SATA_TXP1{29}
HDD
ODD
del in VGA
+3V
del in VGA
INT_LCD_TXLCLKOUT-{26} INT_LCD_TXLCLKOUT+{26}
INT_CRT_BLU{26} INT_CRT_GRE{26} INT_CRT_RED{26}
INT_CRT_DDCCLK{26} INT_CRT_DDCDAT{26}
INT_CRT_HSYNC{26} INT_CRT_VSYNC{26}
TP107TP107 TP106TP106
INT_LVDS_BRIGHT{26}
INT_LVDS_DIGON{26}
INT_LVDS_PWM{26}
INT_LCD_EDIDCLK{26}
INT_LCD_EDIDDATA{26}
R274 IV@10K_4R274 IV@10K_4 R273 IV@10K_4R273 IV@10K_4
B2A
INT_LCD_TXLOUT0-{26} INT_LCD_TXLOUT1-{26} INT_LCD_TXLOUT2-{26}
INT_LCD_TXLOUT0+{26} INT_LCD_TXLOUT1+{26} INT_LCD_TXLOUT2+{26}
TP57TP57
TP7047TP7047
TP7046TP7046
R457 IV@0_4R457 IV@0_4 R456 IV@0_4R456 IV@0_4
L_CTRL_CLK L_CTRL_DATA
LVDS_IBG
LVDS_VBG
LVDS_VREFH LVDS_VREFL
R267 1K/D_4R267 1K/D_4
IBEX PEAK-M (LVDS,DDI)
U22D
U22D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
AB48
L_DDC_CLK
Y45
L_DDC_DATA
AB46
L_CTRL_CLK
V48
L_CTRL_DATA
AP39
LVD_IBG
AP41
LVD_VBG
AT43
LVD_VREFH
AT42
LVD_VREFL
LVDS--A
LVDS--A
AV53
LVDSA_CLK#
AV51
LVDSA_CLK
BB47
LVDSA_DATA#0
BA52
LVDSA_DATA#1
AY48
LVDSA_DATA#2
AV47
LVDSA_DATA#3
BB48
LVDSA_DATA0
BA50
LVDSA_DATA1
AY49
LVDSA_DATA2
AV48
LVDSA_DATA3
LVDS--B
LVDS--B
AP48
LVDSB_CLK#
AP47
LVDSB_CLK
AY53
LVDSB_DATA#0
AT49
LVDSB_DATA#1
AU52
LVDSB_DATA#2
AT53
LVDSB_DATA#3
AY51
LVDSB_DATA0
AT48
LVDSB_DATA1
AU50
LVDSB_DATA2
AT51
DAC_IREF
AA52 AB53 AD53
V51 V53
Y53 Y51
AD48 AB51
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
LVDSB_DATA3 CRT_BLUE
CRT_GREEN CRT_RED
CRT_DDC_CLK CRT_DDC_DATA
CRT_HSYNC CRT_VSYNC
DAC_IREF CRT_IRTN
CRT
CRT
CRT_BLU CRT_GRE CRT_RED
CRT_HSYNC_R CRT_VSYNC_R
SDVO_STALLN SDVO_STALLP
SDVO_INTN
SDVO_INTP
DDPB_AUXN DDPB_AUXP
DDPB_HPD
DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P
DDPC_AUXN DDPC_AUXP
DDPC_HPD
DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P
DDPD_AUXN DDPD_AUXP
DDPD_HPD
DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
BJ46 BG46
BJ48 BG48
BF45 BH45
T51 T53
BG44 BJ44 AU38
BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38
Y49 AB49
BE44 BD44 AV40
BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36
U50 U52
BC46 BD46 AT38
BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36
del in VGA
INT_HDMI_SCL{23} INT_HDMI_SDA{23}
DDPD_AUXN DDPD_AUXP
C_TMDSD_DATA2# C_TMDSD_DATA2 C_TMDSD_DATA1# C_TMDSD_DATA1 C_TMDSD_DATA0# C_TMDSD_DATA0 C_TMDSD_CLK# C_TMDSD_CLK
R265 IV@10K_4R265 IV@10K_4 R266 IV@10K_4R266 IV@10K_4
Ibex-M
Ibex-M
SDVO_TVCLKINN
4 OF 10
4 OF 10
SDVO_TVCLKINP
SDVO
SDVO
SDVO_CTRLCLK
SDVO_CTRLDATA
DISPLAY PORT BDISPLAY PORT CDISPLAY PORT D
DISPLAY PORT BDISPLAY PORT CDISPLAY PORT D
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPD_CTRLCLK
DDPD_CTRLDATA
Digital Display Interface
Digital Display Interface
TP64TP64 TP65TP65
Port-D_HPD {23}
del in VGA
+3V
[RTC]
RTC BATTERY
(20mils)
C C
(20mils)
R_3VRTC
R432
R432 1K_4
1K_4
RTC_N02
12
CN14
CN14
AAA-BAT-054-K01
AAA-BAT-054-K01
Alzia
D D
1
D24
D24 SDM10K45-7-F_100MA
SDM10K45-7-F_100MA
D23
D23 SDM10K45-7-F_100MA
SDM10K45-7-F_100MA
ACZ_RST#_AUDIO{30}
ACZ_SDOUT_AUDIO{30}
ACZ_SYNC_AUDIO{30}
BIT_CLK_AUDIO{30}
+1.05V
R373 *51_4R373 *51_4 R374 *51_4R374 *51_4 R391 *51_4R391 *51_4 R392 *51_4R392 *51_4 R390 51_4R390 51_4
+RTC_CELL+3VPCU
R444 33_4R444 33_4 R440 33_4R440 33_4
C463 *10P/50V_4CC463 *10P/50V_4C R439 33_4R439 33_4
C462 *10P/50V_4CC462 *10P/50V_4C R443 33_4R443 33_4
C464 22P/50V_4NC464 22P/50V_4N
PCH_JTAG_TMS PCH_JTAG_RST# PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TCK
(30mils)
C460
C460 1U/10V_6X
1U/10V_6X
2
ACZ_RST#
ACZ_SDOUT
ACZ_SYNC
ACZ_BITCLK
DDP Setting
Port
LVDS
Port B
Port C
Port D
eDP
RESET JUMP
3
Strap
L_DDC_DATA
SDVO_CTRLDATA
DDPC_CTRLDATA
DDPD_CTRLDATA
CFG[4]
An RC delay circuit with a time delay in the range of 18 ms to 25 ms should be provided
+RTC_CELL
R418 20K_6R418 20K_6
+RTC_CELL
R421 20K_6R421 20K_6
How to enable Port?
PU to 3.3V with 2.2k+/- 5%
PU to 3.3V with 2.2k+/- 5%
PU to 3.3V with 2.2k+/- 5%
PU to 3.3V with 2.2k+/- 5%
PD to GND directly
RTC_RST#
G2
G2
C451
C451
*SHORT_ PAD
*SHORT_ PAD
1U/6.3V_4X
1U/6.3V_4X
SRTC_RST#
G1
G1
C454
C454
*SHORT_ PAD
*SHORT_ PAD
1U/6.3V_4X
1U/6.3V_4X
4
How to disable Port?
NC
NC
NC
NC
NC
4M byte SPI ROM
U21
SPI_SO
SPI_CS0#_R
R381 *short_4R381 *short_4 R7358 *short_4R7358 *short_4 R395 *short_4R395 *short_4 R380 *short_4R380 *short_4
5
SPI_SO_R SPI_SISPI_SI_R SPI_CLKSPI_CLK_R SPI_CS0#
U21
2
SO
5
SI
6
SCK
1
CE
W25Q32BVSSIG
W25Q32BVSSIG
HOLD
R250 IV@0_4R250 IV@0_4
R243 IV@2.37K/F_4R243 IV@2.37K/F_4
R463 IV@150/F_4R463 IV@150/F_4 R462 IV@150/F_4R462 IV@150/F_4 R461 IV@150/F_4R461 IV@150/F_4
LVDS_VREFH LVDS_VREFL
LVDS_IBG
CRT_BLU CRT_GRE CRT_RED
HDMI
PCH
TP102TP102
TP101TP101 TP100TP100
TP99TP99 TP7135TP7135
TP98TP98 TP59TP59
TP58TP58
2MB4MB
C_TMDSD_DATA2 C_TMDSD_DATA2#
C_TMDSD_DATA1 C_TMDSD_DATA1#
C_TMDSD_DATA0 C_TMDSD_DATA0#
C_TMDSD_CLK C_TMDSD_CLK#
C484 IHM@0.1U/10V_4XC484 IHM@0.1U/10V_4X C483 IHM@0.1U/10V_4XC483 IHM@0.1U/10V_4X
C475 IHM@0.1U/10V_4XC475 IHM@0.1U/10V_4X C473 IHM@0.1U/10V_4XC473 IHM@0.1U/10V_4X
C471 IHM@0.1U/10V_4XC471 IHM@0.1U/10V_4X C472 IHM@0.1U/10V_4XC472 IHM@0.1U/10V_4X
C314 IHM@0.1U/10V_4XC314 IHM@0.1U/10V_4X C308 IHM@0.1U/10V_4XC308 IHM@0.1U/10V_4X
PM55
8
VDD
SPI_HOLD#
R376 3.3K/F_4R376 3.3K/F_4
7
SPI_WP#
R377 3.3K/F_4R377 3.3K/F_4
3
WP
4
VSS
6
+3V
C434
C434
0.1U/10V_4X
0.1U/10V_4X
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
HM55
HM57/PM57
QM57/QS57
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PCH 1/5 (SATA,HDA,LPC)
PCH 1/5 (SATA,HDA,LPC)
PCH 1/5 (SATA,HDA,LPC)
Monday, January 24, 2011
Monday, January 24, 2011
Monday, January 24, 2011
TE4
TE4
TE4
8
TMDSD_DATA2{23} TMDSD_DATA2#{23}
TMDSD_DATA1{23} TMDSD_DATA1#{23}
TMDSD_DATA0{23} TMDSD_DATA0#{23}
TMDSD_CLK{23} TMDSD_CLK#{23}
8MB
9 46
9 46
9 46
A1A
A1A
A1A
5
HTTP://FAQP.RU/
IBEX PEAK-M (GND)
U22I
U22I
AY7
VSS[159]
B11
VSS[160]
B15
VSS[161]
B19
VSS[162]
B23
VSS[163]
B31
VSS[164]
B35
VSS[165]
D D
C C
B B
A A
B39 B43 B47
B7 BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49
BB5 BC10 BC14 BC18
BC2 BC22 BC32 BC36 BC40 BC44 BC52
BH9 BD48 BD49
BD5 BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50
BE6
BE8
BF3
BF49
BF51 BG18 BG24
BG4 BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47
BH7
C12 C50 D51 E12 E16 E20 E24 E30 E34 E38 E42 E46 E48
E6 E8
F49
F5 G10 G14 G18
G2 G22 G32 G36 G40 G44 G52
AF39
H16 H20 H30 H34 H38 H42
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]
VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]
H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14
5
WLAN
LAN
3G
WLAN
3G
LAN
PCIE_RXN3{27}
PCIE_RXP3{27}
PCIE_TXN3{27}
PCIE_TXP3{27}
PCIE_RXN5{27}
PCIE_RXP5{27} PCIE_TXN5{27} PCIE_TXP5{27}
PCIE_RXN6{31}
PCIE_RXP6{31} PCIE_TXN6{31} PCIE_TXP6{31}
CLK_PCIE_LAN#{31}
CLK_PCIE_LAN{31}
PCIE_CLK_REQ3#{31}
CLK_PCIE_3G#{27}
CLK_PCIE_3G{27}
PCIE_CLK_REQ4#{27}
CLK_PCIE_MINI#{27}
CLK_PCIE_MINI{27}
PCIE_CLK_RQ5#{27}
SMBUS CRYSTAL
MBCLK2
MBDATA2
4
TP93TP93 TP92TP92 TP90TP90 TP91TP91
TP56TP56 TP52TP52 TP46TP46 TP47TP47
C304 3G@0.1U/10V_4XC304 3G@0.1U/10V_4X C302 3G@0.1U/10V_4XC302 3G@0.1U/10V_4X
TP55TP55 TP54TP54 TP49TP49 TP48TP48
C467 0.1U/10V_4XC467 0.1U/10V_4X C470 0.1U/10V_4XC470 0.1U/10V_4X
C298 0.1U/10V_4XC298 0.1U/10V_4X C291 0.1U/10V_4XC291 0.1U/10V_4X
TP96TP96 TP95TP95 TP7035TP7035 TP97TP97
PCIE_CLK_REQ0#
TP60TP60 TP68TP68
PCIE_CLK_REQ1#
TP63TP63 TP67TP67
PCIE_CLK_REQ2#
PCIE_CLK_REQ3#
PCIE_CLK_REQ4#
PCIE_CLK_RQ5#
TP104TP104 TP103TP103
PCIE_CLK_REQB#
Q15 2N7002_200MAQ15 2N7002_200MA
1
+3V_S5
1
Q13 2N7002_200MAQ13 2N7002_200MA
4
PCIE_RXN3 PCIE_RXP3 PCIE_TXN3_C PCIE_TXP3_C
PCIE_RXN5 PCIE_RXP5 PCIE_TXN5_C PCIE_TXP5_C
PCIE_RXN6 PCIE_RXP6 PCIE_TXN6_C PCIE_TXP6_C
2 2
3
IBEX PEAK-M (PCI-E,SMBUS,CLK)
U22B
U22B
Ibex-M
BG30
PERN1
BJ30
PERP1
BF29
PETN1
BH29
PETP1
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0# / GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1# / GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2# / GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4# / GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5# / GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ# / GPIO56
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
3
3
Ibex-M 2 OF 10
2 OF 10
PCI-E*
PCI-E*
2ND_MBCLK{33}
2ND_MBDATA{33}
SMBus
SMBus
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5)
Controller
Controller Link
Link
PEG
PEG
(+3V_S5)
(+3V_S5)
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
3
(+3V)
(+3V) (+3V)
(+3V) (+3V)
(+3V)
(+3V_S5)
(+3V_S5)
SMBALERT# / GPIO11
SML0ALERT# / GPIO60
SML1ALERT# / GPIO74
SML1CLK / GPIO58
SML1DATA / GPIO75
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N CLKOUT_PEG_A_P
CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P
CLKIN_PCILOOPBACK
From CLK BUFFER
From CLK BUFFER
CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67
Clock Flex
Clock Flex
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_DMI_N CLKOUT_DMI_P
CLKIN_DMI_N CLKIN_DMI_P
CLKIN_BCLK_N CLKIN_BCLK_P
CLKIN_DOT_96N CLKIN_DOT_96P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
SDATA
C8
SMBL0ALERT#
J14
SMB_CLK_ME0
C6
SMB_DATA_ME0
G8
SML1ALERT#
M14
MBCLK2
E10
MBDATA2
G12
T13 T11 T9
CLK_PEGA_REQ#
H1 AD43 AD45 AN4 AN2
AT1 AT3
AW24 BA24
AP3 AP1
F18 E18
AH13 AH12
P41
CLK_PCI_FB
J42
AH51 AH53
AF38
CLK_FLEX0
T45
CLK_FLEX1
P43
CLK_FLEX2
T42
CLK_CARD_5159
N50
SMBALERT#
B9
SCLK
H14
Placement close
XTAL25_IN
R455
R455 IV@1M/F_4
XTAL25_OUT
IV@1M/F_4
R256 *short_4R256 *short_4
XTAL25_IN XTAL25_OUT
XCLK_RCOMP
R464 EV@0_4R464 EV@0_4
C491 IV@27P/50V_4NC491 IV@27P/50V_4N
21
Y5
Y5 IV@25MHZ_30
IV@25MHZ_30
C495 IV@27P/50V_4NC495 IV@27P/50V_4N
2
SCLK {3,31}
SDATA {3,31}
T3T3 T2T2 T1T1
CLK_PEGA_REQ#
CLK_PCIE_3GPLLN {4} CLK_PCIE_3GPLLP {4}
CLK_DREFSSCLKN {4} CLK_DREFSSCLKP {4}
CLK_BUF_PCIE_3GPLLN {3} CLK_BUF_PCIE_3GPLLP {3}
CLK_BUF_BCLKN {3} CLK_BUF_BCLKP {3}
CLK_BUF_DREFCLKN {3} CLK_BUF_DREFCLKP {3}
CLK_BUF_DREFSSCLKN {3} CLK_BUF_DREFSSCLKP {3}
C317 *22P/50V_4NC317 *22P/50V_4N
CLK_PCI_FB {11}
R254 90.9/F_4R254 90.9/F_4
R272 10K_4R272 10K_4 T18T18 T13T13
C493 22P/50V_4NC493 22P/50V_4N
2
del in UMA
CLK_PCH_14M {3}
+1.05V
+3V
CLK_CARD_5159 {32}
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCIE_CLK_REQ1# PCIE_CLK_REQ2#
PCIE_CLK_REQ0# PCIE_CLK_REQ3# PCIE_CLK_REQ4# PCIE_CLK_REQB# PCIE_CLK_RQ5# SMBALERT# SMBL0ALERT# SMB_CLK_ME0 SMB_DATA_ME0 SML1ALERT# MBCLK2 MBDATA2 SCLK SDATA
CLK_PEGA_REQ#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PCH 2/5 (PCIE, SMBUS, CK)
PCH 2/5 (PCIE, SMBUS, CK)
PCH 2/5 (PCIE, SMBUS, CK)
Monday, January 24, 2011
Monday, January 24, 2011
Monday, January 24, 2011
1
10
R385 10K_4R385 10K_4 R389 10K_4R389 10K_4
R124 10K_4R124 10K_4 R404 *10K_4R404 *10K_4 R173 10K_4R173 10K_4 R144 10K_4R144 10K_4 R172 10K_4R172 10K_4 R406 10K_4R406 10K_4 R198 10K_4R198 10K_4 R399 2.2K_4R399 2.2K_4 R170 2.2K_4R170 2.2K_4 R125 10K_4R125 10K_4 R188 4.7K_4R188 4.7K_4 R189 4.7K_4R189 4.7K_4 R156 2.2K_4R156 2.2K_4 R401 2.2K_4R401 2.2K_4
R393 IV@10K_4R393 IV@10K_4 R367 *EV@10K_4R367 *EV@10K_4
TE4
TE4
TE4
10 46
10 46
10 46
1
+3V
+3V_S5
A1A
A1A
A1A
1
HTTP://FAQP.RU/
2
3
4
5
6
7
8
IBEX PEAK-M (PCI,USB,NVRAM)
U22E
U22E
H40 N34 C44 A38 C36
J34
PCI_TRDY#
+3V
A40 D45 E36 H48 E40 C40 M48 M45
F53 M40 M43
J36 K48
F40 C42 K46 M51
J52 K51
L34
F42
J40 G46
F44 M47 H36
J50 G42 H47 G34
G38 H51 B37 A44
F51 A46 B45 M53
F48 K45
F36 H53
B41 K53 A36 A48
K6
E44 E50
A42 H44
F46 C46
D49 D41
C48
M7 D5
N52 P53 P46 P51 P48
PM_RI# PM_BATLOW#
PCIE_WAKE# SUS_PWR_ACK_R AC_PRESENT
+3V
INTH# PCI_PIRQB# PCI_TRDY#
A A
R174 8.2K_4R174 8.2K_4
CLK_33M_LPC_R
PCI_SERR#
PCI_PIRQD# PCI_FRAME#PCI_STOP#
REQ1#
SCI# USB_OC0# USB_OC1# USBOC#8
+3V_S5
PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#
REQ0# REQ1# REQ2# REQ3#
PIRQE# PIRQF# PIRQG# INTH#
PCI_SERR#
PCI_PERR#
PCI_IRDY# PCI_DEVSEL#
PCI_FRAME# PCI_PLOCK# PCI_STOP#
PLT_RST-R#
CLK_PCI_EC
B2A
B B
GNT0#{12} GNT1#{12}
TP94TP94
GNT3#{12}
+3V
C C
TP29TP29
PCLK_DEBUG{27}
CLK_PCI_FB{10}
PCLK_591{33}
+3V
PCI_IRDY# PCI_PIRQA#
PCI_PIRQC#
D D
+3V_S5
USBOC#13_9 USB_OC5# USB_OC2# USB_OC3#
R458 22_4R458 22_4 TP105TP105 TP69TP69 R276 22_4R276 22_4 R268 22_4R268 22_4
RP8
RP8
8.2KX8
8.2KX8
RP6
RP6
8.2KX8
8.2KX8
1
6 7 8 9 10
6 7 8 9 10
5 4 3 2 1
5 4 3 2 1
Ibex-M
Ibex-M
AD0
5 OF 10
5 OF 10
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30
PCI
PCI
AD31 C/BE0#
C/BE1# C/BE2# C/BE3#
PIRQA# PIRQB# PIRQC# PIRQD#
REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54
GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55
PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5
PCIRST# SERR#
PERR#
IRDY# PAR DEVSEL# FRAME#
PLOCK# STOP#
TRDY# PME# PLTRST# CLKOUT_PCI0
CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
RP9
RP9
5 4 3 2 1
8.2KX8
8.2KX8
2
NVRAM
NVRAM
NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15
(+5V)
(+5V) (+5V)
(+5V) (+5V)
(+5V)
(+3V)
(+3V) (+3V)
(+3V) (+3V)
(+3V) (+5V)
(+5V) (+5V)
(+5V) (+5V)
(+5V) (+5V)
(+5V)
USB
USB
(+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5)
R203 10K_4R203 10K_4 R396 10K_4R396 10K_4 R148 10K_4R148 10K_4 R372 10K_4R372 10K_4 R154 10K_4R154 10K_4 R129 *10K_4R129 *10K_4
PCI_PLOCK#
6
PCI_PERR#REQ3#
7
REQ0#PCI_DEVSEL#
8 9 10
NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9
NV_WR#0_RE# NV_WR#1_RE#
OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43
OC6# / GPIO10 OC7# / GPIO14
NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3
NV_DQS0 NV_DQS1
NV_ALE NV_CLE
NV_RCOMP
NV_RB#
NV_WE#_CK0 NV_WE#_CK1
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N
USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P
USBRBIAS#
USBRBIAS
OC5# / GPIO9
+3V
AY9 BD1 AP15 BD8
AV9 BG8
AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6
BD3 AY6
AU2 AV7 AY8
AY5 AV11
BF5
H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24
B25 D25
N16 J16 F16 L16 E14 G16 F12 T15
3
NV_ALE
NV_RCOMP
USB_BIAS
R427 22.6/F_4R427 22.6/F_4
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USBOC#8 USB_OC5# USBOC#13_9CLK_PCI_FB_R SCI#
REQ2# PIRQE# PIRQF#
CLKRUN#
PIRQG#
SYS_RESET#DNBSWON#
RSMRST# RSV_ICH_LAN_RST#
NV_ALE {12}
R382 *32.4/F_4R382 *32.4/F_4
USBP0- {26}
USBP0+ {26}
TP84TP84 TP83TP83 TP36TP36 TP38TP38
USBP3- {32}
USBP3+ {32}
USBP4- {27}
USBP4+ {27}
USBP5- {27}
USBP5+ {27}
TP40TP40 TP39TP39 TP86TP86 TP88TP88
USBP8- {26}
USBP8+ {26}
USBP9- {28}
USBP9+ {28}
USBP10- {27}
USBP10+ {27}
TP42TP42 TP89TP89 TP43TP43 TP41TP41
USBP13- {28}
USBP13+ {28}
C3A
R5837 *0_4R5837 *0_4 R475 *0_4R475 *0_4
R476 *0_4R476 *0_4
USBOC#13_9 {28,33} SCI# {33}
R260 8.2K_4R260 8.2K_4 R252 8.2K_4R252 8.2K_4 R459 8.2K_4R459 8.2K_4 R7357 8.2K_4R7357 8.2K_4 R446 8.2K_4R446 8.2K_4 R128 1K_4R128 1K_4
R419 10K_4R419 10K_4 R407 10K_4R407 10K_4
CCD
Card Reader SIM WLAN
USB6/USB7 HM55 not support
USB for daughter board USB for left side 1
3G
USB for left side 2
B2AB2A
USBOC#8 {26,33}
USB_BUS_SW0 {28} SC_CB {28,33}
SC_CB1 {28,33}
RESET
+3V+3V_S5
PLT_RST-R#
R180
R180 100K_4
100K_4
4
+1.05V
SYS_PWROK
U8
U8 *TC7SH08FU(F)
*TC7SH08FU(F)
DMI_RXN0{4} DMI_RXN1{4} DMI_RXN2{4} DMI_RXN3{4}
DMI_RXP0{4} DMI_RXP1{4} DMI_RXP2{4} DMI_RXP3{4}
DMI_TXN0{4} DMI_TXN1{4} DMI_TXN2{4} DMI_TXN3{4}
DMI_TXP0{4} DMI_TXP1{4} DMI_TXP2{4} DMI_TXP3{4}
R424 49.9/F_4R424 49.9/F_4
SYS_RESET#{4}
R123 *short_4R123 *short_4 R428 *short_4R428 *short_4 R153 *short_4R153 *short_4
PM_DRAM_PWRGD{4,8}
RSMRST#{33}
DNBSWON#{33}
PCIE_WAKE#{31}
PM_SYNC{4}
+3V_S5
2 1
3 5
R167 *SHORT_4R167 *SHORT_4
D3B
5
DMI_COMP
RSV_ICH_LAN_RST#
EMI
C236
C236 *0.1U/10V_4X
*0.1U/10V_4X
4
IBEX PEAK-M (DMI,FDI,GPIO)
U22C
U22C
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
SYS_RESET#
RSMRST# DNBSWON#
PM_RI# PCIE_WAKE#
C492
C492 *E@22P/50V_4N
*E@22P/50V_4N
R150
R150 *100K/F_4
*100K/F_4
R131 EV@0_4R131 EV@0_4
BD20 BE18
BD22 BH21 BC20 BD18
BH25
BF25
T6 M6
B17
K5
A10
D9
C16
P5
F14 J12
BJ10
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
C327
C327 *E@22P/50V_4N
*E@22P/50V_4N
C232
C232
0.1U/10V_4X
0.1U/10V_4X
DMI1TXN DMI2TXN DMI3TXN
DMI0TXP DMI1TXP DMI2TXP DMI3TXP
DMI_ZCOMP DMI_IRCOMP
SYS_RESET# SYS_PWROK PWROK MEPWROK
LAN_RST# DRAMPWROK RSMRST#
PWRBTN#
RI# WAKE# PMSYNCH
DMI FDI
DMI FDI
System Power Management
System Power Management
(+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5)
PCLK_DEBUG
CLK_PCI_FB
PCLK_591
C323
C323 *E@22P/50V_4N
*E@22P/50V_4N
EMIB2A
PLTRST# {4,27,31,33}
TP24TP24
VGA_PLTRST#
6
Ibex-M
Ibex-M 3 OF 10
3 OF 10
SUS_PWR_DN_ACK / GPIO30
ACPRESENT / GPIO31
CLKRUN# / GPIO32
(+3V)
(+3V)
SUS_STAT# / GPIO61
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
SUSCLK / GPIO62
SLP_S5# / GPIO63
BATLOW# / GPIO72 SLP_LAN# / GPIO29
SUS_PWR_ACK
SUS_PWR_ACK{33}
PWROK
Study Cost Down
DELAY_VR_PWRGOOD{4,41}
D3B
D27
D27
2 1
BA18
FDI_RXN0
BH17
FDI_RXN1
BD16
FDI_RXN2
BJ16
FDI_RXN3
BA16
FDI_RXN4
BE14
FDI_RXN5
BA14
FDI_RXN6
BC12
FDI_RXN7
BB18
FDI_RXP0
BF17
FDI_RXP1
BC16
FDI_RXP2
BG16
FDI_RXP3
AW16
FDI_RXP4
BD14
FDI_RXP5
BB14
FDI_RXP6
BD12
FDI_RXP7
BJ14
FDI_INT
BF13
FDI_FSYNC0
BH13
FDI_FSYNC1
BJ12
FDI_LSYNC0
BG14
FDI_LSYNC1
P12
SLP_S3#
H7
SLP_S4#
MPWROK{4,33}
SLP_M#
K8
SLP_M#
N2
TP23
SUS_PWR_ACK_R
M1
AC_PRESENT
P7
CLKRUN#
Y1
RSV_SUS_SATA#
P8 F3
SLP_S5#
E4
PM_BATLOW#
A6 F6
R217 *0_4R217 *0_4
R218 100K_4R218 100K_4
*LCP0G050M0R2R
*LCP0G050M0R2R
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
PCH 3/5 (PCI,ONFI,USB,DMI)
PCH 3/5 (PCI,ONFI,USB,DMI)
PCH 3/5 (PCI,ONFI,USB,DMI)
Monday, January 24, 2011
Monday, January 24, 2011
Monday, January 24, 2011
FDI_TXN0 {4} FDI_TXN1 {4} FDI_TXN2 {4} FDI_TXN3 {4} FDI_TXN4 {4} FDI_TXN5 {4} FDI_TXN6 {4} FDI_TXN7 {4}
FDI_TXP0 {4} FDI_TXP1 {4} FDI_TXP2 {4} FDI_TXP3 {4} FDI_TXP4 {4} FDI_TXP5 {4} FDI_TXP6 {4} FDI_TXP7 {4}
FDI_INT {4} FDI_FSYNC0 {4} FDI_FSYNC1 {4} FDI_LSYNC0 {4} FDI_LSYNC1 {4}
SUSB# {33} SUSC# {33}
TP34TP34
TP78TP78
CLKRUN# {33}
TP37TP37
TP79TP79 TP33TP33
TP32TP32
+3V_S5
2
Q33 2N7002_200MAQ33 2N7002_200MA
3
R7354 *0_4R7354 *0_4
SYS_PWROK
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1 2
+3V_S5
53
U13
U13 TC7SH08FU(F)
TC7SH08FU(F)
SUS_PWR_ACK_R
1
4
TE4
TE4
TE4
0.1U/10V_4XC259 0.1U/10V_4XC259
SYS_PWROK
11 46
11 46
11 46
8
11
R210
R210 10K_4
10K_4
A1A
A1A
A1A
1
HTTP://FAQP.RU/
BOARD_ID1 BOARD_ID6 GPIO6 BOARD_ID4 GPIO8
A A
DDR3_DRAMRST#_PCH{8}
TEMP_ALERT#{4,33}
C3A
USB_BUS_SW1{28,33}
B B
C C
GPIO46
R394 10K_4R394 10K_4
GPIO45
R375 *10K_4R375 *10K_4
GPIO24
R178 *10K_4R178 *10K_4
GPIO57
R192 10K_4R192 10K_4
GPIO27
R169 *10K_4R169 *10K_4
GPIO12
R171 10K_4R171 10K_4
GPIO12 GPIO15 GPIO16 GPIO17 GPIO22 GPIO27 GPIO28 ESATA_DN# GPIO37 GPIO39
GPIO46 BOARD_ID5 TEMP_ALERT#
GPIO24 GPIO45 GPIO57 BOARD_ID2 BOARD_ID3 GPIO38
BOARD ID SETTING
ID1 ID2Board ID ID3
H
UMA SKU
L
VGA SKU
W/ MDC
W/O MDC
W/ HDMI
W/O HDMI
W/O 3G
D D
W/ 3G
15"
14"
W/O BT
W/ BT
14 or 15
13
Old HW(2010)
New HW(2011)
H
L
1
ID5
ID4
H
L
H
L
H
L
2
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
U22F
+3V_S5
ID6
AB12
AB13
BE53 BF53
H
L
C38 D37 J32 F10
AA2 F38
V13 AB7
AB6 AA4
H10
M11
A49 A50
A52 A53
B52 B53 BE1
BF1 BH1
U22F
Y3
BMBUSY# / GPIO0 TACH1 / GPIO1 TACH2 / GPIO6 TACH3 / GPIO7 GPIO8
(+3V_S5)
(+3V_S5)
K9
LAN_PHY_PWR_CTRL / GPIO12
T7
GPIO15
(+3V_S5)
(+3V_S5)
SATA4GP / GPIO16 TACH0 / GPIO17
Y7
SCLOCK / GPIO22 GPIO27
(+3V_S5)
(+3V_S5)
GPIO28
(+3V_S5)
(+3V_S5)
SATA2GP / GPIO36 SATA3GP / GPIO37
P3
SDATAOUT0 / GPIO39
F1
PCIECLKRQ7# / GPIO46 SDATAOUT1 / GPIO48 SATA5GP / GPIO49
GPIO24
H3
PCIECLKRQ6# / GPIO45
F8
GPIO57 STP_PCI# / GPIO34
V6
SATACLKREQ# / GPIO35
V3
SLOAD / GPIO38
A4
VSS_NCTF_1 VSS_NCTF_2
A5
VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
GPIO16 GPIO17 GPIO22 ESATA_DN# GPIO37 GPIO39
GPIO28
H
L
2
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V) (+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V) (+3V)
(+3V)
GPIO38
(+3V)
(+3V)
(+3V_S5)
(+3V_S5)
(+3V)
(+3V)
(+3V)
(+3V)
(+3V_S5)
(+3V_S5) (+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V_S5)
(+3V)
(+3V) (+3V)
(+3V) (+3V)
(+3V)
H
L
Ibex-M
Ibex-M 6 OF 10
6 OF 10
GPIO
GPIO
MISC
MISC
(+3V_S5)
(+3V_S5)
CLKOUT_BCLK0_N/CLKOUT_PCIE8N CLKOUT_BCLK0_P/CLKOUT_PCIE8P
NCTF
NCTF
R368 10K_4R368 10K_4 R239 10K_4R239 10K_4 R118 10K_4R118 10K_4 R202 10K_4R202 10K_4 R146 10K_4R146 10K_4 R387 10K_4R387 10K_4
CPU
CPU
RSVD
RSVD
3
CLKOUT_PCIE6N CLKOUT_PCIE6P
CLKOUT_PCIE7N CLKOUT_PCIE7P
A20GATE
PROCPWRGD
THRMTRIP#
INIT3_3V#
VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31
+3V
R157
R157 10K_4
10K_4
GPIO28
3
PECI
RCIN#
TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 NC_1 NC_2 NC_3 NC_4 NC_5
TP24
TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9
AH45 AH46
AF48 AF47
U2
AM3 AM1 BG10 T1 BE10 BD10 BA22
AW22 BB22 AY45 AY46 AV43 AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39 P6 C10
BH2 BH52 BH53 BJ1 BJ2 BJ4 BJ49 BJ5 BJ50 BJ52 BJ53 D1 D2 D53 E1 E53
RCIN# GATEA20 TEMP_ALERT# GPIO6
GPIO38
R384
R384 10K_4
10K_4
GATEA20
PCH_PECI_R
RCIN#
PCH_THRMTRIP#_R
R386 10K_4R386 10K_4 R371 10K_4R371 10K_4 R383 10K_4R383 10K_4 R447 10K_4R447 10K_4
R244
R244 10K_4
10K_4
4
TP62TP62
TP66TP66
TP70TP70
TP61TP61
GATEA20{33}
CLK_CPU_BCLKN {4} CLK_CPU_BCLKP {4} H_PECI {4} RCIN# {33}
4
+3V
+3V+3V+3V_S5
R263
R263 10K_4
10K_4
BOARD_ID4BOARD_ID6
H_PWRGOOD {4}
R181 56.2/F_4R181 56.2/F_4
R185 56.2/F_4R185 56.2/F_4
TP28TP28
BT_Detect# CPUSB# {27}
5
IBEX PEAK-M (GND)
AB16 AA19 AA20 AA22 AM19 AA24 AA26 AA28 AA30 AA31 AA32 AB11 AB15 AB23 AB30 AB31 AB32 AB39 AB43 AB47
AB5 AB8 AC2
AC52
+VTT
BOARD_ID5
R191
R191
10K_4
10K_4
AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49
AD7 AE2 AE4
AF12
Y13
AH49
AU4 AF35 AP13 AN34 AF45 AF46 AF49
AF5
AF8
AG2 AG52 AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47
AH7
AJ19
AJ2 AJ20 AJ22 AJ23 AJ26 AJ28 AJ32 AJ34
AT5
AJ4 AK12 AM41 AN19 AK26 AK22 AK23 AK28
5
PM_THRMTRIP#{4}
6
U22H
U22H
VSS[0] VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]
IbexPeak-M_Rev1_0
IbexPeak-M_Rev1_0
BOARD_ID3 BOARD_ID2 BOARD_ID1
VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]
R127
R127
HM@10K_4
HM@10K_4
R145
R145
NHM@10K_4
NHM@10K_4
AK30
VSS[80]
AK31
VSS[81]
AK32
VSS[82]
AK34
VSS[83]
AK35
VSS[84]
AK38
VSS[85]
AK43
VSS[86]
AK46
VSS[87]
AK49
VSS[88]
AK5
VSS[89]
AK8
VSS[90]
AL2
VSS[91]
AL52
VSS[92]
AM11
VSS[93]
BB44
VSS[94]
AD24
VSS[95]
AM20
VSS[96]
AM22
VSS[97]
AM24
VSS[98]
AM26
VSS[99]
AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47
+3V+3V +3V
R122
R122
10K_4
10K_4
R152
R152 *10K_4
*10K_4
6
R369
R369 IV@10K_4
IV@10K_4
R370
R370 EV@10K_4
EV@10K_4
7
PCH Strap Pin Configuration Table
SPKR
PCBEEP{9,30}
0 = Default Mode (Internal weak Pull-down) 1 = No Reboot Mode with TCO Disabled
GNT3#/ GPIO55
GNT3#{11}
0 = Default Mode (Internal weak Pull-down) 1 = No Reboot Mode with TCO Disabled
HDA_DOCK_EN #/GPIO33
PCH_GPIO33{9,33}
GNT0#, GNT1#
R237 1K/F_4R237 1K/F_4
0 = Top Block Swap Mode 1 = Default Mode (Internal pull-up)
GNT0#
GNT0#{11}
GNT1#
GNT1#{11}
Boot BIOS Strap
PCI_GNT0# GNT#1
0 0 0
1 0
1 1 1
SPI_MOSI
SPI_SI_R{9}
NV_ALE
NV_ALE{11}
1 = Enabled 0 = Disabled (Default)
GPIO8
This signal has a weak internal pull up. NOTE: This signal should not be pulled low
GPIO15
0 = Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality 1 = Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality
GPIO27
0 = Disables the VccVRM. Need to use on-board filter circuits for analog rails. 1 = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. This signal has a weak internal pull-up.
R7355 *1K_4R7355 *1K_4
R403 *10K_4R403 *10K_4
GPIO8
R149 10K_4R149 10K_4
GPIO15
R126 1K_4R126 1K_4
GPIO27
R182 *10K_4R182 *10K_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
PCH 4/5 (GPIO & Strap)
PCH 4/5 (GPIO & Strap)
PCH 4/5 (GPIO & Strap)
Monday, January 24, 2011
Monday, January 24, 2011
Monday, January 24, 2011
R388*1K/F_4 R388*1K/F_4
R460 *10K/F_4R460 *10K/F_4
JP1 *SHORT PADJP1 *SHORT PAD
12
R270 *1K/F_4R270 *1K/F_4 R271 *1K/F_4R271 *1K/F_4
Boot BIOS Location LPC Reserved (NAND) PCI SPI
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
TE4D
TE4D
TE4D
8
12
+3V
+3V
+1.8V
+3V_S5
+3V_S5
12 46
12 46
12 46
8
A1A
A1A
A1A
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