How it Works
Toshiba
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47VL863
User Manual [fr]
92 pgs1.92 Mb0
Schematic
101 pgs1.81 Mb0
Owner's Manual [po]
92 pgs9.41 Mb0
User Manual
92 pgs11.34 Mb0
Owner's Manual [pt]
92 pgs9.44 Mb0
Owner's Manual [no]
92 pgs9.17 Mb0

Toshiba 47VL863 Schematic

5T03655-2E
SCHEMATIC DIAGRAMS
PRODUCT NAME
UNIT NAME
PWA NAME
PWB NAME
PAGE
SEINE5L I2C/SD/USB/JTAG
1
SEINE5L DDR
2
SEINE5L EBUS/SPI
3
SEINE5L UART/ETHER
4
SEINE5L TS
5
SEINE5L MCU
6
SEINE5L AUDIO
7
8
SEINE5L LVDS OUT
SEINE5L HDMI/DAC
9
SEINE5L ADC DEMOD DVB-T2/T/C
10
11
SEINE5L ANALOG POWER
SEINE5L DIGITAL IO POWER
12
13
SEINE5L MEMORY POWER
14
SEINE5L DIGITAL POWER
SEINE5L BOOT-CONFIG
15
SEINE5L XTAL/VREF
16
SEINE5L PLL/DAC
17
SEINE5L CAPACITOR
18
SEINE5L PWR-REG
19
PERI (CLK/VCXO)
20
PERI (PIO/IRQ)
21
PERI (I2C/UART)
22
DDR3 SDRAM
23
DDR3 VTT
24
EBUS RESISTOR
25
MAIN
FUNCTION
REV
PAGE
SPI FLASH
26
EBUS NAND FLASH
27
L2SW (MISC.)
28
29
RJ45 CONNECTOR
30
WLAN I/F
31
WLAN POWER
32
USB CONNECTOR
33
USB HUB 1/2
34
35
USB HUB 2/2
USB POWER
36
AUDIO RESISTOR
37
AUDIO I2S CLK
38
AUDIO MUTE
39
AUDIO SIF
40
AUDIO DAC (HEADPHONE)
41
AUDIO Linedrivr(TVOUT)
42
AUDIO CONNECTOR
43
AUDIO DSP(CIRRUS)
44
AUDIO D-AMP
45
AUDIO AMP FILTER
46
AUDIO D-AMP (Woofer)
47
AUDIO AMP FILTER (Woofer)
48
Headphone AMP
49
50
FUNCTION
VL863/WL863
REV
51
CONNECTOR AVJACK
DSUB15P PC IN
52
<BLANK PAGE>
53
EURO SCART OUT
54
AV INPUT1
55
AV INPUT2
56
AV INPUT3
57
SYNC DETECT
58
PANEL I/F LVDS OUT
59
PANEL I/F LVDS OUT
60
61
PANEL I/F DIMMER CON
PANEL I/F POWER
62
HDMI Connector
63
HDMI SW 1/3
64
HDMI SW 2/4
65
HDMI SW 3/4
66
67
HDMI SW 4/4
HDMI ARC
68
HDMI Power
69
70
HDMI TX PWR5
HDMI TX PWR5
71
TVM(MICON)
72
TVM(MICON2)
73
74
TVM(RESET I2C)
TVM(CEC)EURO SCART
75
UNIT NO.
PWA NO.
PWB NO.
PE0993
PAGE
REV
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
TVM(FAN CONTROL)
TVM(LED/RMT/RGB/TOUCH)
TVM(PANEL I/F)
TVM(PIR)L2SW (RMII I/F)
TVM(KEY CONNECTOR)
TUNER
SYNC_DET(TV_OUT)
TUNER DVB-S/S2
DEMOD DVB-T/C
DEMOD DVB-S2/S
DiSEqC LNB POWER
TUNER POWER
CI TS_SELECTOR
CI POWER/CONNECTOR
CI ADDRESS BUFFER
CI DATA BUFFER
CI CONTROL BUFFER
CI TS OUTPUT BUFFER
POWER 1.5V
POWER 1.1V
POWER 3.3V
POWER 6V/5V
POWER CONNECTOR
EMC CONTROL
REV
APPROVED BY CHECKED BY TITLE TOTAL PAGE NO. REV.MARK DRAWING.NO.DESIGNED BY
IWANOIWANO
2011.03.11 09:37
SHIMIZU
CIRCUIT DIAGRAM 100 PP
TITLE
TOSHIBA CORPORATION
5T03655D
A
701 134
C_HOSTRST
B
GND
750 775 372 705 707 124 350 760 765 770 750 775 372 705 707 124 350 760 765 770
C
3.3VD
D
E
10nF(K)
R1112
4.7K(D)
790
120 120
902
1
C1000
2
795
GND
662
370 662 124 370 662 124
122 122 122
21
163 116
M_TSI3DATA1
M_STCCLKI0 M_PANELCLK
M_VID
M_CIIREQ_N
H_HDMISW_INT
M_I2CDATA0 M_I2CCLK0 M_I2CDATA1 M_I2CCLK1
M_SDCLKB M_SDCD M_SDWP
M_USB0REXT
M_USB1OVERC M_USB1REXT
1
[TP]
1
DP112
AF3 AF2 AF1 AH1
AE1 AE2
AJ29
[TP]
DP114
G30 AK6 AL6 AM6 AL5 AM5
AN4 AP4 AN5 AP5
D33 F34 F33
E14 D14 H16
E15 C15 H18
AK29 AK30 AJ30 AH30
DTV SYSTEM LSI 1/14
STCCLKI2/TSI3DATA1/PIO95 STCCLKI1 STCCLKI0 PANELCLKI
SOC_RESET_N CPU_RESET_N
VID
IRQ5/CIIREQ_N/PIO46 IRQ4/PIO47/CIRESET1 IRQ3/PIO48/CICS1_N IRQ2/PIO49 IRQ1/PIO50 IRQ0/PIO51
I2CDATA0/PIO54 I2CCLK0/PIO55 I2CDATA1/PIO56 I2CCLK1/PIO57
SDCLKB SDCD SDWP
USB0CLK USB0OVERC USB0REXT
USB1CLK USB1OVERC/PIO63 USB1REXT
DBGTCK DBGTDI DBGTMS DBGTRST_N
L when unused PU when unused PU when unused
V46A00062200
[V-U90432]
IC100
[IRQ]
[I2C]
[SD I/F]
[USB]
[EJTAG]
STCPWM2/TSI3DATA2/PIO0
Open when unused Open when unused Open when unused Open when unused Open when unused Open when unused Open when unused Open when unused Open when unused
STCPWM1/PIO1
STCPWM0
WDT_RESETOUT_N/PIO4
BL0PWM/PIO2 BL1PWM/PIO3
I2CDATA2/PIO58
I2CCLK2/PIO59
CI2CDATA/PIO60
CI2CCLK/PIO61
SDDATA0 SDDATA1 SDDATA2 SDDATA3
SDV18EN
USB0TEST
L
USB1PW/PIO62
USB1TEST
L
SDCLK
SDCLKF
SDCMD
SDPWR
USB0DP USB0DM USB0PW
USB1DP USB1DM
DBGTDO
AJ2 AH2 AG1
AG2
AM29 AL29
AN6
AP6 AN29 AP29
E34
D34
E33
E32
E31
F32
F31
F30
G32
A14
B14
D15
H15
A15
B15
C16
H17
AL30
M_TSI3DATA2
1
GND
M_STCPWM0
[TP]
DP103
M_BL0PWM M_BL1PWM
M_I2CDATA2
M_I2CCLK2
M_CI2CDATA
M_CI2CCLK
M_USB0DP M_USB0DM M_USB0PW
M_USB1DP M_USB1DM M_USB1PW
790
120
652 652
124 650 124 650 124 650 124 650
161 161 161116
160 160 163
87654321
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
TC90432MBG(OF1203)
MAIN UNIT
FUNCTIONTITLE
S5L I2C/SD/USB/JTAG
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
101 1 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
A
M_DDRDQ31
127
M_DDRDQ30
127
M_DDRDQ29
127
M_DDRDQ28
127
M_DDRDQ27
127
M_DDRDQ26
2
1
127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127 127
127 130
127 130
2
C1232
1
10nF(K)
M_DDRDQ25 M_DDRDQ24 M_DDRDQ23 M_DDRDQ22 M_DDRDQ21 M_DDRDQ20 M_DDRDQ19 M_DDRDQ18 M_DDRDQ17 M_DDRDQ16 M_DDRDQ15 M_DDRDQ14 M_DDRDQ13 M_DDRDQ12 M_DDRDQ11 M_DDRDQ10 M_DDRDQ9 M_DDRDQ8 M_DDRDQ7 M_DDRDQ6 M_DDRDQ5 M_DDRDQ4 M_DDRDQ3 M_DDRDQ2 M_DDRDQ1 M_DDRDQ0
M_DDRRESET
M_DDRODT
2
C1233
C1234
1
10nF(K)
GND
1.1V_DDRPLL
10nF(K)
B
C
D
127 130
M_DDRVREF
AK26 AP27 AJ25 AN25 AP26 AK25 AN26 AL26 AK23 AN24 AJ22 AP23 AN23 AK22 AP24 AL23 AN12 AK13 AP13 AJ14 AK14 AN13 AL13 AP12 AP9 AK10 AN11 AJ11 AK11 AP10 AL10 AN10
AK18
AP22
AH17
AH13 AH23
AH18 AJ18
R1152
240(D)
21
TC90432MBG(OF1203)
GND
DDRDQ31 DDRDQ30 DDRDQ29 DDRDQ28 DDRDQ27 DDRDQ26 DDRDQ25 DDRDQ24 DDRDQ23 DDRDQ22 DDRDQ21 DDRDQ20 DDRDQ19 DDRDQ18 DDRDQ17 DDRDQ16 DDRDQ15 DDRDQ14 DDRDQ13 DDRDQ12 DDRDQ11 DDRDQ10 DDRDQ9 DDRDQ8 DDRDQ7 DDRDQ6 DDRDQ5 DDRDQ4 DDRDQ3 DDRDQ2 DDRDQ1 DDRDQ0
DDRRESET_N
DDRODT
DDRZQ
DDRVREF0 DDRVREF1
PLLAVD0 PLLAVD1
V46A00062200
DTV SYSTEM LSI 2/14
[V-U90432]
IC100
[DDR]
DDRAD15 DDRAD14 DDRAD13 DDRAD12 DDRAD11 DDRAD10
DDRAD9 DDRAD8 DDRAD7 DDRAD6 DDRAD5 DDRAD4 DDRAD3 DDRAD2 DDRAD1 DDRAD0
DDRCLK0
DDRBCLK0
DDRCLK1
DDRBCLK1
DDRCKE
DDRCS_N DDRRAS_N DDRCAS_N
DDRWE_N
DDRBA2 DDRBA1 DDRBA0
DDRDM3 DDRDM2 DDRDM1 DDRDM0
DDRDQS3
DDRDQS2
DDRDQS1
DDRDQS0
DDRDQSN3 DDRDQSN2 DDRDQSN1 DDRDQSN0
AN14 AP14 AK17 AN15 AL17 AL16 AN16 AN19 AP15 AN20 AL15 AL18 AP16 AP19 AK16 AK19
AP17 AN17
AP18 AN18
AL21 AN21 AP21 AP20 AK20
AL20 AL19 AN22
AN27 AP25 AP11
AN9
AM27 AM24 AM12
AM9
AL27 AL24 AL12
AL9
M_DDRAD13 M_DDRAD12 M_DDRAD11 M_DDRAD10
M_DDRAD9 M_DDRAD8 M_DDRAD7 M_DDRAD6 M_DDRAD5 M_DDRAD4 M_DDRAD3 M_DDRAD2 M_DDRAD1 M_DDRAD0
M_DDRCLK0
M_DDRBCLK0
M_DDRCLK1
M_DDRBCLK1
M_DDRCKE M_DDRCS0_N M_DDRRAS_N M_DDRCAS_N
M_DDRWE_N
M_DDRBA2
M_DDRBA1
M_DDRBA0
M_DDRDM3
M_DDRDM2
M_DDRDM1
M_DDRDM0
M_DDRDQS3 M_DDRDQS2 M_DDRDQS1 M_DDRDQS0
M_DDRDQSN3 M_DDRDQSN2 M_DDRDQSN1 M_DDRDQSN0
127 130 127 130 127 130 127 130 127 130 127 130 127 130 127 130 127 130 127 130 127 130 127 130 127 130 127 130
127 130 127 130
127 130 127 130
127 130 127 130 127 130 127 130 127 130
127 130 127 130 127 130
127 127 127 127
127 127 127 127
127 127 127 127
E
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L DDR3 102 2 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
A
V46A00062200
B
M_EBDAT15
131
M_EBDAT14
131
M_EBDAT13
131
131 131 131 131 131 131 131 131
131 131
132 132 132 132
M_EBDAT12 M_EBDAT11 M_EBDAT10 M_EBDAT9 M_EBDAT8 M_EBDAT7 M_EBDAT6 M_EBDAT5 M_EBDAT4 M_EBDAT3 M_EBDAT2 M_EBDAT1 M_EBDAT0
M_NABSY_N M_NAWE_N
M_SPI_MOSI M_SPI_MISO M_SPI_IO2 M_SPI_IO3
115 131 115 131 115 131 115 131 115 131
C
D
A19
E25 A24 B24 C24 D24 E24 A23 B23 C23 D23 E23 A22 B22 C22 D22 E22
B19 C20
P34 P33 R34 R33 N33
TC90432MBG(OF1203)
EBCLKI
EBDAT15/CIREG_N EBDAT14/CIADD14 EBDAT13/CIADD13 EBDAT12/CIADD12 EBDAT11/CIADD11 EBDAT10/CIADD10 EBDAT9/CIADD9 EBDAT8/CIADD8 EBDAT7/CIADD7/NADAT7 EBDAT6/CIADD6/NADAT6 EBDAT5/CIADD5/NADAT5 EBDAT4/CIADD4/NADAT4 EBDAT3/CIADD3/NADAT3 EBDAT2/CIADD2/NADAT2 EBDAT1/CIADD1/NADAT1 EBDAT0/CIADD0/NADAT0
EBINT/NABSY_N EBWAIT_N/NAWE_N/PIO53
SPI_MOSI/MCU_PI1 SPI_MISO/MCU_PI2 SPI_IO2/MCU_PI3 SPI_IO3/MCU_PI4 SPI_CS1_N/MCU_PI0
DTV SYSTEM LSI 3/14
[V-U90432]
IC100
[SPI]
EBCLKO
EBADD8/CIDATA7/NAALE EBADD7/CIDATA6/NACLE
EBADD6/CIDATA5 EBADD5/CIDATA4 EBADD4/CIDATA3 EBADD3/CIDATA2 EBADD2/CIDATA1 EBADD1/CIDATA0
EBCE2_N/CICS_N/PIO52
EBCE1_N/NACE_N
EBCE0_N
EBBE1_N/CIIORD_N/NARE_N EBBE0_N/CIIOWR_N/NAWE_N
EBWE_N/CIWE_N EBOE_N/CIOE_N
NARE_N/EBAVD_N
SPI_CLK
SPI_CS0_N
A20
A26 B26 C26 D26 A25 B25 C25 D25
E21 D21 C21
B21 A21
E20 D20
B20
N34
M34
M_EBADD8 M_EBADD7 M_EBADD6 M_EBADD5 M_EBADD4 M_EBADD3 M_EBADD2 M_EBADD1
M_CICS_N M_NACE_N
M_CIIORD_N M_CIIOWR_N
M_EBWE_N M_EBOE_N
M_NARE_N
M_SPICLK
M_SPI_CS0 1
[TP]
DP105
131 131 131 131 131 131 115 131 115 131
794 131
795 795
131 131
131
132
132
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L EBUS/SPI 103 3 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
A
V46A00062200
B
[TP]
DP108
1
C
701 124
D
M_UARXD0
124
M_CIRESET
795
M_CICD1_N
795
M_CIWAIT_N
795
M_UA_TVM2SOC M_TSI3DATA3
790
M_ETREFCLK
151
M_ETRXD0
151
M_ETRXD1
151
M_ETCRS_DV
151
E30 B31 A31
C31 B34 A32
D31 C33 C34
AK7 AN7 AP7
A17
B17 C17 D17 E17 D18 E18
G31 K34 K33 H31 H30 H32
UACTS0_N/TSI1DATA5/PIO7 UARXD0 UA0EXCLK/PIO8
UACTS1_N/CIRESET/PIO12 UARXD1/CICD1_N/PIO9 UA1EXCLK/CIWAIT_N/PIO13
UACTS2_N/TSI1DATA7/PIO15 UARXD2 UA2EXCLK/TSO0DATA5/PIO16
UACTS3_N/TSO1CLKO/PIO18 UARXD3 UA3EXCLK/TSI3DATA3/PIO19
ETREFCLK
ETRXC ETRD0 ETRD1
OPEN WHEN ERR IS NOT USED
ETRD2
OPEN WHEN RMII MODE
ETRD3 ETRXCTL
PCIERST_N/PIO64 PCIERXSIP PCIERXSIN PCIECKREFP PCIECKREFN PCIEAMOUT
DTV SYSTEM LSI 4/14
[V-U90432]
IC100
[UART]
UARTS3_N/TSO1CGMS/TSI3DATA7/PIO17
[ETHER]
[PCI EXPRESS]
OPEN WHEN UNUSED OPEN WHEN UNUSED OPEN WHEN UNUSED OPEN WHEN UNUSED OPEN WHEN UNUSED
UARTS0_N/TSI1DATA4/PIO6
UARTS1_N/CIRD_N/PIO11
UATXD1/CICD2_N/PIO10
UARTS2_N/TSI1DATA6/PIO14
OPEN WHEN RMII MODEOPEN WHEN RMII MODE
OPEN WHEN RMII MODE OPEN WHEN RMII MODE
OPEN WHEN UNUSED OPEN WHEN UNUSED
OPEN WHEN UNUSED
PCIETXSON PCIETXSOP
UATXD0
UATXD2
UATXD3
ETMDC
ETMDIO
ETTXC ETTD0 ETTD1 ETTD2 ETTD3
ETTXCTL
D30 C30
B32 B33
D32 C32
AL7 AM7
D16 E16
A18 B18 C18 C19 D19 E19
H34 H33
M_UATXD0
M_CIRD_N
M_CICD2_N
M_TSI3DATA7
M_UA_SOC2TVM
M_ETMDC
M_ETMDIO
M_ETTXD0 M_ETTXD1
M_ETTXEN
124
794 795
790 701 124
150 150
151 151
151
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
TC90432MBG(OF1203)
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L UART/ETHER 104 4 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
A
V46A00062200
DTV SYSTEM LSI 5/14
[V-U90432]
IC100
H_EXT_RESET
663
H_VCC_EN
B
668
H_CD_SENSE
668
H_EN_RPWR4
667
M_TSI3DATA4
790
M_TSI3DATA5
790
M_TSI3DATA6
790
H_EN_VBUS4
667
M_TSI3DATA
790
M_TSI3VALID
790
M_TSI3SYNC
790
M_TSI3CLKI
790
C
M_XIN
D
120
AK2 AK3 AK4 AK1
AL2 AL3 AL4 AL1
AM2 AM3 AM4 AM1
AN2 AN3 AP3 AN1
B29 E28 E29 A29
B30 C29 D29 A30 AJ1
AD1
V1 V2
Y1 Y2 W1 W2
TSI5DATA/TSO1DATA/PIO32 TSI5VALID/TSO1VALID/PIO33 TSI5SYNC/TSO1SYNC/PIO34 TSI5CLKI/PIO35
TSI4DATA/TSI3DATA4/PIO28 TSI4VALID/TSI3DATA5/PIO29 TSI4SYNC/TSI3DATA6/PIO30 TSI4CLKI/PIO31
TSI3DATA/PIO24 TSI3VALID/PIO25 TSI3SYNC/PIO26 TSI3CLKI/PIO27
TSI2DATA TSI2VALID TSI2SYNC TSI2CLKI
TSI1DATA TSI1VALID TSI1SYNC TSI1CLKI
TSI0DATA/TSO0DATA2/PIO20 TSI0VALID/TSO0DATA3/PIO21 TSI0SYNC/TSO0DATA4/PIO22 TSI0CLKI/PIO23 TSOXCLKI
XIN
VINP_VSB VINN_VSB
JAD1_QP JAD1_QN JAD1_IP JAD1_IN
0.1uF When Unused
0.1uF When Unused
0.1uF When Unused
0.1uF When Unused
0.1uF When Unused
0.1uF When Unused
[TS I/F]
[DEMOD]
TSO1DATA/TSI1DATA1/PIO41
TSO1VALID/TSI1DATA2/PIO42
TSO1SYNC/TSI1DATA3/PIO43 TSO1CLKO/TSO0DATA6/PIO44 TSO1CGMS/TSO0DATA7/PIO45
TSO0DATA/PIO36
TSO0VALID/PIO37
TSO0SYNC/PIO38
TSO0CGMS/TSO0DATA1/PIO40
Open When Unused Open When Unused
0.1uF When Unused
Open When Unused
0.1uF When Unused
TSO0CLKO/PIO39
OFDM_IFAGC OFDM_RFAGC
VCM_8PSK
XOUT
VBGF
PSK_AGC
B27 C27 D27 A27 E26
B28 C28 D28 A28 E27
AD2
AE3 AE4
AE5 AA7
Y7
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
1
1
C1211
C1210
2
2
100nF(K)
100nF(K)
GND
2011/02/10
1
C1212
2
100nF(K)
1
C1213
2
100nF(K)
1
C1214
2
100nF(K)
TC90432MBG(OF1203)
1
C1215
2
100nF(K)
1
1
C1216
C1217
2
2
100nF(K)
100nF(K)
GND
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L TS 105 5 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
A
3.3VD
21
R1168
M_XIN12M
120
B
C
D
701
C_COLDRST
10nF(K)
370 372 122 350
1
C1001
2
GND
701 124
791 122
790 796 122
150 161 122
122 650
M_EBADD16
115
M_EBADD17
115
M_EBADD18
115
M_EBADD19
115
M_HEAD C_HOTSTART
122
M_LED
122
A_DSP_RESET A_DSP_BOOT_STATUS
350
S_CI_VCC_EN M_PIO81
122
S_CI_TS_SEL
V_MONI_MUTE R_DEMO_RST
605
R_TV_SYNC
753
M_MAINSYNC
630
M_GRESET
B_FRC_RESET
M_PANEL_PWR
706
E
4.7K(D) Y34
AA32
W34 W33
U33 U34 V34 V33 V32 V31 W32 W30 Y30
W29 Y29 AA29 AB29 AC29 AD29
R31 R30 T32 T31 U31 T34
V30 U30
N32 N31 P32 P31
M33 M32 M31 M30 L32 L31 L30 K31 J32 J31
AA30 AB30 AC30
21
TC90432MBG(OF1203)
0(X)
R1167
MCU_XIN12M MCU_XIN32K
MCU_RESET_N COLDRESET_N
MCU_PA0_TMS MCU_PA1_TCK MCU_PA2_TRACECLK/EBADD15 MCU_PA3_TRACE0/EBADD16 MCU_PA4_TRACE1/EBADD17 MCU_PA5_TRACE2/EBADD18 MCU_PA6_TRACE3/EBADD19 MCU_PB1_TDI MCU_PB2_TRST_N
MCU_PD0_ADIN0/PIO73 MCU_PD1_ADIN1/PIO74 MCU_PD2_ADIN2/PIO75 MCU_PD3_ADIN3/PIO76 MCU_PD4_ADIN4/PIO77 MCU_PD5_ADIN5/PIO78
MCU_PE1_RXD0/PIO80 MCU_PE2_SCLK0_CTS0_N/PIO81 MCU_PE5_RXD1/PIO84 MCU_PE6_SCLK1_CTS1_N/PIO85 MCU_PF5_SI1_SCL1/PIO87 MCU_PF6_SCK1/PIO88
MCU_PG0_SDA0/PIO89 MCU_PG1_SCL0/PIO90
MCU_PH0_TB0IN0/EBADD9 MCU_PH1_TB0IN1/EBADD10 MCU_PH3_TB1IN0/EBADD12 MCU_PH4_TB1IN1/EBADD13
MCU_PJ0_INT0/PIO91 MCU_PJ1_INT1/PIO92 MCU_PJ2_INT2/PIO93 MCU_PJ3_INT3/EBADD26 MCU_PJ4_INT4/EBADD25 MCU_PJ5_INT5/EBADD24 MCU_PJ6_INT6/EBADD23 MCU_PJ7_INT7/EBADD22 MCU_PK3_INT8/EBADD21 MCU_PK4_INT9/EBADD20
MCU_NMI_N TEST SCAN
PD When Unused Open When Unused
Open When Unused
(-)
Open When Unused
(-)
(-) (-) (-)
(-) OPEN OPEN
PU When unused
V46A00062200
DTV SYSTEM LSI 6/14
[V-U90432]
IC100
[MCU]
Open When UnusedOpen When Unused
Open When Unused
(-)
Open When Unused
(-)
Open When Unused
(-)
Open When Unused
(-)
Open When Unused
(-) Open When Unused Open When Unused
(PD) (PD) (PD) (PD) (PD) (PD)
(PD)
(PD,OD)
(PD)
(PD) (PD)
- Open -
(-)
- When
(-)
- Unused -
(-)
-
(-)
(PD) (PD) (PD)
(-) (-) (-) (-) (-) (-) (-)
PD When Unused
Open When unused Open When unused Open When unused Open When unused Open When unused Open When unused Open When unused
MCU_RESETOUT_N
(PD)
MCU_PE3_RXIN0/PIO82
(PD)(PD)
MCU_PE0_TXD0/PIO79
(PD,OD)(PD,OD)
(PD)(PD)
(-)
(-)
MCU_PE4_TXD1/PIO83
MCU_PF4_SO1_SDA1/PIO86
MCU_PH2_TB0OUT/EBADD11
MCU_PH5_TB1OUT/EBADD14
(PD)
(-)
MCU_PK1_ALARM_N/PIO94
MCU_XOUT12M MCU_XOUT32K
MCU_PB0_TDO
MCU_PK0_CEC
Y33
AA31
Y32
W31
T30
R32
T33
U32
N30
P30
J30 K30
21
R1169
4.7K(D)
GND
M_XOUT12M
H_ARC0_OFF
A_DSP_BUS_EN
S_CI_CARD_EN
M_BL_ONOFF
120
665
350
122 793 795
750 122 760 765 770
706
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
GND
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L MCU 106 6 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
A
V46A00062200
B
[TP]
DP115
1
M_PCLK_SEL0
120
M_PCLK_SEL1
120
AC3 AG3 AF4 AF5
AMCLKI/AMCLKOF ALRCKIA/PIO65 ABCKIA/PIO66 ASDIA/TSIXREQ/PIO67
C
A_E1_L_S5L
606
A_E1_R_S5L
606
A_E2_L_S5L
606
A_E2_R_S5L
606
A_HDMIPC_L_S5L
607
A_HDMIPC_R_S5L
D
607
305 116
SIF_S5L M_VREFIN
A4 B4 A5 B5 A6 B6 A7 B7 D7 E7 D8 E8
U1 U2
ALIN1
Open When Unused
ARIN1
Open When Unused
ALIN2
Open When Unused
ARIN2
Open When Unused
ALIN3
Open When Unused
ARIN3
Open When Unused
ALIN4
Open When Unused
ARIN4
Open When Unused
ALIN5
Open When Unused
ARIN5
Open When Unused
ALIN6
Open When Unused
ARIN6
Open When Unused
SIFIN
Open When Unused
VREFEIN
DTV SYSTEM LSI 7/14
[V-U90432]
PD
IC100
[AUDIO]
ALRCKOY/PIO71
AMUTEY_N/SIF_ADC_CLKI
Open When Unused Open When Unused
Open When Unused Open When Unused
Open When Unused Open When Unused
AMCLKOX ALRCKOX
ABCKOX
ASDOX0 ASDOX1/PIO68 ASDOX2/PIO69
AMCLKOY
ABCKOY/PIO70
ASDOY/PIO72
ATXO
AMUTEX_N
ALMONIOUT ARMONIOUT
AADVCML
ALSPOUT ARSPOUT
ALTUNEOUT ARTUNEOUT
VBGE
AC4 AG5 AG4 AH3 AH4 AH5
AC5 AJ5 AJ4 AK5
AJ3
AD4 AD5
D6 E6 H7
B1 B2
C1 C2
W7
[TP]
DP116
1
M_ALTUNEOUT M_ARTUNEOUT
M_AMCLKOX M_ALRCKOX
M_ABCKOX M_ASDOX0
M_ASDOX2
M_AMCLKOY
M_L-DIM_EN
M_ROTATE
M_LCDWP
M_ATXO
M_AMUTEX M_AMUTEY
M_AADVCML
M_VBGE
300 300 300 300
300
300 650 650 650
300
302 301 300 300
116
312 312
116
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
TC90432MBG(OF1203)
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L AUDIO 107 7 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
A
V46A00062200
DTV SYSTEM LSI 8/14
[V-U90432]
B
AM30
LVOPDN/VDINOUT/PIO5
C
D
E
TC90432MBG(OF1203)
IC100
[LVDS]
Open When Unused Open When Unused
TA1
TA1_N
TB1
TB1_N
TC1 TC1_N TCLK1
TCLK1_N
TD1 TD1_N
TE1 TE1_N
TA2 TA2_N
TB2 TB2_N
TC2 TC2_N TCLK2
TCLK2_N
TD2 TD2_N
TE2 TE2_N
TA3 TA3_N
TB3 TB3_N
TC3 TC3_N TCLK3
TCLK3_N
TD3 TD3_N
TE3 TE3_N
TA4 TA4_N
TB4 TB4_N
TC4 TC4_N TCLK4
TCLK4_N
TD4 TD4_N
TE4 TE4_N
MON_REF_A MON_REF_B
AB33 AB34 AC33 AC34 AD33 AD34 AE33 AE34 AF33 AF34 AG33 AG34
AH33 AH34 AJ33 AJ34 AK33 AK34 AL33 AL34 AM33 AM34 AN33 AN34
AC31 AC32 AD31 AD32 AE31 AE32 AF31 AF32 AG31 AG32 AH31 AH32
AJ31 AJ32 AK31 AK32 AL31 AL32 AM31 AM32 AN31 AN32 AP31 AP32
AD30 AE30
F
[RMX4A]
RM100
36 4
[RMX4A]
RM101
36 4
[RMX4A]
RM102
36 4
[RMX4A]
RM103
36 4
[RMX4A]
RM104
36 4
[RMX4A]
RM105
36 4
[RMX4A]
33(J)
RM106 81 72
5
[RMX4A]
33(J)
RM107 81 72
5
[RMX4A]
33(J)
RM108 81 72
5
[RMX4A]
33(J)
RM109 81 72
5
[RMX4A]
33(J)
RM110 81 72
5
[RMX4A]
33(J)
RM111 81 72
5
33(J)
81 72
5
33(J)
81 72
5
33(J)
81 72
5
33(J)
81 72
5
33(J)
81 72
5
33(J)
81 72
5
36 4
36 4
36 4
36 4
36 4
36 4
M_TA1_N
M_TA1
M_TB1_N
M_TB1
M_TC1_N
M_TC1
M_TCLK1_N
M_TCLK1
M_TD1_N
M_TD1
M_TE1_N
M_TE1
M_TA2_N
M_TA2
M_TB2_N
M_TB2
M_TC2_N
M_TC2
M_TCLK2_N
M_TCLK2
M_TD2_N
M_TD2
M_TE2_N
M_TE2
M_TA3_N
M_TA3
M_TB3_N
M_TB3
M_TC3_N
M_TC3
M_TCLK3_N
M_TCLK3
M_TD3_N
M_TD3
M_TE3_N
M_TE3
M_TA4_N
M_TA4
M_TB4_N
M_TB4
M_TC4_N
M_TC4
M_TCLK4_N
M_TCLK4
M_TD4_N
M_TD4
M_TE4_N
M_TE4
650 650 650 650
650 650 650 650
650 650 650 650
651 651 651 651
651 651 651 651
651 651 651 651
650 650 650 650
650 650 650 650
650 650 650 650
651 651 651 651
651 651 651 651
651 651 651 651
A
B
C
D
E
F
2011/02/10
T.SHIMIZU
2011.03.11 09:37
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L LVDS 108 8 PP PE0993
TOSHIBA CORPORATION
5T03655D
87654321
A
V46A00062200
B
H_RXDSINK_CP
661
H_RXDSINK_CN
R1003
661
H_RXDSINK_0P
661
H_RXDSINK_0N
661
H_RXDSINK_1P
661
H_RXDSINK_1N
661
H_RXDSINK_2P
661
H_RXDSINK_2N
661
M_REXT
116
H_PWR_SINK
662
M_P3CKIN
117
M_DAVVREF
116
M_DAVIREF
116
M_DAVVB
116
3.3VD
R1004
4.7K(D)
C
4.7K(D)
21
21
B12 A12 B11 A11 B10 A10 B9 A9
H13
D12
D13 E13
V4
K7 L7 J7
RXPC RXNC RXP0 RXN0 RXP1 RXN1 RXP2 RXN2
REXT
DDC5V
SCL_DDC SDA_DDC
P3CKIN
DAVVREF DAVIREF DAVVB
PU When Unused
PU When Unused PU When Unused
DTV SYSTEM LSI 9/14
[V-U90432]
IC100
[HDMI]
[VCROUT]
Open When Unused
OPEN OPEN
HPLUG
TOUTP TOUTN
P3FIL
DAOUT3
BIASDA3
DAVOUTP DAVOUTN
E12
D11 E11
V7 V5 U7
E1 E2
M_P3FIL
M_DAOUT3
M_BIASDA3
M_DAVOUTP M_DAVOUTN
117 117 117
605 605
D
TC90432MBG(OF1203)
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L HDMI 109 9 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
A
M_XIN42
116
M_VCVS1IN
607
M_VCVS2IN
606
M_VCVS3IN
607
M_VCVS4IN
B
C
D
E
607
606 606 606
608 608 608
608 608 608
608 608
608 608
600
116 116 116 116
605
606
600
117
117
M_VR1IN M_VG1IN M_VB1IN
M_VR2IN M_VG2IN M_VB2IN
M_VR4IN M_VG4IN M_VB4IN
M_AHDIN3V M_AVDIN3V
M_AHDIN5V M_AVDIN5V
M_FBINA
M_VREFAIN M_VREFBIN M_VREFCIN M_VREFDIN
M_VDTUNEIN
M_SYNCIN1
M_VCOMP1IN
M_P1CKIN
M_P2CKIN
AB1
R1 R2 P1 P2
N1 M1
N2 M2
L1 L2 K1
K2 J1 J2
H1 H2 G1
G2 F1 F2
Y5 AA5
Y4 AA4
AB4 AB5
N4 N5 L4 L5
R5
M3 M4 M5
G4 G5 F4 F5 E4 D4
U4
J4
XIN42
VCVS1IN VCVS2IN VCVS3IN VCVS4IN
VY1IN VC1IN
VY2IN VC2IN
VR1IN VG1IN VB1IN
VR2IN VG2IN VB2IN
VR3IN VG3IN VB3IN
VR4IN VG4IN VB4IN
AHDIN3V AVDIN3V
AHDIN5V AVDIN5V
FBINA FBINB
VREFAIN VREFBIN VREFCIN VREFDIN
VDTUNEIN
SYNCIN1 SYNCIN2 SYNCIN3
VCOMP1IN VCOMP2IN VCOMP3IN VCOMP4IN VCOMP5IN VCOMP6IN
P1CKIN
P2CKIN
Open When Unused Open When Unused Open When Unused Open When Unused
Open When Unused Open When Unused
Open When Unused Open When Unused
Open When Unused Open When Unused Open When Unused
Open When Unused Open When Unused Open When Unused
Open When Unused Open When Unused Open When Unused
Open When Unused Open When Unused Open When Unused
GND When Unused GND When Unused
GND When Unused GND When Unused
GND When Unused GND When Unused
Open When Unused
Open When Unused Open When Unused Open When Unused
GND When Unused GND When Unused GND When Unused GND When Unused GND When Unused GND When Unused
V46A00062200
DTV SYSTEM LSI 10/14
[V-U90432]
IC100
[ADC]
Open When Unused Open When Unused
OPEN
XOUT42
VMONIOUT VTUNEOUT VALPFOUT
VBG
P1FIL
DAOUT1
BIASDA1
P2FIL
DAOUT2
BIASDA2
AB2
T3 R4 T4 P7
T7 U5 R7
M7 J5 N7
M_XOUT42
M_VMONIOUT M_VTUNEOUT
M_VBG
M_P1FIL
M_DAOUT1
M_BIASDA1
M_P2FIL
M_DAOUT2
M_BIASDA2
116
630 605
117
117 117 117
117 117 117
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
TC90432MBG(OF1203)
GND
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L ADC 110 10 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
A
V46A00062200
3.3V_V
1.2V_DM1.2V_VI3.3V_VI1.2V_SIF3.3V_A1.2V1.2V_PLL
V3
B
C
V9
W3 W9
N3 N9 P3 R9
K3 L3 P9
H3 J3 M9 T9
U3 U9
C6 C7 K11
AVDD12DM0 AVDD12DM0
AVDD12DM1 AVDD12DM1
AVDD12VI AVDD12VI AVDD12VI AVDD12VI
AVDD33VI AVDD33VI AVDD33VI
AVDD33V AVDD33V AVDD33V AVDD33V
AVDD12SIF AVDD12SIF
AVDD33AI AVDD33AI AVDD33AI
D
C3 C4 K10
N14 P14 R14 Y11
Y12
E
TC90432MBG(OF1203)
AVDD33AO AVDD33AO AVDD33AO
VDD12 VDD12 VDD12 VDD12
VDD12PLL
DTV SYSTEM LSI 11/14
[V-U90432]
IC100
[ANALOG POWER]
AVSSDM AVSSDM AVSSDM AVSSDM AVSSDM
AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV AVSSV
AVSSSIF AVSSSIF AVSSSIF
AVSSAI AVSSAI AVSSAI AVSSAI AVSSAI AVSSAI AVSSAI AVSSAI AVSSAI
AVSSAO AVSSAO AVSSAO AVSSAO AVSSAO
VSS VSS VSS VSS
V10
W10
M10 N10
P10
R10
T10
U10
L11
L10
A33 A34 H14 L24
W4 W5
Y3
D1 D2 D3 E3 F3 G3 H4 H5 K4 K5
P4 P5
R3
T5
T1 T2
A8 B8 C5 C8 D5 D9 E5 E9
A1 A2 A3 B3
GND
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
MAIN UNIT
FUNCTIONTITLE
S5L ANALOG POWER
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
111 11 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
A
V46A00062200
DTV SYSTEM LSI 12/14
[V-U90432]
B
C
D
1.1V_PCIE1.8V_PCIE1.2V_HDMIS3.3VD
L33 L34 P24 P25
J33 J34 N24 N25
C11 C12 K13
C9 C10 K12
C13 K15 L15
C14 K16 L16
Y24 Y25
AA24 AA25 AB24 AB25 AB31 AB32
M24 M25
TC90432MBG(OF1203)
VDD11PCIE VDD11PCIE VDD11PCIE VDD11PCIE
VDD18PCIE VDD18PCIE VDD18PCIE VDD18PCIE
VDD12HDMI VDD12HDMI VDD12HDMI
VDD33HDMI VDD33HDMI VDD33HDMI
VDD33USB0 VDD33USB0 VDD33USB0
VDD33USB1 VDD33USB1 VDD33USB1
VDD33LVDS0 VDD33LVDS0
VDD33LVDS1 VDD33LVDS1 VDD33LVDS1 VDD33LVDS1 VDD33LVDS1 VDD33LVDS1
VDD33SDHC VDD33SDHC
IC100
[DIGTAL IO POWER]
VSSPCIE VSSPCIE VSSPCIE VSSPCIE
VSSHDMI VSSHDMI VSSHDMI VSSHDMI VSSHDMI VSSHDMI
VSSUSB VSSUSB VSSUSB
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
G33 G34 K32 P23
A13 B13 D10 E10 L12 L13
A16 B16 P16
M11 M12 M13 N11 N12 N13 P11 P12 P13 P17 P18 P19 P20 P21 P22
GND
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L DDR POWER 112 12 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
V46A00062200
A
1.5V 1.1V_DDR1.8V_SCS
AC18 AC19
AC16 AC17 AC20 AC21 AC22 AK8 AK9
B
AL8 AM8
K20 L20 V24 V25 Y13 Y14 AC23 AK27 AL28 AM28
VDD11DDR VDD11DDR
VDD15DDR VDD15DDR VDD15DDR VDD15DDR VDD15DDR VDD15DDR VDD15DDR VDD15DDR VDD15DDR
VDD18SCS VDD18SCS VDD18SCS VDD18SCS VDD18SCS VDD18SCS VDD18SCS VDD18SCS VDD18SCS VDD18SCS
C
D
E
TC90432MBG(OF1203)
DTV SYSTEM LSI 13/14
[V-U90432]
IC100
[MEMORY POWER]
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
R11 R12 R13 R16 R17 R18 R19 R20 R21 R22 R23 T11 T12 T13 T16 T17 T18 T19 T20 T21 T22 T23 U11 U12 U13 U16 U17 U18 U19 U20 U21 U22 U23 V11 V12 V13 V16 V17 V18 V19 V20 V21 V22 V23 W11 W12 W13 W16 W17 W18 W19 W20 W21 W22 W23 Y16 Y17 Y18 Y19 Y20 Y21 Y22 Y23 Y31
GND
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L POWER 113 13 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
V46A00062200
A
B
C
1.1V_VDDC
1.1V_VDDC1.8V_AD3.3VD3.3VD1.1V_PLL
K17 K18 K21 K22 L17 L18 L21 L22 T14 U14 V14 W14 W24 W25 AA13 AA14 AB13 AB14 AC24 AC25
K14 L14 M14
K19 K23 L19 L23 AC13 AC14
T24 T25
R24 R25
U24 U25
VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11 VDD11
VDD18 VDD18 VDD18
VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
VDD11MCU VDD11MCU
VDD33MCU VDD33MCU
VDD11PLL VDD11PLL
D
E
DTV SYSTEM LSI 14/14
[V-U90432]
IC100
[DIGITAL POWER]
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AA1 AA2
AA3 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AA33 AA34
AB3 AB16 AB17 AB18 AB19 AB20 AB21 AB22 AB23
AC1
AC2
AD3 AF30 AG30 AJ12 AJ13 AJ15 AJ16 AJ17 AJ19 AJ20 AJ21 AJ23 AJ24 AK12 AK15 AK21 AK24 AL11 AL14 AL22 AL25 AM10 AM11 AM13 AM14 AM15 AM16 AM17 AM18 AM19 AM20 AM21 AM22 AM23 AM25 AM26
AN8 AN28
AP1
AP2
AP8 AP28 AP33 AP34
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
TC90432MBG(OF1203)
FUNCTIONTITLE
SH.NO.DESIGNED BY
GND
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L DIGITAL POWER114 14 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
BOOT CONFIG (MCU) BOOT CONFIG
A
M_EBADD19
MCU_PA6_TRACE3 MCU_PA5_TRACE2 MCU_PA4_TRACE1 MCU_PA3_TRACE0
B
106 106 106 106
M_EBADD18 M_EBADD17 M_EBADD16
21
R1009
4.7K(D)
3.3VD 3.3VD
3.3VD
21
R1010
4.7K(D) EBUS ALL ADDRESS
SPI 3Byte
21
R1011
21
R1012
4.7K(D)
4.7K(D)
MCU DISABLE
MCU DISABLE
103 131 103 131
M_EBADD1 M_EBADD2
21
R1056
4.7K(D)
NOT MOUNT
3.3VD 3.3VD
21
R1057
4.7K(D)
NOT MOUNT
BOOT CONFIG FOR DEVELOPMENT
2.2K(D)
21
794 131
S_EBADD1
2.2K(D)
21
R1053
NOT MOUNT
1
1
[TP]
DP117
DP118
R1054
NOT MOUNT
[TP]
A
B
HEADER PIN
GND
C
C
BOOT CONFIG (BOARD REVISION) BOARD REVISION
REV COMMENT
3.3VD
21
21
21
21
D
R1077
R1076
*R1078
4.7K(D) NOT MOUNT
NOT MOUNT
4.7K(D) NOT MOUNT
R1075
4.7K(D) NOT MOUNT
21
R1074
4.7K(D) NOT MOUNT
4.7K(D)
5’b0xxxx DDR3 SDRAM = 2Gbitx2
5’b1xxxx DDR3 SDRAM = 1Gbitx1
D
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/14
103 131 103 131 103 131 103 131 103 131
M_EBDAT12 M_EBDAT11 M_EBDAT10 M_EBDAT9 M_EBDAT8
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L Boot-Config 115 15 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
21
21
21
21
3.3V_VI
C1006
100nF(K)
1
C1007
100nF(K)
1
C1008
100nF(K)
1
C1009
100nF(K)
1
A
B
[Seine5L VFE XTAL] [Seine5L Audio ADC / SIF]
C1003
12pF(J)
GND
1
C1004
10pF(J)
1
2
2
42MHz
V10A00016400
[XG]
X1000
1
3
R1016
21
1K(D)
GND
GND
2
4
M_XIN42
R1017
1M(J)
21
M_XOUT42
110
110
[Seine5L 4ch ADC]
110
110
110
110
M_VREFAIN
M_VREFBIN
M_VREFCIN
M_VREFDIN
R1088
75(J)
R1089
75(J)
R1090
75(J)
R1091
75(J)
C
[External Reference R]
D
3.3VD
R1015
2K(D)
21
M_REXT
109
101
101
M_USB0REXT
M_USB1REXT
R1018
180(D)
5.1K(D)
21
21
GND
R1019
E
R1159
180(D)
R1160
5.1K(D)
21
21
GND
[Rec DAC]
109
109
M_DAVVB
M_DAVVREF
C1005
1
1uF(K)
3.3V_V
2
GND
NOT MOUNT W1017
0(X)
2
2
2
2
W1016
0(X)
2
1
GND
20K(D)
R1020
21
21
C1010
NOT MOUNT
13K(D)
R1021
C1011
1
1uF(K)
C1012
1
100nF(K)
A
C1013
107
ADC
107
SIF
107
M_AADVCML
M_VREFIN
M_VBGE
1
10uF(K)
C1014
1
10pF(J)
C1015
1
100nF(K)
C1016
1
100nF(K)
2
2
2
2
GND
B
C
D
M_DAVIREF
109
R1022
270(D)
21
R1023
330(D)
2
2
GND
21
GND
E
F
T.SHIMIZU
2011.03.11 09:37
2011/02/10
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L Crystal/Vref116 16 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
[HDMI-AUDIO PLL3]
A
M_DAOUT3
109
B
R1025
1.5K(D)
C1018 5pF(C)
21
C
M_DAOUT2
110
D
110
E
110
110
R1024
1.5K(D)
C1017
5pF(C)
M_VBG
M_BIASDA2
M_P2FIL
21
NOT MOUNT
1
2
F
3.3V_V
B
R1027
NOT MOUNT
0(X)
1
2
3.3V_V
C
B
2SC4116-Y(TE85L,F)
E
R1026
21
0(X)
GND
R1028 1K(D)
C1019
1
1nF(K)
C
Q1001
2SC4116-Y(TE85L,F)
E
21
R1030
1.2K(D)
21
Q1000
C1023
2
1nF(K)
R1029
1.2K(D)
21
C1020
1
2
100nF(K)
C1021
1
2
100nF(K)
C1022
1
21
2
2
100nF(K)
C1024
2
1nF(K)
1
M_P3CKIN
1
M_P2CKIN
GND
109
110
109
109
M_BIASDA3
M_P3FIL
R1031
2.2K(D)
150pF(J)
[SD-VIDEO PLL1][HD-VIDEO PLL2]
21
1
C1025
110
C1026
1
100nF(K)
C1027
1
15nF(K)
2
M_DAOUT1
110
110
2
2
GNDGND
R1032
1.5K(D)
C1028 5pF(C)
M_BIASDA1
M_P1FIL
21
1
2
3.3V_V
B
R1033
NOT MOUNT
0(X)
R1034
2.2K(D)
1
C1029
150pF(J)
C
Q1002
2SC4116-Y(TE85L,F)
E
21
R1035
1.2K(D)
21
GND
C1030
1
2
100nF(K)
C1031
1
21
2
2
15nF(K)
C1032
2
1nF(K)
M_P1CKIN
1
GND
110
A
B
C
D
E
F
2011/02/10
T.SHIMIZU
2011.03.11 09:37
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L PLL/DAC 117 17 PP PE0993
TOSHIBA CORPORATION
5T03655D
87654321
A
B
1.2V_PLL
1.2V_SIF
100nF(K)
C1033
1
10nF(K)
C1034
1
100nF(K)
C1035
1
10nF(K)
C1036
1
2
2
2
2
GND
GND
1.2V_HDMIS
10nF(K)
10nF(K)
1.2V
100nF(K)
C1044
10nF(K)
C1045
C1053
2
C1054
2
1
1
1.2V_DM
100nF(K)
1.2V_VI
C1055
1
10nF(K)
C1056
1
100nF(K)
C1057
1
10nF(K)
C1058
1
1
1
GND
2
2
GND
2
2
2
2
GND
GND
1.8V_AD
1.8V_PCIE
100nF(K)
C1064
1
10nF(K)
C1065
1
100nF(K)
C1066
1
10nF(K)
C1067
1
1.8V_SCS
100nF(K)
C1072
2
2
GND
2
2
GND
1
10nF(K)
C1073
1
1nF(K)
C1074
1
100nF(K)
C1075
1
10nF(K)
C1076
1
3.3V_VI
C1091
10uF(K)
2
2
2
2
2
GND
2
C1092
100nF(K)
2
C1093
100nF(K)
2
C1095
100nF(K)
2
C
2
2
2
2
2
2
2
2
GND
1.1V_VDDC
22uF(M)
C1202
1
10uF(K)
C1046
1
10nF(K)
C1047
1
10nF(K)
C1048
1
10nF(K)
C1049
1
10nF(K)
C1050
1
10nF(K)
C1051
1
1.5V
10uF(K)
C1059
1
NOT MOUNT 100nF(K)
C1060
1
100nF(K)
C1061
1
NOT MOUNT 100nF(K)
C1062
1
100nF(K)
C1063
1
2
2
2
2
2
GND
1.5V
10nF(K)
C1068
1
NOT MOUNT
10nF(K)
C1069
1
10nF(K)
C1070
1
10nF(K)
C1071
1
2
2
2
2
GND
2
2
NOT MOUNT
2
2
2
2
2
GND
3.3VD
NOT MOUNT
4.7uF(K) C1077
1
C1078
100nF(K)
1
NOT MOUNT 100nF(K)
C1079
1
100nF(K)
C1080
1
100nF(K)
C1081
1
100nF(K)
C1082
1
NOT MOUNT 100nF(K)
C1083
1
1.1V_VDDC
22uF(M)
C1200
1
22uF(M)
C1201
D
E
1
100nF(K)
C1037
1
100nF(K)
C1038
1
NOT MOUNT
100nF(K)
C1039
1
NOT MOUNT
100nF(K)
C1040
1
NOT MOUNT 100nF(K)
C1041
1
NOT MOUNT
100nF(K)
C1042
1
F
3.3VD
NOT MOUNT 10nF(K)
C1084
2
2
2
2
2
2
2
GND
1
NOT MOUNT
10nF(K)
C1085
1
10nF(K)
C1086
1
C1087
10nF(K)
1
10nF(K)
C1088
1
10nF(K)
C1089
1
1nF(K)
C1090
1
3.3V_A
10uF(K)
3.3VD
C1097
1
100nF(K)
C1098
1
NOT MOUNT 100nF(K)
C1099
1
100nF(K)
C1100
1
C1105
100nF(K)
2
NOT MOUNT
C1106
100nF(K)
2
10nF(K)
C1101
1
NOT MOUNT
100nF(K)
C1102
1
NOT MOUNT
100nF(K)
C1103
1
1nF(K)
C1104
1
C1107
1nF(K)
2
1
1
1
1
GND
2
2
2
2
2
2
2
GND
2
2
2
2
1
1
2
2
2
2
1
GND
GND
1.1V_PCIE
3.3VD
1.1V_VDDC
1.1V_PLL
10nF(K)
C1114
1
10nF(K)
C1115
1
NOT MOUNT 100nF(K)
C1116
1
NOT MOUNT 100nF(K)
C1117
1
100nF(K)
C1112
1
100nF(K)
C1113
1
1.1V_DDRPLL
R1170
0(X)
R1173
2
2
2
2
GND
2
GND
2
GND
21
1.1V_DDR
21
3.3VD
1.1V_PLL
100nF(K)
C1271
1
10nF(K)
C1272
1
10nF(K)
C1052
1
NOT MOUNT
100nF(K)
C1108
1
10nF(K)
C1109
1
100nF(K)
C1110
1
10nF(K)
C1111
1
3.3V_V
2
2
2
2
2
GND
2
2
GND
C1257
10uF(K)
2
C1094
100nF(K)
2
C1096
100nF(K)
2
A
B
C
1
1
1
GND
D
E
0(X)
GND
F
2011/02/10
T.SHIMIZU
2011.03.11 09:37
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L Capacitor 118 18 PP PE0993
TOSHIBA CORPORATION
5T03655D
87654321
8
5
2
6
7
C1289
1uF(K)
VOUT
[VSS]
VOUT
[VSS]
V47A00001800
[V-L1661]
IC102
Vin
CONTNCCn
NC
HeatSink
MM1661JHBE
NOT MOUNT
54
2
51
2
UREG
GNDNC
1
2
1
2
V0
1
C1129
2
100nF(K)
GND
1
C1128
2
100nF(K)
GND
1
4
3
9
10V
C1132
2.2uF(K)
R1046
0(J)
R1179
0(J)
10V
C1131
2.2uF(K)
2
C1207
1
10nF(K)
R1048
21
0(J)
V13GD0000262
R1049
12
120ohm
V13GD0000262
R1037
12
120ohm
30mA(max)
1.8V_PCIE
21
15mA(max)
1.8V_AD
21
300mA(max)
1.8V_SCS
1
1
C1127
C1130
2
100nF(K)
4.7uF(K)
GND
3.3V_A
3.3V_VI
3.3V_V
6.3V
2
20mA(max) (3.3AI+3.3AO)
100mA(max) (3.3V)
100mA(max) (3.3VI)
A
B
C
D
E
F
6VD
A
R1044
5.6K(D)
2
R1045
3.3K(D)
1
B
GND
C1002
1uF(K)
3.3V_DD
1
2.2uF(K)
2
C1119
10V
C
3.3V_DD
2
D
C1204
1
2.2uF(K)
GND
10V
V47A00049800
UREG
[V-LR1173S151]
CE NC
VDD
IC101
VOUT
[GND] [GND]
4 3
61
RP131S111B-E2-FE
DDR:220mA(max) PLL:160mA(max)
1.1V_PLL
1
2 5
2
C1120
100nF(K)
GND
R1038
1
C1122
4.7uF(K)
2
6.3V
V47A00039500
UREG
[V-LR1173S151]
4 3
61
IC113
CE NC
VDD
VOUT
[GND] [GND]
RP131S121B-E2-FE
C1205
100nF(K)
10V
2
1
4.7uF(K)
2 5
2
1
80mA(max)
1.1V_PCIE
21
R1041
R1042
R1043
C1206
6.3V
0(X)
0(X)
0(J)
21
21
21
1.2V_SIF
20mA(max)
1.2V_DM
30mA(max)
1.2V_VI
320mA(max)
V47A00039500
UREG
[V-LR1173S151]
4
E
3.3V_DD
3
61
2
C1118
1
2.2uF(K) 10V
GND
IC117
CE NC
VDD
VOUT
[GND] [GND]
RP131S121B-E2-FE
2 5
2
1
C1121
100nF(K)
10V
1.2V
2
1
C1123
4.7uF(K)
6.3V
R1039
0(X)
R1040
0(X)
21
21
1.2V_HDMIS
140mA(max)
1.2V_PLL
160mA(max)
3.3V_DD
1
2.2uF(K)
2
6VD
1
2
3.3VD
1
2
R1047 1K(D)
C1124
10V
3.3VD
C1125
1uF(K)
16V
C1126
1uF(K)
16V
R1051
2.2K(D)
1
NOT MOUNT
V47A00006000
UREG
[V-L6209FXXXP]
3 1
IC104
CE NC
VIN
XC6209F332PR
V47A00030600
UREG
[V-L6219BXXX]
3 4
IC103
CE NC
VIN
XC6221A182MR
2
F
2011/02/10
T.SHIMIZU
2011.03.11 09:37
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT S5L A_PWR-REG 119 19 PP PE0993
TOSHIBA CORPORATION
5T03655D
87654321
A
C1133
1
2
18pF(J)
B
GND
C1134
1
18pF(J)
2
V10A00011400
1
3
C
47K(D)
101
M_STCPWM0
R1110
D
E
1K(D) R1050
21
[XF]
X1001
20ppm 12MHz
21
2
NC
4
NC
2
R1111
1
8.2K(D)
21
2
C1158
1
1uF(K)
GND
PANEL CLOCK SS SELECT SS ON: R1148 Mount / R1149 NM SS OFF:R1149 Mount / R1148 NM
21
R1052
1M(J)
C1159
10nF(K)
2
1
GND
M_XOUT12M
M_XIN12M
C27000E033
[X]
2
27MHz
V10A00009600
X1005
C1156
4pF(C)
106
106
R1151
1
2
1
47(J)
21
C1157
4pF(C)
M_PCLK_SEL0
107
M_PCLK_SEL1
107
3.3VD
21
MOUNT
R1148
4.7K(D)
21
R1149
4.7K(D)
NOT MOUNT
3.3VD
1
8 9
2 3 16 11
14
4 10 15
ICS475AG-19LFT
GNDGND
V47A00044400
[V-L47519]
VIN
X1 X2
S0 S1 S2 S3
PDTS#
VDD VDD VDD
C1150
2
10nF(K)
C1152
2
10nF(K)
IC105
1
1
CLK1 CLK2 CLK3
GND GND
C1151
100nF(K)
2
2
C1153
100nF(K)
5 6
12
7
13
1
1
R1113
47(J)
R1114
R1115
GND
47(J)
47(J)
21 21
21
M_PANELCLK M_STCCLKI0
M_XIN
101 101
105
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:38
2011/02/10
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT CLOCK/VCXO 120 20 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
PIO/IRQ
A
B
750 106 760 765 770
370 372 106 350
C
D
790 796 106 106 793 795
791 106
106 106
106
106 650
150 161 106
[RMX4A]
2.2K(J)
S_CI_TS_SEL S_CI_CARD_EN S_CI_VCC_EN C_HOTSTART M_PIO81
M_LED
B_FRC_RESET M_GRESET R_DEMO_RST A_DSP_RESET
3.3VD
3.3VD
72
81
5
RM117
4
36
21
81
RM113
[RMX4A]
2.2K(J)
GND
3.3VD
GND
R1073
2.2K(D)
2.2K(D)
21
R1085
470(D)
72
5
4
36
R1084
21
21
R1083 47(J)
R1099
2.2K(D)
2.2K(D)
21
GND
GND
A_HP_DET
R1098
21
601
3.3VD
R1086
10K(D)
21
[LED]
DS100
CA
LED(GRN)
V44A00001100
GND
TERMINATION
101 101 101
M_SDCD M_SDWP M_SDCLKB
3.3VD
4
36
RM112
[RMX4A]
GND
4.7K(J)
72
81
5
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:38
2011/02/10
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT PIO/IRQ 122 21 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
I2C
A
370 101 662 370 101 662
M_I2CDATA0 M_I2CCLK0
B
C
UART
D
3.3VD
R1184
1.2K(D)
21
3.3VD
72
81
5
[RMX4A]
GND
4.7K(J)
RM114
4
36
R1185
1.2K(D)
21
5 6
3.3VD
1 2 3 7
8
M24128-BWMN6TP
GND
V46A00030900
EEPROM
[MSEE16K8D]
IC108
SDA SCL
A0 A1 A2 WP
[Vss][Vcc]
1
2
100nF(K)
C1144
M_UA_TVM2SOC M_UA_SOC2TVM
4
M_HEAD
GND
701 104 701 104 701 106
750 775 372 705 101 707 350 760 765 770 750 775 372 705 101 707 350 760 765 770
101 650 101 650 101 650 101 650
M_I2CDATA1 M_I2CCLK1 M_I2CDATA2 M_I2CCLK2 M_CI2CDATA M_CI2CCLK
3.3VD
R1154
1.2K(D)
1.2K(D)
21
R1153
R1156
1.2K(D)
1.2K(D)
21
21
R1165
100K(D)
100K(D)
21
NOT MOUNT
NOT MOUNT
GND
R1155
R1157
1.2K(D)
21
R1166
21
NOT MOUNT
1.2K(D)
21
R1163
100K(D)
100K(D)
21
NOT MOUNT
GND
R1158
21
R1164
21
A
B
C
D
E
104 104
F
T.SHIMIZU
2011.03.11 09:38
3.3VD
M_UARXD0 M_UATXD0
2011/02/14
3.3VD
R1180
4.7K(D)
4.7K(D)
21
R1181
21
R1182 47(J)
21 21
R1183 47(J)
MAIN UNIT I2C/UART 124 22 PP PE0993
DP120
DP121
1
DP122
1
DP123
(NOT MOUNT FOR PP/MP)
NOT MOUNT
V22A00074100
3.3VD
1
[C4A2]
CN100 1 2 3 4
1T 2T
1
BM04B-GHS-TBT(LF)(SN)(N)
GND
<DEBUG> 1:GND 2:+3.3V 3:Seine Rx 4:Seine Tx
E
F
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
TOSHIBA CORPORATION
5T03655D
A
B
102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130
102 127 130 102 127 130 102 127 130
102 130 102 130
102 127 130
M_DDRAD0 M_DDRAD1 M_DDRAD2 M_DDRAD3 M_DDRAD4 M_DDRAD5 M_DDRAD6 M_DDRAD7 M_DDRAD8 M_DDRAD9 M_DDRAD10 M_DDRAD11 M_DDRAD12 M_DDRAD13
M_DDRBA2 M_DDRBA1 M_DDRBA0 M_DDRBCLK0 M_DDRCLK0 M_DDRCKE
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
M3 N8 M2 K7 J7 K9
NEW_V46A00059100
DDR3 SDRAM
[V-MDSD128M16]
*IC110
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC NC
BA2 BA1 BA0 /CK CK CKE
102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130 102 127 130
102 127 130 102 127 130 102 127 130
102 130 102 130
102 127 130
M_DDRAD0 M_DDRAD1 M_DDRAD2 M_DDRAD3 M_DDRAD4 M_DDRAD5 M_DDRAD6 M_DDRAD7 M_DDRAD8 M_DDRAD9 M_DDRAD10 M_DDRAD11 M_DDRAD12 M_DDRAD13
M_DDRBA2 M_DDRBA1 M_DDRBA0 M_DDRBCLK1 M_DDRCLK1 M_DDRCKE
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M7
M3 N8 M2 K7 J7 K9
NEW_V46A00059100
DDR3 SDRAM
[V-MDSD128M16]
*IC111
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC NC
BA2 BA1 BA0 /CK CK CKE
87654321
A
B
C
102 127 130
D
1.5V
1
2
C1162
100nF(K)
1
2
C1163
100nF(K)
1
E
F
C1164
100nF(K)
1
C1165
100nF(K)
1
C1166
100nF(K)
1
C1167
100nF(K)
2
2
2
2
GND
T.SHIMIZU
2011.03.11 09:38
102 127 130 102 127 130 102 127 130 102 127 130
102 127 130
102 127 130
M_DDRVREF
1.5V
1
C1168
10nF(K)
1
C1169
10nF(K)
1
C1170
10nF(K)
1
C1171
10nF(K)
1
C1172
10nF(K)
1
C1173
10nF(K)
2011/02/10
102 102 102 102 102 102
2
C1274
1
1nF(K)
GND
2
2
2
2
2
2
GND
M_DDRCS0_N M_DDRRAS_N M_DDRCAS_N M_DDRWE_N M_DDRDM0 M_DDRDM1 M_DDRDQS0 M_DDRDQSN0 M_DDRDQS1 M_DDRDQSN1 M_DDRODT
M_DDRRESET
2
240(D)
C1174
1
R1108
1nF(K)
102 102 102 102 102 102
2
C1275
1
1nF(K)
GND
2
2
2
2
2
2
GND
M_DDRCS0_N M_DDRRAS_N M_DDRCAS_N M_DDRWE_N M_DDRDM2 M_DDRDM3 M_DDRDQS2 M_DDRDQSN2 M_DDRDQS3 M_DDRDQSN3 M_DDRODT
M_DDRRESET
2
240(D)
C1191
1
R1109
1nF(K)
SH.NO.DESIGNED BY
1.5V
L2 J3 K3 L3 E7 D3 F3 G3 C7 B7 K1
T2
L8
21
H1 M8
A1 A8 C1 C9 D2 E9 F1 H2 H9
B2 D9 G7 E1 K2 K8 N1 N9 R1 R9
K4B2G1646C-HCH9<V46A00059100>
/CS /RAS /CAS /WE DML DMU DQSL /DQSL DQSU /DQSU ODT
/RESET
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
ZQ
VREFDQ VREFCA
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD VDD VDD VSS VDD VDD VDD VDD VDD VDD
4.7uF(K) C1192
1
1uF(K)
C1193
1
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
2
2
NC NC NC NC
VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS
1
C1194
1nF(K)
1
C1195
1nF(K)
PAGE NO. REV.MARK DRAWING.NO.
E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3
J1 J9 L1 L9
B1 B9 D1 D8 E2 E8 F9 G1 G9
A9 B3
G8 J2 J8 M1 M9 P1 P9 T1 T9
2
2
1.5V
L2 J3 K3 L3 E7 D3 F3 G3 C7 B7 K1
T2
L8
21
H1 M8
A1 A8 C1 C9 D2 E9 F1 H2 H9
B2 D9 G7 E1 K2 K8 N1 N9 R1 R9
/CS /RAS /CAS /WE DML DMU DQSL /DQSL DQSU /DQSU ODT
/RESET
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
ZQ
VREFDQ VREFCA
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD VDD VDD VSS VDD VDD VDD VDD VDD VDD
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
K4B2G1646C-HCH9<V46A00059100>
4.7uF(K) C1175
1
2
1uF(K)
C1176
1
2
VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS
NC NC NC NC
1
C1177
1nF(K)
1
C1178
1nF(K)
E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3
J1 J9 L1 L9
B1 B9 D1 D8 E2 E8 F9 G1 G9
A9 B3
G8 J2 J8 M1 M9 P1 P9 T1 T9
2
2
M_DDRDQ0 M_DDRDQ1 M_DDRDQ2 M_DDRDQ3 M_DDRDQ4 M_DDRDQ5 M_DDRDQ6 M_DDRDQ7 M_DDRDQ8
M_DDRDQ9 M_DDRDQ10 M_DDRDQ11 M_DDRDQ12 M_DDRDQ13 M_DDRDQ14 M_DDRDQ15
GND
FUNCTIONTITLE
102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102
1.5V
102 127 130
1
C1179
100nF(K)
1
C1180
100nF(K)
1
C1181
100nF(K)
1
C1182
100nF(K)
1
C1183
100nF(K)
1
C1184
100nF(K)
102 127 130 102 127 130 102 127 130 102 127 130
102 127 130
102 127 130
M_DDRVREF
1.5V
2
2
2
2
2
2
GND
1
C1185
10nF(K)
1
C1186
10nF(K)
1
C1187
10nF(K)
1
C1188
10nF(K)
1
C1189
10nF(K)
1
C1190
10nF(K)
MAIN UNIT DDR3 SDRAM 127 23 PP PE0993
TOSHIBA CORPORATION
M_DDRDQ16 M_DDRDQ17 M_DDRDQ18 M_DDRDQ19 M_DDRDQ20 M_DDRDQ21 M_DDRDQ22 M_DDRDQ23 M_DDRDQ24 M_DDRDQ25 M_DDRDQ26 M_DDRDQ27 M_DDRDQ28 M_DDRDQ29 M_DDRDQ30 M_DDRDQ31
GND
102 102 102 102 102 102 102 102 102 102 102 102 102 102 102 102
C
D
E
F
5T03655D
87654321
A
3.3VD
1.5V
2 10
7 9
5
B
1
C1237
1uF(K)
2
GND
RT9026GFP
1
C1238
10uF(K)
2
16V
VTT-REG
[V-L9026]
IC116
VDDQSNS VTTREF VLDOIN VIN
S3 S5
VTTSNS
VTT
PGND
GND GND
61
3
4 8
11
VTT_DDR
2
C1239
1
10uF(K)
2
C1240
1
10uF(K)
2
1
2
C1230
1
10uF(K)
GND
M_DDRVREF
C1231
100nF(K)
102 127
C
VTT_DDR
2
C1241
1
NOT MOUNT
100nF(K)
2
C1244
1
100nF(K)
NOT MOUNT
100nF(K)
2
C1246
1
2
C1248
1
100nF(K)
2
C1250
1
100nF(K)
2
C1252
1
100nF(K)
NOT MOUNT
2
C1254
1
100nF(K)
100nF(K)
D
VTT_DDR
2
C1255
1
2
C1256
1
100nF(K)
NOT MOUNT
GND
VTT_DDR
R1117
10K(D)
21
GND
R112062(J)
21
R112162(J)
21
R112262(J)
21
R112362(J)
21
R112462(J)
21
R112562(J)
21
R112662(J)
21
R112762(J)
21
R112862(J)
21
R112962(J)
21
R113062(J)
21
R113162(J)
21
R113262(J)
21
R113362(J)
21
R113462(J)
21
R113562(J)
21
R113662(J)
21
R113762(J)
21
R113862(J)
21
R113962(J)
21
R114062(J)
21
R114162(J)
21
R114262(J)
21
R114362(J)
21
R114462(J)
21
R114562(J)
21
R117562(J)
21
M_DDRAD13 M_DDRAD12 M_DDRAD11 M_DDRAD10
M_DDRAD9 M_DDRAD8 M_DDRAD7 M_DDRAD6 M_DDRAD5 M_DDRAD4 M_DDRAD3 M_DDRAD2 M_DDRAD1 M_DDRAD0
M_DDRCLK0
M_DDRBCLK0
M_DDRCLK1
M_DDRBCLK1
M_DDRCKE M_DDRCS0_N M_DDRRAS_N M_DDRCAS_N
M_DDRWE_N
M_DDRBA2
M_DDRBA1
M_DDRBA0
M_DDRODT M_DDRRESET
102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127 102 127
V47A00034200
A
B
C
D
2
C1242
1
100nF(K)
NOT MOUNT
E
VTT_DDR
2
C1282
1
100nF(K)
F
T.SHIMIZU
2011.03.11 09:38
2
C1245
1
100nF(K)
NOT MOUNT
2
C1283
1
100nF(K)
NOT MOUNT
NOT MOUNT
2
C1247
1
100nF(K)
NOT MOUNT
2
2
C1284
1
1
100nF(K)
2
C1249
1
100nF(K)
NOT MOUNT
2
C1285
1
10uF(K)
NOT MOUNT
2
C1251
1
100nF(K)
NOT MOUNT
2
C1286
1
10uF(K)
2
+
C1253
1
100uF(M)
GND
C1287
10uF(K)
[CP]
2
C1288
1
10uF(K)
NOT MOUNT
GND
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT DDR3 VTT/VREF 130 24 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
A
[RMX4A]
33(J)
M_EBDAT15
103
103 103
103 103 103 103
103 103 103 103
103
103
103 131
103 131
103
M_EBDAT12 M_EBDAT13 M_EBDAT14
M_EBDAT10 M_EBDAT11 M_EBDAT8 M_EBDAT9
M_EBDAT7 M_EBDAT4 M_EBDAT6 M_EBDAT5
M_EBDAT3 M_EBDAT2 M_EBDAT1 M_EBDAT0
M_NACE_N
M_NABSY_N
M_EBADD8
M_EBADD7
M_NAWE_N
72
81
5
4
36
R1146
10(J)
R1187
33(J) R1188
33(J) R1190
33(J)
72
81
5
4.7K(J)
[RMX4A]
RM116
4.7K(J)
[RMX4A]
RM118
4
36
21
21
21
21
5
4.7K(J)
[RMX4A]
RM119
4
36
4.7K(J)
[RMX4A]
RM120
4
36
GND
72
81
5
72
81
103 115
103 115 103 115 103 115
B
103 115
C
D
E
RM121
36 4
[RMX4A]
33(J)
RM122
36 4
4 36
[RMX4A]
RM123
33(J)
4 36
1
33(J)
RM124
R1147
33(J)
[RMX4A]
21
S_EBDAT15
81
S_EBDAT12
72
S_EBDAT13 S_EBDAT14
5
S_EBDAT10
81
S_EBDAT11
72
5
5
72 81
5
72 8
S_EBDAT8 S_EBDAT9
S_EBDAT7 S_EBDAT4 S_EBDAT6 S_EBDAT5
S_EBDAT3 S_EBDAT2 S_EBDAT1 S_EBDAT0
S_NACE_N
S_NABSY_N
S_NAALE
S_NACLE
S_NAWE_N
795 793 793 793
793 793 793 793
134 793 134 793 134 793 134 793
134 793 134 793 134 793 134 793
134
134
134
134
134
103 131
103
103 131
103
103 115
103 103
103 115
103 103
M_EBADD7 M_EBADD6 M_EBADD8 M_EBADD5
M_EBADD2 M_EBADD3 M_EBADD4 M_EBADD1
M_EBWE_N M_EBOE_N
[RMX4A]
33(J)
RM129
81
RM131
RM130
72
5
81 72
5
5
72 81
[RMX4A]
36 4
[RMX4A]
33(J)
36 4
4 36
0(J)
S_EBADD7 S_EBADD6 S_EBADD8 S_EBADD5
S_EBADD2 S_EBADD3 S_EBADD4 S_EBADD1
S_EBWE_N S_EBOE_N
794 794 794 794
794 794 794 794 115
795 795
A
B
C
D
E
M_NARE_N
103
F
T.SHIMIZU
2011.03.11 09:38
2011/02/10
R1192
33(J)
21
R1070
4.7K(D)
21
R1071
4.7K(D)
21
GNDGND
FUNCTIONTITLE
S_NARE_N
134
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT EBUS RESISTOR 131 25 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
87654321
A
側に配置
IC114
3.3VD
B
側に配置
IC100
M_SPI_MOSI
103
M_SPICLK
103
M_SPI_CS0
103
M_SPI_IO2
103
M_SPI_IO3
C
103
R1060 10(J)
R1062 10(J)
R1063 10(J)
R1064 10(J)
R1065 10(J)
21
21
21
21
21
R1061 10(J)
4.7K(D)
21
21
R1058
4.7K(D)
21
R1066
4.7K(D)
21
3.3VD
R1067
52
6
1
3
7
84
EN25Q80A-100HIPTY
V46A00061000
[V-M25Q]
IC114
DO(DQ1)DI(DQ0)
CLK
CS#
WP#(DQ2)
NC(DQ3)
VCC VSS
1
2
C1307
100nF(K)
3.3VD
4.7K(D)
GND
側に配置
IC114
R1059
21
R1068 10(J)
側に配置
IC100
21
R1069 10(J)
21
M_SPI_MISO
103
D
A
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:38
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT SPI FLASH 132 26 PP PE0993
TOSHIBA CORPORATION
E
F
5T03655D
87654321
A
V46A00014400
[L66] IC119
S_NACE_N
131
131
C_HOSTRST
S_NAWE_N
C_HOSTRST
3.3V_NAND
B
701 101 134
701 101 134
1
7
5
3
8
TC7WB66FK(TE85L,F)
[1]
A1A2B1
OE1
[2]
OE2
VCC GND
1
C1149
100nF(K)
B2
2
3.3V_NAND
21
21
R1150
R1161
4.7K(D)
4.7K(D)
2
6
4
793 131 793 131 793 131 793 131
GND
793 131 793 131 793 131 793 131
131 131 131
131
S_NARE_N S_NACLE S_NAALE
S_NABSY_N
S_EBDAT7 S_EBDAT6 S_EBDAT5 S_EBDAT4 S_EBDAT3 S_EBDAT2 S_EBDAT1 S_EBDAT0
C
D
V42A00012200
D1001
AC
E
1SS352(TH3,F,T)
2
[CP]
+
C1196
1
100uF(M)
16V
2
[CP]
+
C1197
1
100uF(M)
16V
21
R1178
10V
4.7K(D)
2.2uF(K)
1
C1198
2
3.3V_NAND
3.3VD
21
R1176
R1177
4.7K(D)
3.3V_NAND
1
C1148
2
100nF(K)
1
3
4
2
S-L2980A33MC-TF-G
1
C1147
2
100nF(K)
V47A00037400
RGL
[L1111NXX1B]
IC118
VDD
CE
NC
GND
VOUT
21
4.7K(D)
GND
V46A00061200
2G 1G NANDFLASH
[V-MNF1GB]
CE WE RE CLE ALE WP R/B
I/O8 I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1
VCC VCC
VSS VSS
3.3V_NAND6VD
2
C1199
10V
1
2.2uF(K)
IC120
9 18 8 16 17 19 7
44 43 42 41 32 31 30 29
12 37
13 36 48
TC58NVG1S3ETA00BBH 2Gbit
5
A
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
1 2 3 4 5
6 10 11 14 15 20 21 22 23 24 25 26 27 28 33 34 35 38 39 40 45 46 47
B
C
D
E
F
T.SHIMIZU
2011.03.11 09:38
2011/02/10
GND
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT EBUS NAND FLASH 134 27 PP PE0993
TOSHIBA CORPORATION
F
5T03655D
Name
Mode2
Mode1
Mode0
A
P2FL_CTRL CPU_INTERTUPT#
ENDEFER
BCINDROP
MAX1536
GYSPD100
Shared pin
-
-
-
LOOPLED#
LED_SPD0
LED_ACT1
LED_SPD1GXFULL
B
Setting
000: MAC2=RMII MODE MAC3=RMII MODE
1:Enable Flow Control
1:Enable Carrier Sense Deferring
0:use output drop functionLED_ACT0
0:use 1552 byte max
1:port 1 is 100base
1:port 0 is 100base FD
[XF]
2
C1500
1
8pF(D)
GND
V46A00044500
Layer 2 Switch 1/2
2
NC
X1500
1
R1501
1M(J)
IC150
RTL8304-GR
[V-U8304]
4
NC
V10A00018300
3
XRCGB25M000F3M10R0
2
1
GND
21
C1501
8pF(D)
R1500
680(D)
87654321
A
21
B
62
104
152 152
152 152
M_GRESET
M_ETMDC
M_RXIP0 M_RXIN0
M_RXIP1 M_RXIN1
NOT MOUNT
R1503
470(D)
R1506
470(D)
NOT MOUNT
R1507
470(D)
3.3VD
R1502
33(J)
NOT MOUNT
4.7K(D)
4.7K(D)
4.7K(D)
4.7K(D)
GND
21
R1504
470(D)
R1505
470(D)
R1508
470(D)
R1509
R1510
R1511
R1512
R1513
4.7K(D)
C
161 106 122
D
Port2 : RMII Mode Port3 : RMII Mode
E
F
16
36
5 4
21
12 11 13
21
21 21
52 18
21
21
NOT MOUNT
58
21
59
21
NOT MOUNT
21
51
21
21
[Clock&Reset&INT]
X1
RESET#
[SMI]
SCL_MDC
[Media Connection Pins]
RXIP0 RXIN0
RXIP1 RXIN1
[Mode Configration Pins]
MODE0 MODE1 MODE2
[Strapping Pins]
LED_ACT0/ BCINDROP
LED_SPD0/ MAX1536
[Port LED Pins]
LOOPLED#/ ENDEFER
P2FL_CTRL/ CPU_interrupt#
LED_ACT1/ GYSPD100
LED_SPD1/ GXFULL
ITSET
SDA_MDIO
TXOP0 TXON0
TXOP1 TXON1
X2
63
3.3VD
3.3VD
M_ETMDIO
M_TXOP0 M_TXON0
M_TXOP1 M_TXON1
104
152 152
152 152
C
D
E
15
37
6 7
10
1953
56
57
R1514
1.5K(D)
21
R1515
33(J)
21
R1516
4.7K(D)
21
R1517
4.7K(D)
21
R1518
4.7K(D)
21
F
KOJIMA
2011.03.11 09:38
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT L2SW (MISC.) 150 28 PP PE0993
TOSHIBA CORPORATION
5T03655D
Name
P2IRTAG[1]
LEDMODE[1]
A
LEDMODE[0]
CTRL_REFCLK1
LED_BLNK_TIME
CTRL_REFCLK2
ENBKPRS
GYENFC
GXENFC
EEPROM
DISBRDCTRL
B
C
D
E
F
3.3V_L2SW_A
C1502
10uF(K)
1.8V_L2SW_D
C1503
10uF(K)
shareed pin
P2:RXD3
P2:RXD2P2IRTAG[0]
P2:RXD1
P2:RXD0
P2:C_REFCLK1
P3:COL
P3:C_REFCLK2
P3:RXD3
P3:RXD2 1:Enable prot 1 Nway(etc)
M_ETRXD1
M_ETRXD0
M_ETCRS_DV
2SA2070(TE12L,F)
[TRP]
E
2
1
GND
2
2
1
1
C1504
100nF(K)
GND
Setting
11:Do not insert/remove VLAN tag
11:Speed+LINK/ACT
0:Output 50MHz REFCLK
Blink time is 43ms
0:Output 50MHz REFCLK
1:Enable backpressure
1:Enable prot 0 Nway(etc)
0:Disable EEPROM
1:Disable Broadcast Strom Control
M_ETREFCLK
104
104 104 104
Q1500
B
C1505
100nF(K)
2
1
M_ETTXEN M_ETTXD0 M_ETTXD1
[SBD] D1500
CMS03(TE12L,Q)
C
2
1
C1506
100nF(K)
CA
R1521
510(J)
1.8V_L2SW_A
C1507
10uF(K)
RM150 33(J)
3.3VD
GND
36 4
1.8V_L2SW_A
21
2
1
3.3VD
V46A00044500
Layer 2 Switch 2/2
[V-U8304]
IC150
28
30
32
33
34
29
27
R1519 33(J)
21
[RMX4A] [RMX4A]
81 72
5
R1520
4.7K(D)
21
1.8V_L2SW_D
12
FL150
MPZ1608S221AT
C1509
100nF(K)
2
2
1
1
C1508
100nF(K)
GND
GND
2
1
C1510
100nF(K)
43
45
46
47
49
44
50
3 8 9 14 61
17 22 54
64
C1511
100nF(K)
2
1
MRXC/ PTXC/ REFCLK1
MRXD0/ PTXD0
MRXD1/ PTXD1
MRXD2/ PTXD2
MRXD3/ PTXD3
MRXDV/ PTXEN/ CRSDV
MCOL/ PCOL
P2TXC/ M2RXC/ REFCLK2
P2TXD0/ M2RXD0
P2TXD1/ M2RXD1
P2TXD2/ M2RXD2
P2TXD3/ M2RXD3
P2TXEN/ M2RXDV/ CRSDV2
P2COL/ M2COL/ LED_BLANK_TIME
AVDD18 AVDD18 AVDD18 AVDD18 AVDD18 AVDD18
DVDD18 DVDD18 DVDD18
[Port2 MAC]
MTXC/PRXC/ CTRL_REFCLK1
[Port3 MAC]
P2RXC/M2TXC/ CTRL_REFCLK2
[Power]
RTL8304-GR
MTXD0/ PRXD0/ LEDMODE0
MTXD1/ PRXD1/ LEDMODE1
MTXD2/ PRXD2/ P2IRTAG0
MTXD3/ PRXD3/ P2IRTAG1
MTXEN/ PRXDV
P2RXD0/ M2TXD0/ ENEEPROM
P2RXD1/ M2TXD1/ GXENFC
P2RXD2/ M2TXD2/ GYENFC
P2RXD3/ M2TXD3/ ENBKPRS
P2RXDV/ M2TXEN/ DISBRDCTRL
DVDD33 DVDD33 DVDD33
HVDD33
IBREF
EPADVCTRL
20
23
24
25
26
21
42
35
38
39
40
41
3.3V_L2SW_A
312 48 55
60
1
65
GND
21
R1522
4.7K(D)
[RMX4A]
RM152
36 4
12
FL151
MPZ1608S221AT
21
R1527
1.8K(D)
R1528
160(D)
72
81
5
4.7K(J)
[RMX4A]
RM151
4
36
4.7K(D)
4.7K(J)
3.3VD
81 72
5
3.3VD
21
GND
4.7K(D)
GND
36 4
4.7K(D)
4.7K(D)
C1512
100nF(K)
3.3V_L2SW_A
C1515
10uF(K)
R1523
R1524
R1525
R1526
3.3VD
GND
GND
2
1
2
1
21
21
RM153
33(J) 81 72
5
21
21
C1513
100nF(K)
2
1
2
1
GNDGND
M_ETCRS_DV
NOT MOUNT
3.3VD
GND
2
1
C1516
100nF(K)
M_ETRXD1 M_ETRXD0
C1514
100nF(K)
87654321
104 104 104
A
B
C
D
E
F
KOJIMA
2011.03.11 09:38
FUNCTIONTITLE
SH.NO.DESIGNED BY
PAGE NO. REV.MARK DRAWING.NO.
MAIN UNIT L2SW (RMII I/F) 151 29 PP PE0993
TOSHIBA CORPORATION
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