Synchronous Step-Down DC/DC Controller IC - Input Voltage : 25V
■GENERAL DESCRIPTION
The XC9213 series is N-ch & N-ch drive, synchronous, step-down DC/DC controller IC with a built-in bootstrap driver circuit.
Output will be stable no matter which load capacitors, including low ESR capacitors, are used.
Resistance (RSENSE) of about several 10mΩ will be required as a current sense. The phase compensation is also run when
a low ESR capacitor is used. In addition, the circuit is double protected by the ways of limiting the current while detecting
overshoot current and making output shutdown at any given timing by a protection time setting capacitor (CPRO).
The output voltage can be set freely within a range of 1.5V~15.0V with 1.0V (accuracy±2%) of internal reference voltage by
using externally connected resistors (R
current limit PFM/PWM automatic switchable control (=voltage between R
The series has a built-in voltage detector for monitoring a selected voltage by external resistors.
During stand-by (CE pin = low) all circuits are shutdown to reduce current consumption to as low as 4.0μA or less.
■APPLICATIONS
●PDAs
●Mobile phones
●Note book computers
●Portable audio systems
●Various multi-function power supplies
■TYPICAL APPLICATION CIRCUIT
SD2
FB1, 2). Synchronous rectification PWM control can be switched to non-synchronous
SENSE pins) by using the MODE pin.
■FEATURES
Input Voltage Range : 4.0V ~ 25.0V
Output Voltage Range : 1.5V ~ 15.0V externally set
Reference voltage : 1.0V (±2%)
Oscillation Frequency : 300kHz (±15%)
Output Current : 5A (VIN=5.0V, VOUT=3.3V)
Control : PWM/PFM manual control
Current Limit Protection : Sense Voltage=170mV
High Efficiency : 93% (VIN=5.0V,VOUT=3.3V, IOUT=1A]
Detect Voltage Function : Detects 0.9V/Open-drain output
Stand-by Current : ISTB = 4.0μA (MAX.)
Load Capacitor
Shutdown Time
Built-in Bootsrap
Package : TSSOP-16
Environmentally friendly : EU RoHS Compliant, Pb Free
■TYPICAL PERFORMANCE
CHARACTERISTICS
☆GreenOperation Compatible
: Low ESR capacitor
: Adjustable by CPRO pin
: External Nch-Nch Drivers
VIN
CIN
CVL
VDIN
VDOUT
CSS
VINVSENSE
VDIN
VDOUT
VL
CSS
CPRO
AGND
CPRO
RSENSE
XC9213
BST
EXT1
LX
FB
EXT2
PGND
CEMODE
CBST
Tr1
L
SD1
CFB
Tr2
VOUT
RFB1
CL
RFB2
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XC9213Series
■PIN CONFIGURATION
■PIN ASSIGNMENT
PIN NUMBER PIN NAME FUNCTION
1
2
3
4
5
6
V
IN
SENSE
V
V
CE
AGND
MODE
7 CPRO
8
9
10
11
12
13
14
15
16
■CE PIN & MODE PIN FUNCTION
CSS
VDIN
FB
VDOUT
PGND
EXT2
LX
EXT1
BST
CE PIN OPERATIONAL STATE
H
L Shut down
Input Voltage
Current Detection
Local Power Supply
L
Chip Enable
Analog Ground
PWM / Current Limit PFM Switch
Protection Time Setting Capacitor Connection
<Set shutdown time of VOUT when detecting overcurrent>
< Error Amplifier >
The error amplifier is designed to monitor output voltage. The amplifier compares the reference voltage with the feedback
voltage. When a voltage lower than the reference voltage is fed back, the output voltage of the error amplifier increases.
<Ramp Wave Generator>
The Ramp Wave Generator is organized by the circuits generates a saw-tooth waveform based on the oscillator circuit which
sets an oscillation frequency and a signal from the oscillator circuit.
< PWM Comparator >
The PWM Comparator compares outputs from the error amp. and saw-tooth waveform. When the voltage from the error
amp's output voltage is low, the external switch will be set to OFF.
< U.V.L.O. Comparator >
When the V
< Voltage Regulator >
The voltage regulator block generates 4.0V voltage for the bootstrap circuit. The regulator block is also the power supply for
the internal circuit. Please do not use the regulator block as a local power supply.
<Vref with Soft Start>
The reference voltage, Vref (FB pin voltage)=0.9V, is adjusted and fixed by laser trimming. The soft-start circuit protects
against inrush current, when the power is switched on, and also to protect against voltage overshoot. It should be noted,
however, that this circuit does not protect the load capacitor (C
depending upon the input to the error amps, the operation maintains a balance between the two inputs of the error amps and
controls the EXT1 pin's ON time so that it doesn't increase more than is necessary.
<CE Control Logic >
This function controls the operation and shutdown of the IC. When the voltage of the CE pin is 0.4V or less, the mode will
be chip disable, the channel's operations will stop. The EXT1/2 pins will be kept at a low level (the external N-ch MOSFET
will be OFF). When the CE pin is in a state of chip disable, current consumption will be no more than 4.0μA. When the
CE pin's voltage is 1.4V or more, the mode will be chip enable and operations will recommence. With soft-start, 95% of the
set output voltage will be reached within 8mS (C
< Voltage Detector >
The voltage detector of the XC9213 series is FB type. The reference voltage is 0.9V (TYP.) and the detect voltage can be
set by external resistors. The output is N-ch Open Drain type. The detector is switched on / off with DC/DC by the CE pin.
IN pin voltage is lower than 1.5V (TYP.), the circuit sets EXT/2 to "L" and the external transistor is forced OFF.
L) from inrush current. With the Vref voltage limited and
SS: 4700pF (TYP.)) from the moment of chip enable.
10/34
XC9213
■OPERATIONAL EXPLANATION (Continued)
< Protection Circuit Operation (Current Limit, Latch Protection Circuit, and Short Protection Circuit) >
Shown above is a timing chart for protection circuit operations. When the output current changes from normal to an
overcurrent condition, the current-limiting circuit detects the overcurrent condition as a voltage drop occurring, by virtue of the
current-sensing resistor, at the VSENSE pin. Upon detection, the current-limiting circuit limits the peak current passed
through the high-side N-ch MOSFET at every clock pulse (state ①). It is possible to regulate the value of limited current by
varying the resistance value of the current-sensing resistor. A protection circuit (protective latch circuit), which is designed
to stop the clock, functions if the overcurrent condition continues for a predetermined time (state ②). Time delay before the
protective latch circuit functions is adjustable by the capacitance connected to the CPRO pin (typically 4.7 ms if CPRO has
4,700 pF). The protective latch circuit is reset by turning off and on, or by a disable action followed by an enable action
using the CE pin. If, furthermore, the output is short-circuited (state ③) and V
short-circuit protection circuit detects the condition by means of the FB pin and stops the clock with no time delay. The
short-circuit protection circuit is reset by turning off and on or by a disable action followed by an enable action using the CE
pin, as with the protective latch circuit.
< Mode Control Logic >
A timing chart for automatic switching of current-limiting PFM/PWM is shown above. High-level of the MODE pin allows
PWM operations to occur for synchronous rectification (state ①). When the MODE pin shifts to low-level, current-limiting
PFM/PWM automatic switching occurs with synchronous rectification stopped. Consequently, the low-side N-ch MOSFET
is constantly off under this condition. In addition, a comparison is made for the purposes of automatic switching, between
the ON time of the high-side N-ch MOSFET determined by the internal error amp. and the time required for the current
passed at every clock pulse through the high-side N-ch MOSFET to reach a preset amount of current. The longer one is
selected and becomes on duty (state ② or ③). If the time determined by the error amp. is longer than the other, PWM
operation occurs. Current-limiting PFM operation occurs if the time taken by the current passing at every clock pulse to
reach a preset amount of current is longer. Thus the automatic switching mechanism achieves high efficiency under light to
heavy load conditions.
OUT decreases to a value close to 0 V, the
Series
11/34
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