1A Driver Transistor Built-In, Multi Functional Step-Up DC/DC Converters
■GENERAL DESCRIPTION
XC9135/XC9136 series are synchronous step-up DC/DC converters with a 0.2Ω(TYP.) N-channel driver transistor and a 0.2
Ω(TYP.) synchronous P-channel switching transistor built-in. A highly efficient and stable current can be supplied up to 1.0A by
reducing ON resistance of the built-in transistors.
The series are able to start operation under the condition which has 0.9V input voltage to generate 3.3V output voltage with a 33
Ωload resistor, suitable for mobile equipment using only one Alkaline battery or one Nickel metal hydride battery.
During the operation of a shutdown, the load disconnection function enables to cut the current conduction path from the input to
the output.
The output voltage is selectable in 0.1V increments within 1.8~5.0V (±2.0% accuracy).
The UVLO function of the XC9135 series is capable to reduce leaking potassium hydroxide by stopping IC operation while
battery voltage is declining. The release voltages of UVLO are 0.85V (±6.0% accuracy) and 1.6V (±3.0% accuracy), and
selectable voltages range of 0.9V~3.0V.
■APPLICATIONS
●Digital audios
●Digital cameras, Video equipments
●Wireless mice
●Various standard power supplies using batteries
such as alkaline (1 to 3 cells), nickel metal
hydride, or lithium ion (1 cell)
■TYPICAL APPLICATION CIRCUIT
●XC9135 Series
C
IN
V
IN
C
DD
L
MODE
V
BAT
Lx
CDD
MODE
FO
FO
V
OUT
PGND
AGND
CDF
EN
OUT
C
L
EN
Cdf
■FEATURES
Input Voltage Range
Fixed Output Voltages
Oscillation Frequency
Input Current
Output Current
Control Mode Selection
Load Transient Response
Protection Circuits
Over-current limit
Integral latch method
Functions
Load Disconnection Function
UVLO
Output Capacitor
Operating Ambient Temperature : -40℃ ~ +85℃
For the Circuit No.1, unless otherwise stated, VFor the Circuit No.2, unless otherwise stated, V
For the Circuit No.3, unless otherwise stated, V
For the Circuit No.4, unless otherwise stated, V
For the Circuit No.5, unless otherwise stated, V
For the Circuit No.6, unless otherwise stated, V
For the Circuit No.7, unless otherwise stated, V
For the Circuit No.8, unless otherwise stated, V
For the Circuit No.9, unless otherwise stated, V
=(V
IN
OUT(E)+VUVLO_R(E)
IN=VEN=VOUT(E)
OUT=VEN=VMODE
OUT=VEN=VMODE
=1.5V, V
IN=Vpull
OUT=VOUT(E)
IN=VOUT(E)
IN=VLX=VOUT(E)
=1.1V,V
IN
+0.5V, VEN=V
+0.5V, VEN=V
OUT
)2,VEN=V
+0.5V, V
MODE=VFO
=0V(GND connected),CDF:OPEN
MODE
=0V(GND connected),CDF:OPEN
=0V(GND connected),CDF:OPEN
OUT=VEN=VMODE=VFO=VOUT(E)-
=0V(GND connected),CDF:OPEN
MODE
=0V(GND connected),CDF:OPEN
MODE
+0.5,VEN=V
=1.6V,VEN=3.3V,V
=3.3V,CDF:OPEN
MODE
MODE=VFB(CDF
= Output Voltage Setting V
V
OUT(E)
V
UVLO_F=VUVLO_R-VUVLO_HYS
=UVLO Voltage Setting
UVLO_R(E)
(*1) Designed value
(*2) Efficiency =[{(output voltage) X (output current)} ÷ {(input voltage) X (input current)} ] X 100
SW "P-ch" ON resistance=(VLx-V
(*3) L
X
(*4) Testing method of L
(*5) C
Discharge resistance
L
(*6) FO ON resistance = V
SW "N-ch" ON resistance is stated at test circuits.
X
= V
÷ V
OUT
÷ FO pin measure current
FO
(*7) The Voltage is a difference between V
(*8) The XC9135C,XC9135K series does not have C
pin test voltage)÷200mA
OUT
pin measure current
OUT
and the voltage to stop oscillation for Lxpin while VIN=V
UVLO_R
discharge function. For XC9135A, XC9135B.
L
(*9) The XC9135A,XC9135C series does not have output voltage drop protection. For XC9135B, XC9135K.
=3.3V
→0.2V.RL=1kΩ
UVLO_R
μA ②
μA ②
μA ②
μA ②
V ①
V ①
V ⑤
ms ⑤
0.1V,
)=0V(GND connected)
7/35
XC9135/9136 Series
■ELECTRICAL CHARACTERISTICS (Continued)
●XC9136E/XC9136N
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSCIRCUIT
Ta =2 5 ℃
Input Voltage VIN
Output Voltage V
Operation Start Voltage V
Operation Hold Voltage V
RL is selected with V
OUT
RL=1kΩ, V
V
MODE
ST1
HLD
V
OUT(E)
V
OUT(E)
RL=1kΩ, V
MODE
=0V,
≦3.3V,I
>3.3V,I
MODE
, Refer to F1 Table E1 V
OUT(E)
=0V 0.85
=100mA
OUT
=50mA
OUT
=0V 0.65 V
5.5 V
Supply Current Iq 36 52
Input Pin Current I
Stand-by Current
XC9136E
Stand-by Current
XC9136N
Lx Leakage Current I
Oscillation Frequency f
Maximum Duty Cycle D
Minimum Duty Cycle D
PFM Switching Current I
Efficiency
(*2)
EFFI
Lx SW "Pch" ON Resistance R
VIN=V
BAT
-0.2V, VEN=3.3V 0.65 2.15
OUT(E)
0.1 2.0
I
VIN=V
STB
OUT(E)
0.9 5.0
VIN=VLx=V
LxL
VIN=V
OSC
86.593.0 98.0 %
MAX
MIN
PFM
I
LxP
pull=VOUT(E)
V
IN=VOUT(E)
R
is selected with V
L
=0V,
V
MODE
R
is selected with V
L
=(V
V
IN
I
=100mA,V
OUT
=200mA
OUT
0.1 2.0
OUT(E)
/2 1.021.20 1.38 MHz
+0.5V,
OUT(E)
, Refer to F1 Table
OUT(E)
, Refer to F1 Table
OUT(E)
+0.85V)/2,
=0V,VFO:OPEN
MODE
(*3)
0.20
0 %
250 350 mA
93 %
0.9
0.35
(*1)
(*1)
①
V
①
①
μA②
μA⑥
μA③
μA④
⑤
⑤
①
①
①
Ω
⑧
Lx SW "Nch" ON Resistance R
Maximum Current Limit I
Soft-Start Time tSS
Thermal Shut Temperature T
Hysteresis Width T
CL Discharge Resistance
XC9136E
(*7)
FO ON Resistance RFO
FO Leakage Current I
EN "H" Voltage V
EN "L" Voltage V
MODE "H" Voltage V
MODE "L" Voltage V
EN "H" Current I
EN "L" Current I
MODE "H" Current I
MODE "L" Current I
(*4)
LxN
LIM
TSD
HYS
R
DCHG
FO_LEAK
ENH
ENL
MODEH
MODEL
VIN=VEN=5.5V 0.1
ENH
VIN=5.5V,VEN=0V -0.1
ENL
MODEH
MODEL
V
IN
V
IN=Vpull
V
EN
=(V
+0.85V)/2
OUT(E)
=1.6V, V
OUT=VOUT(E)
×0.95
=0V→3.3V, voltage to start oscillation
2.6 5.0 8.5 ms
VIN=V
OUT
VEN=3.3V, VFO=0.5V,V
=3.3V, VFO=0.5V,V
V
EN
=2.0V
(*5)
100 200 400 Ω
(*6)
OUT(E)
OUT(E)
<3.3V
≧3.3V
(*6)
100
VFO=5.5V 0 1
V
=1.6V,
IN=Vpull
While VEN=0.20V→0.75V, Voltage to start oscillation
V
=1.6V,
IN=Vpull
While VEN=0.75V→0.20V, Voltage to stop oscillation
Voltage for PFM Control
R
is selected with V
L
Voltage for PWM Control
R
is selected with V
L
VIN=VEN=V
MODE
VIN=VEN=5.5V,V
=5.5V 0.1
MODE
, Refer to F1 Table
OUT(E)
, Refer to F1 Table
OUT(E)
=0V -0.1
0.755.5 V ⑤
AGND0.2 V ⑤
0.755.5 V ①
AGND0.2 V ①
0.20
(*1)
E3 A
150
20
200 250
150 200
(*1)
0.35
Ω
⑨
①
⑤
℃
℃
⑥
Ω
⑦
μA⑦
μA②
μA②
μA②
μA②
8/35
■ELECTRICAL CHARACTERISTICS (Continued)
●XC9136E/XC9136N
External Components: CIN=10μF(ceramic), L=2.2μH(VLCF4020 TDK), CDD=0.47μF(ceramic),CL=22μF(ceramic)
Test Conditions
For the Circuit No.1, unless otherwise stated, Circuit No.1 V
For the Circuit No.3, unless otherwise stated, V
For the Circuit No.4, unless otherwise stated, V
For the Circuit No.5, unless otherwise stated, V
For the Circuit No.6, unless otherwise stated, V
For the Circuit No.7, unless otherwise stated, V
For the Circuit No.8, unless otherwise stated, V
For the Circuit No.9, unless otherwise stated, V
For the Circuit No.2, unless otherwise stated, Circuit No.2 VIN=VEN=V
OUT=VEN=VMODE
OUT=VEN=VMODE
IN=Vpull
OUT=VOUT(E)
IN=VOUT(E)
IN=VLX=VOUT(E)
=1.1V,V
IN
=1.6V,VEN=V
IN
OUT(E)
=0V(GND connected)
=0V(GND connected)
=1.5V, V
OUT=VEN=VMODE=VFO=VOUT(E)-
+0.5V, VEN=V
+0.5V, VEN=V
+0.5,VEN=V
=1.6V,VEN=3.3V,V
OUT
+
0.5V, V
= Output Voltage Setting
V
OUT(E)
(*1) Designed value
(*2) Efficiency =[{(output voltage) X (output current)} ÷ {(input voltage) X (input current)}] X 100
SW "P-ch" ON resistance=(VLx-V
(*3) L
X
(*4) Testing method of L
(*5) C
Discharge resistance
L
(*6) FO ON resistance = V
SW "N-ch" ON resistance is stated at test circuits.
X
= V
÷ V
OUT
÷ FO pin measure current
FO
(*7) The XC9136NSeries does not have C
pin test voltage)÷200mA
OUT
pin measure current
OUT
discharge function. For XC9136E.
L
=3.3V
MODE
=0V(GND connected)
MODE
=0V(GND connected)
MODE
=0V
MODE
=3.3V
MODE
=0V(GND connected)
MODE
XC9135/XC9136
Series
0.1V
9/35
XC9135/9136 Series
■ELECTRICAL CHARACTERISTICS (Continued)
●XC9135L/XC9135M/XC9135R/XC9135T
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CIRCUIT
Ta =2 5 ℃
Input Voltage VIN 5.5 V
Output Voltage Accuracy
(*10)
V
Operation Start Voltage V
Operation Hold Voltage V
OUT
R
is selected with V
L
V
IN=VUVLO_R(E)
RL=1kΩ, V
V
MODE
V
OUT(E)
V
ST1
HLD
OUT(E)
V
MODE
V
OUT(E)
V
OUT(E)
RL=1kΩ, V
MODE
=0V,V
≦3.3V,I
>3.3V,I
=0V,V
≦3.3V,I
>3.3V,I
MODE
+0.1V
, Refer to F1 Table
OUT(E)
-2 2 %
=0V V
≧1.0,
UVLO_R(E)
=100mA
OUT
=50mA
OUT
<1.0,
UVLO_R(E)
=100mA
OUT
=50mA
OUT
=0V V
V
UVLO_F
V
Current Limit Iq E2
Input Pin Current I
Stand-by Current
XC9135L
Stand-by Current
XC9135R
Stand-by Current
XC9135M/T
Lx Leakage Current I
Oscillation Frequency f
Maximum Duty Cycle D
Minimum Duty Cycle D
PFM Switching Current I
Efficiency
(*2)
EFFI I
Lx SW "Pch" ON Resistance R
VIN=V
BAT
I
VIN=V
STB
VIN=VLx=V
LxL
I
V
V
V
R
V
R
OUT
OUT
OSC
MAX
MIN
PFM
LxP
-0.2V, VEN=3.3V 1.1 6.0
OUT(E)
OUT(E)
0.1 2.0
OUT(E)
=(V
IN=Vpull
IN=Vpull
IN=VOUT(E)
is selected with V
L
MODE
is selected with V
L
OUT(E)+VUVLO_R(E)
=(V
OUT(E)+VUVLO_R(E)
+0.5V
=0V,
=100mA,V
=200mA
MODE
(*3)
0.20
0.2 3.5
0.2 4.5
1.0 6.0
)/2
)/2
, Refer to F1 Table
OUT(E)
, Refer to F1 Table
OUT(E)
1.021.20 1.38 MHz
86.593.0 98.0 %
0 %
250 350 mA
=0V,VFO:OPEN 93 %
UVLO_R
UVLO_R
0.9
0.35
(*1)
(*1)
(*1)
V
μA②
μA⑥
μA③
μA④
Ω
①
①
①
⑤
⑤
①
①
①
⑧
Lx SW "Nch" ON Resistance R
Maximum Current Limit I
Integral Latch Time t
Soft-Start Time tSS
Thermal Shut Temperature T
Hysteresis Width T
CL Discharge Resistance
XC9135L/R
(*8)
FO ON Resistance RFO
FO Leakage Current I
10/35
(*4)
LxN
E3 A
LIM
LAT
150
TSD
20
HYS
R
DCHG
FO_LEAK
V
=(V
IN
becoming FO=”H”.
V
IN=Vpull
V
OUT=VOUT(E)
After V
VIN=V
VEN=3.3V, VFO=0.5V,V
V
EN
)/2, time to stop Lx oscillation from
OUT(E)
=(V
OUT(E)+VUVLO_R(E)
)/2,
×0.95
=0V→3.3V, time to start FO=L.
EN
(*5)
=2.0V
OUT
=3.3V, VFO=0.5V,V
100 200 400 Ω
<3.3V
OUT(E)
≧3.3V
OUT(E)
(*6)
(*6)
0.5 2.0 4.0 ms
2.6 5.0 8.5 ms
100
VFO=5.5V 0 1
0.20
(*1)
0.35
200 250
150 200
(*1)
Ω
℃
℃
Ω
μA⑦
⑨
①
①
⑤
⑥
⑦
XC9135/XC9136
■ELECTRICAL CHARACTERISTICS (Continued)
●XC9135L/XC9135M/XC9135R/XC9135T
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSCIRCUIT
Series
Ta =2 5 ℃
EN "H" Voltage V
EN "L" Voltage V
MODE "H" Voltage V
MODE "L" Voltage V
EN "H" Current I
EN "L" Current I
MODE "H" Current I
MODE "L" Current I
UVLO Release Voltage V
Hysteresis Width
V
Output Voltage Drop
Protection
XC9135R/T
(*9)
UVLO Detect Delay tDF
=(V
V
ENH
ENL
MODEH
MODEL
ENH
ENL
MODEH
MODEL
UVLO_R
UVLO_HYS
V
LVP
While VEN=0.20V→0.75V, Voltage to start oscillation
V
IN=Vpull
While VEN=0.75V→0.20V, Voltage to stop oscillation
Voltage for PFM Control
R
is selected with V
L
Voltage for PWM Control
R
is selected with V
L
VIN=VEN=5.5V 0.1
VIN=5.5V,VEN=0V -0.1
VIN=VEN=V
VIN=VEN=5.5V,V
R
=1kΩ,While VIN=0.2V→3.3V,
L
Voltage to start oscillation
(*7)
(*7)
While V
oscillation
IN=Vpull
After V
OUT(E)+VUVLO_R(E)
=(V
OUT(E)+VUVLO_R(E)
=5.5V 0.1
MODE
MODE
0.9≦V
2.0<V
OUT
IN
UVLO_R(E
=(V
≦2.0
UVLO_R(E
)
≦3.0
)
=1.7V→1.3V, Voltage to stop
OUT(E)+VUVLO_R(E)
time to stop oscillation
)/2,
)/2,
, Refer to F1 Table
OUT(E)
, Refer to F1 Table
OUT(E)
0.75 5.5 V
AGND0.2 V
0.75 5.5 V
AGND0.2 V
=0V -0.1
0.10 UVLO
0.05
1.4 1.5 1.6
)/2→0.65V,
0.5 1.0 1.5
External Components
Test Conditions
For the Circuit No.3, unless otherwise stated, V
For the Circuit No.4, unless otherwise stated, V
For the Circuit No.5, unless otherwise stated, V
For the Circuit No.6, unless otherwise stated, V
For the Circuit No.7, unless otherwise stated, V
For the Circuit No.8, unless otherwise stated, V
For the Circuit No.9, unless otherwise stated, V
= Output Voltage Setting V
V
OUT(E)
V
UVLO_F=VUVLO_R-VUVLO_HYS
(*1) Designed value
(*2) Efficiency =[ {(output voltage) X (output current)} ÷ {(input voltage) X (input current)} ] X 100
SW "P-ch" ON resistance=(VLx-V
(*3) L
X
(*4) Testing method of L
(*5) C
Discharge resistance
L
(*6) FO ON resistance = V
(*7) The Voltage is a difference between V
(*8) The XC9135M,XC9135T series does not have C
(*9) The XC9135L,XC9135M series does not have output voltage drop protection. For XC9135R, XC9135T.
SW "N-ch" ON resistance is stated at test circuits.
X
= V
÷ V
OUT
÷ FO pin measure current
FO
pin measure current
OUT
and the voltage to stop oscillation for Lxpin while VIN=V
UVLO_R
discharge function. For XC9135L, XC9135R.
L
E4
0.14 0.20
=3.3V
0.1V,
)=0V(GND connected)
→0.2V.RL=1kΩ
UVLO_R
⑤
⑤
①
①
μA ②
μA ②
μA ②
μA ②
V ①
V ①
V ⑤
ms ⑤
11/35
XC9135/9136 Series
■XC9135/XC9136 Series Voltage Chart
SYMBOL
PARAMETER
V V
E1 E2 E3
Output Voltage
Error margin
Supply Current Maximum Current Limit
μA
A
Output voltage MIN MAX TYP MAX MIN TYP MAX
1.8* 1.764 1.83635 50 0.98 1.85
1.9* 1.862 1.93836 50 1.03 1.85
2.0* 1.960 2.04036 50 1.09 1.85
2.1* 2.058 2.14236 50 1.14 1.85
2.2* 2.156 2.24436 50 1.18 1.85
2.3* 2.254 2.34636 50 1.23 1.85
2.4* 2.352 2.44836 50 1.27 1.85
2.5* 2.450 2.55036 50 1.31 1.85
2.6* 2.548 2.65236 50 1.34 1.85
2.7* 2.646 2.75436 50 1.37 1.85
2.8 2.744 2.85637 50 1.40 1.85
2.9 2.842 2.95837 50 1.42 1.85
3.0 2.940 3.06037 50 1.15 1.45 1.85
3.1 3.038 3.16237 51 1.17 1.47 1.85
3.2 3.136 3.26437 51 1.18 1.49 1.87
3.3 3.234 3.36637 52 1.19 1.50 1.89
3.4 3.332 3.46837 52 1.21 1.52 1.91
3.5 3.430 3.57037 52 1.22 1.53 1.92
3.6 3.528 3.67237 53 1.22 1.54 1.94
3.7 3.626 3.77438 53 1.23 1.55 1.95
3.8 3.724 3.87638 54 1.24 1.56 1.96
3.9 3.822 3.97838 54 1.25 1.57 1.97
4.0 3.920 4.08038 54 1.25 1.57 1.97
4.1 4.018 4.18238 55 1.26 1.58 1.99
4.2 4.116 4.28438 55 1.26 1.58 1.99
4.3 4.214 4.38638 56 1.26 1.58 1.99
4.4 4.312 4.48838 56 1.26 1.58 1.99
4.5 4.410 4.59039 56 1.26 1.59 2.00
4.6 4.508 4.69239 57 1.26 1.59 2.00
4.7 4.606 4.79439 57 1.26 1.59 2.00
4.8 4.704 4.89639 58 1.26 1.59 2.00
4.9 4.802 4.99839 58 1.26 1.59 2.00
5.0 4.900 5.10039 58 1.26 1.59 2.00
*
XC9135A/XC9135C/XC9135L/XC9135M series are excluded.
When output voltage is lower than 2.9V, maximum current limit may happen to decrease.
Please refer to the typical performance characteristics
graph #10 of Maximum Current Limit vs. Ambient Temperature
Table F1
V
RL PARAMETER
OUT(E)
V Ω
1.8≦V
2.1≦V
3.1≦V
4.3≦V
OUT(E)
OUT(E)
OUT(E)
OUT(E)
<2.1
<3.1
<4.3
≦5
150
220
330
470
SYMBOL
V %
UVLO MIN MAX
0.9≦V
1.0≦V
1.7≦V
2.3≦V
3.0=V
UVLO_R
UVLO_R
UVLO_R
UVLO_R
UVLO_R
<1.0
<1.7
<2.3
<3.0
E4
UVLO Release Voltage
Accuracy
-4.5 4.5
-3.0 3.0
-3.5 3.5
-4.5 4.5
-5.5 5.5
12/35
XC9135/XC9136
Series
■TYPICAL APPLICATION CIRCUIT
C
IN
V
IN
L
MODE
C
DD
FO
BAT
Lx
CDD
MODE
FO
V
OUT
PGND
AGND
CDF
EN
V
OUT
C
L
EN
Cdf
<CDF pin settings, XC9135 series>
A capacitor can be connected to the CDF pin to set the delay time for stopping operation after UVLO is detected. The length of
the delay time depends on the capacitance of the Cdf capacitor. Use a capacitor with a capacitance of 1000pF or higher for the
Cdf capacitor.
The relationship between the capacitance of the Cdf capacitor and the delay time is 1 ms of delay for each 1000pF (3000pF
gives a delay of 3ms).
[External Components]
f
=1.2MHz
OSC
●XC9136 Series ●XC9135 Series
L:
2.2μH~4.7μH
VLCF4020 series, LTF5022-LC series
CL:
Should be selected in 20μF or higher
Capacitor JMK212BJ106KG×2、LMK212BJ106KG×2、LMK316BJ226ML is recommended.
Ceramic capacitor: B (JIS standard) or X7R, X5R (EIA standard)
CIN:
10μF
Capacitor JMK212BJ106KG or LMK212BJ106KG is recommended.
Ceramic capacitor: B (JIS standard) or X7R, X5R (EIA standard)
CDD:
0.47μF (Ceramic capacitor)
CDF: 1000pF
* UVLO detect delay capacitor C
and CDD is constantly applied in the same voltage to VDD. While selecting a part, please concern about
DF
capacitance reduction and voltage durability.
* For the coil L, please use 2.2μH to 4.7μH. However, when the input voltage V
* Capacitance C
is recommended 20μF or higher. (Ceramic capacitor compatible)
L
is lower than 1.5V, please use 2.2μH.
IN
When you select the external components, please consider capacitance loss and voltage durability.
* If using tantalum or low ESR electrolytic capacitors please be aware that ripple voltage will be higher due to the larger ESR (Equivalent
Series Resistance) values of those types of capacitors. Please also note that the IC’s operation may become unstable with such capacitors
so that we recommend to test on the board before usage.
* If using electrolytic capacitor for the C
, please connect a ceramic capacitor in parallel.
L
13/35
XC9135/9136 Series
■OPERATIONAL EXPLANATION (Continued)
The XC9135/XC9136 series consists of a reference voltage source, ramp wave circuit, error amplifier, PWM comparator,
phase compensation circuit, N-channel driver transistor, P-channel synchronous rectification switching transistor and current
limiter circuit.
The error amplifier compares the internal reference voltage with the resistors RFB1 and RFB2. Phase compensation is
performed on the resulting error amplifier output, to input a signal to the PWM comparator to determine the turn-on time of the
N-channel driver transistor during PWM operation. The PWM comparator compares, in terms of voltage level, the signal from
the error amplifier with the ramp wave from the ramp wave circuit, and delivers the resulting output to the buffer driver circuit to
cause the Lx pin to output a switching duty cycle. This process is continuously performed to ensure stable output voltage.
The current feedback circuit monitors the N-channel driver transistor’s turn-on current for each switching operation, and
modulates the error amplifier output signal to provide multiple feedback signals. This enables a stable feedback loop even
when a low ESR capacitor, such as a ceramic capacitor, is used, ensuring stable output voltage.
<Reference Voltage Source>
The source provides the reference voltage to ensure stable output of the DC/DC converter.
<Ramp Wave Circuit>
The ramp wave circuit determines switching frequency. The frequency is fixed internally at 1.2MHz. The Clock
generated is used to produce ramp waveforms needed for PWM operation, and to synchronize all the internal circuits.
<Error Amplifier>
The error amplifier is designed to monitor output voltage. The amplifier compares the reference voltage with the feedback
voltage divided by the internal resistors (R
of the error amplifier increases. The gain and frequency characteristics of the error amplifier are optimized internally.
FB1 and RFB2). When the FB pin is lower than the reference voltage, output voltage
14/35
XC9135/XC9136
Series
■OPERATIONAL EXPLANATION (Continued)
< Maximum Current Limit>
The current limiter circuit monitors the maximum current flowing through the N-channel driver transistor connected to the Lx
pin, and features a combination of the current limit and latch function.
① When the driver current is greater than a specific level (equivalent to peak coil current), the maximum current limit
function starts to operate and the pulses from the Lx pin turn off the N-channel driver transistor at any given time.
When the driver transistor is turned off, the limiter circuit is then released from the maximum current limit detection state.
②
③ At the next pulse, the driver transistor is turned on. However, the transistor is immediately turned off in the case of
an over current state.
④ When the over current state is eliminated, the IC resumes its normal operation.
The XC9135 series waits for the over current state to end by repeating the steps ① through ③.
If an over current state continues for several milliseconds and the above three steps are repeatedly performed, the IC performs
the function of latching the OFF state of the N-channel driver transistor and P-channel synchronous transistor, and goes into
operation suspension mode. After being put into suspension mode, the IC can resume operation by turning itself off once and
then re-starting via the EN pin, or by restoring power to the V
IN pin.
The XC9136 series does not have this latch function, so operation steps ① through ③ repeat until the over current state
ends. Integral latch time may be released from an over current detection state because of the noise. Depending on the state of
a substrate, it may result in the case where the latch time may become longer or the operation may not be latched. Please
locate an input capacitor as close as possible.
Please note that the current flow into the N-channel driver transistor is different from output current I
<Thermal Shutdown>
For protection against heat damage, the thermal shutdown function monitors chip temperature. When the chip’s
temperature reaches 150
O
C (TYP.), the thermal shutdown circuit starts operating and the driver transistor will be turned off.
At the same time, the output voltage decreases. When the temperature drops to 130
flow, the IC performs the soft start function to initiate output startup operation.
<MODE>
The MODE pin operates in PWM mode by applying a high level voltage and in PFM/PWM automatic switching mode by
applying a low level voltage.
<Shut-Down, Load Disconnection Function>
The IC enters chip disable state by applying low level voltage to the EN pin. At this time, the N-channel and P-channel
synchronous switching transistors are turned OFF. Please also note that a parasitic diode of the P-channel synchronous
switch is controlled, thus, the current conduction path is disconnected.
<Flag Out>
The FO pin becomes high impedance during over current state, over temperature state, soft-start period, and shut-down
period. In normal state, the FO pin is low impedance. The FO pin is N-channel open drain output.
.
OUT
O
C (TYP.) after shutting off the current
15/35
XC9135/9136 Series
■OPERATIONAL EXPLANATION (Continued)
<CL Discharge >
The XC9135A/XC9135B/XC9135L/XC9135R/XC9136E series can discharge the electric charge at the output capacitor
(CL) when a low signal to the EN pin which enables a whole IC circuit put into OFF state, is inputted via the N-channel
transistor located between the V
) is quickly discharged so that it may avoid application malfunction. Discharge time of the output capacitor (CL) is set by the
(C
L
C
auto-discharge resistance (R) and the output capacitor (CL). By setting time constant of a CL auto-discharge resistance
L
value [R
] and an output capacitor value (CL) as τ(τ=C x R), discharge time of the output voltage after discharge via the
DCHG
N channel transistor is calculated by the following formulas. However, the C
V
or V
BAT
V = V
, so it is difficult to make sure the discharge time. We recommend that you fully check actual performance.
OUT
×e
-t /τ
OUT
or t = τln (V
V : Output voltage after discharge
V
: Output voltage
OUT
t : Discharge time
τ : C×R
C : Capacitance of Output capacitor (C
R : C
●Output Voltage Discharge Characteristics
(V)
OUT
Output Voltage: V
Discharge resistance, it depends on supply voltage
L
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.0000.0050.0100.015
V
OUTSET
The XC9135C/XC9135K/XC9135M/XC9135T/XC9136N series do not have CL discharge function. If the MODE pin is set
low to select auto PWM/PFM mode, the output of XC9135C/XC9135K/XC9135M/XC9135T/XC9136N series can be
connected to another power supply.
However, it should be noted that when the output of XC9135A/XC9135B/XC9135L/XC9135R/XC9136E series is connected to
another power supply, the IC may be damaged.
< CDD, V
V
DD MAX
>
DDMAX
circuit compares the input voltage and the output voltage then it will select the higher one as the power supply for
the IC. The higher voltage will be supplied to the C
<UVLO>
The XC9135 Series has a UVLO function. When the voltage of the BAT pin falls below V
the voltage of the BAT pin rises above V
<UVLO Detect Delay Time>
On the XC9135 Series, a capacitor Cdf can be connected to the CDF pin to set the delay time for stopping operation after
UVLO is detected.
This will prevent malfunctioning of the UVLO function due to temporary drops in the BAT voltage caused by load transients
and other conditions.
If the BAT voltage falls below the UVLO detection voltage and then returns to the UVLO release voltage or higher within the
detection delay time, the IC will continue operating.
If the BAT voltage does not return to the UVLO release voltage or higher within the detection delay time, the IC will stop
oscillating after the detection delay time has elapsed.
<Output Voltage Drop Protection>
The XC9135B/ XC9135K/ XC9135R/ XC9135T Series has a built-in output voltage drop protection function.
If the output voltage V
falls below the output voltage drop protection voltage V
OUT
16/35
pin and the PGND pin. When the IC is disabled, electric charge at the output capacitor
OUT
/V)
OUT
=1.8V, VIN=1.0V
V
=3.3V, VIN=2.0V
OUTSET
V
Discharge Time: t(s)
UVLO_R
)
L
CL=20μF
=5.0V, VIN=2.0V
OUTSET
pin and the IC operates in stable when a capacitor is connected.
DD
, output restarts by soft-start.
discharge resistance [R
L
, the IC stops oscillating. When
UVLO_F
due to an overload or other condition, the
LVP
] is depends on the
DCHG
XC9135/XC9136
Series
function will latch the Nch driver Tr and the Pch synchronous rectification switch Tr in the off state. Once in the latched state,
operation is restarted by turning the IC off and then on with the EN pin, or by restarting the power.
■NOTE ON USE
1. Please do not exceed the stated absolute maximum ratings values.
2. The DC/DC converter performance is greatly influenced by not only the ICs' characteristics, but also by those of the external
components. Care must be taken when selecting the external components. Especially for CL load capacitor, it is
recommended to use type B capacitors (JIS regulation) or X7R, X5R capacitors (EIA regulation).
3. Make sure that the PCB GND traces are as thick and wide as possible. The ground voltage fluctuation caused by high ground
current at the time of switching may result in instability of the IC. Therefore, the GND traces close to PGND pin and AGND pin
are important.
4. Please mount each external component as close to the IC as possible. Also, please make traces thick and short to reduce the
circuit impedance.
5. When the device is used in high step-up ratio, the current limit function may not work during excessive load current. In this
case, the maximum duty cycle limits maximum current. For the XC9135 series, while the current is controlled with maximum
duty cycle, over current latch function will not work.
6. In case of connecting to another power supply as shown in below circuit diagram, please use the
XC9135C/XC9135K/XC9135M/XC9135T/XC9136N series. Please also note that the MODE pin is fixed in low level for
selecting PWM/PFM auto mode. If the MODE pin is in high to maintain fixed PWM control mode, the backflow current may
happen. If the output of XC9135A/XC9135B/XC9135L/XC9135R/XC9136E series is connected to another power supply, the
IC may be damaged.
7. The maximum current limiter controls the limit of the N-channel driver transistor by monitoring current flow. This function does
not limit the current flow of the P-channel synchronous transistor. When over current flows to the P-channel synchronous
transistor in case of load, the IC may be damaged.
8. The integral latch time of the XC9135 series could be released from the maximum current detection state as a result of board
mounting conditions. This may extend integral latch time or the level required for latch operation to function may not be
reached. Please connect the output capacitor as close to the IC as possible.
9. The MODE pin and EN pin are not pulled-down internally. Please make sure that the voltage applied to the MODE pin and
the EN pin.
10. When used in small step-up ratios, the device may skip pulses during PWM control mode.
11. In the PWM/PFM auto, transition from PFM to PWM mode, or PWM to PFM mode, the output voltage may be fluctuated.
(Please refer below)
V
OUT
I
Lx
V
=4.2V, V
IN
V
:50mV/div, ILx:200mA/div, Time:20μs/div
OUT
L=4.7μH(LTF5022-LC), C
C
=10μF(LMK212BJ106KG), CDD=0.47μF(EMK107BJ474KA-T)
IN
R
=270kΩ, R
FB1
=5.0V, MODE:Auto PWM/PFM
OUT
=20μF(LMK212BJ106KG*2)
L
=30kΩ, CFB=10pF
FB2
17/35
XC9135/9136 Series
■NOTE ON USE (Continued)
12. When used in large step-up ratios and small load current, the output voltage may change when PWM/PFM auto is changed
to PWM control mode by using the MODE pin. (Please refer below)
13. After the soft-start period, when used in VIN>V
14. During start-up, when output setting voltage is lower than 2V, the PWM/PFM auto mode should be selected. In case of the
15. For temporary, transitional voltage drop or voltage rising phenomenon, the IC is liable to malfunction should the ratings be
16. Torex places an importance on improving our products and its reliability.
18/35
V
OUT
V
V
I
V
Lx
Lx
MODE
=0.9V, V
IN
V
:100mV/div, ILx:500mA/div, VLx:10V/div, V
OUT
L=2.2μH(VLCF4020), CL=20μF(LMK212BJ106KG*2)
C
=10μF(LMK212BJ106KG), CDD=0.47μF(EMK107BJ474KA-T)
IN
R
=270kΩ, R
FB1
(the input voltage is higher than the output voltage), In the
OUTSET
=5.0V, MODE:PWM/PFM→PWM, I
OUT
MODE
=30kΩ, CFB=0pF
FB2
=3mA
OUT
:5V/div, Time:200μs/div
XC9135C/ XC9135K/ XC9135M/XC9135T/XC9136N series , the P-channel synchronous transistor is turned on when
MODE pin is tied to high. When the MODE pin is tied to low, the current flows into the parasitic diode of the P-channel
synchronous transistor so that results in generating excessive heat in the IC. Please test in the board before usage with
considering heat dissipation. For the XC9135A /XC9135B/XC9135L/XC9135R/XC9136E, series (under development) the
P-channel synchronous transistor is always turned on which is no matter of MODE pin control.
fixed PWM control mode, the output voltage may become smaller than the setting voltage. When the setting output
voltage is higher than 2V, the IC can be started to operate in the both modes of PWM/PFM auto and fixed PWM control.
exceeded.
However, by any possibility, we would request user fail-safe design and post-aging treatment on system or equipment.
XC9135/XC9136
Series
■NOTE ON USE (Continued)
●Instructions for pattern layouts
1. In order to stabilize VIN voltage level, we recommend that a by-pass capacitor CIN is connected as close as possible to the
and VSS pins.
V
IN
2. Please mount each external component as close to the IC as possible.
3. Place external components as close to the IC as possible and use thick and short traces to reduce the circuit impedance.
4. Make sure that the PCB GND traces are thick and wide as possible. Ground voltage level fluctuation created by high
ground current at the time of switching may cause instability of the IC.
5. The internal driver transistors bring on heat because of the I
6. Please place a capacitor between CDF pin and GND.
●Example of pattern layout
FRONT BACK
current and ON resistance of the driver transistors.
IN
19/35
XC9135/9136 Series
■TEST CIRCUITS
<Circuit No.1>
XC9135A/C/L/M/B/K/R/TXC9136E/N
Wave Form Measure Point
L
A
V
IN
V
C
IN
V
MODE
V
FO
< Circuit No.2 >< Circuit No.3 >
BAT
A
V
IN
V
MODE
Lx
A
FO
AGNDPGND
※ External Components
C
DD
< Circuit No.4 >
BAT
A
V
IN
V
Lx
V
MODE
Lx
FO
AGNDPGND
※ External Components
: 0.47μF (ceramic)
C
DD
BAT
Lx
R
FO
FO
AGNDPGND
VOUT
(CDF)
CDD
: 0.47 μ F( ceramic)
VOUT
(CDF)
CDD
VOUT
CDF
ENMODE
V
CDD
FB
ENMODE
FB
ENMODE
A
V
C
DD
V
C
DD
EN
C
DD
A
V
FB
EN
V
FB
EN
A
C
L
C
DF
V
OU
T
V
OUT
V
RL
V
※
External Components
L
: 2.2 μH ( VLCF 4020- 2R 2 :TDK)
:
C
10μ F ( ceramic)
IN
C
: 0.47 μF (ceramic)
DD
: 22μ F ( ceramic)
C
L
:
1000
C
pF
DF
:
10
Ω
R
k
FB2
BAT
Lx
A
IN
V
MODE
FO
AGNDPGND
※ External Components
C
DD
VOUT
(CDF)
CDD
:0.47μF(ceramic)
FB
ENMODE
V
EN
C
DD
V
OUT
V
FB
20/35
XC9135/XC9136
Series
■TEST CIRCUITS(Continued)
<Circuit No.5>
< Circuit No.6>
A
V
IN
V
MODE
BAT
Lx
FO
AGNDPGND
* External Components
: 0.47μF (ceramic)
C
DD
VOUT
(CDF)
CDD
FB
ENMODE
V
C
DD
A
V
OUT
V
FB
EN
<Circuit No.8 >
V
IN
V
Lx
V
MODE
BAT
Lx
FO
AGNDPGND
* External Components
: 0.47μF (ceramic)
C
DD
Circuit No.1~9
XC9136E/XC9136N series does not have FB(C
VOUT
(CDF)
CDD
FB
ENMODE
V
C
DD
) pin.
DF
V
V
FB
EN
<Measurement method for ON resistance of the Lx switch>
Using the layout of circuit No.9 above, set the L
pin voltage to 50mV by adjusting the Vpull voltage whilst the N-channel driver
X
transistor is turned on. Then, measure the voltage difference between both ends of Rpull. ON Resistance is calculated by using
the following formula: (However, when the XC9135 series is measured, CDF
operation under V
R
=0.05 ÷ ((V1 – 0.05) ÷ 0.5)
LXN
UVLO_R<VIN
where V1 is a node voltage between SBD and Rpull. L
)
X
<Circuit No.7 >
BAT
Lx
V
IN
V
MODE
V
FO
A
FO
AGNDPGND
* External Components
C
DD
: 0.47μF (ceramic)
VOUT
(CDF)
CDD
FB
ENMODE
V
EN
C
DD
<Circuit No.9 >
Wave Form Measure Point
SBD
V
I
V
OUT
V
OUT
IN
Vpull
1
V
pin is grounded, please start measurement on
BAT
Rpull
Lx
FO
MODE
AGNDPGND
* External Components
C
DD
SBD : XBS304S17(TOREX)
Rpull : 0.5Ω
VOUT
FB
(CDF)
ENMODE
CDD
: 0.47μF (ceramic)
C
DD
pin voltage and V1 are measured by an oscilloscope.