XC61C Series
ETR0201_015
Low Voltage Detectors (VDF= 0.8V～1.5V)
Standard Voltage Detectors (V
■GENERAL DESCRIPTION
The XC61C series are highly precise, low power consumption voltage detectors, manufactured using CMOS and laser
trimming technologies.
Detect voltage is extremely accurate with minimal temperature drift.
Both CMOS and N-ch open drain output configurations are available.
■APPLICATIONS
●Microprocessor reset circuitry
●Memory battery back-up circuits
●Power-on reset circuits
●Power failure detection
●System battery life and charge voltage monitors
■TYPICAL APPLICATION CIRCUITS
■TYPICAL PERFORMANCE CHARACTERISTICS
1.6V～6.0V)
DF
■FEATURES
Highly Accurate : ± 2%
± 1%(Standard Voltage VD: 2.6V~5.1V)
Low Power Consumption : 0.7μA (TYP.) [V
Detect Voltage Range : 0.8V ~ 6.0V in 0.1V increments
Operating Voltage Range : 0.7V ~ 6.0V (Low Voltage)
0.7V～10.0V (Standard Voltage)
Detect Voltage Temperature Characteristics
: ±100ppm/℃ (TYP.)
Output Configuration : N-ch open drain or CMOS
Packages : SSOT-24
SOT-23
SOT-89
TO-92
Environmentally Friendly : EU RoHS Compliant, Pb Free
:
IN=1.5V]
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XC61C Series
■PIN CONFIGURATION
■PIN ASSIGNMENT
TO-92
(SIDE VIEW)
PIN NUMBER
SSOT-24 SOT-23 SOT-89 TO-92
PIN NAME FUNCTION
2 3 2 2 VIN Supply Voltage Input
4 2 3 3 VSS Ground
1 1 1 1 V
Output
OUT
3 - - - NC No Connection
■PRODUCT CLASSIFICATION
●Ordering Information
XC61C①②③④⑤⑥⑦-⑧
DESIGNATOR ITEM SYMBOL DESCRIPTION
① Output Configuration
②③ Detect Voltage 08 ~ 60
④ Output Delay 0 No delay
⑤ Detect Accuracy
⑥⑦-⑧
(*1)
The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.
(*1)
Packages (Order Unit)
(*1)
C CMOS output
N N-ch open drain output
e.g.0.9V → ②0, ③9
e.g.1.5V → ②1, ③5
1 Within ±1% (V
=2.6V~5.1V)
DF(T)
2 Within ±2%
NR SSOT-24 (SC-82) (3,000/Reel)
NR-G SSOT-24 (SC-82) (3,000/Reel)
MR SOT-23 (3,000/Reel)
MR-G SOT-23 (3,000/Reel)
PR SOT-89 (1,000/Reel)
PR-G SOT-89 (1,000/Reel)
TH TO-92 Taping Type: Paper type (2,000/Tape)
TH-G TO-92 Taping Type: Paper type (2,000/Tape)
TB TO-92 Taping Type: Bag (500/Bag)
TB-G TO-92 Taping Type: Bag (500/Bag)
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■BLOCK DIAGRAMS
(1) CMOS Output (2) N-ch Open Drain Output
■ABSOLUTE MAXIMUM RATINGS
PAR AMETER SYMBOL RATINGS UNITS
Input Voltage
*1 VSS-0.3 ~ 9.0
*2
VIN
VSS-0.3 ~ 12.0
Output Current IOUT 50 mA
CMOS VSS -0.3 ~ VIN +0.3
Output Voltage
N-ch Open Drain Output *1 VSS -0.3 ~ 9.0
N-ch Open Drain Output *2
VOUT
VSS -0.3 ~ 12.0
SSOT-24 150
Power Dissipation
SOT-23 150
SOT-89 500
TO-92
Operating Temperature Range Topr
Storage Temperature Range Tstg
Pd
300
-40～+85 ℃
-40～+125 ℃
*1: Low voltage: VDF(T)=0.8V~1.5V
*2: Standard voltage: VDF(T)=1.6V~6.0V
Ta = 25OC
V
V
mW
XC61C
Series
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XC61C Series
■ELECTRICAL CHARACTERISTICS
VDF (T) = 0.8V to 6.0V ± 2%
VDF (T) = 2.6V to 5.1V ± 1%
PAR AMETER SYMBOL CONDITIONS MIN. TYP. MAX.
VDF(T)=0.8V~1.5V *1
V
Detect Voltage VDF
DF(T)=1.6V~6.0V *2
DF(T)=2.6V~5.1V *2
V
Hysteresis Range VHYS
VIN = 1.5V
VIN = 2.0V
Supply Current ISS
VIN = 3.0V
VIN = 4.0V
VIN = 5.0V
Operating Voltage *1 VDF(T) = 0.8V to 1.5V 0.7 - 6.0
Operating Voltage *2
Output Current *1
VIN
CMOS, P-ch V
V
DF(T) = 1.6V to 6.0V 0.7 - 10.0
N-ch VDS = 0.5V
DS = 2.1V VIN = 6.0V - -7.5 -1.5 4
VIN = 0.7V
IN = 1.0V 0.85 2.70
V
VIN = 1.0V
OUT
Output Current *2
I
N-ch VDS = 0.5V
VIN = 2.0V 3.0
VIN = 3.0V 5.0 10.1
VIN = 4.0V 6.0 11.5
IN = 5.0V 7.0 13.0
V
CMOS, P-ch VDS = 2.1V VIN = 8.0V
CMOS
Output
Leakage
Current
(Pch)
N-ch
Open
Drain
Temperature
Characteristics
Delay Time
(VDR→
V
OUT
inversion)
NOTE:
*1: Low Voltage: V
*2: Standard Voltage: V
DF (T): Nominal detect voltage
V
Release Voltage: V
DF(T)=0.8V~1.5V
I
LEAK
ΔV
/
DF
Δ
To pr･VDF)
t
Inverts from VDR to VOUT - 0.03 0.20 ms 5
DLY
DF(T)=1.6V~6.0V
DR = VDF + VHYS
V
V
VIN=10.0V, V
IN=VDF
=6.0V, V
IN
x0.9, V
OUT
=6.0V*1
OUT
=10.0V*2
OUT
=0V - -10 -
-40℃ ≦ Topr ≦ 85℃
DF(T)
V
x 0.98
VDF(T)
x 0.99
VDF
x 0.02
DF(T)
V
DF(T)
V
VDF
x 0.05
- 0.7 2.3
- 0.8 2.7
- 0.9 3.0
- 1.0 3.2
- 1.1 3.6
0.10 0.80 -
1.0
2.2
7.7 -
- -10.0 -2.0
- 10 100
-
±100
VDF(T)
x 1.02
VDF(T)
x 1.01
VDF
x 0.08
-
-
-
-
-
-
Ta =2 5℃
CIRCUITS
UNITS
V 1
V 1
V 1
μA
2
V 1
3
mA
3
4
nA 3
ppm/
℃
1
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■OPERATIONAL EXPLANATION
(Especially prepared for CMOS output products)
① When input voltage (VIN) is higher than detect voltage (VDF), output voltage (V
(A condition of high impedance exists with N-ch open drain output configurations.)
② When input voltage (V
) falls below detect voltage (VDF), output voltage (V
IN
level.
③ When input voltage (V
) falls to a level below that of the minimum operating voltage (V
IN
unstable. (As for the N-ch open drain product of XC61CN, the pull-up voltage goes out at the output voltage.)
④ When input voltage (V
minimum operating voltage (V
) rises above the ground voltage (VSS) level, output will be unstable at levels below the
IN
). Between the V
MIN
and detect release voltage (VDR) levels, the ground voltage (VSS)
MIN
level will be maintained.
⑤ When input voltage (V
) rises above detect release voltage (VDR), output voltage (V
IN
(A condition of high impedance exists with N-ch open drain output configurations.)
⑥ The difference between V
and VDF represents the hysteresis range.
DR
●Timing Chart
XC61C
) will be equal to VIN.
OUT
) will be equal to the ground voltage (VSS)
OUT
), output will become
MIN
) will be equal to VIN.
OUT
Series
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XC61C Series
■NOTES ON USE
1. Please use this IC within the stated absolute maximum ratings. For temporary, transitional voltage drop or voltage rising
phenomenon, the IC is liable to malfunction should the ratings be exceeded.
2. When a resistor is connected between the VIN pin and the power supply with CMOS output configurations, oscillation may
occur as a result of voltage drops at R
3. When a resistor is connected between the V
N-ch open-drain output configurations, oscillation may occur as a result of through current at the time of voltage release even
if load current (I
4. Please use N-ch open drain output configuration, when a resistor R
In such cases, please ensure that R
(refer to the Oscillation Description (1) below)
5. With a resistor R
power supply voltage as a result of the IC's supply current flowing through the V
6. In order to stabilize the IC's operations, please ensure that V
7. Torex places an importance on improving our products and its reliability.
However, by any possibility, we would request user fail-safe design and post-aging treatment on system or equipment.
●Oscillation Description
(1) Load current oscillation with the CMOS output configuration
When the voltage applied at power supply, release operations commence and the detector's output voltage increases.
Load current (IOUT) will flow at RL. Because a voltage drop (RIN x IOUT) is produced at the RIN resistor, located between the
power supply and the V
voltage level at the V
commence. Following detect operations, load current flow will cease and since voltage drop at R
voltage level at the V
Oscillation may occur with this " release - detect - release " repetition.
Further, this condition will also appear via means of a similar mechanism during detect operations.
(2) Oscillation as a result of through current
Since the XC61C series are CMOS IC
release and detect operations). Consequently, oscillation is liable to occur as a result of drops in voltage at the through
current's resistor (RIN) during release voltage operations. (refer to Figure 3)
Since hysteresis exists during detect operations, oscillation is unlikely to occur.
Power supply Power supply
) does not exist. (refer to the Oscillation Description (2) below )
OUT
connected between the V
IN
IN pin, the load current will flow via the IC's VIN pin. The voltage drop will also lead to a fall in the
IN pin. When the VIN pin voltage level falls below the detect voltage level, detect operations will
IN pin will rise and release operations will begin over again.
if load current (I
IN
IN is less than 10kΩ and that C is more than 0.1μF, please test with the actual device.
S, through current will flow when the IC's internal circuit switching operates (during
pin and the power supply with CMOS output configurations, irrespective of
IN
pin and the power supply, the V
IN
) exists. (refer to the Oscillation Description (1) below)
OUT
is connected between the VIN pin and power source.
IN
pin voltage will be getting lower than the
IN
pin.
pin input frequency's rise and fall times are more than 2 μ s/ V.
IN
Power supply
IN
IN will disappear, the
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