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XC6126 Series
Ultra Small, Highly Accurate, Single Voltage Detector
GENERAL DESCRIPTION
The XC6126 series is an ultra small, highly accurate CMOS single voltage detector with very low power consumption. The
device includes a highly accurate reference voltage source and uses laser trimming technologies, it maintains high accuracy
over the full operation temperature range.
The device is available in both CMOS and N-channel open drain output configurations.
Ultra small package USPN-4B02 is ideally suited for small design of portable devices and high densely mounting
applications. The conventional package SSOT-24 is also available for upper compatible replacements.
■APPLICATIONS
● Microprocessor logic reset circuitry
●System battery life and charge voltage monitors
● Memory battery back-up circuits
●
Power-on reset circuits
●
Power failure detection
■TYPICAL APPLICATION CIRCUIT
FEATURES
High Accuracy
Temperature Characteristics
Low Power Consumption
Operating Voltage Range
Detect Voltage Range
Output Configuration
CMOS output
Detect Logic
Packages
Environmentally Friendly
:±0.8％ (25℃)
:±50ppm /℃ (TYP.)
0.6μA (TYP.) (Detect: VDF=1.8V, VIN=1.62V)
:
0.7μA (TYP.) (Release: VDF=1.8V, VIN=1.98V)
: 0.7V～6.0V
: 1.5V～5.5V (0.1V increments)
: N-channel open drain output
: Active Low Reset
: USPN-4B02, SSOT-24
: EU RoHS Compliant, Pb Free
TYPICAL PERFORMANCE
CHARACTERISTICS
●Detect Voltage vs. Ambient Temperature
XC6126x27Aｘ
2.76
2.74
(V)
DFL
2.72
2.70
2.68
2.66
Detect Voltage: V
2.64
-50 -25 0 25 50 75 100
Ambient Temperature: Ta (℃)
ETR0214-003
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XC6126 Series
PIN CONFIGURATION
V
SS
NC
PIN ASSIGNMENT
PRODUCT CLASSIFICATION
●Ordering Information
XC6126①②③④⑤⑥‑⑦
(*1)
USPN-4B02
(BOTTOM VIEW)
PIN NUMBER
USPN-4B02 SSOT-24
1 4 VIN Power Input
2 3 V
3 1 NC No connection
4 2 VSS Ground
DESIGNATOR ITEM SYMBOL DESCRIPTION
①
②③
④ Detect Accuracy A ±0.8%
⑤⑥-⑦
The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.
(*1)
V
14
IN
V
23
OUT
PIN NAME FUNCTION
(*1)
Output Configuration
Detect Voltage
Packages (Order Unit)
V
IN
4
1
NC
SSOT-24
(TOP VIEW)
OUT
15~55
V
OUT
3
2
V
SS
Signal Output (Active Low)
C CMOS Output
N N-ch Open Drain Output
7R-G USPN-4B02 (5,000/Reel)
NR-G SSOT-24 (3,000/Reel)
e.g. 2.7V → ②=2, ③=7
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A
■
BLOCK DIAGRAMS
* Diodes inside the circuits are ESD protection diodes and parasitic diodes.
* Diodes inside the circuits are ESD protection diodes.
BSOLUTE MAXIMUM RATINGS
PAR AMETER SYMBOL RATING UNITS
Input Voltage VIN
Output Current I
Output Voltage
Power Dissipation
XC6126C
XC6126N
(*1)
(*2)
USPN-4B02 100
SSOT-24
V
OUT
OUT
Pd
Operating Temperature Range Topr
Storage Temperature Range Tstg
Note:
(*1) CMOS Output
(*2) N-ch Open Drain Output
XC6126
Series
Ta =2 5℃
-0.3～+6.5
V
SS
20 mA
-0.3～VIN+0.3≦6.5
V
SS
VSS-0.3～+6.5
150
-40～+85
-55～+125
V
V
mW
o
C
o
C
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XC6126 Series
ELECTRICAL CHARACTERISTICS
XC6126 Series
PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNITS CIRCUIT
Operating Voltage VIN
Detect Voltage V
Hysteresis Width V
Supply Current 1 I
Supply Current 2 I
DFL
HYS
SS1
SS2
V
DF(T)
(*1)
V
DF(T)
VIN=V
V
DF(T)
V
DF(T)
V
DF(T)
VIN=V
V
DF(T)
V
DF(T)
V
DF(T)
=1.5～5.5V
=1.5～5.5V
(*2)
(*3)
0.7
V
DF(T)
×0.992
V
DF(T)
E-1
V
DFL
×0.02
×0.9
DFL
=1.5～1.8V
=1.9～3.0V
=3.1～5.5V
(*5)
×1.1
DFL
=1.5～1.8V
=1.9～3.0V
=3.1～5.5V
- 0.6 1.3
- 0.7 1.5
- 0.9 1.85
- 0.7 1.55
- 0.8 1.75
- 1.0 2.25
V
×0.05
DFL
6.0 V -
V
DF(T)
(*4)
×1.008
V
DFL
×0.08
V
V
μA ②
μA ②
Ta =2 5℃
①
①
VIN=0.7V,V
VIN=1.0V, V
VIN=2.0V
I
OUT1
Output Current
VIN=3.0V
VIN=4.0V
VIN=5.0V
(*10)
I
OUT2
CMOS
Leakage
Current
Output
N-ch Open
Drain Output
Temperature Characteristics
Detect Delay Time
Release Delay Time
Note:
(*1) V
(*2) For the N-ch Open Drain, Rpull=1MΩ, Vpull-Up=V
Rpull：An External Pull-up resistor
Vpull-Up：Pull-up Voltage
(*3)V
(*4)For the detail value, please refer to “Voltage Table” in next page.
(*5) V
(*6) For V
(*7) For V
(*8) For V
(*9) For V
(*10)For the XC6126C (CMOS output)
(*11) A time between V
(*12) A time between V
: Nominal detect voltage
DF(T)
voltage for V
IN
=6.0V where V
IN
＞2.0V products.
DF(T)
＞3.0V products.
DF(T)
＞4.0V products.
DF(T)
＞5.0V products.
DF(T)
(*11)
(*12)
≦0.3V is under detect state.
OUT
= 5.5V.
DF(T)
IN=VDFL
IN=VDFL+VHYS
(ΔTopr・V
t
t
and V
OUT=VDFL
and V
VIN=6.0V,V
I
LEAK
ΔV
/
DFL
)
DFL
V
DF
V
DR
×0.45 when V
OUT=VDFL
×0.55 when V
VIN=V
VIN=6.0V,V
-40℃≦Topr≦85℃
IN=VDFL
IN=VDFL
.
IN
4/9
=0.5V(N-ch) 0.008 0.2 -
OUT
=0.5V(N-ch) 0.6 1.5 -
OUT
(*6)
, V
=0.5V(N-ch) 4.5 7.0 -
OUT
(*7)
,V
=0.5V(N-ch) 7.0 10.0 -
OUT
(*8)
,V
=0.5V(N-ch) 8.5 11.5 -
OUT
(*9)
,V
=0.5V(N-ch) 9.5 13.0 -
OUT
=5.5V(P-ch) - -4.6 -2.8 mA
OUT
DFL
×0.9,V
=0V - -0.01 -
OUT
=6.0V - 0.01 0.15
OUT
- ±50 -
(*5)
×1.1
→V
×0.9 - 30 100
DFL
×0.9→V
falls.
IN
rises.
IN
DFL
(*5)
×1.1
- 20 50
mA
③
③
μA
③
μA
ppm/℃ ①
μs ④
μs ④
■
)
ELECTRICAL CHARACTERISTICS(Continued
Voltage Table 1 Voltage Table 2
NOMINAL
DETECT
VOLTAGE
(V)
V
DF(T)
DETECT
VOLTAGE
(V) (V)
E-1
V
V
DFL
MIN. MAX.
NOMINAL
DETECT
VOLTAGE
(V)
V
DF(T)
DETECT
VOLTAGE
E-1
DFL
MIN. MAX.
1.50 1.4880 1.5120 4.10 4.0672 4.1328
1.60 1.5872 1.6128 4.20 4.1664 4.2336
1.70 1.6864 1.7136 4.30 4.2656 4.3344
1.80 1.7856 1.8144 4.40 4.3648 4.4352
1.90 1.8848 1.9152 4.50 4.4640 4.5360
2.00 1.9840 2.0160 4.60 4.5632 4.6368
2.10 2.0832 2.1168 4.70 4.6624 4.7376
2.20 2.1824 2.2176 4.80 4.7616 4.8384
2.30 2.2816 2.3184 4.90 4.8608 4.9392
2.40 2.3808 2.4192 5.00 4.9600 5.0400
2.50 2.4800 2.5200 5.10 5.0592 5.1408
2.60 2.5792 2.6208 5.20 5.1584 5.2416
2.70 2.6784 2.7216 5.30 5.2576 5.3424
2.80 2.7776 2.8224 5.40 5.3568 5.4432
2.90 2.8768 2.9232 5.50 5.4560 5.5440
3.00 2.9760 3.0240
3.10 3.0752 3.1248
3.20 3.1744 3.2256
3.30 3.2736 3.3264
3.40 3.3728 3.4272
3.50 3.4720 3.5280
3.60 3.5712 3.6288
3.70 3.6704 3.7296
3.80 3.7696 3.8304
3.90 3.8688 3.9312
4.00 3.9680 4.0320
XC6126
Series
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(
)
XC6126 Series
OPERATIONAL EXPLANATION
●Typical Application Circuit
●Timing Chart
The above uses a timing chart to explain the operation of the circuit indicated in the operation explanation circuit schematic.
(1) In the initial state, an input voltage (V
When a voltage higher than the detect voltage (V
input voltage (V
*On the N-ch open drain output product, the VOUT pin is in a high impedance state, and when the output is pulled up, the output
voltage (V
(2) When the input voltage (V
(Detection state)
*This also applies to the N-ch open drain output product.
(3) If the input voltage (V
*If the output pin on the N-ch open drain output product is pulled up, the pull-up voltage may be output as the output voltage (V
(4) The output voltage (V
and reaches the release voltage (VDR).
(5) If the input voltage (V
*On the N-ch open drain output product, the VOUT pin is in a high impedance state, and if the output is pulled up, the pull-up
voltage is output as the output voltage (V
(6) The difference between the release voltage (V
Note: For simplicity, the above explanation omits the circuit operation time.
).
IN
) is equal to the pull-up voltage.
OUT
) drops below the detect voltage (V
IN
) drops below the minimum operating voltage (0.7V), the output becomes unstable.
IN
) remains at the ground voltage as the input voltage (VIN) rises past the minimum operating voltage (0.7V)
OUT
) rises higher than the release voltage (VDR), the output voltage (V
IN
) higher than the release voltage (VDR) is applied, and VIN gradually drops.
IN
OUT
6/9
Unused for the CMOS output products
) is applied to the input voltage (VIN), the output voltage (V
DFL
), the output voltage (V
DFL
) as in (1).
) and the detect voltage (V
DR
) is equal to the ground voltage (VSS).
OUT
) is equal to the input voltage (VIN).
OUT
) is the hysteresis width (V
DFL
HYS
).
) is equal to the
OUT
OUT
).
■
XC6126
Series
NOTE ON USE
1. Please use this IC within the stated maximum ratings. For temporary, transitional voltage drop or voltage rising phenomenon,
the IC is liable to malfunction should the ratings be exceeded.
2. Note that there is a possibility of malfunctioning if the input voltage changes sharply or undergoes repeated, cyclical changes.
3. If the resistance R
current in the internal circuit and RIN may cause oscillation when release takes place. When using the CMOS output product,
oscillation due to R
be connected.
4. Please use N-ch open drains configuration, when a resistor R
In such cases, please ensure that R
V
DD
[Figure 1: Circuit connected with the input resistor fro N-ch open drain]
N-chオープンドレイン品で入力抵抗を接続する場合の回路例
5. When N-ch open drain output is used, the V
output pin. Select the resistance based on the following considerations:
At detection: V
Vpull-Up: Voltage after pull-up
(*1): ON resistance of N-ch driver (calculated from V
R
ON
Example:
When V
when Vpull-Up is 3.0 V,
Rpull = (Vpull-Up /V
Therefore, to make the output voltage at detection 0.1 V or less under the above conditions, the pull-up resistance must be
3.2kΩ or higher.
(*1) Note that R
(*2) For V
(*3) I
OUT1
To select a pull-up resistance taking ambient temperature into account, consult us.
At release: V
Vpull-Up: Voltage after pull-up
: 40MΩ (MIN.) resistance when N-ch driver is OFF (calculated from V
R
OFF
Example:
Making V
Rpull = (Vpull-Up/V
Therefore, to make the output voltage at release 5.99 V or higher under the above conditions, the pull-up resistance must be
66kΩ or less.
6. Torex places an importance on improving our products and its reliability.
However, by any possibility, we would request user fail-safe design and post-aging treatment on system or equipment.
RIN≦33kΩ
= 2.0V (*2), R
IN
in the calculation, use the lowest value of the input voltage range you will use.
IN
in the electrical characteristics is at Ta = 25℃. I
OUT
5.99 V or higher when Vpull-Up is 6.0 V:
OUT
is connected between the VIN pin and the power supply VDD, the voltage drop due to the flow through
IN
and the flow through current may occur without relation to release and detection, and thus RIN should not
IN
is connected between the VIN pin and the power supply VDD.
is less than 33kΩ.
IN
Vpull-Up
XC6126N Series
V
IN
= (Vpull-Up)/(1+Rpull/RON)
OUT
= 0.5/4.5×10-3≒111Ω（MAX.）. If it is desired to make the V
ON
)×RON=(3/0.1-1)×111 ≒ 3.2kΩ
OUT-1
becomes larger as VIN becomes smaller.
ON
= (Vpull-Up)/(1+Rpull/R
OUT-1
)×R
= (6/5.99-1)×40×106 ≒ 66 kΩ
OFF
V
OUT
V
SS
voltage at detection is determined by the pull-up resistance connected to the
OUT
)
OFF
OUT1
IN
Rpull
V
OUT
OUT/IOUT1
based on electrical characteristics) (*3)
voltage at detection 0.1V or less
OUT
varies depending on the ambient temperature.
OUT/ILEAK
based on electrical characteristics)
7/9
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XC6126 Series
TEST CIRCUITS
Circuit 1
Circuit 2
Circuit 3
Circuit 4
8/9
(Unused for the CMOS output products)
(Unused for the CMOS output products)
Measurement of waveform
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
XC6126
Series
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