PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits
(For Low Frequency Range)
GENERAL DESCRIPTIO N
The XC25BS5 series are high frequency, low power consumption PLL clock generator ICs with divider circuit & multiplier
PLL circuit.
Laser trimming gives the option of being able to select from divider ratios (M) of 1,3 to 2047 and multiplier ratios (N) of 6 to
2047.
Output frequency (Q0) is equal to reference oscillation (fCLKin) multiplied by N/M, within a range of 3MHz to 30MHz. Q1
output is selectable from input reference frequency (f0), input reference freque ncy/2 (f0/2) , ground (GND), and comparative
frequency (f0/M). Further, comparative frequencies, within a range of 12KHz to 500KHz, can be obtained by dividing the
reference oscillation. By halting operation via the CE pin, consumption current can be controlled and output will be o ne of
high-impedance.
■APPLICATIONS
●Crystal oscillation modules
●Personal computers
●PDAs
●Portable audio systems
●Various system clocks
PIN CONFIGURATION
SOT-26
(TOP VIEW)
*The dissipation pad for the USP-6B package
should be solder-plated in recommended mount
pattern and metal masking so as to enhance
mounting strength and heat release.
If the pad needs to be connected to other pins,
it should be connected to the V
FUNCTION LIST
C E FUNCTION
●CE, Q0/Q1 Pin Function
"H"Q0, Q1 Clock Output
"L"Stand-by. Output Pin = High Impedance
Open
Stand-by. Output Pin = High Impedance
(V
SS Pin Pull-Down Due to IC's Internal Resistor)
Q1 6
VDD 5
CLKin4
USP-6B
(BOTTOM VIEW)
1 Q0
2 VSS
3 CE
DD pin.
FEATURES
Output Frequency : 3MHz ~ 30MHz (Q0=fCLKin×N/M)
Input Frequency (fCLKin)
: 12kHz ~ 35MHz
Divider Ratio (M) :
Multiplier Ratio (N) :
Output : 3-State
Operating Voltage Range
: 2.97V ~ 5.5V
Low Power Consumption
: CMOS (stand-by function included)*1
Comparative Frequency
: 12kHz~500kHz
Package
Environmentally Friendly
Selectable from divisions of 1, 3~2047
Selectable from multiplications of 6~2047
① Q1 Pin - reference oscillation, reference oscillation/2, comparative frequency
② Q1 Pin - GND
NOTE
(1) Please insert a by-pass capacitor of 0.1μF.
(2) Rq0 and Rq1 are matching resistors. Their use is recommended in order to counter unwanted radiations.
(3) Please place a by-pass capacitor and matching resistors as close to the IC as possible. It may be that the
output cannot be locked if the by-pass capacitor is not close enough to the IC. Further, there is a possibility of
unwanted radiation occurrence between the resistor and the IC pin if the matching resistor is not close enough to
the IC.
(4) When selecting GND for the Q1 pin, although the output of Q1 pin is GND level, it is also recommended that the
Q1 pin be connected to GND pattern on the PCB.
(5) When the CE pin is not controlled by external signals, it is recommended that a time constant circuit of R1=1kΩ
×C1 = 0.1μF be added for stability.
(6) With this IC, output is achieved by dividing and multiplying the reference oscillation by means of the PLL circuit.
In cases where this output is further used as a reference oscillation of another PLL circuit, it may be that the final
output signal's jitter increases, so all necessary precautions should be taken to avoid this.
(7) It is recommended that a low noise power supply, such as a series regulator, be used for the supply voltage.
Using a power supply such as a switching regulator might lead to a larger jitter, which in turn may lead to an
inability to lock due to the ripple of the switching regulator.
(8) As for this IC, synchronization of input and output signal’s edge is not guaranteed though the input frequency
operates to the output frequency multiply.
Series
5/12
■
XC25BS5Series
REFERENCE LAND PATTERN
① Q1 Pin - reference oscillation, reference oscillation/2, comparative frequency
② Q1 Pin - GND
6/12
■
A
C CHARACTERISTIC WAVEFORMS
1) Output Rise Time / Output Fall Time
2) Duty Ratio
3) Output Start Time
XC25BS5
Series
DUTY Measurement Level
DUTY Measurement Level
7/12
■
XC25BS5Series
PACKAGING INFORMATION
●SOT-26
+0.1
0.4
-0.05
2.9±0.2
(0.5)
5
64
1
2
(0.95)
(0.95)
3
0.15
+0.1
-0.05
0~0.1
●USP-6B Reference Pattern Layout
2.4
0.45
0.45
●USP-6B
2.0±0.05
(0.125)
0.65±0.05
0.7±0.03
0.65±0.05
1.0±0.05
0.25±0.050.25±0.05
●USP-6B Reference Metal Mask Design
2.3
0.35
0.35
8/12
1
2
3
6
5
2
61
5
4
34
0.05
1.0
0.05
0.15
0.15
0.8
■
2
)
MARKING RULE
●SOT-26
SOT-26
(TOP VIEW)
●USP-6B
1
⑤ ⑥④
3
USP-6B
(TOP VIEW)
② ③①
●XC25BS50 ●XC25BS51
①② represents product series ① represents product series
MARK
① ②
PRODUCT SERIES
MARK PRODUCT SERIES
5 XC25BS51**M*
B 5 XC25BS50**M*
③ represents the 10th digit of product
part number
MARK PRODUCT SERIES
1 XC25BS5001M*
5 XC25BS5005M*
②③ represents the 9th and 10th digits of
product part number
MARK
② ③
0 7 XC25BS5107M*
6 XC25BS5006M*
④ represents production lot number
0 to 9,A to Z reversed character 0 to 9,A to Z repeated (G, I, J, O, Q, W excluded)
①,②,③ represents product series
MARK
6
5
4
① ② ③
B S 0XC25BS50**D*
B S 1XC25BS51**D*
PRODUCT SERIES
④⑤ represents the 9th and 10th digit of product part number
Ex
MARK
④ ⑤
PRODUCT SERIES
0 7 XC25BS5*07D*
⑥ represents production lot number
0 to 9,A to Z repeated (G, I, J, O, Q, W excluded)
Note: No character inversion used.
XC25BS5
Series
PRODUCT SERIES
9/12
XC25BS5Series
■PACKAGING INFORMATION (Continued)
● SOT-26 Power Dissipation
Power dissipation data for the SOT-26 is shown in this page.
The value of power dissipation varies with the mount board conditions.
Please use this data as one of reference data taken in the described condition.
1. Measurement Condition (Reference data)
Copper (Cu) traces occupy 50% of the board area
Material: Glass Epoxy (FR-4)
Thickness: 1.6 mm
Through-hole: 4 x 0.8 Diameter
2. Power Dissipation vs. Ambient Temperature
Board Mount (Tj max = 125℃)
Ambient Temperature(℃) Power Dissipation Pd(mW)Thermal Resistance (℃/W)
Condition: Mount on a board
Ambient: Natural convection
Soldering: Lead (Pb) free
Board: Dimensions 40 x 40 mm (1600 mm
In top and back faces
Package heat-sink is tied to the copper traces
2
in one side)
25 600
85 240
166.67
Evaluation Board (Unit: mm)
10/12
Pd-Ta特性グラフ
Pd vs. Ta
700
600
500
400
300
200
100
許容損失Pd(mW)
Power Dissipation Pd (mW)
0
25456585105125
Ambient Temperature Ta (℃)
周辺温度Ta(℃)
■PACKAGING INFORMATION (Continued)
● USP-6B Power Dissipation
Power dissipation data for the USP-6B is shown in this page.
The value of power dissipation varies with the mount board conditions.
Please use this data as one of reference data taken in the described condition.
1. Measurement Condition (Reference data)
Copper (Cu) traces occupy 50% of the board area
Material: Glass Epoxy (FR-4)
Thickness: 1.6 mm
Through-hole: 4 x 0.8 Diameter
2. Power Dissipation vs. Ambient Temperature
Board Mount (Tj max = 125℃)
Condition: Mount on a board
Ambient: Natural convection
Soldering: Lead (Pb) free
Board: Dimensions 40 x 40 mm (1600 mm
In top and back faces
Package heat-sink is tied to the copper traces
2
in one side)
Ambient Temperature(℃) Power Dissipation Pd(mW)Thermal Resistance (℃/W)
25 1000
85 400
1200
Pd vs Ta
Evaluation Board (Unit: mm)
100.00
XC25BS5
Series
1000
800
600
400
200
0
25456585105125
Ambient Temperature Ta(℃)
11/12
XC25BS5Series
1. The products and product specifications cont ained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
12/12
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