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VIN (V)
EFFICIENCY (%)
100
95
90
85
80
75
70
0 16 32 48 64 80
Q1 is IPD200N15N3
Q1 is FDD3682
AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board
1 Introduction
This wide range evaluation board showcases the LM3423 NFET controller used with a buck-boost current
regulator. It is designed to drive 4 to 8 LEDs at a maximum average LED current of 700mA from a DC
input voltage of 10 to 70V.
The evaluation board showcases most features of the LM3423 including PWM dimming, fault and LED
status flags, output overvoltage protection and input under-voltage lockout. Note that there are two
revisions of this PCB. The documentation for the latest revision (551600305-002 RevA) is shown first. The
schematic, layout and bill of materials for the first revision (551600305-001 Rev1) can be found at the end
of this document.
The buck-boost circuit can be easily redesigned for different specifications by changing only a few
components (see the Alternate Designs section found at the end of this application note). Note that design
modifications can change the system efficiency. See the LM3421/21Q1/21Q0 LM3423/23Q1/23Q0 N-Ch
Controllers for Constant Current LED Drivers (SNVS574) data sheet for a comprehensive explanation of
the device and application information.
User's Guide
SNVA415C–June 2010–Revised May 2013
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SNVA415C–June 2010–Revised May 2013 AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board
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Figure 1. Efficiency with 6 Series LEDS at 700mA
1
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C4,
C6
(a-d)
Q1
R18
R11
R9
R20
C12
C11
Q5
V
IN
Q7
Q6
Q4
D2
DIM
R17
R19
DIM
Q2
V
IN
L1
C9
R6
C8
R1
R10
R13
R5
R8
R7
R4
C7
C2, C3
OVP
nDIM
LM3423
AGND
PGND
DDRV
DAP
GATE
EN
COMP
VIN
CSH
RCT
IS
HSP
RPD
VCC
HSN
1
2
3
4
5
6
7
8
20
19
18
17
16
15
14
13
FLT DPOL
9 12
TIMR LRDY
10 11
R2
C10
R14
V
IN
R15
V
IN
V
CC
V
CC
LED-
D1
TP1
Q3
PWM
R12
TP5
RPD
RPD
TP10
GND
J3
C1
R3
J1
J2
J5
LED+
J4
TP6
GND
Schematic for 551600305-002 REVA
2 Schematic for 551600305-002 REVA
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Figure 2. Board Schematic
2
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3 Pin Descriptions
LM3423 LM3421 Name Description Function
1 1 V
2 2 EN Enable
3 3 COMP Compensation
4 4 CSH Current Sense High
5 5 RCT Resistor Capacitor Timing
6 6 AGND Analog Ground provide ground return for CSH, COMP, RCT, and
7 7 OVP Over-Voltage Protection
8 8 nDIM from VINto program input under-voltage lockout
9 - FLT Fault Flag MosFET open drain output is high when a fault
10 - TIMR Fault Timer
11 - LRDY LED Ready Flag MosFET open drain output pulls down when the
12 - DPOL Dim Polarity channel MosFET or leave open when dimming with
13 9 DDRV Dim Gate Drive Output Connect to the gate of the dimming MosFET.
14 10 PGND Power Ground
15 11 GATE Main Gate Drive Output Connect to the gate of the main switching MosFET.
16 12 V
17 13 IS Main Switch Current Sense switch for R
18 14 RPD Resistor Pull Down (VINUVLO, OVP) to implement “zero-current”
19 15 HSP LED Current Sense Positive
20 16 HSN LED Current Sense Negative
DAP (21) DAP (17) DAP Thermal PAD on bottom of IC Star ground, connecting AGND and PGND.
Pin Descriptions
IN
Input Voltage
Dimming Input /
Under-Voltage Protection
CC
Internal Regulator Output
Bypass with 100 nF capacitor to AGND as close to
the device as possible in the circuit board layout.
Connect to AGND for zero current shutdown or
apply > 2.4V to enable device.
Connect a capacitor to AGND to set the
compensation.
Connect a resistor to AGND to set the signal current.
For analog dimming, connect a controlled current
source or a potentiometer to AGND as detailed in
the Analog Dimming section.
External RC network sets the predictive “off-time”
and thus the switching frequency.
Connect to PGND through the DAP copper pad to
TIMR.
Connect to a resistor divider from VOto program
output over-voltage lockout (OVLO). Turn-off
threshold is 1.24V and hysteresis for turn-on is
provided by 23 µA current source.
Connect a PWM signal for dimming as detailed in
the PWM Dimming section and/or a resistor divider
(UVLO). Turn-on threshold is 1.24V and hysteresis
for turn-off is provided by 23 µA current source.
Connect to pull-up resistor from VIN and N-channel
condition is latched by the timer.
Connect a capacitor to AGND to set the time delay
before a sensed fault condition is latched.
Connect to pull-up resistor from VIN and N-channel
LED current is not in regulation.
Connect to AGND if dimming with a series Pseries N-channel MosFET.
Connect to AGND through the DAP copper pad to
provide ground return for GATE and DDRV.
Bypass with 2.2 µF–3.3 µF ceramic capacitor to
PGND.
Connect to the drain of the main N-channel MosFET
sensing or to a sense resistor
installed in the source of the same device.
DS-ON
Connect the low side of all external resistor dividers
shutdown.
Connect through a series resistor to the positive side
of the LED current sense resistor.
Connect through a series resistor to the negative
side of the LED current sense resistor.
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Bill of Materials for 551600305-002 REVA
4 Bill of Materials for 551600305-002 REVA
Qty Part ID Part Value Manufacturer Part Number
2 C1, C12 0.1 µF X7R 10% 50V TDK C1608X5R1H104K
2 C2, C8 1.0 µF X7R 10% 50V MURATA GRM21BR71H105KA12L KA01L
1 C3 68 µF 20% 100V UCC EMVY101ARA680MKE
1 C4 0.1 µF X7R 10% 100V TDK C2012X7R2A104M
4 C6(a-d) 10 µF X7R 10% 50V (4 TDK C5750X7R1H106
installed for a total of 40 µF)
1 C7 1000 pF X5R 5% 100V MURATA C2012X5R2E102K
1 C9 2.2 µF X7R 10% 16V MURATA GRM21BR71C225KA01L
1 C10 10 nF X7R 10% 50V PANASONIC ECJ2VB1H103 KA12L
1 C11 47 pF COG/NPO 5% 50V PANASONIC ECJ2VG1H470 KA01L
1 D1 Schottky 100V 12A (or 6A) VISHAY 12CWQ10FNPBF (or 6CWQ10FNPBF)
1 D2 Zener 10V ON-SEMI BZX84C10-V
4 J1, J2, J4, J5 banana jack KEYSTONE 575-8
1 J3 1x2 male header (with shunt SAMTEC TSW-102-07-T-S
tab)
1 L1 47 µH 20% 6.3A COILCRAFT MSS1260-473MLB
2 Q1, Q2 NMOS 150V 50A (or 100V INFINEON (or IPD200N15N3 (or FDD3682)
32A) FAIRCHILD)
2 Q3, Q7 NMOS 60V 260 mA ON-SEMI 2N7002ET1G
1 Q4 PNP 40V 200 mA FAIRCHILD MMBT3906
1 Q5 PNP 150V 600 mA FAIRCHILD MMBT5401
1 Q6 NPN 300V 500 mA FAIRCHILD MMBTA42
2 R1, R11 12.4 kΩ 1% VISHAY CRCW080512k4FKEA
1 R2 0Ω 1% VISHAY CRCW08050000Z0EA
2 R3, R20 10Ω 1% VISHAY CRCW080510R0FKEA
1 R4 16.9 kΩ 1% VISHAY CRCW080516k9FKEA
3 R5, R7, R8 1.40 kΩ 1% VISHAY CRCW08051k40FKEA
1 R6 0.06Ω 1% 1W VISHAY WSL2512R0600FEA
1 R9 0.2Ω 1% 1W PANASONIC ERJ12RSFR20U
1 R10 35.7 kΩ 1% VISHAY CRCW080535k7FKEA
3 R12, R13, R19 10.0 kΩ 1% VISHAY CRCW080510k0FKEA
3 R14, R15, R17 100 kΩ 1% VISHAY CRCW0805100kFKEA
1 R18 432 kΩ 1% VISHAY CRCW0805432kFKEA
5 TP1, TP5, TP6, turret KEYSTONE 1502-2
TP10
1 U1 Buck-boost controller TI LM3423
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5 PCB Layout for 551600305-002 REVA
Figure 3. Top Layer
PCB Layout for 551600305-002 REVA
Figure 4. Bottom Layer
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2525
=
35.7 k: x 1 nF
fSW =
R10 x C7
= 700 kHz
2525
=
700 kHz x 1 nF
= 35.7 k:
R10 =
fSW x C7
21V
=
21V + 10V
= 0.677
D
MAX
=
VO + V
IN-MIN
V
O
21V
=
21V + 70V
= 0.231
D
MIN
=
VO + V
IN-MAX
V
O
D' = 1 - D = 1 - 0.467 = 0.533
D =
=
21V
VO + V
IN
21V + 24V
= 0.467
V
O
rD = N x r
LED
= 6 x 325 m: = 1.95:
VO = N x V
LED
= 6 x 3.5V = 21V
Design Procedure
6 Design Procedure
Refer to the LM3421/21Q1/21Q0 LM3423/23Q1/23Q0 N-Ch Controllers for Constant Current LED Drivers
(SNVS574 data sheet for design considerations.
6.1 Specifications
N = 6
V
= 3.5V
LED
r
= 325 mΩ
LED
VIN= 24V
V
= 10V; V
IN-MIN
fSW= 700 kHz
V
= 150 mV
SNS
I
= 700 mA
LED
Δi
= 350 mA
L-PP
Δi
Δv
I
LIM
V
V
LED-PP
IN-PP
= 4A
TURN-ON
TURN-OFF
= 50 mA
= 100 mV
IN-MAX
= 10V; V
=44V; V
HYS
HYSO
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= 70V
= 3.4V
= 10V
6.2 Operating Point
Solve for VOand rD:
Solve for D, D', D
MAX
, and D
6.3 Switching Frequency
Assume C7 = 1 nF and solve for R10:
The closest standard resistor is actually 35.7 kΩ therefore the fSWis:
MIN
(1)
(2)
:
(3)
(4)
(5)
(6)
(7)
6
AN-2010 LM3423 Buck-Boost 2 Layer Evaluation Board SNVA415C–June 2010–Revised May 2013
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(8)
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