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INPUT VOLTAGE (V)
EFFICIENCY (%)
100
95
90
85
80
75
15 20 25 30 35 40 45
1 Introduction
This demonstration board showcases the LM3409 PFET controller for a buck current regulator. It is
designed to drive 4 LEDs (VO= 15V) at a maximum average LED current (I
voltage (VIN= 24V). The switching frequency (fSW= 525 kHz) is targeted for the nominal operating point,
however fSWvaries across the entire operating range. The circuit can accept an input voltage of 6V-42V.
However, if the input voltage drops below the regulated LED string voltage, the converter goes into
dropout and VO= VINideally.
The PCB is made using 2 layers of 2 oz. copper with FR4 dielectric. The board showcases several
features of the LM3409 including both analog dimming using a potentiometer (R5) tied to the IADJ pin and
internal PWM dimming using the EN pin. There is a header (J1) with a removable jumper, which is used to
select PWM dimming or low power shutdown.
The board has a right angle connector (J2) which can mate with an external LED load board allowing for
the LEDs to be mounted close to the driver. This reduces potential ringing when there is no output
capacitor. Alternatively, the LED+ and LED- turrets can be used to connect the LED load.
This board can be easily modified to demonstrate other operating points as shown in Section 8. The
LM3409 / LM3409HV / LM3409Q / LM3409QHV / LM3409N PFET Buck Controller for High Power LED
Drivers (SNVS602) data sheet's Design Procedure can be used to design for any set of specifications.
User's Guide
SNVA391D–May 2009–Revised May 2013
AN-1954 LM3409 Demonstration Board
= 1A) from a DC input
LED
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SNVA391D–May 2009–Revised May 2013 AN-1954 LM3409 Demonstration Board
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Figure 1. Efficiency with 4 Series LEDS AT 1A
1
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IADJ
EN
CSN
LM3409
UVLO
C1
V
IN
VCC
COFF
GND
CSP
C4
R1
PGATE
C3
R3
R2
DAP
VIN
R4
1
2
3
4
5 6
7
8
9
10
R5
C
5
GND
U1
C2
LED+
LED-
1
2
3
5
6
7
14
13
12
10
9
8
J2
D1
L1
Q1
J1
VADJ
C6
Schematic
2 Schematic
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Figure 2. Board Schematic
3 Pin Descriptions
Pin(s) Name Description Application Information
1 UVLO Input under-voltage lockout Connect to a resistor divider from VINand GND. Turn-on threshold is
2 IADJ Analog LED current adjust Apply a voltage between 0 - 1.24V, connect a resistor to GND, or leave
3 EN Logic level enable Apply a voltage >1.74V to enable device, a PWM signal to dim, or a
4 COFF Off-time programming Connect resistor to VO, and capacitor to GND to set the off-time.
5 GND Ground Connect to the system ground.
6 PGATE Gate drive Connect to the gate of the external PFET.
7 CSN Negative current sense Connect to the negative side of the sense resistor.
8 CSP Positive current sense Connect to the positive side of the sense resistor (VIN).
9 VCC VIN- referenced linear regulator Connect at least a 1µF ceramic capacitor to VIN. The regulator provides
2
10 VIN Input voltage Connect to the input voltage.
DAP DAP Thermal pad on bottom of IC Connect to pin 5 (GND). Place 4-6 vias from DAP to bottom GND plane.
AN-1954 LM3409 Demonstration Board SNVA391D–May 2009–Revised May 2013
output power for the PFET drive.
Copyright © 2009–2013, Texas Instruments Incorporated
1.24V and hysteresis for turn-off is provided by a 22µA current source.
open to set the current sense threshold voltage.
voltage <0.5V for low power shutdown.
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4 Bill of Materials
Qty Part ID Part Value Manufacturer Part Number
1 U1 Buck controller Texas Instruments LM3409
1 C1 4.7µF X7R 20% 50V MURATA GRM55ER71H475MA01L
1 C2, C5 No Load
1 C3 470pF X7R 10% 50V TDK C1608X7R1H471K
1 C4 1.0µF X7R 10% 16V TDK C1608X7R1C105K
1 C6 0.1µF 50V 10% X7R MURATA C1608X7R1C104K
1 Q1 PMOS 70V 5.7A ZETEX ZXMP7A17KTC
1 D1 Schottky 60V 5A VISHAY CDBC560-G
1 L1 22 µH 20% 3.5A TDK SLF12565T-220M3R5
1 R1 15.4kΩ 1% VISHAY CRCW060315K4FKEA
1 R2 6.98kΩ 1% VISHAY CRCW06036K98FKEA
1 R3 49.9kΩ 1% VISHAY CRCW060349K9FKEA
1 R4 0.2Ω 1% 1W VISHAY WSL2512R2000FEA
1 R5 250kΩ potentiometer BOURNS 3352P-1-254
1 J1 MOLEX 22-28-4033
1 J2 SAMTEC TSSH-107-01-S-D-RA
2 VIN, GND KEYSTONE 575-8
3 VADJ, LED+, LED- KEYSTONE 1502-2
Bill of Materials
Table 1. Bill of Materials
SNVA391D–May 2009–Revised May 2013 AN-1954 LM3409 Demonstration Board
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PCB Layout
5 PCB Layout
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Figure 3. Top Layer
Figure 4. Bottom Layer
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AN-1954 LM3409 Demonstration Board SNVA391D–May 2009–Revised May 2013
Copyright © 2009–2013, Texas Instruments Incorporated
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