UCC5629
DESCRIPTION
The UCC5629 Multimode SCSI Terminator provides a smooth transition
into the next generation of the SCSI Parallel Interface (SPI-2). It automati
-
cally senses the bus, via DIFFB, and switches the termination to either sin
gle ended (SE) or low voltage differential (LVD) SCSI, dependent on which
type of devices are connected to the bus. The UCC5629 can not be used
on a HVD, EIA485, differential SCSI bus. If the UCC5629 detects a HVD
SCSI device, it switches to a high impedance state.
The Multimode terminator contains all functions required to terminate and
auto detect and switch modes for SPI-2 bus architectures. Single Ended
and Differential impedances and currents are trimmed for maximum effec
tiveness. Fail Safe biasing is provided to insure signal integrity. Device/Bus
type detection circuitry is integrated into the terminator to provide automatic
switching of termination between single ended and LVD SCSI and a high
impedance for HVD SCSI. The multimode function provides all the perform
ance analog functions necessary to implement SPI-2 termination in a sin
gle monolithic device.
The UCC5629 is offered in a 48 pin LQFP package for a temperature range
of 0°C to 70°C.
Multimode SCSI 14 Line Terminator
FEATURES
•
Auto Selection Single Ended (SE) or
Low Voltage Differential (LVD)
Termination
•
Meets SCSI-1, SCSI-2, SCSI-3, SPI,
Ultra (Fast-20), Ultra2 (SPI-2 LVD)
and Ultra3 Standards
•
2.7V to 5.25V Operation
•
Differential Failsafe Bias
•
Thermal packaging for low junction
temperature and better MTBF.
•
Reversed Polarity Disconnect
SLUS444 - NOVEMBER 1999
REF
1.25V
36
DISCNCT
REG
L1+
L14–
L14+
SOURCE/SINK REGULATOR
REF
1.3V
4.7µF .
35 DIFFSEN
–15mA ≤ I
SOURCE
≤ –5mA
50µA ≤ I
SINK
≤ 200µA
HPD
SE
34DIFFB
0.6V
2.15V
52.5
2
52.5
1
110
10
REF
2.7V
SE GND SWITCH
3TRMPWR
25
GND
4-9
HS/GND
28-33
HS/GND
L1–
124
52.5
12
52.5
11
110
124
10µA
1.3V
(NOISE LOAD)
MODE
SE
LVD
DISCNCT
ALL SWITCHES
UP
DOWN
OPEN
SE GND SWITCH
56mV
–+
+–
–+
56mV
56mV
56mV
+–
27
26
LVD
BLOCK DIAGRAM
UDG-99156
2
UCC5629
(TOP VIEW)
FQP Package
ABSOLUTE MAXIMUM RATINGS
TRMPWR Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6V
Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . 0V to TRMPWR
Package Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2W
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 sec.). . . . . . . . . . . . . +300°C
Recommended Operating Conditions . . . . . . . . . 2.7V to 5.25V
Currents are positive into negative out of the specified terminal.
Note: Consult Packaging Section of Databook for thermal limi
-
tations and considerations of package.
RECOMMENDED OPERATING CONDITIONS
TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.25V
Temperature Ranges . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
12
11
10
9
13
8
7
6
5
4
321
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
313233
34
35
36
48
47
46
45
44
43
42
41
40
39
38
37
TRMPWR
HS/GND
HS/GND
HS/GND
L1–
L1+
REG
HS/GND
HS/GND
HS/GND
L9–
L10+
L9+
DIFFSENS
DISCNCT
HS/GND
DIFFB
HS/GND
HS/GND
GND
SE
LVD
HS/GND
HS/GND
HS/GND
L4+
L3–
L3+
L2–
L2+
L4–
L5+
L6+
L5–
L7+
L6–
L7–
L11+
L11–
L10–
L12–
L13+
L12+
L14+
L14–
L13–
L8–
L8+
CONNECTION DIAGRAMS
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, these specifications apply for TA=TJ= 0°C to 70°C,
TRMPWR = 3.3V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
TRMPWR Supply Current Section
TRMPWR Supply Current LVD Mode 20 25 mA
SE Mode 1.6 10 mA
Disabled Terminator 250 400
A
Regulator Section
1.25V Regulator LVD Mode 1.15 1.25 1.35 V
1.25V Regulator Source Current V
REG
= 0V –375 –700 –1000 mA
1.25V Regulator Sink Current V
REG
= 3.3V 170 300 700 mA
1.3V Regulator Diff Sense 1.2 1.3 1.4 V
1.3V Regulator Source Current V
REG
= 0V –15 –5 mA
1.3V Regulator Sink Current V
REG
= 3.3V 50 200 A
2.7V Regulator SE Mode 2.5 2.7 3.0 V
2.7V Regulator Source Current V
REG
= 0V –375 –700 –1000 mA
2.7V Regulator Sink Current V
REG
= 3.3V 170 300 700 mA
Differential Termination Section
Differential Impedance 100 105 110
Common Mode Impedence (Note 2) 110 150 165
Differential Bias Voltage 100 125 mV
Common Mode Bias 1.15 1.25 1.35 V
Output Capacitance Single Ended Measurement to Ground (Note 1) 3 pF
3
UCC5629
PIN DESCRIPTIONS
DIFFB: Diff sense filter pin should be connected at a
0.1
F capacitor.
DIFFSENS: The SCSI bus Diff Sense line to detect what
types of devices are connected to the SCSI bus.
DISCNCT
: Disconnect pin shuts down the terminator
when it is not at the end of the bus. The disconnect pin
high enables the terminator.
LINE
n
–: Signal line active line for single ended or nega
-
tive line in differential applications for the SCSI bus.
LINE
n
+: Ground line for single ended or positive line for
differential applications for the SCSI bus.
LVD: TTL Compatible status bit indicating that the device
has detected the bus in LVD mode. If the terminator is
connected it is in LVD mode.
REG: Regulator bypass pin, must be connected to a
F capacitor.
SE: TTL Compatible status bit indicating that the device
has detected the bus in single ended mode. If the termi
-
nator is connected it is in single ended mode.
TRMPWR: V
IN
2.7V to 5.25V supply.
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for T
A=TJ
= 0°C to 70°C,
TRMPWR = 3.3V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Single Ended Termination Section
Impedance
Z
VL V
IL
X
X
=
−(.)02
, (Note 3)
102.3 110 117.7
Termination Current Signal Level 0.2V, All Lines Low –21 –24 –25.4 mA
Signal Level 0.5V –18 –22.4 mA
Output Leakage 400 nA
Output Capacitance Single Ended Measurement to Ground (Note 1) 3 pF
Single Ended GND SE Impedance I= 10mA 20 60
Disconnect and Diff Buffer Input Section
DISCNCT
Threshold 0.8 2.0 V
DISCNCT
Input Current 10 30 A
Diff Buffer Single Ended to LVD Threshold 0.5 0.7 V
Diff Buffer LVD to HPD Threshold 1.9 2.4 V
DIFFB Input Current –10 10
A
Status Bits (SE, LVD) Output Section
I
SOURCE
V
LOAD
= 2.4V –4 –6 mA
I
SINK
V
LOAD
= 0.4V 2 5 mA
Note 1: Guaranteed by design.Not 100% tested in production.
Note 2:
[]
Z
V
II
CM
VCM V VCM V
=
+−
12
06 06
.
–
(.)(.)
where VCM=voltage measured with L+ tied to L– and zero current applied
Note 3: VL
X
= Output voltage for each terminator minus output pin (L1– through L14–) with each pin unloaded.
IL
X
= Output current for each terminator minus output pin (L1– through L14–) with the minus output pin forced to 0.2V.
4
UCC5629
The ucc5629 is a Multi-mode active terminator with se
lectable single ended (SE) and low voltage differential
(LVD) SCSI termination integrated into a monolithic com
ponent. Mode selection is accomplished with the “diff
sense" signal.
The diff sense signal is a three level signal, which is
driven at each end of the bus by one active terminator. A
LVD or multi-mode terminator drives the diff sense line to
1.3 V. If diff sense is at 1.3 V, then bus is in LVD mode. If
a single ended SCSI device is plugged into the bus, the
diff sense line is shorted to ground. With diff sense
shorted to ground, the terminator changes to single
ended mode to accommodate the SE device. If a HVD
device is plugged in to the bus, the diff sense line is
pulled high and the terminator shuts down.
The diff sense line is driven and monitored by the termi
nator through a 50Hz noise filter at the DIFFB input pin.
A set of comparators, that allow for ground shifts, deter
mine the bus status as follows. Any diff sense signal below 0.5V is single ended, between 0.7V and 1.9V is LVD
and above 2.2V is HVD.
In the single ended mode, a multi-mode terminator has a
110
terminating resistor connected to a 2.7V termination voltage regulator. The 2.7V regulator is used on all
Unitrode terminators designed for 3.3V systems. This requires the terminator to operate in specification down to
2.7V TRMPWR voltage to allow for the 3.3V supply tolerance, an unidirectional fusing device and cable drop. At
each L+ pin, a ground driver drives the pin to ground,
while in single ended mode. The ground driver is spe
cially designed so it will not effect the capacitive balance
of the bus when the device is in LVD or disconnect mode.
The device requirements call for 1.5pF balance on the
lines of a differential pair. The terminator capacitance has
to be a small part of the capacitance imbalance.
Layout is very critical for Ultra2 and Ultra3 systems.
Multi-layer boards need to adhere to the 120
imped
ance standard, including connector and feed-through.
This is normally done on the outer layers with 4 mil etch
and 4 mil spacing between the runs within a pair, and a
minimum of 8 mil spacing to the next pair. This spacing
between the pairs reduces potential crosstalk. Beware of
feed-throughs and each through hole connection adds a
lot of capacitance. Standard power and ground plane
spacing yields about 1pF to each plane. Each feedthrough will add about 2.5pF to 3.5pF.Enlarging the
clearance holes on both power and ground planes can
reduce the capacitance and opening up the power and
ground planes under the connector can reduce the ca
-
pacitance for through hole connector applications. Mi
crostrip technology is normally too low of impedance and
should not be used. It is designed for 50
rather than
120
differential systems.
Capacitance balance is critical for Ultra2 and Ultra3. The
balance capacitance standard is 0.5pF per line with the
balance between pairs of 2pF. The components are de
signed with very tight balance, typically 0.1pF between
pins in a pair and 0.3pF between pairs. Layout balance is
critical, feed-throughs and etch length must be balanced,
preferably no feed-throughs would be used. Capacitance
for devices should be measured in the typical application,
material and components above and below the circuit
board effect the capacitance.
Multi-mode terminators need to consider power dissipation; the ucc5629 is offered in a power package with heat
sink ground pins. These heat sink/ground pins are directly connected to the die mount paddle under the die
and conduct heat from the die to reduce the junction
temperature. These pins need to be connected to etch
area or a feed-through per pin connecting to the ground
plane layer on a multi-layer board.
In 3.3V TRMPWR systems, the UCC3912 should be
used to replace the fuse and diode. This reduces the
voltage drop, allowing for cable drop to the far end termi
nator. 3.3V battery systems normally have a 10% toler
ance. The UCC3912 is 150mV drop under LVD loads,
allowing 150mV drop in the cable system. All Unitrode
LVD and multi-mode terminators are designed for 3.3V
systems, operating down to 2.7V.
APPLICATION INFORMATION
5
UCC5629
UNITRODE CORPORATION
7 CONTINENTAL BLVD.• MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3460
REG
TRMPWR
DISCNCT
TRMPWR
DIFF B REGDIFF B
TRMPWRTERMPWR
4.7µF
.
0.1µF
.
4.7µF
0.1µF
.
3
36
35
10 34
35
34 10
3
DISCNCT
36
DIFFSENSEDIFFSENSE
REG
TRMPWR
DISCNCT
DIFF B
4.7µF
.
3
36
10 34
DATA LINES (15)
TRMPWR
REGDIFF B
4.7µF
34 10
DATA LINES (15)
3
DISCNCT
36
4.7µF
.
20k
220k
20k
SCSI CONTROLLER
DIFFSENS
4.7µF
CONTROL LINES (9)
L1+
L1–
L9+
L9–
L1+
L1–
L9+
L9–
4 BITS OF THE HIGH BYTE
L10+
L10–
L13+
L13–
L10+
L10–
L13+
L13–
L1+
L1–
L9+
L9–
L1+
L1–
L9+
L9–
LOW BYTE 8+ PARITY
L10+
L10–
L14+
L14–
L10+
L10–
L14+
L14–
HIGH BYTE 4 BITS
PLUS PARITY
TYPICAL APPLICATION
Note: A 220k resistor is added to ground to insure the transceivers will come up in single-ended mode when no terminator is en
-
abled.The controller DIFFSENS ties to the DIFFB pin on the terminators, only one RC network should be on a device.
UDG-99157
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