Texas Instruments UCC3958PWPTR-4, UCC3958PWPTR-3, UCC3958PWPTR-2, UCC3958PWPTR-1, UCC3958PWP-4 Datasheet

FEATURES

• Protects Sensitive Lithium-Ion Cells Form
Over Charging and Over Discharging

• Dedicated for One Cell Applications

• Does Not Require External FETs or Sense

Resistors

• Internal Precision Trimmed Charge and
Discharge Voltage Limits

• Extremely Low Power Drain

• Low FET Switch Voltage Drop of 150mV

Typical for 3A Currents

• Short Circuit Current Protection (with User
Programmable Delay)

• 3A Current Capacity

• Thermal Shutdown

• User Controlled Enable Pin

Single Cell Lithium-Ion Battery Protection Circuit

BLOCK DIAGRAM

UDG-98050

UCC3958 -1/-2/-3/-4

PRELIMINARY

DESCRIPTION

UCC3958 is a monolithic BCMOS lithium-ion battery protection
circuit that is designed to enhance the useful operating life of
one cell rechargeable battery packs. Cell protection features
consist of internally trimmed charge and discharge voltage lim­its, discharge current limit with a delayed shutdown and an ultra
low current sleep mode state when the cell is discharged. Addi­tional features include an on chip MOSFET for reduced exter­nal component count and a charge pump for reduced power
losses while charging or discharging a low cell voltage battery
pack. This protection circuit requires a minimum number of ex­ternal components and is able to operate and safely shutdown
in the presence of a short circuit load.

6/98

2

UCC3958 -1/-2/-3/-4

ELECTRICAL CHARACTERISTICS:

Unless otherwise specified, PACK+ = 4V, –20°C < TA< 70°C. All voltages

measured with respect to BNEG. TA=T

J

.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

State Transition Thresholds

NORM to OV (VOV) UCC3958-1 4.15 4.20 4.25 V
OV to NORM (V

THI

) UCC3958-1 3.85 3.90 3.95 V
NORM to OV (VOV) UCC3958-2 4.20 4.25 4.30 V
OV to NORM (V

THI

) UCC3958-2 3.90 3.95 4.00 V
NORM to OV (VOV) UCC3958-3 4.25 4.30 4.35 V
OV to NORM (V

THI

) UCC3958-3 3.95 4.00 4.05 V
NORM to OV (V

OV

) UCC3958-4 4.30 4.35 4.40 V

OV to NORM (V

THI

) UCC3958-4 4.00 4.05 4.10 V
NORM to UV (VUV) (Note 1) 2.25 2.35 2.45 V
UV to NORM (V

TLO

) 2.55 2.65 2.75 V

OV, UV Delay Time (TD) All Dash Numbers 7 18 34 msec

ABSOLUTE MAXIMUM RATINGS

Supply Voltage (PACK+ to BNEG)...................7.5V

Maximum Continuous Charge Current .................3A

Maximum Charger Voltage (PACK+ to PACK–) ..........9V

Maximum Reverse Voltage (PACK+ to PACK–) .........–8V

Storage Temperature ...................–65°C to +150°C

Junction Temperature...................–55°C to +150°C

Lead Temperature (Soldering, 10 sec.) .............+300°C

Currents are positive into, negative out of the specified terminal.
Consult Packaging Section of Databook for thermal limitations and
considerations of packages.

CONNECTION DIAGRAMS

SOIC-16 (Top View)
DP Package

TSSOP-24 (Top View)
PWP Package

3

UCC3958 -1/-2/-3/-4

ELECTRICAL CHARACTERISTICS:

Unless otherwise specified, PACK+ = 4V, –20°C < TA< 70°C. All voltages

measured with respect to BNEG. TA=T

J

.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

BNEG/PACK - SWITCH

V

BNEG-VPACK

NORM, I

SWITCH

= 2A –100 –150 mV

NORM, I

SWITCH

= –2A 100 150 mV

V

PACK

+>VOV,I

SWITCH

= 20mA to 2A,

(OV State)

–100 –300 mV

V

PACK

+ = 2.5V, I

SWITCH

= –20mA to –2A,

(UV State)

100 600 mV

RDS

ON

NORM I

SWITCH

=2A 50 75 mΩ

NORM I

SWITCH

= –2A 50 75 mΩ

I

BNEG

– (Charger Leakage Current in OV) V

PACK

+>VOV(OV State)

([V

PACK

+]–[V

PACK

–]=6V)

120µA

BIAS Current

I

PACK

+V

PACK

+>V

UV

720µA

I

PACK

+ In Super Low Power Mode (V

PACK

+<VUV) 1 1.5 µA

V

BAT

Minimum Operating Cell Voltage 1.5 V

Battery Sample Rate (TS) 71217ms

Short Circuit Protection

ITHLD 2.75 5.25 7.25 A
TDLY CDLY = 0 350 µs

CDLY = 100pF
(Maximum Recommended Value)

2.5 ms

R

RESET

Overcurrent Reset Resistance 7.5 MΩ

LPWARN Output

LP Warn Threshold 2.55 2.65 2.75 V
TR C

LOAD

= 100pF, 10% to 90% of PACK+ 280 560 ns

TF C

LOAD

= 100pF, 10% to 90% of PACK+ 120 280 ns

V

HIGH(VPACK

+–V

LPWARN

)I

SINK

= 200µA, VUV<V

PACK

+<V

TLO

0.3 0.4 V

V

LOW

I

SOURCE

= 200µA, V

TLO<VPACK

+

<V

UV

0.3 0.4 V

Measure Delay 6ms

OVUVB Output

TR C

LOAD

= 100pF, Hi Z to 90% of PACK+ 280 560 ns

TF C

LOAD

= 100pF, Hi Z to 10% of PACK+ 140 280 ns

V

HIGH(VPACK

+

–V

OVUVB

)I

SOURCE

= 200µA, VPACK+ ≥ V

OV

0.3 0.4 V

V

LOW

I

SINK

=

200µA, VPACK+ ≤ V

UV

0.3 0.4 V

Z

OUT

Output Tristated 10 MΩ

Measure Delay 18 ms

CE Input

I

SINK

150 nA

Note 1: Other threshold voltages are available.