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FEATURES
• Precision 4.1V Reference (1%)
• High Efficiency Battery Charger Solution
• Average Current Mode Control from
Trickle to Over Charge
• Resistor Programmable Charge Currents
• Internal State Logic Provides Four
Charge States
• Programmable Over Charge Time
• Fully Differential Switch Mode Current
Sensing
• CHG Pin Initiates Charging
Switch Mode Lithium-Ion Battery Charger Controller
BLOCK DIAGRAM
UDG-96197-1
UCC2956
UCC3956
PRELIMINARY
DESCRIPTION
The UCC3956 family of Switch Mode Lithium-Ion Battery Charger
Controllers accurately control lithium-ion battery charging with a
highly efficient average current control loop.This chip is designed to
work as a stand alone charger controller for a single cell or multiple
cell battery pack. This chip combines charge state logic and average current PWM control circuitry with a 14 bit counter to program
the over charge time. The charge state logic indicates current or
voltage control depending on the charge state. The chip includes
undervoltage lockout circuitry to insure sufficient supply voltage is
present before output switching starts. Additional circuit blocks include a differential current sense amplifier, a 1% voltage reference,
voltage and current error amplifiers, PWM latch, charge state decode bits, and a 500mA output driver.
2
UCC2956
UCC3956
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, TA = –40°C to +85 for UCC2956 and 0°C to +70°C for
UCC3956, COSC = 500pF, RSET = 70k, CTO = 169nF, VDD = 12V, TA =TJ.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Current Sense Amplifier (CSA)
DC Gain CS– = 0, CS+ = –50mV and CS+ = –250mV 4.9 5 5.1 V/V
CS+ = 0, CS– = 50mV and CS– = 250mV 4.9 5 5.1 V/V
CAO CS+ = CS– = 0V 1.99 2.05 2.11 mV
CMRR V
CM = 1.1V to 18V, VDD = 18V 50 65 dB
VOL CS+ = –0.2V, CS– = 0.5V, IO = 1mA 0.3 V
V
OH CS+ = 0.5V, CS– = –0.2V, IO = –500µA 3.7 4.1 4.4 V
Output Source Current IBAT = 3V, VID = 700mV –500 µA
Output Sink Current IBAT = 1V, VID = –700mV 500 µA
3dB Bandwidth V
CM = 0V, CS+ - CS– = 100mV (Note 2) 0.1 3 MHz
Current Error Amplifier (CEA)
IB 8V < V
DD< 18V, CHGENB = REF 0.1 0.5 µA
CA– Voltage 8V < V
DD < 18V, CAO = CA– 1.99 2.05 2.11 V
AVO 60 90 dB
GBW T
J = 25°C, F = 100kHz 1 3 MHz
V
OL IO = 250µA, CA– = 3V 0.5 V
VOH IO = –1mA, CA– = 2V 3.7 4.1 4.4 V
I
CA–, Itrck_control VCHGENB = GND 8 10 12 µA
Voltage Error Amplifier (VEA)
IB Total Bias Current; Regulating Level 0.5 3 µA
VIO 8V < V
DD < 18V, –0.2 < VCM < 5V 10 mV
AVO 60 90 dB
GBW T
J = 25°C, F = 100kHz 0.75 3 MHz
VOL IO = 500µA, VA– = 3.8V 0.2 1 V
V
OH IO = –500µA, VA– = 4.4V 3.8 4.1 4.3 V
VAO Leakage V
CHGENB = GND, STAT0 = 0 and STAT1 = 0, VAO = 2.05V –1 1 µA
Pulse Width Modulator
Maximum Duty Cycle CAO = 0.5V 85 92 100 %
Modulator Gain CAO = 1.7V, 2.1V 57 64 71 %/V
ABSOLUTE MAXIMUM RATINGS
Supply Voltage VDD, OUT .........................20V
Output Current Sink
Continuous ................................120mA
Peak .....................................600mA
Output Current Source
Continuous ................................120mA
Peak .....................................600mA
CS+, CS–
Voltage ...............................–0.5 to VDD
Current with CS+, CS– less than –0.5.............50mA
Remaining Pin Voltages .....................–0.3V to 6V
Storage Temperature ...................–65°C to +150°C
Junction Temperature...................–55°C to +150°C
Lead Temperature (Soldering, 10 sec.).............+300°C
Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages.
CONNECTION DIAGRAM
DIP-20, SOIC-20 (Top View)
JorN,DWPackages
3
UCC2956
UCC3956
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, TA = –40°C to +85 for UCC2956 and 0°C to +70°C for
UCC3956, COSC = 500pF, RSET = 70k, CTO = 169nF, VDD = 12V, TA =TJ.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PWM Oscillator (OSC)
Frequency 7V < V
DD < 18V 90 100 110 kHz
Over Charge Timer (OCT)
Frequency 7V < V
DD < 18V (Note 1) 4.65 5 5.35 Hz
Reference
Initial Accuracy T
J = 25°C 4.06 4.1 4.14 V
Accuracy 0 < T
J < 70°C, VDD = 8V to 18V 4.05 4.1 4.15 V
Load Regulation 0 < I
O < 2mA 3 15 mV
Accuracy –40°C < T
J < 85°C, VDD = 8V to 18V 4.03 4.1 4.17 V
Short Circuit I REF = 0V 8 20 30 mA
Charge Enable Comparator (CEC)
Threshold Voltage 1.9 2.05 2.15 V
Input Bias Current –0.5 –0.2 µA
Voltage Sense Comparator (VSC)
Threshold Voltage Volts below VA+ 50 125 200 mV
Charge Current Comparator (CIC)
Threshold Voltage CS+ = CS– = 0, Function of IBAT = 2.05V 2 2.05 2.1 V/V
Input Bias Current Total Bias Current; Regulating Level –0.5 –0.2 µA
Output Stage
V
OL IO = 10mA 0.1 0.3 V
V
OH, Volts Below VDD IO = –10mA 0.1 0.5 V
Rise Time COUT = 1nF 30 70 ns
Fall Time C
OUT = 1nF 30 70 ns
STAT0 and STAT1 Open Drain Outputs
Maximum Sink Current V
OUT = 12V 15 30 mA
V
OL IOUT = 1mA 0.1 0.2 V
Charge Control (CHG)
Threshold Voltage 1.5 1.8 2.1 V
Charge Pin Pull Down
Resistance
3.0 5.0 kΩ
UVLO Section
Turn-on Threshold 6.0 6.5 6.75 V
Hysteresis 100 150 400 mV
IDD
IDD (Run) 58mA
IDD (UVLO) V
DD = 5V 0.25 0.75 mA
PIN DESCRIPTIONS
CA–: The inverting input to the current error amplifier.
CAO: The output of the current error amplifier and invert-
ing input of the PWM comparator. This pin is driven high
during shutdown.
CS–, CS+: The inverting and non-inverting inputs to the
current sense amplifier. This amplifier has a fixed gain of
5.
CHG: A rising edge triggered input pin that indicates
charging. Once the internal 14 bit timer has timed out the
chip enters its shutdown charge state. At this point CHG
is pulled low by an internal buffer. Another low to high
transition is required to reset the timer and restart charging.
CHGENB: The input to a comparator that detects when
the battery voltage is low and places the charger in
trickle charge. The charge enable comparator forces the
output of the voltage error amplifier to a high impedance
state while forcing a fixed 10µA current into the CA– to
set the trickle charge.
COSC: The oscillator ramp pin which has a capacitor
(COSC) to ground. The ramp oscillates between 0.8V to
3.2V and the frequency is determined by: